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diff --git a/include/nvgpu/sec2if/sec2_if_sec2.h b/include/nvgpu/sec2if/sec2_if_sec2.h
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1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef NVGPU_SEC2_IF_SEC2_H
24#define NVGPU_SEC2_IF_SEC2_H
25
26/*
27 * SEC2 Command/Message Interfaces - SEC2 Management
28 */
29
30/*
31 * Defines the identifiers various high-level types of sequencer commands and
32 * messages.
33 * _SEC2_INIT - sec2_init_msg_sec2_init
34 */
35enum
36{
37 NV_SEC2_INIT_MSG_ID_SEC2_INIT = 0U,
38};
39
40/*
41 * Defines the logical queue IDs that must be used when submitting commands
42 * to or reading messages from SEC2. The identifiers must begin with zero and
43 * should increment sequentially. _CMDQ_LOG_ID__LAST must always be set to the
44 * last command queue identifier. _NUM must always be set to the last
45 * identifier plus one.
46 */
47#define SEC2_NV_CMDQ_LOG_ID 0U
48#define SEC2_NV_CMDQ_LOG_ID__LAST 0U
49#define SEC2_NV_MSGQ_LOG_ID 1U
50#define SEC2_QUEUE_NUM 2U
51
52struct sec2_init_msg_sec2_init {
53 u8 msg_type;
54 u8 num_queues;
55
56 u16 os_debug_entry_point;
57
58 struct
59 {
60 u32 queue_offset;
61 u16 queue_size;
62 u8 queue_phy_id;
63 u8 queue_log_id;
64 } q_info[SEC2_QUEUE_NUM];
65
66 u32 nv_managed_area_offset;
67 u16 nv_managed_area_size;
68};
69
70union nv_flcn_msg_sec2_init {
71 u8 msg_type;
72 struct sec2_init_msg_sec2_init sec2_init;
73};
74
75#endif /* NVGPU_SEC2_IF_SEC2_H */