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Diffstat (limited to 'include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h')
-rw-r--r--include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h143
1 files changed, 0 insertions, 143 deletions
diff --git a/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h b/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
deleted file mode 100644
index ce55f67..0000000
--- a/include/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#ifndef NVGPU_PMUIF_NVGPU_GPMU_CMDIF_H
23#define NVGPU_PMUIF_NVGPU_GPMU_CMDIF_H
24
25#include <nvgpu/flcnif_cmn.h>
26#include "gpmuif_cmn.h"
27#include "gpmuif_pmu.h"
28#include "gpmuif_ap.h"
29#include "gpmuif_pg.h"
30#include "gpmuif_perfmon.h"
31#include "gpmuif_acr.h"
32#include "gpmuifboardobj.h"
33#include "gpmuifclk.h"
34#include "gpmuifperf.h"
35#include "gpmuifperfvfe.h"
36#include "gpmuifpmgr.h"
37#include "gpmuifvolt.h"
38#include "gpmuiftherm.h"
39#include "gpmuifthermsensor.h"
40#include "gpmuifseq.h"
41#include "gpmu_super_surf_if.h"
42
43/*
44 * Command requesting execution of the RPC (Remote Procedure Call)
45 */
46struct nv_pmu_rpc_cmd {
47 /* Must be set to @ref NV_PMU_RPC_CMD_ID */
48 u8 cmd_type;
49 /* RPC call flags (@see PMU_RPC_FLAGS) */
50 u8 flags;
51 /* Size of RPC structure allocated
52 * within NV managed DMEM heap
53 */
54 u16 rpc_dmem_size;
55 /*
56 * DMEM pointer of RPC structure allocated
57 * within RM managed DMEM heap.
58 */
59 u32 rpc_dmem_ptr;
60};
61
62#define NV_PMU_RPC_CMD_ID 0x80U
63
64/* Message carrying the result of the RPC execution */
65struct nv_pmu_rpc_msg {
66 /* Must be set to @ref NV_PMU_RPC_MSG_ID */
67 u8 msg_type;
68 /* RPC call flags (@see PMU_RPC_FLAGS)*/
69 u8 flags;
70 /*
71 * Size of RPC structure allocated
72 * within NV managed DMEM heap.
73 */
74 u16 rpc_dmem_size;
75 /*
76 * DMEM pointer of RPC structure allocated
77 * within NV managed DMEM heap.
78 */
79 u32 rpc_dmem_ptr;
80};
81
82#define NV_PMU_RPC_MSG_ID 0x80U
83
84struct pmu_cmd {
85 struct pmu_hdr hdr;
86 union {
87 struct pmu_perfmon_cmd perfmon;
88 struct pmu_pg_cmd pg;
89 struct pmu_zbc_cmd zbc;
90 struct pmu_acr_cmd acr;
91 struct nv_pmu_boardobj_cmd boardobj;
92 struct nv_pmu_perf_cmd perf;
93 struct nv_pmu_volt_cmd volt;
94 struct nv_pmu_clk_cmd clk;
95 struct nv_pmu_pmgr_cmd pmgr;
96 struct nv_pmu_therm_cmd therm;
97 struct nv_pmu_rpc_cmd rpc;
98 } cmd;
99};
100
101struct pmu_msg {
102 struct pmu_hdr hdr;
103 union {
104 struct pmu_init_msg init;
105 struct pmu_perfmon_msg perfmon;
106 struct pmu_pg_msg pg;
107 struct pmu_rc_msg rc;
108 struct pmu_acr_msg acr;
109 struct nv_pmu_boardobj_msg boardobj;
110 struct nv_pmu_perf_msg perf;
111 struct nv_pmu_volt_msg volt;
112 struct nv_pmu_clk_msg clk;
113 struct nv_pmu_pmgr_msg pmgr;
114 struct nv_pmu_therm_msg therm;
115 struct nv_pmu_rpc_msg rpc;
116 } msg;
117};
118
119#define PMU_UNIT_REWIND (0x00U)
120#define PMU_UNIT_PG (0x03U)
121#define PMU_UNIT_INIT (0x07U)
122#define PMU_UNIT_ACR (0x0AU)
123#define PMU_UNIT_PERFMON_T18X (0x11U)
124#define PMU_UNIT_PERFMON (0x12U)
125#define PMU_UNIT_PERF (0x13U)
126#define PMU_UNIT_RC (0x1FU)
127#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1EU)
128#define PMU_UNIT_CLK (0x0DU)
129#define PMU_UNIT_THERM (0x14U)
130#define PMU_UNIT_PMGR (0x18U)
131#define PMU_UNIT_VOLT (0x0EU)
132
133#define PMU_UNIT_END (0x23U)
134#define PMU_UNIT_INVALID (0xFFU)
135
136#define PMU_UNIT_TEST_START (0xFEU)
137#define PMU_UNIT_END_SIM (0xFFU)
138#define PMU_UNIT_TEST_END (0xFFU)
139
140#define PMU_UNIT_ID_IS_VALID(id) \
141 (((id) < PMU_UNIT_END) || ((id) >= PMU_UNIT_TEST_START))
142
143#endif /* NVGPU_PMUIF_NVGPU_GPMU_CMDIF_H*/
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-30 14:24:00 -0400