1 files changed, 0 insertions, 102 deletions
diff --git a/include/nvgpu/pmuif/gpmuiftherm.h b/include/nvgpu/pmuif/gpmuiftherm.h
deleted file mode 100644
index 115e7ab..0000000
--- a/include/nvgpu/pmuif/gpmuiftherm.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
-* Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
-*
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
-*/
-#ifndef NVGPU_PMUIF_GPMUIFTHERM_H
-#define NVGPU_PMUIF_GPMUIFTHERM_H
-#include <nvgpu/flcnif_cmn.h>
-#define NV_PMU_THERM_CMD_ID_RPC                                      0x00000002
-#define NV_PMU_THERM_MSG_ID_RPC                                      0x00000002
-#define NV_PMU_THERM_RPC_ID_SLCT                                     0x00000000
-#define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET                   0x00000006
-#define NV_PMU_THERM_EVENT_THERMAL_1                                 0x00000004
-#define NV_PMU_THERM_CMD_ID_HW_SLOWDOWN_NOTIFICATION                 0x00000001
-#define NV_RM_PMU_THERM_HW_SLOWDOWN_NOTIFICATION_REQUEST_ENABLE      0x00000001
-#define NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION           0x00000001
-struct nv_pmu_therm_rpc_slct_event_temp_th_set {
-        s32 temp_threshold;
-        u8 event_id;
-        flcn_status flcn_stat;
-};
-struct nv_pmu_therm_rpc_slct {
-        u32 mask_enabled;
-        flcn_status flcn_stat;
-};
-struct nv_pmu_therm_rpc {
-        u8 function;
-        bool b_supported;
-        union {
-                struct nv_pmu_therm_rpc_slct slct;
-                struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set;
-        } params;
-};
-struct nv_pmu_therm_cmd_rpc {
-        u8 cmd_type;
-        u8 pad[3];
-        struct nv_pmu_allocation request;
-};
-struct nv_pmu_therm_cmd_hw_slowdown_notification {
-        u8 cmd_type;
-        u8 request;
-};
-#define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET       \
-        offsetof(struct nv_pmu_therm_cmd_rpc, request)
-struct nv_pmu_therm_cmd {
-        union {
-                u8 cmd_type;
-                struct nv_pmu_therm_cmd_rpc rpc;
-                struct nv_pmu_therm_cmd_hw_slowdown_notification hw_slct_notification;
-        };
-};
-struct nv_pmu_therm_msg_rpc {
-        u8 msg_type;
-        u8 rsvd[3];
-        struct nv_pmu_allocation response;
-};
-struct nv_pmu_therm_msg_event_hw_slowdown_notification {
-        u8 msg_type;
-        u32 mask;
-};
-#define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET       \
-        offsetof(struct nv_pmu_therm_msg_rpc, response)
-struct nv_pmu_therm_msg {
-        union {
-                u8 msg_type;
-                struct nv_pmu_therm_msg_rpc rpc;
-                struct nv_pmu_therm_msg_event_hw_slowdown_notification hw_slct_msg;
-        };
-};
-#endif /* NVGPU_PMUIF_GPMUIFTHERM_H */

diff --git a/include/nvgpu/pmuif/gpmuiftherm.h b/include/nvgpu/pmuif/gpmuiftherm.h deleted file mode 100644 index 115e7ab..0000000 --- a/include/nvgpu/pmuif/gpmuiftherm.h +++ /dev/null
@@ -1,102 +0,0 @@
1	/*
2	* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20	* DEALINGS IN THE SOFTWARE.
21	*/
22
23	#ifndef NVGPU_PMUIF_GPMUIFTHERM_H
24	#define NVGPU_PMUIF_GPMUIFTHERM_H
25
26	#include <nvgpu/flcnif_cmn.h>
27
28	#define NV_PMU_THERM_CMD_ID_RPC 0x00000002
29	#define NV_PMU_THERM_MSG_ID_RPC 0x00000002
30	#define NV_PMU_THERM_RPC_ID_SLCT 0x00000000
31	#define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET 0x00000006
32	#define NV_PMU_THERM_EVENT_THERMAL_1 0x00000004
33	#define NV_PMU_THERM_CMD_ID_HW_SLOWDOWN_NOTIFICATION 0x00000001
34	#define NV_RM_PMU_THERM_HW_SLOWDOWN_NOTIFICATION_REQUEST_ENABLE 0x00000001
35	#define NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION 0x00000001
36
37	struct nv_pmu_therm_rpc_slct_event_temp_th_set {
38	s32 temp_threshold;
39	u8 event_id;
40	flcn_status flcn_stat;
41	};
42
43	struct nv_pmu_therm_rpc_slct {
44	u32 mask_enabled;
45	flcn_status flcn_stat;
46	};
47
48	struct nv_pmu_therm_rpc {
49	u8 function;
50	bool b_supported;
51	union {
52	struct nv_pmu_therm_rpc_slct slct;
53	struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set;
54	} params;
55	};
56
57	struct nv_pmu_therm_cmd_rpc {
58	u8 cmd_type;
59	u8 pad[3];
60	struct nv_pmu_allocation request;
61	};
62
63	struct nv_pmu_therm_cmd_hw_slowdown_notification {
64	u8 cmd_type;
65	u8 request;
66	};
67
68	#define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET \
69	offsetof(struct nv_pmu_therm_cmd_rpc, request)
70
71	struct nv_pmu_therm_cmd {
72	union {
73	u8 cmd_type;
74	struct nv_pmu_therm_cmd_rpc rpc;
75	struct nv_pmu_therm_cmd_hw_slowdown_notification hw_slct_notification;
76	};
77	};
78
79	struct nv_pmu_therm_msg_rpc {
80	u8 msg_type;
81	u8 rsvd[3];
82	struct nv_pmu_allocation response;
83	};
84
85	struct nv_pmu_therm_msg_event_hw_slowdown_notification {
86	u8 msg_type;
87	u32 mask;
88	};
89
90	#define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET \
91	offsetof(struct nv_pmu_therm_msg_rpc, response)
92
93	struct nv_pmu_therm_msg {
94	union {
95	u8 msg_type;
96	struct nv_pmu_therm_msg_rpc rpc;
97	struct nv_pmu_therm_msg_event_hw_slowdown_notification hw_slct_msg;
98	};
99	};
100
101	#endif /* NVGPU_PMUIF_GPMUIFTHERM_H */
102