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-rw-r--r--include/nvgpu/os_fence.h138
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diff --git a/include/nvgpu/os_fence.h b/include/nvgpu/os_fence.h
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1/*
2 * nvgpu os fence
3 *
4 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef NVGPU_OS_FENCE_H
26#define NVGPU_OS_FENCE_H
27
28#include <nvgpu/errno.h>
29
30struct nvgpu_semaphore;
31struct channel_gk20a;
32struct priv_cmd_entry;
33struct nvgpu_nvhost_dev;
34
35/*
36 * struct nvgpu_os_fence adds an abstraction to the earlier Android Sync
37 * Framework, specifically the sync-fence mechanism and the newer DMA sync
38 * APIs from linux-4.9. This abstraction provides the high-level definition
39 * as well as APIs that can be used by other OSes in future to have their own
40 * alternatives for the sync-framework.
41 */
42struct nvgpu_os_fence;
43
44/*
45 * struct nvgpu_os_fence depends on the following ops structure
46 */
47struct nvgpu_os_fence_ops {
48 /*
49 * This API is used to iterate through multiple fence points within the
50 * fence and program the pushbuffer method for wait command.
51 */
52 int (*program_waits)(struct nvgpu_os_fence *s,
53 struct priv_cmd_entry *wait_cmd,
54 struct channel_gk20a *c,
55 int max_wait_cmds);
56
57 /*
58 * This should be the last operation on the OS fence. The
59 * OS fence acts as a place-holder for the underlying fence
60 * implementation e.g. sync_fences. For each construct/fdget call
61 * there needs to be a drop_ref call. This reduces a reference count
62 * for the underlying sync_fence.
63 */
64 void (*drop_ref)(struct nvgpu_os_fence *s);
65
66 /*
67 * Used to install the fd in the corresponding OS. The underlying
68 * implementation varies from OS to OS.
69 */
70 void (*install_fence)(struct nvgpu_os_fence *s, int fd);
71};
72
73/*
74 * The priv structure here is used to contain the struct sync_fence
75 * for LINUX_VERSION <= 4.9 and dma_fence for LINUX_VERSION > 4.9
76 */
77struct nvgpu_os_fence {
78 void *priv;
79 struct gk20a *g;
80 const struct nvgpu_os_fence_ops *ops;
81};
82
83/*
84 * This API is used to validate the nvgpu_os_fence
85 */
86static inline int nvgpu_os_fence_is_initialized(struct nvgpu_os_fence *fence)
87{
88 return (fence->ops != NULL);
89}
90
91#ifdef CONFIG_SYNC
92
93int nvgpu_os_fence_sema_create(
94 struct nvgpu_os_fence *fence_out,
95 struct channel_gk20a *c,
96 struct nvgpu_semaphore *sema);
97
98int nvgpu_os_fence_fdget(
99 struct nvgpu_os_fence *fence_out,
100 struct channel_gk20a *c, int fd);
101
102#else
103
104static inline int nvgpu_os_fence_sema_create(
105 struct nvgpu_os_fence *fence_out,
106 struct channel_gk20a *c,
107 struct nvgpu_semaphore *sema)
108{
109 return -ENOSYS;
110}
111static inline int nvgpu_os_fence_fdget(
112 struct nvgpu_os_fence *fence_out,
113 struct channel_gk20a *c, int fd)
114{
115 return -ENOSYS;
116}
117
118#endif /* CONFIG_SYNC */
119
120#if defined(CONFIG_TEGRA_GK20A_NVHOST) && defined(CONFIG_SYNC)
121
122int nvgpu_os_fence_syncpt_create(struct nvgpu_os_fence *fence_out,
123 struct channel_gk20a *c, struct nvgpu_nvhost_dev *nvhost_dev,
124 u32 id, u32 thresh);
125
126#else
127
128static inline int nvgpu_os_fence_syncpt_create(
129 struct nvgpu_os_fence *fence_out, struct channel_gk20a *c,
130 struct nvgpu_nvhost_dev *nvhost_dev,
131 u32 id, u32 thresh)
132{
133 return -ENOSYS;
134}
135
136#endif /* CONFIG_TEGRA_GK20A_NVHOST && CONFIG_SYNC */
137
138#endif /* NVGPU_OS_FENCE_H */