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-rw-r--r--include/nvgpu/hw/gv100/hw_perf_gv100.h263
1 files changed, 0 insertions, 263 deletions
diff --git a/include/nvgpu/hw/gv100/hw_perf_gv100.h b/include/nvgpu/hw/gv100/hw_perf_gv100.h
deleted file mode 100644
index 40107ee..0000000
--- a/include/nvgpu/hw/gv100/hw_perf_gv100.h
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@@ -1,263 +0,0 @@
1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_perf_gv100_h_
57#define _hw_perf_gv100_h_
58
59static inline u32 perf_pmmgpc_perdomain_offset_v(void)
60{
61 return 0x00000200U;
62}
63static inline u32 perf_pmmsys_perdomain_offset_v(void)
64{
65 return 0x00000200U;
66}
67static inline u32 perf_pmmgpc_base_v(void)
68{
69 return 0x00180000U;
70}
71static inline u32 perf_pmmgpc_extent_v(void)
72{
73 return 0x00183fffU;
74}
75static inline u32 perf_pmmsys_base_v(void)
76{
77 return 0x00240000U;
78}
79static inline u32 perf_pmmsys_extent_v(void)
80{
81 return 0x00243fffU;
82}
83static inline u32 perf_pmmfbp_base_v(void)
84{
85 return 0x00200000U;
86}
87static inline u32 perf_pmasys_control_r(void)
88{
89 return 0x0024a000U;
90}
91static inline u32 perf_pmasys_control_membuf_status_v(u32 r)
92{
93 return (r >> 4U) & 0x1U;
94}
95static inline u32 perf_pmasys_control_membuf_status_overflowed_v(void)
96{
97 return 0x00000001U;
98}
99static inline u32 perf_pmasys_control_membuf_status_overflowed_f(void)
100{
101 return 0x10U;
102}
103static inline u32 perf_pmasys_control_membuf_clear_status_f(u32 v)
104{
105 return (v & 0x1U) << 5U;
106}
107static inline u32 perf_pmasys_control_membuf_clear_status_v(u32 r)
108{
109 return (r >> 5U) & 0x1U;
110}
111static inline u32 perf_pmasys_control_membuf_clear_status_doit_v(void)
112{
113 return 0x00000001U;
114}
115static inline u32 perf_pmasys_control_membuf_clear_status_doit_f(void)
116{
117 return 0x20U;
118}
119static inline u32 perf_pmasys_mem_block_r(void)
120{
121 return 0x0024a070U;
122}
123static inline u32 perf_pmasys_mem_block_base_f(u32 v)
124{
125 return (v & 0xfffffffU) << 0U;
126}
127static inline u32 perf_pmasys_mem_block_target_f(u32 v)
128{
129 return (v & 0x3U) << 28U;
130}
131static inline u32 perf_pmasys_mem_block_target_v(u32 r)
132{
133 return (r >> 28U) & 0x3U;
134}
135static inline u32 perf_pmasys_mem_block_target_lfb_v(void)
136{
137 return 0x00000000U;
138}
139static inline u32 perf_pmasys_mem_block_target_lfb_f(void)
140{
141 return 0x0U;
142}
143static inline u32 perf_pmasys_mem_block_target_sys_coh_v(void)
144{
145 return 0x00000002U;
146}
147static inline u32 perf_pmasys_mem_block_target_sys_coh_f(void)
148{
149 return 0x20000000U;
150}
151static inline u32 perf_pmasys_mem_block_target_sys_ncoh_v(void)
152{
153 return 0x00000003U;
154}
155static inline u32 perf_pmasys_mem_block_target_sys_ncoh_f(void)
156{
157 return 0x30000000U;
158}
159static inline u32 perf_pmasys_mem_block_valid_f(u32 v)
160{
161 return (v & 0x1U) << 31U;
162}
163static inline u32 perf_pmasys_mem_block_valid_v(u32 r)
164{
165 return (r >> 31U) & 0x1U;
166}
167static inline u32 perf_pmasys_mem_block_valid_true_v(void)
168{
169 return 0x00000001U;
170}
171static inline u32 perf_pmasys_mem_block_valid_true_f(void)
172{
173 return 0x80000000U;
174}
175static inline u32 perf_pmasys_mem_block_valid_false_v(void)
176{
177 return 0x00000000U;
178}
179static inline u32 perf_pmasys_mem_block_valid_false_f(void)
180{
181 return 0x0U;
182}
183static inline u32 perf_pmasys_outbase_r(void)
184{
185 return 0x0024a074U;
186}
187static inline u32 perf_pmasys_outbase_ptr_f(u32 v)
188{
189 return (v & 0x7ffffffU) << 5U;
190}
191static inline u32 perf_pmasys_outbaseupper_r(void)
192{
193 return 0x0024a078U;
194}
195static inline u32 perf_pmasys_outbaseupper_ptr_f(u32 v)
196{
197 return (v & 0xffU) << 0U;
198}
199static inline u32 perf_pmasys_outsize_r(void)
200{
201 return 0x0024a07cU;
202}
203static inline u32 perf_pmasys_outsize_numbytes_f(u32 v)
204{
205 return (v & 0x7ffffffU) << 5U;
206}
207static inline u32 perf_pmasys_mem_bytes_r(void)
208{
209 return 0x0024a084U;
210}
211static inline u32 perf_pmasys_mem_bytes_numbytes_f(u32 v)
212{
213 return (v & 0xfffffffU) << 4U;
214}
215static inline u32 perf_pmasys_mem_bump_r(void)
216{
217 return 0x0024a088U;
218}
219static inline u32 perf_pmasys_mem_bump_numbytes_f(u32 v)
220{
221 return (v & 0xfffffffU) << 4U;
222}
223static inline u32 perf_pmasys_enginestatus_r(void)
224{
225 return 0x0024a0a4U;
226}
227static inline u32 perf_pmasys_enginestatus_rbufempty_f(u32 v)
228{
229 return (v & 0x1U) << 4U;
230}
231static inline u32 perf_pmasys_enginestatus_rbufempty_empty_v(void)
232{
233 return 0x00000001U;
234}
235static inline u32 perf_pmasys_enginestatus_rbufempty_empty_f(void)
236{
237 return 0x10U;
238}
239static inline u32 perf_pmmsys_engine_sel_r(u32 i)
240{
241 return 0x0024006cU + i*512U;
242}
243static inline u32 perf_pmmsys_engine_sel__size_1_v(void)
244{
245 return 0x00000020U;
246}
247static inline u32 perf_pmmfbp_engine_sel_r(u32 i)
248{
249 return 0x0020006cU + i*512U;
250}
251static inline u32 perf_pmmfbp_engine_sel__size_1_v(void)
252{
253 return 0x00000020U;
254}
255static inline u32 perf_pmmgpc_engine_sel_r(u32 i)
256{
257 return 0x0018006cU + i*512U;
258}
259static inline u32 perf_pmmgpc_engine_sel__size_1_v(void)
260{
261 return 0x00000020U;
262}
263#endif
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