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Diffstat (limited to 'include/nvgpu/hw/gv100/hw_minion_gv100.h')
-rw-r--r--include/nvgpu/hw/gv100/hw_minion_gv100.h943
1 files changed, 0 insertions, 943 deletions
diff --git a/include/nvgpu/hw/gv100/hw_minion_gv100.h b/include/nvgpu/hw/gv100/hw_minion_gv100.h
deleted file mode 100644
index e4bbf23..0000000
--- a/include/nvgpu/hw/gv100/hw_minion_gv100.h
+++ /dev/null
@@ -1,943 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_minion_gv100_h_
57#define _hw_minion_gv100_h_
58
59static inline u32 minion_minion_status_r(void)
60{
61 return 0x00000830U;
62}
63static inline u32 minion_minion_status_status_f(u32 v)
64{
65 return (v & 0xffU) << 0U;
66}
67static inline u32 minion_minion_status_status_m(void)
68{
69 return 0xffU << 0U;
70}
71static inline u32 minion_minion_status_status_v(u32 r)
72{
73 return (r >> 0U) & 0xffU;
74}
75static inline u32 minion_minion_status_status_boot_v(void)
76{
77 return 0x00000001U;
78}
79static inline u32 minion_minion_status_status_boot_f(void)
80{
81 return 0x1U;
82}
83static inline u32 minion_minion_status_intr_code_f(u32 v)
84{
85 return (v & 0xffffffU) << 8U;
86}
87static inline u32 minion_minion_status_intr_code_m(void)
88{
89 return 0xffffffU << 8U;
90}
91static inline u32 minion_minion_status_intr_code_v(u32 r)
92{
93 return (r >> 8U) & 0xffffffU;
94}
95static inline u32 minion_falcon_irqstat_r(void)
96{
97 return 0x00000008U;
98}
99static inline u32 minion_falcon_irqstat_halt_f(u32 v)
100{
101 return (v & 0x1U) << 4U;
102}
103static inline u32 minion_falcon_irqstat_halt_v(u32 r)
104{
105 return (r >> 4U) & 0x1U;
106}
107static inline u32 minion_falcon_irqstat_exterr_f(u32 v)
108{
109 return (v & 0x1U) << 5U;
110}
111static inline u32 minion_falcon_irqstat_exterr_v(u32 r)
112{
113 return (r >> 5U) & 0x1U;
114}
115static inline u32 minion_falcon_irqstat_exterr_true_v(void)
116{
117 return 0x00000001U;
118}
119static inline u32 minion_falcon_irqstat_exterr_true_f(void)
120{
121 return 0x20U;
122}
123static inline u32 minion_falcon_irqmask_r(void)
124{
125 return 0x00000018U;
126}
127static inline u32 minion_falcon_irqsclr_r(void)
128{
129 return 0x00000004U;
130}
131static inline u32 minion_falcon_irqsset_r(void)
132{
133 return 0x00000000U;
134}
135static inline u32 minion_falcon_irqmset_r(void)
136{
137 return 0x00000010U;
138}
139static inline u32 minion_falcon_irqmset_wdtmr_f(u32 v)
140{
141 return (v & 0x1U) << 1U;
142}
143static inline u32 minion_falcon_irqmset_wdtmr_m(void)
144{
145 return 0x1U << 1U;
146}
147static inline u32 minion_falcon_irqmset_wdtmr_v(u32 r)
148{
149 return (r >> 1U) & 0x1U;
150}
151static inline u32 minion_falcon_irqmset_wdtmr_set_v(void)
152{
153 return 0x00000001U;
154}
155static inline u32 minion_falcon_irqmset_wdtmr_set_f(void)
156{
157 return 0x2U;
158}
159static inline u32 minion_falcon_irqmset_halt_f(u32 v)
160{
161 return (v & 0x1U) << 4U;
162}
163static inline u32 minion_falcon_irqmset_halt_m(void)
164{
165 return 0x1U << 4U;
166}
167static inline u32 minion_falcon_irqmset_halt_v(u32 r)
168{
169 return (r >> 4U) & 0x1U;
170}
171static inline u32 minion_falcon_irqmset_halt_set_v(void)
172{
173 return 0x00000001U;
174}
175static inline u32 minion_falcon_irqmset_halt_set_f(void)
176{
177 return 0x10U;
178}
179static inline u32 minion_falcon_irqmset_exterr_f(u32 v)
180{
181 return (v & 0x1U) << 5U;
182}
183static inline u32 minion_falcon_irqmset_exterr_m(void)
184{
185 return 0x1U << 5U;
186}
187static inline u32 minion_falcon_irqmset_exterr_v(u32 r)
188{
189 return (r >> 5U) & 0x1U;
190}
191static inline u32 minion_falcon_irqmset_exterr_set_v(void)
192{
193 return 0x00000001U;
194}
195static inline u32 minion_falcon_irqmset_exterr_set_f(void)
196{
197 return 0x20U;
198}
199static inline u32 minion_falcon_irqmset_swgen0_f(u32 v)
200{
201 return (v & 0x1U) << 6U;
202}
203static inline u32 minion_falcon_irqmset_swgen0_m(void)
204{
205 return 0x1U << 6U;
206}
207static inline u32 minion_falcon_irqmset_swgen0_v(u32 r)
208{
209 return (r >> 6U) & 0x1U;
210}
211static inline u32 minion_falcon_irqmset_swgen0_set_v(void)
212{
213 return 0x00000001U;
214}
215static inline u32 minion_falcon_irqmset_swgen0_set_f(void)
216{
217 return 0x40U;
218}
219static inline u32 minion_falcon_irqmset_swgen1_f(u32 v)
220{
221 return (v & 0x1U) << 7U;
222}
223static inline u32 minion_falcon_irqmset_swgen1_m(void)
224{
225 return 0x1U << 7U;
226}
227static inline u32 minion_falcon_irqmset_swgen1_v(u32 r)
228{
229 return (r >> 7U) & 0x1U;
230}
231static inline u32 minion_falcon_irqmset_swgen1_set_v(void)
232{
233 return 0x00000001U;
234}
235static inline u32 minion_falcon_irqmset_swgen1_set_f(void)
236{
237 return 0x80U;
238}
239static inline u32 minion_falcon_irqdest_r(void)
240{
241 return 0x0000001cU;
242}
243static inline u32 minion_falcon_irqdest_host_wdtmr_f(u32 v)
244{
245 return (v & 0x1U) << 1U;
246}
247static inline u32 minion_falcon_irqdest_host_wdtmr_m(void)
248{
249 return 0x1U << 1U;
250}
251static inline u32 minion_falcon_irqdest_host_wdtmr_v(u32 r)
252{
253 return (r >> 1U) & 0x1U;
254}
255static inline u32 minion_falcon_irqdest_host_wdtmr_host_v(void)
256{
257 return 0x00000001U;
258}
259static inline u32 minion_falcon_irqdest_host_wdtmr_host_f(void)
260{
261 return 0x2U;
262}
263static inline u32 minion_falcon_irqdest_host_halt_f(u32 v)
264{
265 return (v & 0x1U) << 4U;
266}
267static inline u32 minion_falcon_irqdest_host_halt_m(void)
268{
269 return 0x1U << 4U;
270}
271static inline u32 minion_falcon_irqdest_host_halt_v(u32 r)
272{
273 return (r >> 4U) & 0x1U;
274}
275static inline u32 minion_falcon_irqdest_host_halt_host_v(void)
276{
277 return 0x00000001U;
278}
279static inline u32 minion_falcon_irqdest_host_halt_host_f(void)
280{
281 return 0x10U;
282}
283static inline u32 minion_falcon_irqdest_host_exterr_f(u32 v)
284{
285 return (v & 0x1U) << 5U;
286}
287static inline u32 minion_falcon_irqdest_host_exterr_m(void)
288{
289 return 0x1U << 5U;
290}
291static inline u32 minion_falcon_irqdest_host_exterr_v(u32 r)
292{
293 return (r >> 5U) & 0x1U;
294}
295static inline u32 minion_falcon_irqdest_host_exterr_host_v(void)
296{
297 return 0x00000001U;
298}
299static inline u32 minion_falcon_irqdest_host_exterr_host_f(void)
300{
301 return 0x20U;
302}
303static inline u32 minion_falcon_irqdest_host_swgen0_f(u32 v)
304{
305 return (v & 0x1U) << 6U;
306}
307static inline u32 minion_falcon_irqdest_host_swgen0_m(void)
308{
309 return 0x1U << 6U;
310}
311static inline u32 minion_falcon_irqdest_host_swgen0_v(u32 r)
312{
313 return (r >> 6U) & 0x1U;
314}
315static inline u32 minion_falcon_irqdest_host_swgen0_host_v(void)
316{
317 return 0x00000001U;
318}
319static inline u32 minion_falcon_irqdest_host_swgen0_host_f(void)
320{
321 return 0x40U;
322}
323static inline u32 minion_falcon_irqdest_host_swgen1_f(u32 v)
324{
325 return (v & 0x1U) << 7U;
326}
327static inline u32 minion_falcon_irqdest_host_swgen1_m(void)
328{
329 return 0x1U << 7U;
330}
331static inline u32 minion_falcon_irqdest_host_swgen1_v(u32 r)
332{
333 return (r >> 7U) & 0x1U;
334}
335static inline u32 minion_falcon_irqdest_host_swgen1_host_v(void)
336{
337 return 0x00000001U;
338}
339static inline u32 minion_falcon_irqdest_host_swgen1_host_f(void)
340{
341 return 0x80U;
342}
343static inline u32 minion_falcon_irqdest_target_wdtmr_f(u32 v)
344{
345 return (v & 0x1U) << 17U;
346}
347static inline u32 minion_falcon_irqdest_target_wdtmr_m(void)
348{
349 return 0x1U << 17U;
350}
351static inline u32 minion_falcon_irqdest_target_wdtmr_v(u32 r)
352{
353 return (r >> 17U) & 0x1U;
354}
355static inline u32 minion_falcon_irqdest_target_wdtmr_host_normal_v(void)
356{
357 return 0x00000000U;
358}
359static inline u32 minion_falcon_irqdest_target_wdtmr_host_normal_f(void)
360{
361 return 0x0U;
362}
363static inline u32 minion_falcon_irqdest_target_halt_f(u32 v)
364{
365 return (v & 0x1U) << 20U;
366}
367static inline u32 minion_falcon_irqdest_target_halt_m(void)
368{
369 return 0x1U << 20U;
370}
371static inline u32 minion_falcon_irqdest_target_halt_v(u32 r)
372{
373 return (r >> 20U) & 0x1U;
374}
375static inline u32 minion_falcon_irqdest_target_halt_host_normal_v(void)
376{
377 return 0x00000000U;
378}
379static inline u32 minion_falcon_irqdest_target_halt_host_normal_f(void)
380{
381 return 0x0U;
382}
383static inline u32 minion_falcon_irqdest_target_exterr_f(u32 v)
384{
385 return (v & 0x1U) << 21U;
386}
387static inline u32 minion_falcon_irqdest_target_exterr_m(void)
388{
389 return 0x1U << 21U;
390}
391static inline u32 minion_falcon_irqdest_target_exterr_v(u32 r)
392{
393 return (r >> 21U) & 0x1U;
394}
395static inline u32 minion_falcon_irqdest_target_exterr_host_normal_v(void)
396{
397 return 0x00000000U;
398}
399static inline u32 minion_falcon_irqdest_target_exterr_host_normal_f(void)
400{
401 return 0x0U;
402}
403static inline u32 minion_falcon_irqdest_target_swgen0_f(u32 v)
404{
405 return (v & 0x1U) << 22U;
406}
407static inline u32 minion_falcon_irqdest_target_swgen0_m(void)
408{
409 return 0x1U << 22U;
410}
411static inline u32 minion_falcon_irqdest_target_swgen0_v(u32 r)
412{
413 return (r >> 22U) & 0x1U;
414}
415static inline u32 minion_falcon_irqdest_target_swgen0_host_normal_v(void)
416{
417 return 0x00000000U;
418}
419static inline u32 minion_falcon_irqdest_target_swgen0_host_normal_f(void)
420{
421 return 0x0U;
422}
423static inline u32 minion_falcon_irqdest_target_swgen1_f(u32 v)
424{
425 return (v & 0x1U) << 23U;
426}
427static inline u32 minion_falcon_irqdest_target_swgen1_m(void)
428{
429 return 0x1U << 23U;
430}
431static inline u32 minion_falcon_irqdest_target_swgen1_v(u32 r)
432{
433 return (r >> 23U) & 0x1U;
434}
435static inline u32 minion_falcon_irqdest_target_swgen1_host_normal_v(void)
436{
437 return 0x00000000U;
438}
439static inline u32 minion_falcon_irqdest_target_swgen1_host_normal_f(void)
440{
441 return 0x0U;
442}
443static inline u32 minion_falcon_os_r(void)
444{
445 return 0x00000080U;
446}
447static inline u32 minion_falcon_mailbox1_r(void)
448{
449 return 0x00000044U;
450}
451static inline u32 minion_minion_intr_r(void)
452{
453 return 0x00000810U;
454}
455static inline u32 minion_minion_intr_fatal_f(u32 v)
456{
457 return (v & 0x1U) << 0U;
458}
459static inline u32 minion_minion_intr_fatal_m(void)
460{
461 return 0x1U << 0U;
462}
463static inline u32 minion_minion_intr_fatal_v(u32 r)
464{
465 return (r >> 0U) & 0x1U;
466}
467static inline u32 minion_minion_intr_nonfatal_f(u32 v)
468{
469 return (v & 0x1U) << 1U;
470}
471static inline u32 minion_minion_intr_nonfatal_m(void)
472{
473 return 0x1U << 1U;
474}
475static inline u32 minion_minion_intr_nonfatal_v(u32 r)
476{
477 return (r >> 1U) & 0x1U;
478}
479static inline u32 minion_minion_intr_falcon_stall_f(u32 v)
480{
481 return (v & 0x1U) << 2U;
482}
483static inline u32 minion_minion_intr_falcon_stall_m(void)
484{
485 return 0x1U << 2U;
486}
487static inline u32 minion_minion_intr_falcon_stall_v(u32 r)
488{
489 return (r >> 2U) & 0x1U;
490}
491static inline u32 minion_minion_intr_falcon_nostall_f(u32 v)
492{
493 return (v & 0x1U) << 3U;
494}
495static inline u32 minion_minion_intr_falcon_nostall_m(void)
496{
497 return 0x1U << 3U;
498}
499static inline u32 minion_minion_intr_falcon_nostall_v(u32 r)
500{
501 return (r >> 3U) & 0x1U;
502}
503static inline u32 minion_minion_intr_link_f(u32 v)
504{
505 return (v & 0xffffU) << 16U;
506}
507static inline u32 minion_minion_intr_link_m(void)
508{
509 return 0xffffU << 16U;
510}
511static inline u32 minion_minion_intr_link_v(u32 r)
512{
513 return (r >> 16U) & 0xffffU;
514}
515static inline u32 minion_minion_intr_nonstall_en_r(void)
516{
517 return 0x0000081cU;
518}
519static inline u32 minion_minion_intr_stall_en_r(void)
520{
521 return 0x00000818U;
522}
523static inline u32 minion_minion_intr_stall_en_fatal_f(u32 v)
524{
525 return (v & 0x1U) << 0U;
526}
527static inline u32 minion_minion_intr_stall_en_fatal_m(void)
528{
529 return 0x1U << 0U;
530}
531static inline u32 minion_minion_intr_stall_en_fatal_v(u32 r)
532{
533 return (r >> 0U) & 0x1U;
534}
535static inline u32 minion_minion_intr_stall_en_fatal_enable_v(void)
536{
537 return 0x00000001U;
538}
539static inline u32 minion_minion_intr_stall_en_fatal_enable_f(void)
540{
541 return 0x1U;
542}
543static inline u32 minion_minion_intr_stall_en_fatal_disable_v(void)
544{
545 return 0x00000000U;
546}
547static inline u32 minion_minion_intr_stall_en_fatal_disable_f(void)
548{
549 return 0x0U;
550}
551static inline u32 minion_minion_intr_stall_en_nonfatal_f(u32 v)
552{
553 return (v & 0x1U) << 1U;
554}
555static inline u32 minion_minion_intr_stall_en_nonfatal_m(void)
556{
557 return 0x1U << 1U;
558}
559static inline u32 minion_minion_intr_stall_en_nonfatal_v(u32 r)
560{
561 return (r >> 1U) & 0x1U;
562}
563static inline u32 minion_minion_intr_stall_en_nonfatal_enable_v(void)
564{
565 return 0x00000001U;
566}
567static inline u32 minion_minion_intr_stall_en_nonfatal_enable_f(void)
568{
569 return 0x2U;
570}
571static inline u32 minion_minion_intr_stall_en_nonfatal_disable_v(void)
572{
573 return 0x00000000U;
574}
575static inline u32 minion_minion_intr_stall_en_nonfatal_disable_f(void)
576{
577 return 0x0U;
578}
579static inline u32 minion_minion_intr_stall_en_falcon_stall_f(u32 v)
580{
581 return (v & 0x1U) << 2U;
582}
583static inline u32 minion_minion_intr_stall_en_falcon_stall_m(void)
584{
585 return 0x1U << 2U;
586}
587static inline u32 minion_minion_intr_stall_en_falcon_stall_v(u32 r)
588{
589 return (r >> 2U) & 0x1U;
590}
591static inline u32 minion_minion_intr_stall_en_falcon_stall_enable_v(void)
592{
593 return 0x00000001U;
594}
595static inline u32 minion_minion_intr_stall_en_falcon_stall_enable_f(void)
596{
597 return 0x4U;
598}
599static inline u32 minion_minion_intr_stall_en_falcon_stall_disable_v(void)
600{
601 return 0x00000000U;
602}
603static inline u32 minion_minion_intr_stall_en_falcon_stall_disable_f(void)
604{
605 return 0x0U;
606}
607static inline u32 minion_minion_intr_stall_en_falcon_nostall_f(u32 v)
608{
609 return (v & 0x1U) << 3U;
610}
611static inline u32 minion_minion_intr_stall_en_falcon_nostall_m(void)
612{
613 return 0x1U << 3U;
614}
615static inline u32 minion_minion_intr_stall_en_falcon_nostall_v(u32 r)
616{
617 return (r >> 3U) & 0x1U;
618}
619static inline u32 minion_minion_intr_stall_en_falcon_nostall_enable_v(void)
620{
621 return 0x00000001U;
622}
623static inline u32 minion_minion_intr_stall_en_falcon_nostall_enable_f(void)
624{
625 return 0x8U;
626}
627static inline u32 minion_minion_intr_stall_en_falcon_nostall_disable_v(void)
628{
629 return 0x00000000U;
630}
631static inline u32 minion_minion_intr_stall_en_falcon_nostall_disable_f(void)
632{
633 return 0x0U;
634}
635static inline u32 minion_minion_intr_stall_en_link_f(u32 v)
636{
637 return (v & 0xffffU) << 16U;
638}
639static inline u32 minion_minion_intr_stall_en_link_m(void)
640{
641 return 0xffffU << 16U;
642}
643static inline u32 minion_minion_intr_stall_en_link_v(u32 r)
644{
645 return (r >> 16U) & 0xffffU;
646}
647static inline u32 minion_nvlink_dl_cmd_r(u32 i)
648{
649 return 0x00000900U + i*4U;
650}
651static inline u32 minion_nvlink_dl_cmd___size_1_v(void)
652{
653 return 0x00000006U;
654}
655static inline u32 minion_nvlink_dl_cmd_command_f(u32 v)
656{
657 return (v & 0xffU) << 0U;
658}
659static inline u32 minion_nvlink_dl_cmd_command_v(u32 r)
660{
661 return (r >> 0U) & 0xffU;
662}
663static inline u32 minion_nvlink_dl_cmd_command_configeom_v(void)
664{
665 return 0x00000040U;
666}
667static inline u32 minion_nvlink_dl_cmd_command_configeom_f(void)
668{
669 return 0x40U;
670}
671static inline u32 minion_nvlink_dl_cmd_command_nop_v(void)
672{
673 return 0x00000000U;
674}
675static inline u32 minion_nvlink_dl_cmd_command_nop_f(void)
676{
677 return 0x0U;
678}
679static inline u32 minion_nvlink_dl_cmd_command_initphy_v(void)
680{
681 return 0x00000001U;
682}
683static inline u32 minion_nvlink_dl_cmd_command_initphy_f(void)
684{
685 return 0x1U;
686}
687static inline u32 minion_nvlink_dl_cmd_command_initlaneenable_v(void)
688{
689 return 0x00000003U;
690}
691static inline u32 minion_nvlink_dl_cmd_command_initlaneenable_f(void)
692{
693 return 0x3U;
694}
695static inline u32 minion_nvlink_dl_cmd_command_initdlpl_v(void)
696{
697 return 0x00000004U;
698}
699static inline u32 minion_nvlink_dl_cmd_command_initdlpl_f(void)
700{
701 return 0x4U;
702}
703static inline u32 minion_nvlink_dl_cmd_command_lanedisable_v(void)
704{
705 return 0x00000008U;
706}
707static inline u32 minion_nvlink_dl_cmd_command_lanedisable_f(void)
708{
709 return 0x8U;
710}
711static inline u32 minion_nvlink_dl_cmd_command_fastlanedisable_v(void)
712{
713 return 0x00000009U;
714}
715static inline u32 minion_nvlink_dl_cmd_command_fastlanedisable_f(void)
716{
717 return 0x9U;
718}
719static inline u32 minion_nvlink_dl_cmd_command_laneshutdown_v(void)
720{
721 return 0x0000000cU;
722}
723static inline u32 minion_nvlink_dl_cmd_command_laneshutdown_f(void)
724{
725 return 0xcU;
726}
727static inline u32 minion_nvlink_dl_cmd_command_setacmode_v(void)
728{
729 return 0x0000000aU;
730}
731static inline u32 minion_nvlink_dl_cmd_command_setacmode_f(void)
732{
733 return 0xaU;
734}
735static inline u32 minion_nvlink_dl_cmd_command_clracmode_v(void)
736{
737 return 0x0000000bU;
738}
739static inline u32 minion_nvlink_dl_cmd_command_clracmode_f(void)
740{
741 return 0xbU;
742}
743static inline u32 minion_nvlink_dl_cmd_command_enablepm_v(void)
744{
745 return 0x00000010U;
746}
747static inline u32 minion_nvlink_dl_cmd_command_enablepm_f(void)
748{
749 return 0x10U;
750}
751static inline u32 minion_nvlink_dl_cmd_command_disablepm_v(void)
752{
753 return 0x00000011U;
754}
755static inline u32 minion_nvlink_dl_cmd_command_disablepm_f(void)
756{
757 return 0x11U;
758}
759static inline u32 minion_nvlink_dl_cmd_command_savestate_v(void)
760{
761 return 0x00000018U;
762}
763static inline u32 minion_nvlink_dl_cmd_command_savestate_f(void)
764{
765 return 0x18U;
766}
767static inline u32 minion_nvlink_dl_cmd_command_restorestate_v(void)
768{
769 return 0x00000019U;
770}
771static inline u32 minion_nvlink_dl_cmd_command_restorestate_f(void)
772{
773 return 0x19U;
774}
775static inline u32 minion_nvlink_dl_cmd_command_initpll_0_v(void)
776{
777 return 0x00000020U;
778}
779static inline u32 minion_nvlink_dl_cmd_command_initpll_0_f(void)
780{
781 return 0x20U;
782}
783static inline u32 minion_nvlink_dl_cmd_command_initpll_1_v(void)
784{
785 return 0x00000021U;
786}
787static inline u32 minion_nvlink_dl_cmd_command_initpll_1_f(void)
788{
789 return 0x21U;
790}
791static inline u32 minion_nvlink_dl_cmd_command_initpll_2_v(void)
792{
793 return 0x00000022U;
794}
795static inline u32 minion_nvlink_dl_cmd_command_initpll_2_f(void)
796{
797 return 0x22U;
798}
799static inline u32 minion_nvlink_dl_cmd_command_initpll_3_v(void)
800{
801 return 0x00000023U;
802}
803static inline u32 minion_nvlink_dl_cmd_command_initpll_3_f(void)
804{
805 return 0x23U;
806}
807static inline u32 minion_nvlink_dl_cmd_command_initpll_4_v(void)
808{
809 return 0x00000024U;
810}
811static inline u32 minion_nvlink_dl_cmd_command_initpll_4_f(void)
812{
813 return 0x24U;
814}
815static inline u32 minion_nvlink_dl_cmd_command_initpll_5_v(void)
816{
817 return 0x00000025U;
818}
819static inline u32 minion_nvlink_dl_cmd_command_initpll_5_f(void)
820{
821 return 0x25U;
822}
823static inline u32 minion_nvlink_dl_cmd_command_initpll_6_v(void)
824{
825 return 0x00000026U;
826}
827static inline u32 minion_nvlink_dl_cmd_command_initpll_6_f(void)
828{
829 return 0x26U;
830}
831static inline u32 minion_nvlink_dl_cmd_command_initpll_7_v(void)
832{
833 return 0x00000027U;
834}
835static inline u32 minion_nvlink_dl_cmd_command_initpll_7_f(void)
836{
837 return 0x27U;
838}
839static inline u32 minion_nvlink_dl_cmd_fault_f(u32 v)
840{
841 return (v & 0x1U) << 30U;
842}
843static inline u32 minion_nvlink_dl_cmd_fault_v(u32 r)
844{
845 return (r >> 30U) & 0x1U;
846}
847static inline u32 minion_nvlink_dl_cmd_ready_f(u32 v)
848{
849 return (v & 0x1U) << 31U;
850}
851static inline u32 minion_nvlink_dl_cmd_ready_v(u32 r)
852{
853 return (r >> 31U) & 0x1U;
854}
855static inline u32 minion_misc_0_r(void)
856{
857 return 0x000008b0U;
858}
859static inline u32 minion_misc_0_scratch_swrw_0_f(u32 v)
860{
861 return (v & 0xffffffffU) << 0U;
862}
863static inline u32 minion_misc_0_scratch_swrw_0_v(u32 r)
864{
865 return (r >> 0U) & 0xffffffffU;
866}
867static inline u32 minion_nvlink_link_intr_r(u32 i)
868{
869 return 0x00000a00U + i*4U;
870}
871static inline u32 minion_nvlink_link_intr___size_1_v(void)
872{
873 return 0x00000006U;
874}
875static inline u32 minion_nvlink_link_intr_code_f(u32 v)
876{
877 return (v & 0xffU) << 0U;
878}
879static inline u32 minion_nvlink_link_intr_code_m(void)
880{
881 return 0xffU << 0U;
882}
883static inline u32 minion_nvlink_link_intr_code_v(u32 r)
884{
885 return (r >> 0U) & 0xffU;
886}
887static inline u32 minion_nvlink_link_intr_code_na_v(void)
888{
889 return 0x00000000U;
890}
891static inline u32 minion_nvlink_link_intr_code_na_f(void)
892{
893 return 0x0U;
894}
895static inline u32 minion_nvlink_link_intr_code_swreq_v(void)
896{
897 return 0x00000001U;
898}
899static inline u32 minion_nvlink_link_intr_code_swreq_f(void)
900{
901 return 0x1U;
902}
903static inline u32 minion_nvlink_link_intr_code_dlreq_v(void)
904{
905 return 0x00000002U;
906}
907static inline u32 minion_nvlink_link_intr_code_dlreq_f(void)
908{
909 return 0x2U;
910}
911static inline u32 minion_nvlink_link_intr_code_pmdisabled_v(void)
912{
913 return 0x00000003U;
914}
915static inline u32 minion_nvlink_link_intr_code_pmdisabled_f(void)
916{
917 return 0x3U;
918}
919static inline u32 minion_nvlink_link_intr_subcode_f(u32 v)
920{
921 return (v & 0xffU) << 8U;
922}
923static inline u32 minion_nvlink_link_intr_subcode_m(void)
924{
925 return 0xffU << 8U;
926}
927static inline u32 minion_nvlink_link_intr_subcode_v(u32 r)
928{
929 return (r >> 8U) & 0xffU;
930}
931static inline u32 minion_nvlink_link_intr_state_f(u32 v)
932{
933 return (v & 0x1U) << 31U;
934}
935static inline u32 minion_nvlink_link_intr_state_m(void)
936{
937 return 0x1U << 31U;
938}
939static inline u32 minion_nvlink_link_intr_state_v(u32 r)
940{
941 return (r >> 31U) & 0x1U;
942}
943#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-30 14:26:52 -0400