diff options
Diffstat (limited to 'include/nvgpu/hw/gp10b/hw_top_gp10b.h')
-rw-r--r-- | include/nvgpu/hw/gp10b/hw_top_gp10b.h | 231 |
1 files changed, 0 insertions, 231 deletions
diff --git a/include/nvgpu/hw/gp10b/hw_top_gp10b.h b/include/nvgpu/hw/gp10b/hw_top_gp10b.h deleted file mode 100644 index a7b7c2b..0000000 --- a/include/nvgpu/hw/gp10b/hw_top_gp10b.h +++ /dev/null | |||
@@ -1,231 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | /* | ||
23 | * Function naming determines intended use: | ||
24 | * | ||
25 | * <x>_r(void) : Returns the offset for register <x>. | ||
26 | * | ||
27 | * <x>_o(void) : Returns the offset for element <x>. | ||
28 | * | ||
29 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
30 | * | ||
31 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
32 | * | ||
33 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
34 | * and masked to place it at field <y> of register <x>. This value | ||
35 | * can be |'d with others to produce a full register value for | ||
36 | * register <x>. | ||
37 | * | ||
38 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
39 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
40 | * register <x>. | ||
41 | * | ||
42 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
43 | * to place it at field <y> of register <x>. This value can be |'d | ||
44 | * with others to produce a full register value for <x>. | ||
45 | * | ||
46 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
47 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
48 | * This value is suitable for direct comparison with other unshifted | ||
49 | * values appropriate for use in field <y> of register <x>. | ||
50 | * | ||
51 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
52 | * field <y> of register <x>. This value is suitable for direct | ||
53 | * comparison with unshifted values appropriate for use in field <y> | ||
54 | * of register <x>. | ||
55 | */ | ||
56 | #ifndef _hw_top_gp10b_h_ | ||
57 | #define _hw_top_gp10b_h_ | ||
58 | |||
59 | static inline u32 top_num_gpcs_r(void) | ||
60 | { | ||
61 | return 0x00022430U; | ||
62 | } | ||
63 | static inline u32 top_num_gpcs_value_v(u32 r) | ||
64 | { | ||
65 | return (r >> 0U) & 0x1fU; | ||
66 | } | ||
67 | static inline u32 top_tpc_per_gpc_r(void) | ||
68 | { | ||
69 | return 0x00022434U; | ||
70 | } | ||
71 | static inline u32 top_tpc_per_gpc_value_v(u32 r) | ||
72 | { | ||
73 | return (r >> 0U) & 0x1fU; | ||
74 | } | ||
75 | static inline u32 top_num_fbps_r(void) | ||
76 | { | ||
77 | return 0x00022438U; | ||
78 | } | ||
79 | static inline u32 top_num_fbps_value_v(u32 r) | ||
80 | { | ||
81 | return (r >> 0U) & 0x1fU; | ||
82 | } | ||
83 | static inline u32 top_ltc_per_fbp_r(void) | ||
84 | { | ||
85 | return 0x00022450U; | ||
86 | } | ||
87 | static inline u32 top_ltc_per_fbp_value_v(u32 r) | ||
88 | { | ||
89 | return (r >> 0U) & 0x1fU; | ||
90 | } | ||
91 | static inline u32 top_slices_per_ltc_r(void) | ||
92 | { | ||
93 | return 0x0002245cU; | ||
94 | } | ||
95 | static inline u32 top_slices_per_ltc_value_v(u32 r) | ||
96 | { | ||
97 | return (r >> 0U) & 0x1fU; | ||
98 | } | ||
99 | static inline u32 top_num_ltcs_r(void) | ||
100 | { | ||
101 | return 0x00022454U; | ||
102 | } | ||
103 | static inline u32 top_device_info_r(u32 i) | ||
104 | { | ||
105 | return 0x00022700U + i*4U; | ||
106 | } | ||
107 | static inline u32 top_device_info__size_1_v(void) | ||
108 | { | ||
109 | return 0x00000040U; | ||
110 | } | ||
111 | static inline u32 top_device_info_chain_v(u32 r) | ||
112 | { | ||
113 | return (r >> 31U) & 0x1U; | ||
114 | } | ||
115 | static inline u32 top_device_info_chain_enable_v(void) | ||
116 | { | ||
117 | return 0x00000001U; | ||
118 | } | ||
119 | static inline u32 top_device_info_engine_enum_v(u32 r) | ||
120 | { | ||
121 | return (r >> 26U) & 0xfU; | ||
122 | } | ||
123 | static inline u32 top_device_info_runlist_enum_v(u32 r) | ||
124 | { | ||
125 | return (r >> 21U) & 0xfU; | ||
126 | } | ||
127 | static inline u32 top_device_info_intr_enum_v(u32 r) | ||
128 | { | ||
129 | return (r >> 15U) & 0x1fU; | ||
130 | } | ||
131 | static inline u32 top_device_info_reset_enum_v(u32 r) | ||
132 | { | ||
133 | return (r >> 9U) & 0x1fU; | ||
134 | } | ||
135 | static inline u32 top_device_info_type_enum_v(u32 r) | ||
136 | { | ||
137 | return (r >> 2U) & 0x1fffffffU; | ||
138 | } | ||
139 | static inline u32 top_device_info_type_enum_graphics_v(void) | ||
140 | { | ||
141 | return 0x00000000U; | ||
142 | } | ||
143 | static inline u32 top_device_info_type_enum_graphics_f(void) | ||
144 | { | ||
145 | return 0x0U; | ||
146 | } | ||
147 | static inline u32 top_device_info_type_enum_copy2_v(void) | ||
148 | { | ||
149 | return 0x00000003U; | ||
150 | } | ||
151 | static inline u32 top_device_info_type_enum_copy2_f(void) | ||
152 | { | ||
153 | return 0xcU; | ||
154 | } | ||
155 | static inline u32 top_device_info_type_enum_lce_v(void) | ||
156 | { | ||
157 | return 0x00000013U; | ||
158 | } | ||
159 | static inline u32 top_device_info_type_enum_lce_f(void) | ||
160 | { | ||
161 | return 0x4cU; | ||
162 | } | ||
163 | static inline u32 top_device_info_engine_v(u32 r) | ||
164 | { | ||
165 | return (r >> 5U) & 0x1U; | ||
166 | } | ||
167 | static inline u32 top_device_info_runlist_v(u32 r) | ||
168 | { | ||
169 | return (r >> 4U) & 0x1U; | ||
170 | } | ||
171 | static inline u32 top_device_info_intr_v(u32 r) | ||
172 | { | ||
173 | return (r >> 3U) & 0x1U; | ||
174 | } | ||
175 | static inline u32 top_device_info_reset_v(u32 r) | ||
176 | { | ||
177 | return (r >> 2U) & 0x1U; | ||
178 | } | ||
179 | static inline u32 top_device_info_entry_v(u32 r) | ||
180 | { | ||
181 | return (r >> 0U) & 0x3U; | ||
182 | } | ||
183 | static inline u32 top_device_info_entry_not_valid_v(void) | ||
184 | { | ||
185 | return 0x00000000U; | ||
186 | } | ||
187 | static inline u32 top_device_info_entry_enum_v(void) | ||
188 | { | ||
189 | return 0x00000002U; | ||
190 | } | ||
191 | static inline u32 top_device_info_entry_engine_type_v(void) | ||
192 | { | ||
193 | return 0x00000003U; | ||
194 | } | ||
195 | static inline u32 top_device_info_entry_data_v(void) | ||
196 | { | ||
197 | return 0x00000001U; | ||
198 | } | ||
199 | static inline u32 top_device_info_data_type_v(u32 r) | ||
200 | { | ||
201 | return (r >> 30U) & 0x1U; | ||
202 | } | ||
203 | static inline u32 top_device_info_data_type_enum2_v(void) | ||
204 | { | ||
205 | return 0x00000000U; | ||
206 | } | ||
207 | static inline u32 top_device_info_data_inst_id_v(u32 r) | ||
208 | { | ||
209 | return (r >> 26U) & 0xfU; | ||
210 | } | ||
211 | static inline u32 top_device_info_data_pri_base_v(u32 r) | ||
212 | { | ||
213 | return (r >> 12U) & 0xfffU; | ||
214 | } | ||
215 | static inline u32 top_device_info_data_pri_base_align_v(void) | ||
216 | { | ||
217 | return 0x0000000cU; | ||
218 | } | ||
219 | static inline u32 top_device_info_data_fault_id_enum_v(u32 r) | ||
220 | { | ||
221 | return (r >> 3U) & 0x1fU; | ||
222 | } | ||
223 | static inline u32 top_device_info_data_fault_id_v(u32 r) | ||
224 | { | ||
225 | return (r >> 2U) & 0x1U; | ||
226 | } | ||
227 | static inline u32 top_device_info_data_fault_id_valid_v(void) | ||
228 | { | ||
229 | return 0x00000001U; | ||
230 | } | ||
231 | #endif | ||