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-rw-r--r--include/nvgpu/hw/gp106/hw_ltc_gp106.h559
1 files changed, 0 insertions, 559 deletions
diff --git a/include/nvgpu/hw/gp106/hw_ltc_gp106.h b/include/nvgpu/hw/gp106/hw_ltc_gp106.h
deleted file mode 100644
index e4e87aa..0000000
--- a/include/nvgpu/hw/gp106/hw_ltc_gp106.h
+++ /dev/null
@@ -1,559 +0,0 @@
1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_ltc_gp106_h_
57#define _hw_ltc_gp106_h_
58
59static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void)
60{
61 return 0x0014046cU;
62}
63static inline u32 ltc_ltc0_lts0_dstg_cfg0_r(void)
64{
65 return 0x00140518U;
66}
67static inline u32 ltc_ltcs_ltss_dstg_cfg0_r(void)
68{
69 return 0x0017e318U;
70}
71static inline u32 ltc_ltcs_ltss_dstg_cfg0_vdc_4to2_disable_m(void)
72{
73 return 0x1U << 15U;
74}
75static inline u32 ltc_ltc0_lts0_tstg_cfg1_r(void)
76{
77 return 0x00140494U;
78}
79static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_ways_v(u32 r)
80{
81 return (r >> 0U) & 0xffffU;
82}
83static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_v(u32 r)
84{
85 return (r >> 16U) & 0x3U;
86}
87static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_all_v(void)
88{
89 return 0x00000000U;
90}
91static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_half_v(void)
92{
93 return 0x00000001U;
94}
95static inline u32 ltc_ltc0_lts0_tstg_cfg1_active_sets_quarter_v(void)
96{
97 return 0x00000002U;
98}
99static inline u32 ltc_ltcs_ltss_cbc_ctrl1_r(void)
100{
101 return 0x0017e26cU;
102}
103static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clean_active_f(void)
104{
105 return 0x1U;
106}
107static inline u32 ltc_ltcs_ltss_cbc_ctrl1_invalidate_active_f(void)
108{
109 return 0x2U;
110}
111static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_v(u32 r)
112{
113 return (r >> 2U) & 0x1U;
114}
115static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_v(void)
116{
117 return 0x00000001U;
118}
119static inline u32 ltc_ltcs_ltss_cbc_ctrl1_clear_active_f(void)
120{
121 return 0x4U;
122}
123static inline u32 ltc_ltc0_lts0_cbc_ctrl1_r(void)
124{
125 return 0x0014046cU;
126}
127static inline u32 ltc_ltcs_ltss_cbc_ctrl2_r(void)
128{
129 return 0x0017e270U;
130}
131static inline u32 ltc_ltcs_ltss_cbc_ctrl2_clear_lower_bound_f(u32 v)
132{
133 return (v & 0x3ffffU) << 0U;
134}
135static inline u32 ltc_ltcs_ltss_cbc_ctrl3_r(void)
136{
137 return 0x0017e274U;
138}
139static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_f(u32 v)
140{
141 return (v & 0x3ffffU) << 0U;
142}
143static inline u32 ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_init_v(void)
144{
145 return 0x0003ffffU;
146}
147static inline u32 ltc_ltcs_ltss_cbc_base_r(void)
148{
149 return 0x0017e278U;
150}
151static inline u32 ltc_ltcs_ltss_cbc_base_alignment_shift_v(void)
152{
153 return 0x0000000bU;
154}
155static inline u32 ltc_ltcs_ltss_cbc_base_address_v(u32 r)
156{
157 return (r >> 0U) & 0x3ffffffU;
158}
159static inline u32 ltc_ltcs_ltss_cbc_num_active_ltcs_r(void)
160{
161 return 0x0017e27cU;
162}
163static inline u32 ltc_ltcs_misc_ltc_num_active_ltcs_r(void)
164{
165 return 0x0017e000U;
166}
167static inline u32 ltc_ltcs_ltss_cbc_param_r(void)
168{
169 return 0x0017e280U;
170}
171static inline u32 ltc_ltcs_ltss_cbc_param_comptags_per_cache_line_v(u32 r)
172{
173 return (r >> 0U) & 0xffffU;
174}
175static inline u32 ltc_ltcs_ltss_cbc_param_cache_line_size_v(u32 r)
176{
177 return (r >> 24U) & 0xfU;
178}
179static inline u32 ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(u32 r)
180{
181 return (r >> 28U) & 0xfU;
182}
183static inline u32 ltc_ltcs_ltss_cbc_param2_r(void)
184{
185 return 0x0017e3f4U;
186}
187static inline u32 ltc_ltcs_ltss_cbc_param2_gobs_per_comptagline_per_slice_v(u32 r)
188{
189 return (r >> 0U) & 0xffffU;
190}
191static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_r(void)
192{
193 return 0x0017e2acU;
194}
195static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_max_ways_evict_last_f(u32 v)
196{
197 return (v & 0x1fU) << 16U;
198}
199static inline u32 ltc_ltcs_ltss_dstg_zbc_index_r(void)
200{
201 return 0x0017e338U;
202}
203static inline u32 ltc_ltcs_ltss_dstg_zbc_index_address_f(u32 v)
204{
205 return (v & 0xfU) << 0U;
206}
207static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value_r(u32 i)
208{
209 return 0x0017e33cU + i*4U;
210}
211static inline u32 ltc_ltcs_ltss_dstg_zbc_color_clear_value__size_1_v(void)
212{
213 return 0x00000004U;
214}
215static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_r(void)
216{
217 return 0x0017e34cU;
218}
219static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_s(void)
220{
221 return 32U;
222}
223static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_f(u32 v)
224{
225 return (v & 0xffffffffU) << 0U;
226}
227static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_m(void)
228{
229 return 0xffffffffU << 0U;
230}
231static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_v(u32 r)
232{
233 return (r >> 0U) & 0xffffffffU;
234}
235static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void)
236{
237 return 0x0017e2b0U;
238}
239static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(void)
240{
241 return 0x10000000U;
242}
243static inline u32 ltc_ltcs_ltss_g_elpg_r(void)
244{
245 return 0x0017e214U;
246}
247static inline u32 ltc_ltcs_ltss_g_elpg_flush_v(u32 r)
248{
249 return (r >> 0U) & 0x1U;
250}
251static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_v(void)
252{
253 return 0x00000001U;
254}
255static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_f(void)
256{
257 return 0x1U;
258}
259static inline u32 ltc_ltc0_ltss_g_elpg_r(void)
260{
261 return 0x00140214U;
262}
263static inline u32 ltc_ltc0_ltss_g_elpg_flush_v(u32 r)
264{
265 return (r >> 0U) & 0x1U;
266}
267static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_v(void)
268{
269 return 0x00000001U;
270}
271static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_f(void)
272{
273 return 0x1U;
274}
275static inline u32 ltc_ltc1_ltss_g_elpg_r(void)
276{
277 return 0x00142214U;
278}
279static inline u32 ltc_ltc1_ltss_g_elpg_flush_v(u32 r)
280{
281 return (r >> 0U) & 0x1U;
282}
283static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_v(void)
284{
285 return 0x00000001U;
286}
287static inline u32 ltc_ltc1_ltss_g_elpg_flush_pending_f(void)
288{
289 return 0x1U;
290}
291static inline u32 ltc_ltcs_ltss_intr_r(void)
292{
293 return 0x0017e20cU;
294}
295static inline u32 ltc_ltcs_ltss_intr_ecc_sec_error_pending_f(void)
296{
297 return 0x100U;
298}
299static inline u32 ltc_ltcs_ltss_intr_ecc_ded_error_pending_f(void)
300{
301 return 0x200U;
302}
303static inline u32 ltc_ltcs_ltss_intr_en_evicted_cb_m(void)
304{
305 return 0x1U << 20U;
306}
307static inline u32 ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(void)
308{
309 return 0x1U << 30U;
310}
311static inline u32 ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f(void)
312{
313 return 0x1000000U;
314}
315static inline u32 ltc_ltcs_ltss_intr_en_ecc_ded_error_enabled_f(void)
316{
317 return 0x2000000U;
318}
319static inline u32 ltc_ltc0_lts0_intr_r(void)
320{
321 return 0x0014040cU;
322}
323static inline u32 ltc_ltc0_lts0_dstg_ecc_report_r(void)
324{
325 return 0x0014051cU;
326}
327static inline u32 ltc_ltc0_lts0_dstg_ecc_report_sec_count_m(void)
328{
329 return 0xffU << 0U;
330}
331static inline u32 ltc_ltc0_lts0_dstg_ecc_report_sec_count_v(u32 r)
332{
333 return (r >> 0U) & 0xffU;
334}
335static inline u32 ltc_ltc0_lts0_dstg_ecc_report_ded_count_m(void)
336{
337 return 0xffU << 16U;
338}
339static inline u32 ltc_ltc0_lts0_dstg_ecc_report_ded_count_v(u32 r)
340{
341 return (r >> 16U) & 0xffU;
342}
343static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_r(void)
344{
345 return 0x0017e2a0U;
346}
347static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_v(u32 r)
348{
349 return (r >> 0U) & 0x1U;
350}
351static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_v(void)
352{
353 return 0x00000001U;
354}
355static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_f(void)
356{
357 return 0x1U;
358}
359static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_v(u32 r)
360{
361 return (r >> 8U) & 0xfU;
362}
363static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_v(void)
364{
365 return 0x00000003U;
366}
367static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_f(void)
368{
369 return 0x300U;
370}
371static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_v(u32 r)
372{
373 return (r >> 28U) & 0x1U;
374}
375static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_v(void)
376{
377 return 0x00000001U;
378}
379static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_f(void)
380{
381 return 0x10000000U;
382}
383static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_v(u32 r)
384{
385 return (r >> 29U) & 0x1U;
386}
387static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_v(void)
388{
389 return 0x00000001U;
390}
391static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_f(void)
392{
393 return 0x20000000U;
394}
395static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_v(u32 r)
396{
397 return (r >> 30U) & 0x1U;
398}
399static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_v(void)
400{
401 return 0x00000001U;
402}
403static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_f(void)
404{
405 return 0x40000000U;
406}
407static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_r(void)
408{
409 return 0x0017e2a4U;
410}
411static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_v(u32 r)
412{
413 return (r >> 0U) & 0x1U;
414}
415static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_v(void)
416{
417 return 0x00000001U;
418}
419static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_f(void)
420{
421 return 0x1U;
422}
423static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_v(u32 r)
424{
425 return (r >> 8U) & 0xfU;
426}
427static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_v(void)
428{
429 return 0x00000003U;
430}
431static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_f(void)
432{
433 return 0x300U;
434}
435static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_v(u32 r)
436{
437 return (r >> 16U) & 0x1U;
438}
439static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_v(void)
440{
441 return 0x00000001U;
442}
443static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_f(void)
444{
445 return 0x10000U;
446}
447static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_v(u32 r)
448{
449 return (r >> 28U) & 0x1U;
450}
451static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_v(void)
452{
453 return 0x00000001U;
454}
455static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_f(void)
456{
457 return 0x10000000U;
458}
459static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_v(u32 r)
460{
461 return (r >> 29U) & 0x1U;
462}
463static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_v(void)
464{
465 return 0x00000001U;
466}
467static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_f(void)
468{
469 return 0x20000000U;
470}
471static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_v(u32 r)
472{
473 return (r >> 30U) & 0x1U;
474}
475static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_v(void)
476{
477 return 0x00000001U;
478}
479static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_f(void)
480{
481 return 0x40000000U;
482}
483static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_r(void)
484{
485 return 0x001402a0U;
486}
487static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_v(u32 r)
488{
489 return (r >> 0U) & 0x1U;
490}
491static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_v(void)
492{
493 return 0x00000001U;
494}
495static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_f(void)
496{
497 return 0x1U;
498}
499static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_r(void)
500{
501 return 0x001402a4U;
502}
503static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_v(u32 r)
504{
505 return (r >> 0U) & 0x1U;
506}
507static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_v(void)
508{
509 return 0x00000001U;
510}
511static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_f(void)
512{
513 return 0x1U;
514}
515static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_r(void)
516{
517 return 0x001422a0U;
518}
519static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_v(u32 r)
520{
521 return (r >> 0U) & 0x1U;
522}
523static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_v(void)
524{
525 return 0x00000001U;
526}
527static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_f(void)
528{
529 return 0x1U;
530}
531static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_r(void)
532{
533 return 0x001422a4U;
534}
535static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_v(u32 r)
536{
537 return (r >> 0U) & 0x1U;
538}
539static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_v(void)
540{
541 return 0x00000001U;
542}
543static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_f(void)
544{
545 return 0x1U;
546}
547static inline u32 ltc_ltc0_lts0_tstg_info_1_r(void)
548{
549 return 0x0014058cU;
550}
551static inline u32 ltc_ltc0_lts0_tstg_info_1_slice_size_in_kb_v(u32 r)
552{
553 return (r >> 0U) & 0xffffU;
554}
555static inline u32 ltc_ltc0_lts0_tstg_info_1_slices_per_l2_v(u32 r)
556{
557 return (r >> 16U) & 0x1fU;
558}
559#endif
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