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-rw-r--r--include/nvgpu/hw/gp106/hw_gmmu_gp106.h331
1 files changed, 0 insertions, 331 deletions
diff --git a/include/nvgpu/hw/gp106/hw_gmmu_gp106.h b/include/nvgpu/hw/gp106/hw_gmmu_gp106.h
deleted file mode 100644
index 8369001..0000000
--- a/include/nvgpu/hw/gp106/hw_gmmu_gp106.h
+++ /dev/null
@@ -1,331 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_gmmu_gp106_h_
57#define _hw_gmmu_gp106_h_
58
59static inline u32 gmmu_new_pde_is_pte_w(void)
60{
61 return 0U;
62}
63static inline u32 gmmu_new_pde_is_pte_false_f(void)
64{
65 return 0x0U;
66}
67static inline u32 gmmu_new_pde_aperture_w(void)
68{
69 return 0U;
70}
71static inline u32 gmmu_new_pde_aperture_invalid_f(void)
72{
73 return 0x0U;
74}
75static inline u32 gmmu_new_pde_aperture_video_memory_f(void)
76{
77 return 0x2U;
78}
79static inline u32 gmmu_new_pde_aperture_sys_mem_coh_f(void)
80{
81 return 0x4U;
82}
83static inline u32 gmmu_new_pde_aperture_sys_mem_ncoh_f(void)
84{
85 return 0x6U;
86}
87static inline u32 gmmu_new_pde_address_sys_f(u32 v)
88{
89 return (v & 0xffffffU) << 8U;
90}
91static inline u32 gmmu_new_pde_address_sys_w(void)
92{
93 return 0U;
94}
95static inline u32 gmmu_new_pde_vol_w(void)
96{
97 return 0U;
98}
99static inline u32 gmmu_new_pde_vol_true_f(void)
100{
101 return 0x8U;
102}
103static inline u32 gmmu_new_pde_vol_false_f(void)
104{
105 return 0x0U;
106}
107static inline u32 gmmu_new_pde_address_shift_v(void)
108{
109 return 0x0000000cU;
110}
111static inline u32 gmmu_new_pde__size_v(void)
112{
113 return 0x00000008U;
114}
115static inline u32 gmmu_new_dual_pde_is_pte_w(void)
116{
117 return 0U;
118}
119static inline u32 gmmu_new_dual_pde_is_pte_false_f(void)
120{
121 return 0x0U;
122}
123static inline u32 gmmu_new_dual_pde_aperture_big_w(void)
124{
125 return 0U;
126}
127static inline u32 gmmu_new_dual_pde_aperture_big_invalid_f(void)
128{
129 return 0x0U;
130}
131static inline u32 gmmu_new_dual_pde_aperture_big_video_memory_f(void)
132{
133 return 0x2U;
134}
135static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(void)
136{
137 return 0x4U;
138}
139static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(void)
140{
141 return 0x6U;
142}
143static inline u32 gmmu_new_dual_pde_address_big_sys_f(u32 v)
144{
145 return (v & 0xfffffffU) << 4U;
146}
147static inline u32 gmmu_new_dual_pde_address_big_sys_w(void)
148{
149 return 0U;
150}
151static inline u32 gmmu_new_dual_pde_aperture_small_w(void)
152{
153 return 2U;
154}
155static inline u32 gmmu_new_dual_pde_aperture_small_invalid_f(void)
156{
157 return 0x0U;
158}
159static inline u32 gmmu_new_dual_pde_aperture_small_video_memory_f(void)
160{
161 return 0x2U;
162}
163static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(void)
164{
165 return 0x4U;
166}
167static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(void)
168{
169 return 0x6U;
170}
171static inline u32 gmmu_new_dual_pde_vol_small_w(void)
172{
173 return 2U;
174}
175static inline u32 gmmu_new_dual_pde_vol_small_true_f(void)
176{
177 return 0x8U;
178}
179static inline u32 gmmu_new_dual_pde_vol_small_false_f(void)
180{
181 return 0x0U;
182}
183static inline u32 gmmu_new_dual_pde_vol_big_w(void)
184{
185 return 0U;
186}
187static inline u32 gmmu_new_dual_pde_vol_big_true_f(void)
188{
189 return 0x8U;
190}
191static inline u32 gmmu_new_dual_pde_vol_big_false_f(void)
192{
193 return 0x0U;
194}
195static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v)
196{
197 return (v & 0xffffffU) << 8U;
198}
199static inline u32 gmmu_new_dual_pde_address_small_sys_w(void)
200{
201 return 2U;
202}
203static inline u32 gmmu_new_dual_pde_address_shift_v(void)
204{
205 return 0x0000000cU;
206}
207static inline u32 gmmu_new_dual_pde_address_big_shift_v(void)
208{
209 return 0x00000008U;
210}
211static inline u32 gmmu_new_dual_pde__size_v(void)
212{
213 return 0x00000010U;
214}
215static inline u32 gmmu_new_pte__size_v(void)
216{
217 return 0x00000008U;
218}
219static inline u32 gmmu_new_pte_valid_w(void)
220{
221 return 0U;
222}
223static inline u32 gmmu_new_pte_valid_true_f(void)
224{
225 return 0x1U;
226}
227static inline u32 gmmu_new_pte_valid_false_f(void)
228{
229 return 0x0U;
230}
231static inline u32 gmmu_new_pte_privilege_w(void)
232{
233 return 0U;
234}
235static inline u32 gmmu_new_pte_privilege_true_f(void)
236{
237 return 0x20U;
238}
239static inline u32 gmmu_new_pte_privilege_false_f(void)
240{
241 return 0x0U;
242}
243static inline u32 gmmu_new_pte_address_sys_f(u32 v)
244{
245 return (v & 0xffffffU) << 8U;
246}
247static inline u32 gmmu_new_pte_address_sys_w(void)
248{
249 return 0U;
250}
251static inline u32 gmmu_new_pte_address_vid_f(u32 v)
252{
253 return (v & 0xffffffU) << 8U;
254}
255static inline u32 gmmu_new_pte_address_vid_w(void)
256{
257 return 0U;
258}
259static inline u32 gmmu_new_pte_vol_w(void)
260{
261 return 0U;
262}
263static inline u32 gmmu_new_pte_vol_true_f(void)
264{
265 return 0x8U;
266}
267static inline u32 gmmu_new_pte_vol_false_f(void)
268{
269 return 0x0U;
270}
271static inline u32 gmmu_new_pte_aperture_w(void)
272{
273 return 0U;
274}
275static inline u32 gmmu_new_pte_aperture_video_memory_f(void)
276{
277 return 0x0U;
278}
279static inline u32 gmmu_new_pte_aperture_sys_mem_coh_f(void)
280{
281 return 0x4U;
282}
283static inline u32 gmmu_new_pte_aperture_sys_mem_ncoh_f(void)
284{
285 return 0x6U;
286}
287static inline u32 gmmu_new_pte_read_only_w(void)
288{
289 return 0U;
290}
291static inline u32 gmmu_new_pte_read_only_true_f(void)
292{
293 return 0x40U;
294}
295static inline u32 gmmu_new_pte_comptagline_f(u32 v)
296{
297 return (v & 0x3ffffU) << 4U;
298}
299static inline u32 gmmu_new_pte_comptagline_w(void)
300{
301 return 1U;
302}
303static inline u32 gmmu_new_pte_kind_f(u32 v)
304{
305 return (v & 0xffU) << 24U;
306}
307static inline u32 gmmu_new_pte_kind_w(void)
308{
309 return 1U;
310}
311static inline u32 gmmu_new_pte_address_shift_v(void)
312{
313 return 0x0000000cU;
314}
315static inline u32 gmmu_pte_kind_f(u32 v)
316{
317 return (v & 0xffU) << 4U;
318}
319static inline u32 gmmu_pte_kind_w(void)
320{
321 return 1U;
322}
323static inline u32 gmmu_pte_kind_invalid_v(void)
324{
325 return 0x000000ffU;
326}
327static inline u32 gmmu_pte_kind_pitch_v(void)
328{
329 return 0x00000000U;
330}
331#endif
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