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-rw-r--r--include/nvgpu/hw/gm20b/hw_therm_gm20b.h355
1 files changed, 0 insertions, 355 deletions
diff --git a/include/nvgpu/hw/gm20b/hw_therm_gm20b.h b/include/nvgpu/hw/gm20b/hw_therm_gm20b.h
deleted file mode 100644
index fc1cd51..0000000
--- a/include/nvgpu/hw/gm20b/hw_therm_gm20b.h
+++ /dev/null
@@ -1,355 +0,0 @@
1/*
2 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_therm_gm20b_h_
57#define _hw_therm_gm20b_h_
58
59static inline u32 therm_use_a_r(void)
60{
61 return 0x00020798U;
62}
63static inline u32 therm_use_a_ext_therm_0_enable_f(void)
64{
65 return 0x1U;
66}
67static inline u32 therm_use_a_ext_therm_1_enable_f(void)
68{
69 return 0x2U;
70}
71static inline u32 therm_use_a_ext_therm_2_enable_f(void)
72{
73 return 0x4U;
74}
75static inline u32 therm_evt_ext_therm_0_r(void)
76{
77 return 0x00020700U;
78}
79static inline u32 therm_evt_ext_therm_0_slow_factor_f(u32 v)
80{
81 return (v & 0x3fU) << 8U;
82}
83static inline u32 therm_evt_ext_therm_0_slow_factor_init_v(void)
84{
85 return 0x00000000U;
86}
87static inline u32 therm_evt_ext_therm_1_r(void)
88{
89 return 0x00020704U;
90}
91static inline u32 therm_evt_ext_therm_1_slow_factor_f(u32 v)
92{
93 return (v & 0x3fU) << 8U;
94}
95static inline u32 therm_evt_ext_therm_1_slow_factor_init_v(void)
96{
97 return 0x00000000U;
98}
99static inline u32 therm_evt_ext_therm_2_r(void)
100{
101 return 0x00020708U;
102}
103static inline u32 therm_evt_ext_therm_2_slow_factor_f(u32 v)
104{
105 return (v & 0x3fU) << 8U;
106}
107static inline u32 therm_evt_ext_therm_2_slow_factor_init_v(void)
108{
109 return 0x00000000U;
110}
111static inline u32 therm_weight_1_r(void)
112{
113 return 0x00020024U;
114}
115static inline u32 therm_config1_r(void)
116{
117 return 0x00020050U;
118}
119static inline u32 therm_config2_r(void)
120{
121 return 0x00020130U;
122}
123static inline u32 therm_config2_slowdown_factor_extended_f(u32 v)
124{
125 return (v & 0x1U) << 24U;
126}
127static inline u32 therm_config2_grad_enable_f(u32 v)
128{
129 return (v & 0x1U) << 31U;
130}
131static inline u32 therm_gate_ctrl_r(u32 i)
132{
133 return 0x00020200U + i*4U;
134}
135static inline u32 therm_gate_ctrl_eng_clk_m(void)
136{
137 return 0x3U << 0U;
138}
139static inline u32 therm_gate_ctrl_eng_clk_run_f(void)
140{
141 return 0x0U;
142}
143static inline u32 therm_gate_ctrl_eng_clk_auto_f(void)
144{
145 return 0x1U;
146}
147static inline u32 therm_gate_ctrl_eng_clk_stop_f(void)
148{
149 return 0x2U;
150}
151static inline u32 therm_gate_ctrl_blk_clk_m(void)
152{
153 return 0x3U << 2U;
154}
155static inline u32 therm_gate_ctrl_blk_clk_run_f(void)
156{
157 return 0x0U;
158}
159static inline u32 therm_gate_ctrl_blk_clk_auto_f(void)
160{
161 return 0x4U;
162}
163static inline u32 therm_gate_ctrl_eng_pwr_m(void)
164{
165 return 0x3U << 4U;
166}
167static inline u32 therm_gate_ctrl_eng_pwr_auto_f(void)
168{
169 return 0x10U;
170}
171static inline u32 therm_gate_ctrl_eng_pwr_off_v(void)
172{
173 return 0x00000002U;
174}
175static inline u32 therm_gate_ctrl_eng_pwr_off_f(void)
176{
177 return 0x20U;
178}
179static inline u32 therm_gate_ctrl_eng_idle_filt_exp_f(u32 v)
180{
181 return (v & 0x1fU) << 8U;
182}
183static inline u32 therm_gate_ctrl_eng_idle_filt_exp_m(void)
184{
185 return 0x1fU << 8U;
186}
187static inline u32 therm_gate_ctrl_eng_idle_filt_mant_f(u32 v)
188{
189 return (v & 0x7U) << 13U;
190}
191static inline u32 therm_gate_ctrl_eng_idle_filt_mant_m(void)
192{
193 return 0x7U << 13U;
194}
195static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v)
196{
197 return (v & 0xfU) << 16U;
198}
199static inline u32 therm_gate_ctrl_eng_delay_before_m(void)
200{
201 return 0xfU << 16U;
202}
203static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v)
204{
205 return (v & 0xfU) << 20U;
206}
207static inline u32 therm_gate_ctrl_eng_delay_after_m(void)
208{
209 return 0xfU << 20U;
210}
211static inline u32 therm_fecs_idle_filter_r(void)
212{
213 return 0x00020288U;
214}
215static inline u32 therm_fecs_idle_filter_value_m(void)
216{
217 return 0xffffffffU << 0U;
218}
219static inline u32 therm_hubmmu_idle_filter_r(void)
220{
221 return 0x0002028cU;
222}
223static inline u32 therm_hubmmu_idle_filter_value_m(void)
224{
225 return 0xffffffffU << 0U;
226}
227static inline u32 therm_clk_slowdown_r(u32 i)
228{
229 return 0x00020160U + i*4U;
230}
231static inline u32 therm_clk_slowdown_idle_factor_f(u32 v)
232{
233 return (v & 0x3fU) << 16U;
234}
235static inline u32 therm_clk_slowdown_idle_factor_m(void)
236{
237 return 0x3fU << 16U;
238}
239static inline u32 therm_clk_slowdown_idle_factor_v(u32 r)
240{
241 return (r >> 16U) & 0x3fU;
242}
243static inline u32 therm_clk_slowdown_idle_factor_disabled_f(void)
244{
245 return 0x0U;
246}
247static inline u32 therm_grad_stepping_table_r(u32 i)
248{
249 return 0x000202c8U + i*4U;
250}
251static inline u32 therm_grad_stepping_table_slowdown_factor0_f(u32 v)
252{
253 return (v & 0x3fU) << 0U;
254}
255static inline u32 therm_grad_stepping_table_slowdown_factor0_m(void)
256{
257 return 0x3fU << 0U;
258}
259static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f(void)
260{
261 return 0x1U;
262}
263static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by2_f(void)
264{
265 return 0x2U;
266}
267static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by4_f(void)
268{
269 return 0x6U;
270}
271static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f(void)
272{
273 return 0xeU;
274}
275static inline u32 therm_grad_stepping_table_slowdown_factor1_f(u32 v)
276{
277 return (v & 0x3fU) << 6U;
278}
279static inline u32 therm_grad_stepping_table_slowdown_factor1_m(void)
280{
281 return 0x3fU << 6U;
282}
283static inline u32 therm_grad_stepping_table_slowdown_factor2_f(u32 v)
284{
285 return (v & 0x3fU) << 12U;
286}
287static inline u32 therm_grad_stepping_table_slowdown_factor2_m(void)
288{
289 return 0x3fU << 12U;
290}
291static inline u32 therm_grad_stepping_table_slowdown_factor3_f(u32 v)
292{
293 return (v & 0x3fU) << 18U;
294}
295static inline u32 therm_grad_stepping_table_slowdown_factor3_m(void)
296{
297 return 0x3fU << 18U;
298}
299static inline u32 therm_grad_stepping_table_slowdown_factor4_f(u32 v)
300{
301 return (v & 0x3fU) << 24U;
302}
303static inline u32 therm_grad_stepping_table_slowdown_factor4_m(void)
304{
305 return 0x3fU << 24U;
306}
307static inline u32 therm_grad_stepping0_r(void)
308{
309 return 0x000202c0U;
310}
311static inline u32 therm_grad_stepping0_feature_s(void)
312{
313 return 1U;
314}
315static inline u32 therm_grad_stepping0_feature_f(u32 v)
316{
317 return (v & 0x1U) << 0U;
318}
319static inline u32 therm_grad_stepping0_feature_m(void)
320{
321 return 0x1U << 0U;
322}
323static inline u32 therm_grad_stepping0_feature_v(u32 r)
324{
325 return (r >> 0U) & 0x1U;
326}
327static inline u32 therm_grad_stepping0_feature_enable_f(void)
328{
329 return 0x1U;
330}
331static inline u32 therm_grad_stepping1_r(void)
332{
333 return 0x000202c4U;
334}
335static inline u32 therm_grad_stepping1_pdiv_duration_f(u32 v)
336{
337 return (v & 0x1ffffU) << 0U;
338}
339static inline u32 therm_clk_timing_r(u32 i)
340{
341 return 0x000203c0U + i*4U;
342}
343static inline u32 therm_clk_timing_grad_slowdown_f(u32 v)
344{
345 return (v & 0x1U) << 16U;
346}
347static inline u32 therm_clk_timing_grad_slowdown_m(void)
348{
349 return 0x1U << 16U;
350}
351static inline u32 therm_clk_timing_grad_slowdown_enabled_f(void)
352{
353 return 0x10000U;
354}
355#endif
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