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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/therm
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headers
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/therm')
-rw-r--r--include/therm/thrm.c55
-rw-r--r--include/therm/thrm.h38
-rw-r--r--include/therm/thrmchannel.c256
-rw-r--r--include/therm/thrmchannel.h51
-rw-r--r--include/therm/thrmdev.c370
-rw-r--r--include/therm/thrmdev.h58
-rw-r--r--include/therm/thrmpmu.c271
-rw-r--r--include/therm/thrmpmu.h31
8 files changed, 0 insertions, 1130 deletions
diff --git a/include/therm/thrm.c b/include/therm/thrm.c
deleted file mode 100644
index c4e2731..0000000
--- a/include/therm/thrm.c
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/gk20a.h>
24
25#include "thrm.h"
26#include "thrmpmu.h"
27
28u32 therm_domain_sw_setup(struct gk20a *g)
29{
30 u32 status;
31
32 status = therm_device_sw_setup(g);
33 if (status) {
34 nvgpu_err(g,
35 "error creating boardobjgrp for therm devices, status - 0x%x",
36 status);
37 goto exit;
38 }
39
40 status = therm_channel_sw_setup(g);
41 if (status) {
42 nvgpu_err(g,
43 "error creating boardobjgrp for therm channel, status - 0x%x",
44 status);
45 goto exit;
46 }
47
48exit:
49 return status;
50}
51
52u32 therm_domain_pmu_setup(struct gk20a *g)
53{
54 return therm_send_pmgr_tables_to_pmu(g);
55}
diff --git a/include/therm/thrm.h b/include/therm/thrm.h
deleted file mode 100644
index d9d73b7..0000000
--- a/include/therm/thrm.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * general thermal table structures & definitions
3 *
4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef NVGPU_THERM_THRM_H
25#define NVGPU_THERM_THRM_H
26
27#include "thrmdev.h"
28#include "thrmchannel.h"
29
30struct therm_pmupstate {
31 struct therm_devices therm_deviceobjs;
32 struct therm_channels therm_channelobjs;
33};
34
35u32 therm_domain_sw_setup(struct gk20a *g);
36u32 therm_domain_pmu_setup(struct gk20a *g);
37
38#endif /* NVGPU_THERM_THRM_H */
diff --git a/include/therm/thrmchannel.c b/include/therm/thrmchannel.c
deleted file mode 100644
index 419ce0b..0000000
--- a/include/therm/thrmchannel.c
+++ /dev/null
@@ -1,256 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bios.h>
24#include <nvgpu/gk20a.h>
25#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
26
27#include "thrmchannel.h"
28#include "boardobj/boardobjgrp.h"
29#include "boardobj/boardobjgrp_e32.h"
30#include "gp106/bios_gp106.h"
31
32static int _therm_channel_pmudatainit_device(struct gk20a *g,
33 struct boardobj *board_obj_ptr,
34 struct nv_pmu_boardobj *ppmudata)
35{
36 int status = 0;
37 struct therm_channel *pchannel;
38 struct therm_channel_device *ptherm_channel;
39 struct nv_pmu_therm_therm_channel_device_boardobj_set *pset;
40
41 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
42 if (status) {
43 nvgpu_err(g,
44 "error updating pmu boardobjgrp for therm channel 0x%x",
45 status);
46 status = -ENOMEM;
47 goto done;
48 }
49
50 pchannel = (struct therm_channel *)board_obj_ptr;
51 pset = (struct nv_pmu_therm_therm_channel_device_boardobj_set *)ppmudata;
52 ptherm_channel = (struct therm_channel_device *)board_obj_ptr;
53
54 pset->super.scaling = pchannel->scaling;
55 pset->super.offset = pchannel->offset;
56 pset->super.temp_min = pchannel->temp_min;
57 pset->super.temp_max = pchannel->temp_max;
58
59 pset->therm_dev_idx = ptherm_channel->therm_dev_idx;
60 pset->therm_dev_prov_idx = ptherm_channel->therm_dev_prov_idx;
61
62done:
63 return status;
64}
65static struct boardobj *construct_channel_device(struct gk20a *g,
66 void *pargs, u16 pargs_size, u8 type)
67{
68 struct boardobj *board_obj_ptr = NULL;
69 struct therm_channel *pchannel;
70 struct therm_channel_device *pchannel_device;
71 int status;
72 struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs;
73
74 status = boardobj_construct_super(g, &board_obj_ptr,
75 pargs_size, pargs);
76 if (status) {
77 return NULL;
78 }
79
80 /* Set Super class interfaces */
81 board_obj_ptr->pmudatainit = _therm_channel_pmudatainit_device;
82
83 pchannel = (struct therm_channel *)board_obj_ptr;
84 pchannel_device = (struct therm_channel_device *)board_obj_ptr;
85
86 g->ops.therm.get_internal_sensor_limits(&pchannel->temp_max,
87 &pchannel->temp_min);
88 pchannel->scaling = (1 << 8);
89 pchannel->offset = 0;
90
91 pchannel_device->therm_dev_idx = therm_device->therm_dev_idx;
92 pchannel_device->therm_dev_prov_idx = therm_device->therm_dev_prov_idx;
93
94 nvgpu_log_info(g, " Done");
95
96 return board_obj_ptr;
97}
98
99static int _therm_channel_pmudata_instget(struct gk20a *g,
100 struct nv_pmu_boardobjgrp *pmuboardobjgrp,
101 struct nv_pmu_boardobj **ppboardobjpmudata,
102 u8 idx)
103{
104 struct nv_pmu_therm_therm_channel_boardobj_grp_set *pgrp_set =
105 (struct nv_pmu_therm_therm_channel_boardobj_grp_set *)
106 pmuboardobjgrp;
107
108 nvgpu_log_info(g, " ");
109
110 /*check whether pmuboardobjgrp has a valid boardobj in index*/
111 if (((u32)BIT(idx) &