Include nvgpu headers

These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.

10 files changed, 2481 insertions, 0 deletions

diff --git a/include/pmgr/pmgr.c b/include/pmgr/pmgr.c
new file mode 100644
index 0000000..f5be01b
--- /dev/null
+++ b/include/pmgr/pmgr.c
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <nvgpu/gk20a.h>
+
+#include "pwrdev.h"
+#include "pmgrpmu.h"
+
+int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val)
+{
+        struct nv_pmu_pmgr_pwr_devices_query_payload payload;
+        int status;
+
+        status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
+        if (status) {
+                nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x",
+                        status);
+        }
+
+        *val = payload.devices[0].powerm_w;
+
+        return status;
+}
+
+int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val)
+{
+        struct nv_pmu_pmgr_pwr_devices_query_payload payload;
+        int status;
+
+        status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
+        if (status) {
+                nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x",
+                        status);
+        }
+
+        *val = payload.devices[0].currentm_a;
+
+        return status;
+}
+
+int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val)
+{
+        struct nv_pmu_pmgr_pwr_devices_query_payload payload;
+        int status;
+
+        status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
+        if (status) {
+                nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x",
+                        status);
+        }
+
+        *val = payload.devices[0].voltageu_v;
+
+        return status;
+}
+
+u32 pmgr_domain_sw_setup(struct gk20a *g)
+{
+        u32 status;
+
+        status = pmgr_device_sw_setup(g);
+        if (status) {
+                nvgpu_err(g,
+                        "error creating boardobjgrp for pmgr devices, status - 0x%x",
+                        status);
+                goto exit;
+        }
+
+        status = pmgr_monitor_sw_setup(g);
+        if (status) {
+                nvgpu_err(g,
+                        "error creating boardobjgrp for pmgr monitor, status - 0x%x",
+                        status);
+                goto exit;
+        }
+
+        status = pmgr_policy_sw_setup(g);
+        if (status) {
+                nvgpu_err(g,
+                        "error creating boardobjgrp for pmgr policy, status - 0x%x",
+                        status);
+                goto exit;
+        }
+
+exit:
+        return status;
+}
+
+int pmgr_domain_pmu_setup(struct gk20a *g)
+{
+        return pmgr_send_pmgr_tables_to_pmu(g);
+}
diff --git a/include/pmgr/pmgr.h b/include/pmgr/pmgr.h
new file mode 100644
index 0000000..9b142de
--- /dev/null
+++ b/include/pmgr/pmgr.h
@@ -0,0 +1,43 @@
+/*
+ * general power device structures & definitions
+ *
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef NVGPU_PMGR_H
+#define NVGPU_PMGR_H
+
+#include "pwrdev.h"
+#include "pwrmonitor.h"
+#include "pwrpolicy.h"
+
+struct pmgr_pmupstate {
+        struct pwr_devices pmgr_deviceobjs;
+        struct pmgr_pwr_monitor pmgr_monitorobjs;
+        struct pmgr_pwr_policy pmgr_policyobjs;
+};
+
+u32 pmgr_domain_sw_setup(struct gk20a *g);
+int pmgr_domain_pmu_setup(struct gk20a *g);
+int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val);
+int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val);
+int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val);
+
+#endif /* NVGPU_PMGR_H */
diff --git a/include/pmgr/pmgrpmu.c b/include/pmgr/pmgrpmu.c
new file mode 100644
index 0000000..b6947f2
--- /dev/null
+++ b/include/pmgr/pmgrpmu.c
@@ -0,0 +1,546 @@
+/*
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <nvgpu/kmem.h>
+#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
+#include <nvgpu/pmu.h>
+#include <nvgpu/gk20a.h>
+
+#include "gp106/bios_gp106.h"
+
+#include "boardobj/boardobjgrp.h"
+#include "boardobj/boardobjgrp_e32.h"
+
+#include "pwrdev.h"
+#include "pmgrpmu.h"
+
+struct pmgr_pmucmdhandler_params {
+        u32 success;
+};
+
+static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
+                        void *param, u32 handle, u32 status)
+{
+        struct pmgr_pmucmdhandler_params *phandlerparams =
+                (struct pmgr_pmucmdhandler_params *)param;
+
+        if ((msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_SET_OBJECT) &&
+                (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_QUERY) &&
+                (msg->msg.pmgr.msg_type != NV_PMU_PMGR_MSG_ID_LOAD)) {
+                nvgpu_err(g, "unknow msg %x", msg->msg.pmgr.msg_type);
+                return;
+        }
+