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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/pmgr/pwrmonitor.h
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/pmgr/pwrmonitor.h')
-rw-r--r--include/pmgr/pwrmonitor.h69
1 files changed, 0 insertions, 69 deletions
diff --git a/include/pmgr/pwrmonitor.h b/include/pmgr/pwrmonitor.h
deleted file mode 100644
index bf4c76f..0000000
--- a/include/pmgr/pwrmonitor.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * general power channel structures & definitions
3 *
4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef NVGPU_PMGR_PWRMONITOR_H
25#define NVGPU_PMGR_PWRMONITOR_H
26
27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
28#include "boardobj/boardobjgrp.h"
29#include "boardobj/boardobj.h"
30#include "ctrl/ctrlpmgr.h"
31
32struct pwr_channel {
33 struct boardobj super;
34 u8 pwr_rail;
35 u32 volt_fixed_uv;
36 u32 pwr_corr_slope;
37 s32 pwr_corr_offset_mw;
38 u32 curr_corr_slope;
39 s32 curr_corr_offset_ma;
40 u32 dependent_ch_mask;
41};
42
43struct pwr_chrelationship {
44 struct boardobj super;
45 u8 chIdx;
46};
47
48struct pwr_channel_sensor {
49 struct pwr_channel super;
50 u8 pwr_dev_idx;
51 u8 pwr_dev_prov_idx;
52};
53
54struct pmgr_pwr_monitor {
55 bool b_is_topology_tbl_ver_1x;
56 struct boardobjgrp_e32 pwr_channels;
57 struct boardobjgrp_e32 pwr_ch_rels;
58 u8 total_gpu_channel_idx;
59 u32 physical_channel_mask;
60 struct nv_pmu_pmgr_pwr_monitor_pack pmu_data;
61};
62
63#define PMGR_PWR_MONITOR_GET_PWR_CHANNEL(g, channel_idx) \
64 ((struct pwr_channel *)BOARDOBJGRP_OBJ_GET_BY_IDX( \
65 &(g->pmgr_pmu.pmgr_monitorobjs.pwr_channels.super), (channel_idx)))
66
67int pmgr_monitor_sw_setup(struct gk20a *g);
68
69#endif /* NVGPU_PMGR_PWRMONITOR_H */