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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/os/posix
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headers
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/os/posix')
-rw-r--r--include/os/posix/bitmap.c227
-rw-r--r--include/os/posix/bug.c67
-rw-r--r--include/os/posix/clk_arb.c198
-rw-r--r--include/os/posix/cond.c55
-rw-r--r--include/os/posix/error_notifier.c40
-rw-r--r--include/os/posix/firmware.c35
-rw-r--r--include/os/posix/fuse.c54
-rw-r--r--include/os/posix/io.c371
-rw-r--r--include/os/posix/kmem.c134
-rw-r--r--include/os/posix/lock.c79
-rw-r--r--include/os/posix/log.c95
-rw-r--r--include/os/posix/nvgpu.c165
-rw-r--r--include/os/posix/nvlink.c33
-rw-r--r--include/os/posix/os_posix.h58
-rw-r--r--include/os/posix/posix-channel.c32
-rw-r--r--include/os/posix/posix-comptags.c49
-rw-r--r--include/os/posix/posix-dma.c88
-rw-r--r--include/os/posix/posix-nvgpu_mem.c140
-rw-r--r--include/os/posix/posix-tsg.c28
-rw-r--r--include/os/posix/posix-vm.c52
-rw-r--r--include/os/posix/posix-vpr.c19
-rw-r--r--include/os/posix/rwsem.c117
-rw-r--r--include/os/posix/soc.c53
-rw-r--r--include/os/posix/stubs.c50
-rw-r--r--include/os/posix/thread.c101
-rw-r--r--include/os/posix/timers.c169
26 files changed, 0 insertions, 2509 deletions
diff --git a/include/os/posix/bitmap.c b/include/os/posix/bitmap.c
deleted file mode 100644
index 99ba62c..0000000
--- a/include/os/posix/bitmap.c
+++ /dev/null
@@ -1,227 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <stdio.h>
24#include <stdlib.h>
25
26#include <nvgpu/posix/bitops.h>
27#include <nvgpu/posix/atomic.h>
28
29#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
30#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
31
32unsigned long __nvgpu_posix_ffs(unsigned long word)
33{
34 return (__builtin_ffsl(word) - 1) &
35 ((sizeof(unsigned long) * 8UL) - 1UL);
36}
37
38unsigned long __nvgpu_posix_fls(unsigned long word)
39{
40 unsigned long ret;
41
42 if (word == 0UL) {
43 /* __builtin_clzl() below is undefined for 0, so we have
44 * to handle that as a special case.
45 */
46 ret = 0UL;
47 } else {
48 ret = (sizeof(unsigned long) * 8UL) - __builtin_clzl(word);
49 }
50
51 return ret;
52}
53
54static unsigned long __find_next_bit(const unsigned long *addr,
55 unsigned long n,
56 unsigned long start,
57 bool invert)
58{
59 unsigned long idx;
60 unsigned long w;
61 unsigned long start_mask;
62
63 /*
64 * We make a mask we can XOR into the word so that we can invert the
65 * word without requiring a branch. I.e instead of doing:
66 *
67 * w = invert ? ~addr[idx] : addr[idx]
68 *
69 * We can do:
70 *
71 * w = addr[idx] ^= invert_mask
72 *
73 * This saves us a branch every iteration through the loop. Now we can
74 * always just look for 1s.
75 */
76 unsigned long invert_mask = invert ? ~0UL : 0UL;
77
78 if (start >= n)
79 return n;
80
81 start_mask = ~0UL << (start & (BITS_PER_LONG - 1));
82
83 idx = start / BITS_PER_LONG;
84 w = (addr[idx] ^ invert_mask) & start_mask;
85
86 start = round_up(start, BITS_PER_LONG);
87
88 /*
89 * Find the first non-zero word taking into account start and
90 * invert.
91 */
92 while (!w) {
93 idx++;
94 start += BITS_PER_LONG;
95
96 w = addr[idx] ^ invert_mask;
97 }
98
99 return min(n, ffs(w) + idx * BITS_PER_LONG);
100}
101
102unsigned long find_first_bit(const unsigned long *addr, unsigned long size)
103{
104 return __find_next_bit(addr, size, 0, false);
105}
106
107unsigned long find_first_zero_bit(const unsigned long *addr, unsigned long size)
108{
109 return __find_next_bit(addr, size, 0, true);
110}
111
112unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
113 unsigned long offset)
114{
115 return __find_next_bit(addr, size, offset, false);
116}
117
118static unsigned long find_next_zero_bit(const unsigned long *addr,
119 unsigned long size,
120 unsigned long offset)
121{
122 return __find_next_bit(addr, size, offset, true);
123}
124
125void bitmap_set(unsigned long *map, unsigned int start, int len)
126{
127 unsigned int end = start + len;
128
129 /*
130 * Super slow naive implementation. But speed isn't what matters here.
131 */
132 while (start < end)
133 set_bit(start++, map);
134}
135
136void bitmap_clear(unsigned long *map, unsigned int start, int len)
137{
138 unsigned int end = start + len;
139
140 while (start < end)
141 clear_bit(start++, map);
142}
143
144/*
145 * This is essentially a find-first-fit allocator: this searches a bitmap for
146 * the first space that is large enough to satisfy the requested size of bits.
147 * That means that this is not a vary smart allocator. But it is fast relative
148 * to an allocator that goes looking for an optimal location.
149 */
150unsigned long bitmap_find_next_zero_area_off(unsigned long *map,
151 unsigned long size,
152 unsigned long start,
153 unsigned int nr,
154 unsigned long align_mask,
155 unsigned long align_offset)
156{
157 unsigned long offs;
158
159 while (start + nr <= size) {
160 start = find_next_zero_bit(map, size, start);
161
162 start = ALIGN_MASK(start + align_offset, align_mask) -
163 align_offset;
164
165 /*
166 * Not enough space left to satisfy the requested area.
167 */
168 if ((start + nr) > size)
169 return size;
170
171 offs = find_next_bit(map, size, start);
172
173 if ((offs - start) >= nr)
174 return start;
175
176 start = offs + 1;
177 }
178
179 return size;
180}
181
182unsigned long bitmap_find_next_zero_area(unsigned long *map,
183 unsigned long size,
184 unsigned long start,
185 unsigned int nr,
186 unsigned long align_mask)
187{
188 return bitmap_find_next_zero_area_off(map, size, start, nr,
189 align_mask, 0);
190}
191
192bool test_bit(int nr, const volatile unsigned long *addr)
193{
194 return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
195}
196
197bool test_and_set_bit(int nr, volatile unsigned long *addr)
198{
199 unsigned long mask = BIT_MASK(nr);
200 volatile unsigned long *p = addr + BIT_WORD(nr);
201
202 return !!(__sync_fetch_and_or(p, mask) & mask);
203}
204
205bool test_and_clear_bit(int nr, volatile unsigned long *addr)
206{
207 unsigned long mask = BIT_MASK(nr);
208 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
209
210 return !!(__sync_fetch_and_and(p, ~mask) & mask);
211}
212
213void set_bit(int nr, volatile unsigned long *addr)
214{
215 unsigned long mask = BIT_MASK(nr);
216 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
217
218 __atomic_or(p, mask);
219}
220
221void clear_bit(int nr, volatile unsigned long *addr)
222{
223 unsigned long mask = BIT_MASK(nr);
224 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
225
226 __atomic_and(p, ~mask);
227}
diff --git a/include/os/posix/bug.c b/include/os/posix/bug.c
deleted file mode 100644
index 64f4a6f..0000000
--- a/include/os/posix/bug.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/log.h>
24
25#include <nvgpu/posix/bug.h>
26
27__attribute__ ((noreturn))
28static void __hang(void)
29{
30 nvgpu_err(NULL, "Hanging!");
31
32 while (1)
33 ;
34}
35
36static void __dump_stack(unsigned int skip_frames)
37{
38 return;
39}
40
41void dump_stack(void)
42{
43 __dump_stack(0);
44}
45
46/*
47 * Ahhh! A bug!
48 */
49void __bug(const char *fmt, ...)
50{
51 nvgpu_err(NULL, "BUG detected!");
52
53 __hang();
54}
55
56bool __warn(bool cond, const char *fmt, ...)
57{
58 if (!cond)
59 goto done;
60
61 nvgpu_warn(NULL, "WARNING detected!");
62
63 dump_stack();
64
65done:
66 return cond;
67}
diff --git a/include/os/posix/clk_arb.c b/include/os/posix/clk_arb.c
deleted file mode 100644
index fcba0a2..0000000
--- a/include/os/posix/clk_arb.c
+++ /dev/null
@@ -1,198 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/list.h>
24#include <nvgpu/clk_arb.h>
25
26/**
27 * Stub imlementation of the clk_arb code. Yikes. Much of this probably could be
28 * commonized if one were to think through the implementation but that is
29 * probably weeks of work at a minimum.
30 *
31 * So for POSIX it will be stubbed.
32 */
33
34int nvgpu_clk_arb_init_arbiter(struct gk20a *g)
35{
36 return -ENOSYS;
37}
38
39int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
40 u16 *min_mhz, u16 *max_mhz)
41{
42 return -ENOSYS;
43}
44
45int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
46{
47 return -ENOSYS;
48}
49
50int nvgpu_clk_arb_worker_init(struct gk20a *g)
51{
52 return -ENOSYS;
53}
54
55bool nvgpu_clk_arb_has_active_req(struct gk20a *g)
56{
57 return false;
58}
59
60int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g,
61 u32 api_domain, u16 *actual_mhz)
62{
63 return -ENOSYS;
64}
65
66int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g,
67 u32 api_domain, u16 *effective_mhz)
68{
69 return -ENOSYS;
70}
71
72int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g,
73 u32 api_domain,
74 u32 *max_points, u16 *fpoints)
75{
76 return -ENOSYS;
77}
78
79u32 nvgpu_clk_arb_get_arbiter_clk_domains(struct gk20a *g)
80{
81 return 0;
82}
83
84bool nvgpu_clk_arb_is_valid_domain(struct gk20a *g, u32 api_domain)
85{
86 return false;
87}
88
89void nvgpu_clk_arb_cleanup_arbiter(struct gk20a *g)
90{
91}
92
93int nvgpu_clk_arb_install_session_fd(struct gk20a *g,
94 struct nvgpu_clk_session *session)
95{
96 return -ENOSYS;
97}
98
99
100int nvgpu_clk_arb_init_session(struct gk20a *g,
101 struct nvgpu_clk_session **_session)
102{
103 return -ENOSYS;
104}
105
106void nvgpu_clk_arb_release_session(struct gk20a *g,
107 struct nvgpu_clk_session *session)
108{
109}
110
111int nvgpu_clk_arb_commit_request_fd(struct gk20a *g,
112 struct nvgpu_clk_session *session,
113 int request_fd)
114{
115 return -ENOSYS;
116}
117
118int nvgpu_clk_arb_set_session_target_mhz(struct nvgpu_clk_session *session,
119 int fd, u32 api_domain, u16 target_mhz)
120{
121 return -ENOSYS;
122}
123
124int nvgpu_clk_arb_get_session_target_mhz(struct nvgpu_clk_session *session,
125 u32 api_domain, u16 *target_mhz)
126{
127 return -ENOSYS;
128}
129
130int nvgpu_clk_arb_install_event_fd(struct gk20a *g,
131 struct nvgpu_clk_session *session,
132 int *event_fd, u32 alarm_mask)
133{
134 return -ENOSYS;
135}
136
137int nvgpu_clk_arb_install_request_fd(struct gk20a *g,
138 struct nvgpu_clk_session *session,
139 int *event_fd)
140{
141 return -ENOSYS;
142}
143
144u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev,
145 struct nvgpu_clk_arb_target *target,
146 u32 alarm)
147{
148 return 0;
149}
150
151void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount)
152{
153}
154
155void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g)
156{
157}
158
159int nvgpu_clk_arb_get_current_pstate(struct gk20a *g)
160{
161 return -ENOSYS;
162}
163
164void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock)
165{
166}
167
168void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g)
169{
170}
171
172void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm)
173{
174}
175
176void nvgpu_clk_arb_set_global_alarm(struct gk20a *g, u32 alarm)
177{
178}
179
180void nvgpu_clk_arb_clear_global_alarm(struct gk20a *g, u32 alarm)
181{
182}
183
184void nvgpu_clk_arb_event_post_event(struct nvgpu_clk_dev *dev)
185{
186}
187
188void nvgpu_clk_arb_worker_enqueue(struct gk20a *g,
189 struct nvgpu_clk_arb_work_item *work_item)
190{
191}
192
193int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
194 struct nvgpu_clk_notification_queue *queue,
195 size_t events_number)
196{
197 return -ENOSYS;
198}
diff --git a/include/os/posix/cond.c b/include/os/posix/cond.c
deleted file mode 100644
index ca8a2c4..0000000
--- a/include/os/posix/cond.c
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/cond.h>
24
25#include <nvgpu/posix/cond.h>
26
27int nvgpu_cond_init(struct nvgpu_cond *cond)
28{
29 return -ENOSYS;
30}
31
32int nvgpu_cond_signal(struct nvgpu_cond *cond)
33{
34 return -ENOSYS;
35}
36
37int nvgpu_cond_signal_interruptible(struct nvgpu_cond *cond)
38{
39 return -ENOSYS;
40}
41
42int nvgpu_cond_broadcast(struct nvgpu_cond *cond)
43{
44 return -ENOSYS;
45}
46
47int nvgpu_cond_broadcast_interruptible(struct nvgpu_cond *cond)
48{
49 return -ENOSYS;
50}
51
52void nvgpu_cond_destroy(struct nvgpu_cond *cond)
53{
54
55}
diff --git a/include/os/posix/error_notifier.c b/include/os/posix/error_notifier.c
deleted file mode 100644
index 50b4f25..0000000
--- a/include/os/posix/error_notifier.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/error_notifier.h>
24
25void nvgpu_set_error_notifier_locked(struct channel_gk20a *ch, u32 error)
26{
27}
28
29void nvgpu_set_error_notifier(struct channel_gk20a *ch, u32 error)
30{
31}
32
33void nvgpu_set_error_notifier_if_empty(struct channel_gk20a *ch, u32 error)
34{
35}
36
37bool nvgpu_is_error_notifier_set(struct channel_gk20a *ch, u32 error_notifier)
38{
39 return false;
40}
diff --git a/include/os/posix/firmware.c b/include/os/posix/firmware.c
deleted file mode 100644
index aedfef9..0000000
--- a/include/os/posix/firmware.c
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/firmware.h>
24
25struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g,
26 const char *fw_name,
27 int flags)
28{
29 return NULL;
30}
31
32void nvgpu_release_firmware(struct gk20a *g, struct nvgpu_firmware *fw)
33{
34 /* Noop. */
35}
diff --git a/include/os/posix/fuse.c b/include/os/posix/fuse.c
deleted file mode 100644
index 09ec36d..0000000
--- a/include/os/posix/fuse.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/fuse.h>
24
25int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g)
26{
27 return 0;
28}
29
30void nvgpu_tegra_fuse_write_bypass(struct gk20a *g, u32 val)
31{
32}
33
34void nvgpu_tegra_fuse_write_access_sw(struct gk20a *g, u32 val)
35{
36}
37
38void nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(struct gk20a *g, u32 val)
39{
40}
41
42void nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(struct gk20a *g, u32 val)
43{
44}
45
46int nvgpu_tegra_fuse_read_gcplex_config_fuse(struct gk20a *g, u32 *val)
47{
48 return -ENODEV;
49}
50
51int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val)
52{
53 return -ENODEV;
54}
diff --git a/include/os/posix/io.c b/include/os/posix/io.c
deleted file mode 100644
index 8369e73..0000000
--- a/include/os/posix/io.c
+++ /dev/null
@@ -1,371 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/io.h>
24#include <nvgpu/io_usermode.h>
25#include <nvgpu/bug.h>
26
27#include <nvgpu/posix/io.h>
28
29#include "os_posix.h"
30
31
32/*
33 * This function sets the IO callbacks to the passed set of callbacks. It
34 * returns the value of the old IO callback struct pointer. This function
35 * cannot fail.
36 *
37 * This is expected to be called from modules to set up their IO interaction.
38 */
39struct nvgpu_posix_io_callbacks *nvgpu_posix_register_io(
40 struct gk20a *g,
41 struct nvgpu_posix_io_callbacks *io_callbacks)
42{
43 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
44 struct nvgpu_posix_io_callbacks *old_io = p->callbacks;
45
46 p->callbacks = io_callbacks;
47
48 return old_io;
49}
50
51void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
52{
53 struct nvgpu_posix_io_callbacks *callbacks =
54 nvgpu_os_posix_from_gk20a(g)->callbacks;
55
56 struct nvgpu_reg_access access = {
57 .addr = r,
58 .value = v
59 };
60
61 if (callbacks == NULL || callbacks->writel == NULL) {
62 BUG();
63 }
64
65 callbacks->writel(g, &access);
66}
67
68void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v)
69{
70 BUG();
71}
72
73u32 nvgpu_readl(struct gk20a *g, u32 r)
74{
75 struct nvgpu_posix_io_callbacks *callbacks =
76 nvgpu_os_posix_from_gk20a(g)->callbacks;
77
78 struct nvgpu_reg_access access = {
79 .addr = r,
80 .value = 0L
81 };
82
83 if (callbacks == NULL || callbacks->readl == NULL) {
84 BUG();
85 }
86
87 callbacks->readl(g, &access);
88
89 return access.value;
90}
91
92void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v)
93{
94 BUG();
95}
96
97u32 __nvgpu_readl(struct gk20a *g, u32 r)
98{
99 struct nvgpu_posix_io_callbacks *callbacks =
100 nvgpu_os_posix_from_gk20a(g)->callbacks;
101
102 struct nvgpu_reg_access access = {
103 .addr = r,
104 .value = 0L
105 };
106
107 if (callbacks == NULL || callbacks->__readl == NULL) {
108 BUG();
109 }
110
111 callbacks->__readl(g, &access);
112
113 return access.value;
114}
115
116void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v)
117{
118 struct nvgpu_posix_io_callbacks *callbacks =
119 nvgpu_os_posix_from_gk20a(g)->callbacks;
120
121 struct nvgpu_reg_access access = {
122 .addr = b,
123 .value = v
124 };
125
126 if (callbacks == NULL || callbacks->bar1_writel == NULL) {
127 BUG();
128 }
129
130 callbacks->bar1_writel(g, &access);
131}
132
133u32 nvgpu_bar1_readl(struct gk20a *g, u32 b)
134{
135 struct nvgpu_posix_io_callbacks *callbacks =
136 nvgpu_os_posix_from_gk20a(g)->callbacks;
137
138 struct nvgpu_reg_access access = {
139 .addr = b,
140 .value = 0L
141 };
142
143 if (callbacks == NULL || callbacks->bar1_readl == NULL) {
144 BUG();
145 }
146
147 callbacks->bar1_readl(g, &access);
148
149 return access.value;
150}
151
152void nvgpu_usermode_writel(struct gk20a *g, u32 r, u32 v)
153{
154 struct nvgpu_posix_io_callbacks *callbacks =
155 nvgpu_os_posix_from_gk20a(g)->callbacks;
156
157 struct nvgpu_reg_access access = {
158 .addr = r,
159 .value = v
160 };
161
162 if (callbacks == NULL || callbacks->usermode_writel == NULL) {
163 BUG();
164 }
165
166 callbacks->usermode_writel(g, &access);
167}
168
169bool nvgpu_io_exists(struct gk20a *g)
170{
171 return false;
172}
173
174bool nvgpu_io_valid_reg(struct gk20a *g, u32 r)
175{
176 return false;
177}
178
179void nvgpu_posix_io_init_reg_space(struct gk20a *g)
180{
181 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
182
183 p->recording = false;
184 p->error_code = 0;
185 nvgpu_init_list_node(&p->reg_space_head);
186 nvgpu_init_list_node(&p->recorder_head);
187}
188
189int nvgpu_posix_io_get_error_code(struct gk20a *g)
190{
191 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
192
193 return p->error_code;
194}
195
196void nvgpu_posix_io_reset_error_code(struct gk20a *g)
197{
198 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
199
200 p->error_code = 0;
201}
202
203/*
204 * Add a new register space to the list of spaces, defined by a base
205 * address and a size.
206 */
207int nvgpu_posix_io_add_reg_space(struct gk20a *g, u32 base, u32 size)
208{
209 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
210 struct nvgpu_posix_io_reg_space *new_reg_space =
211 nvgpu_kzalloc(g, sizeof(struct nvgpu_posix_io_reg_space));
212
213 if (new_reg_space == NULL) {
214 return -ENOMEM;
215 }
216
217 new_reg_space->base = base;
218 new_reg_space->size = size;
219
220 new_reg_space->data = nvgpu_vzalloc(g, size);
221 if (new_reg_space->data == NULL) {
222 return -ENOMEM;
223 }
224
225 nvgpu_list_add_tail(&new_reg_space->link, &p->reg_space_head);
226 return 0;
227}
228
229void nvgpu_posix_io_delete_reg_space(struct gk20a *g, u32 base)
230{
231 struct nvgpu_posix_io_reg_space *reg_space =
232 nvgpu_posix_io_get_reg_space(g, base);
233 if (reg_space == NULL) {
234 /* Invalid space, or already de-allocated */
235 return;
236 }
237 nvgpu_list_del(&reg_space->link);
238 nvgpu_vfree(g, reg_space->data);
239 nvgpu_kfree(g, reg_space);
240}
241
242/*
243 * Lookup a register space from a given address. If no register space is found
244 * this is a bug similar to a translation fault.
245 */
246struct nvgpu_posix_io_reg_space *nvgpu_posix_io_get_reg_space(struct gk20a *g,
247 u32 addr)
248{
249 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
250 struct nvgpu_posix_io_reg_space *reg_space;
251
252 nvgpu_list_for_each_entry(reg_space, &p->reg_space_head,
253 nvgpu_posix_io_reg_space, link) {
254 u32 offset = addr - reg_space->base;
255
256 if ((addr >= reg_space->base) && (offset <= reg_space->size)) {
257 return reg_space;
258 }
259 }
260 p->error_code = -EFAULT;
261 nvgpu_err(g, "ABORT for address 0x%x", addr);
262 return NULL;
263}
264
265void nvgpu_posix_io_writel_reg_space(struct gk20a *g, u32 addr, u32 data)
266{
267 struct nvgpu_posix_io_reg_space *space =
268 nvgpu_posix_io_get_reg_space(g, addr);
269
270 if (space != NULL) {
271 u32 offset = (addr - space->base) / ((u32) sizeof(u32));
272
273 *(space->data + offset) = data;
274 }
275}
276
277u32 nvgpu_posix_io_readl_reg_space(struct gk20a *g, u32 addr)
278{
279 struct nvgpu_posix_io_reg_space *space =
280 nvgpu_posix_io_get_reg_space(g, addr);
281
282 if (space != NULL) {
283 u32 offset = (addr - space->base) / ((u32) sizeof(u32));
284
285 return *(space->data + offset);
286 } else {
287 return 0;
288 }
289}
290
291/*
292 * Start recording register writes. If this function is called again,
293 * it will free all previously recorded events.
294 */
295void nvgpu_posix_io_start_recorder(struct gk20a *g)
296{
297 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
298 struct nvgpu_posix_io_reg_access *ptr;
299
300 /* If list already has events, delete them all */
301 if (p->recording == true) {
302 while (!nvgpu_list_empty(&p->recorder_head)) {
303 ptr = nvgpu_list_first_entry(&p->recorder_head,
304 nvgpu_posix_io_reg_access, link);
305 nvgpu_list_del(&ptr->link);
306 nvgpu_kfree(g, ptr);
307 }
308 }
309 p->recording = true;
310}
311
312void nvgpu_posix_io_record_access(struct gk20a *g,
313 struct nvgpu_reg_access *access)
314{
315 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
316
317 if (p->recording == true) {
318 struct nvgpu_posix_io_reg_access *new_event = nvgpu_kzalloc(g,
319 sizeof(struct nvgpu_posix_io_reg_access));
320 (void) memcpy(&(new_event->access), access,
321 sizeof(struct nvgpu_reg_access));
322 nvgpu_list_add_tail(&new_event->link, &p->recorder_head);
323 }
324}
325
326/*
327 * Take an array of accesses and compare to the recorded sequence. Returns true
328 * if the array matches the recorded sequence.
329 * If strict mode is false, this function allows extra accesses to be present
330 * in the recording.
331 */
332bool nvgpu_posix_io_check_sequence(struct gk20a *g,
333 struct nvgpu_reg_access *sequence, u32 size, bool strict)
334{
335 struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
336 struct nvgpu_posix_io_reg_access *ptr;
337 u32 i = 0;
338
339 if (p->recording == false) {
340 return false;
341 }
342
343 nvgpu_list_for_each_entry(ptr, &p->recorder_head,
344 nvgpu_posix_io_reg_access, link) {
345 if ((sequence[i].addr == ptr->access.addr) &&
346 (sequence[i].value == ptr->access.value)) {
347 i++;
348 } else {
349 if (strict == true) {
350 return false;
351 }
352 }
353 }
354
355 if (i != size) {
356 /* Either missing or too many accesses */
357 return false;
358 }
359
360 if (&ptr->link == &p->recorder_head) {
361 /* Identical match */
362 return true;
363 }
364
365 /* Not an identical match */
366 if (strict) {
367 return false;
368 } else {
369 return true;
370 }
371}
diff --git a/include/os/posix/kmem.c b/include/os/posix/kmem.c
deleted file mode 100644
index 5fe0aeb..0000000
--- a/include/os/posix/kmem.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <stdlib.h>
24
25#include <nvgpu/bug.h>
26#include <nvgpu/kmem.h>
27#include <nvgpu/types.h>
28
29#include <nvgpu/posix/kmem.h>
30
31struct nvgpu_kmem_cache {
32 size_t alloc_size;
33};
34
35/*
36 * kmem cache emulation: basically just do a regular malloc(). This is slower
37 * but should not affect a user of kmem cache in the slightest bit.
38 */
39struct nvgpu_kmem_cache *nvgpu_kmem_cache_create(struct gk20a *g, size_t size)
40{
41 struct nvgpu_kmem_cache *cache =
42 malloc(sizeof(struct nvgpu_kmem_cache));
43
44 if (cache != NULL)
45 return NULL;
46
47 cache->alloc_size = size;
48
49 return cache;
50}
51
52void nvgpu_kmem_cache_destroy(struct nvgpu_kmem_cache *cache)
53{
54 free(cache);
55}
56
57void *nvgpu_kmem_cache_alloc(struct nvgpu_kmem_cache *cache)
58{
59 return malloc(cache->alloc_size);
60}
61
62void nvgpu_kmem_cache_free(struct nvgpu_kmem_cache *cache, void *ptr)
63{
64 free(ptr);
65}
66
67void *__nvgpu_kmalloc(struct gk20a *g, size_t size, void *ip)
68{
69 return malloc(size);
70}
71
72void *__nvgpu_kzalloc(struct gk20a *g, size_t size, void *ip)
73{
74 return calloc(1, size);
75}
76
77void *__nvgpu_kcalloc(struct gk20a *g, size_t n, size_t size, void *ip)
78{
79 /*
80 * calloc() implicitly zeros mem. So calloc a single member size bytes
81 * long.
82 */
83 return calloc(n, size);
84}
85
86void __nvgpu_kfree(struct gk20a *g, void *addr)
87{
88 free(addr);
89}
90
91/*
92 * The concept of vmalloc() does not exist in userspace.
93 */
94void *__nvgpu_vmalloc(struct gk20a *g, unsigned long size, void *ip)
95{
96 return __nvgpu_kmalloc(g, size, ip);
97}
98
99void *__nvgpu_vzalloc(struct gk20a *g, unsigned long size, void *ip)
100{
101 return __nvgpu_kzalloc(g, size, ip);
102}
103
104void __nvgpu_vfree(struct gk20a *g, void *addr)
105{
106 __nvgpu_kfree(g, addr);
107}
108
109void *__nvgpu_big_alloc(struct gk20a *g, size_t size, bool clear)
110{
111 /*
112 * Since in userspace vmalloc() == kmalloc() == malloc() we can just
113 * reuse k[zm]alloc() for this.
114 */
115 return clear ?
116 __nvgpu_kzalloc(g, size, _NVGPU_GET_IP_) :
117 __nvgpu_kmalloc(g, size, _NVGPU_GET_IP_);
118}
119
120void nvgpu_big_free(struct gk20a *g, void *p)
121{
122 __nvgpu_kfree(g, p);
123}
124
125int nvgpu_kmem_init(struct gk20a *g)
126{
127 /* Nothing to init at the moment. */
128 return 0;
129}
130
131void nvgpu_kmem_fini(struct gk20a *g, int flags)
132{
133
134}
diff --git a/include/os/posix/lock.c b/include/os/posix/lock.c
deleted file mode 100644
index bca0f04..0000000
--- a/include/os/posix/lock.c
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/lock.h>
24#include <nvgpu/posix/lock.h>
25
26int nvgpu_mutex_init(struct nvgpu_mutex *mutex)
27{
28 return pthread_mutex_init(&mutex->lock.mutex, NULL);
29}
30
31void nvgpu_mutex_acquire(struct nvgpu_mutex *mutex)
32{
33 __nvgpu_posix_lock_acquire(&mutex->lock);
34}
35
36void nvgpu_mutex_release(struct nvgpu_mutex *mutex)
37{
38 __nvgpu_posix_lock_release(&mutex->lock);
39}
40
41int nvgpu_mutex_tryacquire(struct nvgpu_mutex *mutex)
42{
43 return __nvgpu_posix_lock_try_acquire(&mutex->lock);
44}
45
46void nvgpu_mutex_destroy(struct nvgpu_mutex *mutex)
47{
48 pthread_mutex_destroy(&mutex->lock.mutex);
49}
50
51void nvgpu_spinlock_init(struct nvgpu_spinlock *spinlock)
52{
53 pthread_mutex_init(&spinlock->lock.mutex, NULL);
54}
55
56void nvgpu_spinlock_acquire(struct nvgpu_spinlock *spinlock)
57{
58 __nvgpu_posix_lock_acquire(&spinlock->lock);
59}
60
61void nvgpu_spinlock_release(struct nvgpu_spinlock *spinlock)
62{
63 __nvgpu_posix_lock_release(&spinlock->lock);
64}
65
66void nvgpu_raw_spinlock_init(struct nvgpu_raw_spinlock *spinlock)
67{
68 pthread_mutex_init(&spinlock->lock.mutex, NULL);
69}
70
71void nvgpu_raw_spinlock_acquire(struct nvgpu_raw_spinlock *spinlock)
72{
73 __nvgpu_posix_lock_acquire(&spinlock->lock);
74}
75
76void nvgpu_raw_spinlock_release(struct nvgpu_raw_spinlock *spinlock)
77{
78 __nvgpu_posix_lock_release(&spinlock->lock);
79}
diff --git a/include/os/posix/log.c b/include/os/posix/log.c
deleted file mode 100644
index 35d2626..0000000
--- a/include/os/posix/log.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/log.h>
24#include <nvgpu/types.h>
25
26#include <nvgpu/gk20a.h>
27
28/*
29 * Define a length for log buffers. This is the buffer that the 'fmt, ...' part
30 * of __nvgpu_do_log_print() prints into.
31 */
32#define LOG_BUFFER_LENGTH 160
33
34/*
35 * Keep this roughly the same as the kernel log format.
36 */
37#define LOG_FMT "nvgpu: %s %33s:%-4d [%-4s] %s\n"
38
39u64 nvgpu_dbg_mask = NVGPU_DEFAULT_DBG_MASK;
40
41static const char *log_types[] = {
42 "ERR",
43 "WRN",
44 "DBG",
45 "INFO",
46};
47
48static inline const char *nvgpu_log_name(struct gk20a *g)
49{
50 return "gpu.USS";
51}
52
53static void __nvgpu_really_print_log(const char *gpu_name,
54 const char *func_name, int line,
55 enum nvgpu_log_type type, const char *log)
56{
57 const char *name = gpu_name ? gpu_name : "";
58 const char *log_type = log_types[type];
59
60 printf(LOG_FMT, name, func_name, line, log_type, log);
61}
62
63__attribute__((format (printf, 5, 6)))
64void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line,
65 enum nvgpu_log_type type, const char *fmt, ...)
66{
67 char log[LOG_BUFFER_LENGTH];
68 va_list args;
69
70 va_start(args, fmt);
71 vsnprintf(log, LOG_BUFFER_LENGTH, fmt, args);
72 va_end(args);
73
74 __nvgpu_really_print_log(nvgpu_log_name(g),
75 func_name, line, type, log);
76}
77
78__attribute__((format (printf, 5, 6)))
79void __nvgpu_log_dbg(struct gk20a *g, u64 log_mask,
80 const char *func_name, int line,
81 const char *fmt, ...)
82{
83 char log[LOG_BUFFER_LENGTH];
84 va_list args;
85
86 if ((log_mask & g->log_mask) == 0)
87 return;
88
89 va_start(args, fmt);
90 vsnprintf(log, LOG_BUFFER_LENGTH, fmt, args);
91 va_end(args);
92
93 __nvgpu_really_print_log(nvgpu_log_name(g),
94 func_name, line, NVGPU_DEBUG, log);
95}
diff --git a/include/os/posix/nvgpu.c b/include/os/posix/nvgpu.c
deleted file mode 100644
index 5b68113..0000000
--- a/include/os/posix/nvgpu.c
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <unistd.h>
24#include <stdlib.h>
25#include <pthread.h>
26
27#include <nvgpu/gk20a.h>
28#include <nvgpu/bug.h>
29#include <nvgpu/types.h>
30#include <nvgpu/atomic.h>
31#include <nvgpu/nvgpu_common.h>
32#include <nvgpu/os_sched.h>
33#include <nvgpu/gk20a.h>
34
35#include <nvgpu/posix/probe.h>
36
37#include "os_posix.h"
38
39int nvgpu_wait_for_stall_interrupts(struct gk20a *g, u32 timeout)
40{
41 /*
42 * No interrupts in userspace so nothing to wait for.
43 */
44 return 0;
45}
46
47int nvgpu_wait_for_nonstall_interrupts(struct gk20a *g, u32 timeout)
48{
49 /*
50 * No interrupts in userspace so nothing to wait for.
51 */
52 return 0;
53}
54
55void nvgpu_wait_for_deferred_interrupts(struct gk20a *g)
56{
57 /*
58 * No interrupts in userspace so nothing to wait for.
59 */
60}
61
62int nvgpu_current_pid(struct gk20a *g)
63{
64 /*
65 * In the kernel this gets us the PID of the calling process for IOCTLs.
66 * But since we are in userspace this doesn't quite mean the same thing.
67 * This simply returns the PID of the currently running process.
68 */
69 return (int)getpid();
70}
71
72int nvgpu_current_tid(struct gk20a *g)
73{
74 /*
75 * In POSIX thread ID is not the same as a process ID. In Linux threads
76 * and processes are represented by the same thing, but userspace can't
77 * really rely on that.
78 *
79 * We can, however, get a pthread_t for a given thread. But this
80 * pthread_t need not have any relation to the underlying system's
81 * representation of "threads".
82 */
83 return (int)pthread_self();
84}
85
86void __nvgpu_print_current(struct gk20a *g, const char *func_name, int line,
87 void *ctx, enum nvgpu_log_type type)
88{
89 __nvgpu_log_msg(g, func_name, line, type,
90 "Current process: (nvgpu userspace)");
91}
92
93/*
94 * Somewhat meaningless in userspace...
95 */
96void nvgpu_kernel_restart(void *cmd)
97{
98 BUG();
99}
100
101/*
102 * We have no runtime PM stuff in userspace so these are really just noops.
103 */
104void gk20a_busy_noresume(struct gk20a *g)
105{
106}
107
108void gk20a_idle_nosuspend(struct gk20a *g)
109{
110}
111
112bool gk20a_check_poweron(struct gk20a *g)
113{
114 return false;
115}
116
117int gk20a_busy(struct gk20a *g)
118{
119 nvgpu_atomic_inc(&g->usage_count);
120
121 return 0;
122}
123
124void gk20a_idle(struct gk20a *g)
125{
126 nvgpu_atomic_dec(&g->usage_count);
127}
128
129/*
130 * This function aims to initialize enough stuff to make unit testing worth
131 * while. There are several interfaces and APIs that rely on the struct gk20a's
132 * state in order to function: logging, for example, but there are many other
133 * things, too.
134 *
135 * Initialize as much of that as possible here. This is meant to be equivalent
136 * to the kernel space driver's probe function.
137 */
138struct gk20a *nvgpu_posix_probe(void)
139{
140 struct gk20a *g;
141 struct nvgpu_os_posix *p;
142 int err;
143
144 p = malloc(sizeof(*p));
145 if (p == NULL)
146 return NULL;
147
148 g = &p->g;
149
150 err = nvgpu_kmem_init(g);
151 if (err != 0)
152 goto fail;
153
154 return g;
155
156fail:
157 free(p);
158
159 return NULL;
160}
161
162void nvgpu_posix_cleanup(struct gk20a *g)
163{
164 nvgpu_kmem_fini(g, 0);
165}
diff --git a/include/os/posix/nvlink.c b/include/os/posix/nvlink.c
deleted file mode 100644
index c830d6e..0000000
--- a/include/os/posix/nvlink.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/nvlink.h>
24
25int nvgpu_nvlink_train(struct gk20a *g, u32 link_id, bool from_off)
26{
27 return -ENOSYS;
28}
29
30int nvgpu_nvlink_enumerate(struct gk20a *g)
31{
32 return -ENOSYS;
33}
diff --git a/include/os/posix/os_posix.h b/include/os/posix/os_posix.h
deleted file mode 100644
index d403ad5..0000000
--- a/include/os/posix/os_posix.h
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __NVGPU_OS_POSIX_H__
24#define __NVGPU_OS_POSIX_H__
25
26#include <nvgpu/gk20a.h>
27
28struct nvgpu_posix_io_callbacks;
29
30struct nvgpu_os_posix {
31 struct gk20a g;
32
33
34 /*
35 * IO callbacks for handling the nvgpu IO accessors.
36 */
37 struct nvgpu_posix_io_callbacks *callbacks;
38
39 /*
40 * Memory-mapped register space for unit tests.
41 */
42 struct nvgpu_list_node reg_space_head;
43 int error_code;
44
45
46 /*
47 * List to record sequence of register writes.
48 */
49 struct nvgpu_list_node recorder_head;
50 bool recording;
51};
52
53static inline struct nvgpu_os_posix *nvgpu_os_posix_from_gk20a(struct gk20a *g)
54{
55 return container_of(g, struct nvgpu_os_posix, g);
56}
57
58#endif
diff --git a/include/os/posix/posix-channel.c b/include/os/posix/posix-channel.c
deleted file mode 100644
index 5e10b1e..0000000
--- a/include/os/posix/posix-channel.c
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/channel.h>
24
25u32 nvgpu_get_gpfifo_entry_size(void)
26{
27 /*
28 * There is no struct nvgpu_gpfifo for us to use yet. But when it's
29 * defined in userspace this is how big it will be.
30 */
31 return 8;
32}
diff --git a/include/os/posix/posix-comptags.c b/include/os/posix/posix-comptags.c
deleted file mode 100644
index a00246d..0000000
--- a/include/os/posix/posix-comptags.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bug.h>
24#include <nvgpu/comptags.h>
25
26#include <nvgpu/posix/vm.h>
27
28void gk20a_get_comptags(struct nvgpu_os_buffer *buf,
29 struct gk20a_comptags *comptags)
30{
31}
32
33int gk20a_alloc_or_get_comptags(struct gk20a *g,
34 struct nvgpu_os_buffer *buf,
35 struct gk20a_comptag_allocator *allocator,
36 struct gk20a_comptags *comptags)
37{
38 return -ENODEV;
39}
40
41bool gk20a_comptags_start_clear(struct nvgpu_os_buffer *buf)
42{
43 return false;
44}
45
46void gk20a_comptags_finish_clear(struct nvgpu_os_buffer *buf,
47 bool clear_successful)
48{
49}
diff --git a/include/os/posix/posix-dma.c b/include/os/posix/posix-dma.c
deleted file mode 100644
index e8c5c9d..0000000
--- a/include/os/posix/posix-dma.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <stdlib.h>
24
25#include <nvgpu/mm.h>
26#include <nvgpu/vm.h>
27#include <nvgpu/bug.h>
28#include <nvgpu/dma.h>
29#include <nvgpu/gmmu.h>
30#include <nvgpu/nvgpu_mem.h>
31#include <nvgpu/enabled.h>
32
33/*
34 * In userspace vidmem vs sysmem is just a difference in what is placed in the
35 * aperture field.
36 */
37static int __nvgpu_do_dma_alloc(struct gk20a *g, unsigned long flags,
38 size_t size, struct nvgpu_mem *mem,
39 enum nvgpu_aperture ap)
40{
41 void *memory = malloc(mem->aligned_size);
42
43 if (memory == NULL)
44 return -ENOMEM;
45
46 mem->cpu_va = memory;
47 mem->aperture = ap;
48 mem->size = size;
49 mem->aligned_size = PAGE_ALIGN(size);
50 mem->gpu_va = 0ULL;
51 mem->skip_wmb = true;
52 mem->vidmem_alloc = NULL;
53 mem->allocator = NULL;
54
55 return 0;
56}
57
58bool nvgpu_iommuable(struct gk20a *g)
59{
60 return false;
61}
62
63int nvgpu_dma_alloc_flags_sys(struct gk20a *g, unsigned long flags,
64 size_t size, struct nvgpu_mem *mem)
65{
66 return __nvgpu_do_dma_alloc(g, flags, size, mem, APERTURE_SYSMEM);
67}
68
69int nvgpu_dma_alloc_flags_vid_at(struct gk20a *g, unsigned long flags,
70 size_t size, struct nvgpu_mem *mem, u64 at)
71{
72 BUG();
73
74 return 0;
75}
76
77void nvgpu_dma_free_sys(struct gk20a *g, struct nvgpu_mem *mem)
78{
79 if (!(mem->mem_flags & NVGPU_MEM_FLAG_SHADOW_COPY))
80 free(mem->cpu_va);
81
82 memset(mem, 0, sizeof(*mem));
83}
84
85void nvgpu_dma_free_vid(struct gk20a *g, struct nvgpu_mem *mem)
86{
87 BUG();
88}
diff --git a/include/os/posix/posix-nvgpu_mem.c b/include/os/posix/posix-nvgpu_mem.c
deleted file mode 100644
index 26770e4..0000000
--- a/include/os/posix/posix-nvgpu_mem.c
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bug.h>
24#include <nvgpu/dma.h>
25#include <nvgpu/gmmu.h>
26#include <nvgpu/kmem.h>
27#include <nvgpu/nvgpu_mem.h>
28
29/*
30 * These functions are somewhat meaningless.
31 */
32u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem)
33{
34 return (u64)(uintptr_t)mem->cpu_va;
35}
36
37u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem)
38{
39 return (u64)(uintptr_t)mem->cpu_va;
40}
41
42static struct nvgpu_sgl *nvgpu_mem_sgl_next(struct nvgpu_sgl *sgl)
43{
44 return NULL;
45}
46
47static u64 nvgpu_mem_sgl_phys(struct gk20a *g, struct nvgpu_sgl *sgl)
48{
49 struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
50
51 return (u64)(uintptr_t)mem->cpu_va;
52}
53
54static u64 nvgpu_mem_sgl_dma(struct nvgpu_sgl *sgl)
55{
56 struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
57
58 return (u64)(uintptr_t)mem->cpu_va;
59}
60
61static u64 nvgpu_mem_sgl_length(struct nvgpu_sgl *sgl)
62{
63 struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
64
65 return (u64)mem->aligned_size;
66}
67
68static u64 nvgpu_mem_sgl_gpu_addr(struct gk20a *g, struct nvgpu_sgl *sgl,
69 struct nvgpu_gmmu_attrs *attrs)
70{
71 struct nvgpu_mem *mem = (struct nvgpu_mem *)sgl;
72
73 return mem->gpu_va;
74}
75
76static bool nvgpu_mem_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt)
77{
78 return nvgpu_iommuable(g);
79}
80
81static void nvgpu_mem_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt)
82{
83 nvgpu_kfree(g, sgt);
84}
85
86static struct nvgpu_sgt_ops nvgpu_sgt_posix_ops = {
87 .sgl_next = nvgpu_mem_sgl_next,
88 .sgl_phys = nvgpu_mem_sgl_phys,
89 .sgl_dma = nvgpu_mem_sgl_dma,
90 .sgl_length = nvgpu_mem_sgl_length,
91 .sgl_gpu_addr = nvgpu_mem_sgl_gpu_addr,
92 .sgt_iommuable = nvgpu_mem_sgt_iommuable,
93 .sgt_free = nvgpu_mem_sgt_free,
94};
95
96struct nvgpu_sgt *nvgpu_sgt_create_from_mem(struct gk20a *g,
97 struct nvgpu_mem *mem)
98{
99 struct nvgpu_sgt *sgt = nvgpu_kzalloc(g, sizeof(*sgt));
100
101 if (sgt == NULL)
102 return NULL;
103
104 /*
105 * The userspace implementation is simple: a single 'entry' (which we
106 * only need the mem struct to describe). Maybe this could be expanded
107 * to be more interesting some day.
108 */
109 sgt->sgl = (struct nvgpu_sgl *)mem;
110 sgt->ops = &nvgpu_sgt_posix_ops;
111
112 return sgt;
113}
114
115int nvgpu_mem_create_from_mem(struct gk20a *g,
116 struct nvgpu_mem *dest, struct nvgpu_mem *src,
117 u64 start_page, int nr_pages)
118{
119 u64 start = start_page * PAGE_SIZE;
120 u64 size = nr_pages * PAGE_SIZE;
121
122 if (src->aperture != APERTURE_SYSMEM)
123 return -EINVAL;
124
125 /* Some silly things a caller might do... */
126 if (size > src->size)
127 return -EINVAL;
128 if ((start + size) > src->size)
129 return -EINVAL;
130
131 memset(dest, 0, sizeof(*dest));
132
133 dest->cpu_va = ((char *)src->cpu_va) + start;
134 dest->mem_flags = src->mem_flags | NVGPU_MEM_FLAG_SHADOW_COPY;
135 dest->aperture = src->aperture;
136 dest->skip_wmb = src->skip_wmb;
137 dest->size = size;
138
139 return 0;
140}
diff --git a/include/os/posix/posix-tsg.c b/include/os/posix/posix-tsg.c
deleted file mode 100644
index d8e3f37..0000000
--- a/include/os/posix/posix-tsg.c
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/tsg.h>
24
25void gk20a_tsg_event_id_post_event(struct tsg_gk20a *tsg,
26 int __event_id)
27{
28}
diff --git a/include/os/posix/posix-vm.c b/include/os/posix/posix-vm.c
deleted file mode 100644
index 588b956..0000000
--- a/include/os/posix/posix-vm.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <stdlib.h>
24
25#include <nvgpu/vm.h>
26#include <nvgpu/bug.h>
27
28#include <nvgpu/posix/vm.h>
29
30u64 nvgpu_os_buf_get_size(struct nvgpu_os_buffer *os_buf)
31{
32 return os_buf->size;
33}
34
35struct nvgpu_mapped_buf *nvgpu_vm_find_mapping(struct vm_gk20a *vm,
36 struct nvgpu_os_buffer *os_buf,
37 u64 map_addr,
38 u32 flags,
39 int kind)
40{
41 BUG();
42
43 /*
44 * No map caching for now.
45 */
46 return NULL;
47}
48
49void nvgpu_vm_unmap_system(struct nvgpu_mapped_buf *mapped_buffer)
50{
51 free(mapped_buffer->os_priv.buf);
52}
diff --git a/include/os/posix/posix-vpr.c b/include/os/posix/posix-vpr.c
deleted file mode 100644
index 07486b1..0000000
--- a/include/os/posix/posix-vpr.c
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#include <nvgpu/vpr.h>
15
16bool nvgpu_is_vpr_resize_enabled(void)
17{
18 return false;
19}
diff --git a/include/os/posix/rwsem.c b/include/os/posix/rwsem.c
deleted file mode 100644
index 7a696b7..0000000
--- a/include/os/posix/rwsem.c
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bug.h>
24#include <nvgpu/rwsem.h>
25#include <nvgpu/timers.h>
26
27#include <nvgpu/posix/rwsem.h>
28
29void nvgpu_rwsem_init(struct nvgpu_rwsem *rwsem)
30{
31 memset(rwsem, 0, sizeof(*rwsem));
32
33 nvgpu_spinlock_init(&rwsem->lock);
34}
35
36/*
37 * Acquire.
38 */
39void nvgpu_rwsem_down_read(struct nvgpu_rwsem *rwsem)
40{
41 while (true) {
42 nvgpu_spinlock_acquire(&rwsem->lock);
43
44 /*
45 * If there's a writer try again.
46 */
47 if (rwsem->writers < 0) {
48 nvgpu_spinlock_release(&rwsem->lock);
49 nvgpu_msleep(10);
50 continue;
51 }
52
53 /*
54 * Otherwise decrement the read counter and return.
55 */
56 rwsem->readers -= 1;
57 nvgpu_spinlock_release(&rwsem->lock);
58 return;
59 }
60}
61
62/*
63 * Release.
64 */
65void nvgpu_rwsem_up_read(struct nvgpu_rwsem *rwsem)
66{
67 nvgpu_spinlock_acquire(&rwsem->lock);
68 rwsem->readers += 1;
69
70 /*
71 * Can't be any writers if there was a reader. Also can't be
72 * a positive number of readers. The increments are always
73 * downward so if we have a positive number then there is a
74 * balancing bug.
75 */
76 BUG_ON(rwsem->writers < 0);
77 BUG_ON(rwsem->readers > 0);
78
79 nvgpu_spinlock_release(&rwsem->lock);
80}
81
82void nvgpu_rwsem_down_write(struct nvgpu_rwsem *rwsem)
83{
84 while (true) {
85 nvgpu_spinlock_acquire(&rwsem->lock);
86
87 /*
88 * If there's a reader or a writer try again. Note: in this very
89 * simple implementation it's possible for readers to
90 * indefinitely starve writers.
91 */
92 if (rwsem->writers < 0 || rwsem->readers < 0) {
93 nvgpu_spinlock_release(&rwsem->lock);
94 nvgpu_msleep(10);
95 continue;
96 }
97
98 rwsem->writers -= 1;
99 nvgpu_spinlock_release(&rwsem->lock);
100 return;
101 }
102}
103
104void nvgpu_rwsem_up_write(struct nvgpu_rwsem *rwsem)
105{
106 nvgpu_spinlock_acquire(&rwsem->lock);
107 rwsem->writers += 1;
108
109 /*
110 * Writers can't be positive: that would be an unbalanced free. Readers
111 * must be zero - otherwise this writer should never have had access!
112 */
113 BUG_ON(rwsem->writers > 0);
114 BUG_ON(rwsem->readers != 0);
115
116 nvgpu_spinlock_release(&rwsem->lock);
117}
diff --git a/include/os/posix/soc.c b/include/os/posix/soc.c
deleted file mode 100644
index 2346d61..0000000
--- a/include/os/posix/soc.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/soc.h>
24
25bool nvgpu_platform_is_silicon(struct gk20a *g)
26{
27 return false;
28}
29
30bool nvgpu_platform_is_simulation(struct gk20a *g)
31{
32 return false;
33}
34
35bool nvgpu_platform_is_fpga(struct gk20a *g)
36{
37 return false;
38}
39
40bool nvgpu_is_hypervisor_mode(struct gk20a *g)
41{
42 return false;
43}
44
45bool nvgpu_is_bpmp_running(struct gk20a *g)
46{
47 return false;
48}
49
50bool nvgpu_is_soc_t194_a01(struct gk20a *g)
51{
52 return false;
53}
diff --git a/include/os/posix/stubs.c b/include/os/posix/stubs.c
deleted file mode 100644
index 279f4da..0000000
--- a/include/os/posix/stubs.c
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23/**
24 * Here lie OS stubs that do not have an implementation yet nor has any plans
25 * for an implementation.
26 */
27
28#include <nvgpu/ecc.h>
29#include <nvgpu/ltc.h>
30
31#include "gk20a/dbg_gpu_gk20a.h"
32
33void nvgpu_dbg_session_post_event(struct dbg_session_gk20a *dbg_s)
34{
35}
36
37int nvgpu_ecc_sysfs_init(struct gk20a *g)
38{
39 return 0;
40}
41
42void nvgpu_ecc_sysfs_remove(struct gk20a *g)
43{
44}
45
46int nvgpu_ltc_alloc_cbc(struct gk20a *g, size_t compbit_backing_size,
47 bool vidmem_alloc)
48{
49 return 0;
50}
diff --git a/include/os/posix/thread.c b/include/os/posix/thread.c
deleted file mode 100644
index 6fdce13..0000000
--- a/include/os/posix/thread.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bug.h>
24#include <nvgpu/thread.h>
25
26#include <nvgpu/posix/thread.h>
27
28/**
29 * Use pthreads to mostly emulate the Linux kernel APIs. There are some things
30 * that are quite different - especially the stop/should_stop notions. In user
31 * space threads can send signals to one another but of course within the kernel
32 * that is not as simple.
33 *
34 * This could use some nice debugging some day as well.
35 */
36
37/*
38 * nvgpu thread functions return int. POSIX threads return void *. This little
39 * wrapper takes the int returning nvgpu thread and instead passes that int back
40 * through the void * pointer.
41 */
42static void *__nvgpu_posix_thread_wrapper(void *data)
43{
44 struct nvgpu_posix_thread_data *nvgpu = data;
45
46 return ERR_PTR(nvgpu->fn(nvgpu->data));
47}
48
49int nvgpu_thread_create(struct nvgpu_thread *thread,
50 void *data,
51 int (*threadfn)(void *data), const char *name)
52{
53 int ret;
54
55 BUG_ON(thread->running);
56
57 memset(thread, 0, sizeof(*thread));
58
59 /*
60 * By subtracting 1 the above memset ensures that we have a zero
61 * terminated string.
62 */
63 strncpy(thread->tname, name, NVGPU_THREAD_POSIX_MAX_NAMELEN - 1);
64
65 thread->nvgpu.data = data;
66 thread->nvgpu.fn = threadfn;
67
68 ret = pthread_create(&thread->thread, NULL,
69 __nvgpu_posix_thread_wrapper,
70 &thread->nvgpu);
71 if (ret != 0)
72 return ret;
73
74#ifdef _GNU_SOURCE
75 pthread_setname_np(thread->thread, thread->tname);
76#endif
77
78 thread->running = true;
79
80 return 0;
81}
82
83void nvgpu_thread_stop(struct nvgpu_thread *thread)
84{
85 thread->should_stop = true;
86}
87
88bool nvgpu_thread_should_stop(struct nvgpu_thread *thread)
89{
90 return thread->should_stop;
91}
92
93bool nvgpu_thread_is_running(struct nvgpu_thread *thread)
94{
95 return thread->running;
96}
97
98void nvgpu_thread_join(struct nvgpu_thread *thread)
99{
100 (void) pthread_join(thread->thread, NULL);
101}
diff --git a/include/os/posix/timers.c b/include/os/posix/timers.c
deleted file mode 100644
index c84b0de..0000000
--- a/include/os/posix/timers.c
+++ /dev/null
@@ -1,169 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <sys/time.h>
24
25#include <nvgpu/bug.h>
26#include <nvgpu/log.h>
27#include <nvgpu/timers.h>
28
29static s64 now(void)
30{
31 return nvgpu_current_time_ms();
32}
33
34/*
35 * Returns true if a > b;
36 */
37static bool time_after(s64 a, s64 b)
38{
39 return a - b > 0;
40}
41
42int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
43 u32 duration, unsigned long flags)
44{
45 if (flags & ~NVGPU_TIMER_FLAG_MASK)
46 return -EINVAL;
47
48 memset(timeout, 0, sizeof(*timeout));
49
50 timeout->g = g;
51 timeout->flags = flags;
52
53 if (flags & NVGPU_TIMER_RETRY_TIMER)
54 timeout->retries.max = duration;
55 else
56 timeout->time = nvgpu_current_time_ms() + (s64)duration;
57
58 return 0;
59}
60
61static int __nvgpu_timeout_expired_msg_cpu(struct nvgpu_timeout *timeout,
62 void *caller,
63 const char *fmt, va_list args)
64{
65 struct gk20a *g = timeout->g;
66
67 if (time_after(now(), timeout->time)) {
68 if (!(timeout->flags & NVGPU_TIMER_SILENT_TIMEOUT)) {
69 char buf[128];
70
71 vsnprintf(buf, sizeof(buf), fmt, args);
72
73 nvgpu_err(g, "Timeout detected @ %p %s", caller, buf);
74 }
75
76 return -ETIMEDOUT;
77 }
78
79 return 0;
80}
81
82static int __nvgpu_timeout_expired_msg_retry(struct nvgpu_timeout *timeout,
83 void *caller,
84 const char *fmt, va_list args)
85{
86 struct gk20a *g = timeout->g;
87
88 if (timeout->retries.attempted >= timeout->retries.max) {
89 if (!(timeout->flags & NVGPU_TIMER_SILENT_TIMEOUT)) {
90 char buf[128];
91
92 vsnprintf(buf, sizeof(buf), fmt, args);
93
94 nvgpu_err(g, "No more retries @ %p %s", caller, buf);
95 }
96
97 return -ETIMEDOUT;
98 }
99
100 timeout->retries.attempted++;
101
102 return 0;
103}
104
105int __nvgpu_timeout_expired_msg(struct nvgpu_timeout *timeout,
106 void *caller, const char *fmt, ...)
107{
108 int ret;
109 va_list args;
110
111 va_start(args, fmt);
112 if (timeout->flags & NVGPU_TIMER_RETRY_TIMER)
113 ret = __nvgpu_timeout_expired_msg_retry(timeout, caller, fmt,
114 args);
115 else
116 ret = __nvgpu_timeout_expired_msg_cpu(timeout, caller, fmt,
117 args);
118 va_end(args);
119
120 return ret;
121}
122
123int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
124{
125 if (timeout->flags & NVGPU_TIMER_RETRY_TIMER)
126 return timeout->retries.attempted >= timeout->retries.max;
127 else
128 return time_after(now(), timeout->time);
129}
130
131void nvgpu_udelay(unsigned int usecs)
132{
133 BUG();
134}
135
136void nvgpu_usleep_range(unsigned int min_us, unsigned int max_us)
137{
138 BUG();
139}
140
141void nvgpu_msleep(unsigned int msecs)
142{
143 BUG();
144}
145
146static inline s64 __nvgpu_current_time_us(void)
147{
148 struct timeval now;
149 s64 time_now;
150 int ret;
151
152 ret = gettimeofday(&now, NULL);
153 if (ret != 0)
154 BUG();
155
156 time_now = ((s64)now.tv_sec * (s64)1000000) + (s64)now.tv_usec;
157
158 return time_now;
159}
160
161s64 nvgpu_current_time_ms(void)
162{
163 return __nvgpu_current_time_us() / (s64)1000;
164}
165
166u64 nvgpu_hr_timestamp(void)
167{
168 return __nvgpu_current_time_us();
169}
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-22 10:46:23 -0500