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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/vgpu/vgpu_ivc.h
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/vgpu/vgpu_ivc.h')
-rw-r--r--include/nvgpu/vgpu/vgpu_ivc.h45
1 files changed, 0 insertions, 45 deletions
diff --git a/include/nvgpu/vgpu/vgpu_ivc.h b/include/nvgpu/vgpu/vgpu_ivc.h
deleted file mode 100644
index e7e4026..0000000
--- a/include/nvgpu/vgpu/vgpu_ivc.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __VGPU_IVC_H__
24#define __VGPU_IVC_H__
25
26#include <nvgpu/types.h>
27
28struct gk20a;
29
30int vgpu_ivc_init(struct gk20a *g, u32 elems,
31 const size_t *queue_sizes, u32 queue_start, u32 num_queues);
32void vgpu_ivc_deinit(u32 queue_start, u32 num_queues);
33void vgpu_ivc_release(void *handle);
34u32 vgpu_ivc_get_server_vmid(void);
35int vgpu_ivc_recv(u32 index, void **handle, void **data,
36 size_t *size, u32 *sender);
37int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size);
38int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle,
39 void **data, size_t *size);
40u32 vgpu_ivc_get_peer_self(void);
41void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr,
42 size_t *size);
43void vgpu_ivc_oob_put_ptr(void *handle);
44
45#endif