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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/hw/gp10b/hw_ram_gp10b.h
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/hw/gp10b/hw_ram_gp10b.h')
-rw-r--r--include/nvgpu/hw/gp10b/hw_ram_gp10b.h519
1 files changed, 0 insertions, 519 deletions
diff --git a/include/nvgpu/hw/gp10b/hw_ram_gp10b.h b/include/nvgpu/hw/gp10b/hw_ram_gp10b.h
deleted file mode 100644
index cc83f52..0000000
--- a/include/nvgpu/hw/gp10b/hw_ram_gp10b.h
+++ /dev/null
@@ -1,519 +0,0 @@
1/*
2 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_ram_gp10b_h_
57#define _hw_ram_gp10b_h_
58
59static inline u32 ram_in_ramfc_s(void)
60{
61 return 4096U;
62}
63static inline u32 ram_in_ramfc_w(void)
64{
65 return 0U;
66}
67static inline u32 ram_in_page_dir_base_target_f(u32 v)
68{
69 return (v & 0x3U) << 0U;
70}
71static inline u32 ram_in_page_dir_base_target_w(void)
72{
73 return 128U;
74}
75static inline u32 ram_in_page_dir_base_target_vid_mem_f(void)
76{
77 return 0x0U;
78}
79static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void)
80{
81 return 0x2U;
82}
83static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void)
84{
85 return 0x3U;
86}
87static inline u32 ram_in_page_dir_base_vol_w(void)
88{
89 return 128U;
90}
91static inline u32 ram_in_page_dir_base_vol_true_f(void)
92{
93 return 0x4U;
94}
95static inline u32 ram_in_page_dir_base_fault_replay_tex_f(u32 v)
96{
97 return (v & 0x1U) << 4U;
98}
99static inline u32 ram_in_page_dir_base_fault_replay_tex_m(void)
100{
101 return 0x1U << 4U;
102}
103static inline u32 ram_in_page_dir_base_fault_replay_tex_w(void)
104{
105 return 128U;
106}
107static inline u32 ram_in_page_dir_base_fault_replay_tex_true_f(void)
108{
109 return 0x10U;
110}
111static inline u32 ram_in_page_dir_base_fault_replay_gcc_f(u32 v)
112{
113 return (v & 0x1U) << 5U;
114}
115static inline u32 ram_in_page_dir_base_fault_replay_gcc_m(void)
116{
117 return 0x1U << 5U;
118}
119static inline u32 ram_in_page_dir_base_fault_replay_gcc_w(void)
120{
121 return 128U;
122}
123static inline u32 ram_in_page_dir_base_fault_replay_gcc_true_f(void)
124{
125 return 0x20U;
126}
127static inline u32 ram_in_use_ver2_pt_format_f(u32 v)
128{
129 return (v & 0x1U) << 10U;
130}
131static inline u32 ram_in_use_ver2_pt_format_m(void)
132{
133 return 0x1U << 10U;
134}
135static inline u32 ram_in_use_ver2_pt_format_w(void)
136{
137 return 128U;
138}
139static inline u32 ram_in_use_ver2_pt_format_true_f(void)
140{
141 return 0x400U;
142}
143static inline u32 ram_in_use_ver2_pt_format_false_f(void)
144{
145 return 0x0U;
146}
147static inline u32 ram_in_big_page_size_f(u32 v)
148{
149 return (v & 0x1U) << 11U;
150}
151static inline u32 ram_in_big_page_size_m(void)
152{
153 return 0x1U << 11U;
154}
155static inline u32 ram_in_big_page_size_w(void)
156{
157 return 128U;
158}
159static inline u32 ram_in_big_page_size_128kb_f(void)
160{
161 return 0x0U;
162}
163static inline u32 ram_in_big_page_size_64kb_f(void)
164{
165 return 0x800U;
166}
167static inline u32 ram_in_page_dir_base_lo_f(u32 v)
168{
169 return (v & 0xfffffU) << 12U;
170}
171static inline u32 ram_in_page_dir_base_lo_w(void)
172{
173 return 128U;
174}
175static inline u32 ram_in_page_dir_base_hi_f(u32 v)
176{
177 return (v & 0xffU) << 0U;
178}
179static inline u32 ram_in_page_dir_base_hi_w(void)
180{
181 return 129U;
182}
183static inline u32 ram_in_adr_limit_lo_f(u32 v)
184{
185 return (v & 0xfffffU) << 12U;
186}
187static inline u32 ram_in_adr_limit_lo_w(void)
188{
189 return 130U;
190}
191static inline u32 ram_in_adr_limit_hi_f(u32 v)
192{
193 return (v & 0xffffffffU) << 0U;
194}
195static inline u32 ram_in_adr_limit_hi_w(void)
196{
197 return 131U;
198}
199static inline u32 ram_in_engine_cs_w(void)
200{
201 return 132U;
202}
203static inline u32 ram_in_engine_cs_wfi_v(void)
204{
205 return 0x00000000U;
206}
207static inline u32 ram_in_engine_cs_wfi_f(void)
208{
209 return 0x0U;
210}
211static inline u32 ram_in_engine_cs_fg_v(void)
212{
213 return 0x00000001U;
214}
215static inline u32 ram_in_engine_cs_fg_f(void)
216{
217 return 0x8U;
218}
219static inline u32 ram_in_gr_cs_w(void)
220{
221 return 132U;
222}
223static inline u32 ram_in_gr_cs_wfi_f(void)
224{
225 return 0x0U;
226}
227static inline u32 ram_in_gr_wfi_target_w(void)
228{
229 return 132U;
230}
231static inline u32 ram_in_gr_wfi_mode_w(void)
232{
233 return 132U;
234}
235static inline u32 ram_in_gr_wfi_mode_physical_v(void)
236{
237 return 0x00000000U;
238}
239static inline u32 ram_in_gr_wfi_mode_physical_f(void)
240{
241 return 0x0U;
242}
243static inline u32 ram_in_gr_wfi_mode_virtual_v(void)
244{
245 return 0x00000001U;
246}
247static inline u32 ram_in_gr_wfi_mode_virtual_f(void)
248{
249 return 0x4U;
250}
251static inline u32 ram_in_gr_wfi_ptr_lo_f(u32 v)
252{
253 return (v & 0xfffffU) << 12U;
254}
255static inline u32 ram_in_gr_wfi_ptr_lo_w(void)
256{
257 return 132U;
258}
259static inline u32 ram_in_gr_wfi_ptr_hi_f(u32 v)
260{
261 return (v & 0xffU) << 0U;
262}
263static inline u32 ram_in_gr_wfi_ptr_hi_w(void)
264{
265 return 133U;
266}
267static inline u32 ram_in_base_shift_v(void)
268{
269 return 0x0000000cU;
270}
271static inline u32 ram_in_alloc_size_v(void)
272{
273 return 0x00001000U;
274}
275static inline u32 ram_fc_size_val_v(void)
276{
277 return 0x00000200U;
278}
279static inline u32 ram_fc_gp_put_w(void)
280{
281 return 0U;
282}
283static inline u32 ram_fc_userd_w(void)
284{
285 return 2U;
286}
287static inline u32 ram_fc_userd_hi_w(void)
288{
289 return 3U;
290}
291static inline u32 ram_fc_signature_w(void)
292{
293 return 4U;
294}
295static inline u32 ram_fc_gp_get_w(void)
296{
297 return 5U;
298}
299static inline u32 ram_fc_pb_get_w(void)
300{
301 return 6U;
302}
303static inline u32 ram_fc_pb_get_hi_w(void)
304{
305 return 7U;
306}
307static inline u32 ram_fc_pb_top_level_get_w(void)
308{
309 return 8U;
310}
311static inline u32 ram_fc_pb_top_level_get_hi_w(void)
312{
313 return 9U;
314}
315static inline u32 ram_fc_acquire_w(void)
316{
317 return 12U;
318}
319static inline u32 ram_fc_semaphorea_w(void)
320{
321 return 14U;
322}
323static inline u32 ram_fc_semaphoreb_w(void)
324{
325 return 15U;
326}
327static inline u32 ram_fc_semaphorec_w(void)
328{
329 return 16U;
330}
331static inline u32 ram_fc_semaphored_w(void)
332{
333 return 17U;
334}
335static inline u32 ram_fc_gp_base_w(void)
336{
337 return 18U;
338}
339static inline u32 ram_fc_gp_base_hi_w(void)
340{
341 return 19U;
342}
343static inline u32 ram_fc_gp_fetch_w(void)
344{
345 return 20U;
346}
347static inline u32 ram_fc_pb_fetch_w(void)
348{
349 return 21U;
350}
351static inline u32 ram_fc_pb_fetch_hi_w(void)
352{
353 return 22U;
354}
355static inline u32 ram_fc_pb_put_w(void)
356{
357 return 23U;
358}
359static inline u32 ram_fc_pb_put_hi_w(void)
360{
361 return 24U;
362}
363static inline u32 ram_fc_pb_header_w(void)
364{
365 return 33U;
366}
367static inline u32 ram_fc_pb_count_w(void)
368{
369 return 34U;
370}
371static inline u32 ram_fc_subdevice_w(void)
372{
373 return 37U;
374}
375static inline u32 ram_fc_formats_w(void)
376{
377 return 39U;
378}
379static inline u32 ram_fc_allowed_syncpoints_w(void)
380{
381 return 58U;
382}
383static inline u32 ram_fc_syncpointa_w(void)
384{
385 return 41U;
386}
387static inline u32 ram_fc_syncpointb_w(void)
388{
389 return 42U;
390}
391static inline u32 ram_fc_target_w(void)
392{
393 return 43U;
394}
395static inline u32 ram_fc_hce_ctrl_w(void)
396{
397 return 57U;
398}
399static inline u32 ram_fc_chid_w(void)
400{
401 return 58U;
402}
403static inline u32 ram_fc_chid_id_f(u32 v)
404{
405 return (v & 0xfffU) << 0U;
406}
407static inline u32 ram_fc_chid_id_w(void)
408{
409 return 0U;
410}
411static inline u32 ram_fc_config_w(void)
412{
413 return 61U;
414}
415static inline u32 ram_fc_runlist_timeslice_w(void)
416{
417 return 62U;
418}
419static inline u32 ram_userd_base_shift_v(void)
420{
421 return 0x00000009U;
422}
423static inline u32 ram_userd_chan_size_v(void)
424{
425 return 0x00000200U;
426}
427static inline u32 ram_userd_put_w(void)
428{
429 return 16U;
430}
431static inline u32 ram_userd_get_w(void)
432{
433 return 17U;
434}
435static inline u32 ram_userd_ref_w(void)
436{
437 return 18U;
438}
439static inline u32 ram_userd_put_hi_w(void)
440{
441 return 19U;
442}
443static inline u32 ram_userd_ref_threshold_w(void)
444{
445 return 20U;
446}
447static inline u32 ram_userd_top_level_get_w(void)
448{
449 return 22U;
450}
451static inline u32 ram_userd_top_level_get_hi_w(void)
452{
453 return 23U;
454}
455static inline u32 ram_userd_get_hi_w(void)
456{
457 return 24U;
458}
459static inline u32 ram_userd_gp_get_w(void)
460{
461 return 34U;
462}
463static inline u32 ram_userd_gp_put_w(void)
464{
465 return 35U;
466}
467static inline u32 ram_userd_gp_top_level_get_w(void)
468{
469 return 22U;
470}
471static inline u32 ram_userd_gp_top_level_get_hi_w(void)
472{
473 return 23U;
474}
475static inline u32 ram_rl_entry_size_v(void)
476{
477 return 0x00000008U;
478}
479static inline u32 ram_rl_entry_chid_f(u32 v)
480{
481 return (v & 0xfffU) << 0U;
482}
483static inline u32 ram_rl_entry_id_f(u32 v)
484{
485 return (v & 0xfffU) << 0U;
486}
487static inline u32 ram_rl_entry_type_f(u32 v)
488{
489 return (v & 0x1U) << 13U;
490}
491static inline u32 ram_rl_entry_type_chid_f(void)
492{
493 return 0x0U;
494}
495static inline u32 ram_rl_entry_type_tsg_f(void)
496{
497 return 0x2000U;
498}
499static inline u32 ram_rl_entry_timeslice_scale_f(u32 v)
500{
501 return (v & 0xfU) << 14U;
502}
503static inline u32 ram_rl_entry_timeslice_scale_3_f(void)
504{
505 return 0xc000U;
506}
507static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v)
508{
509 return (v & 0xffU) << 18U;
510}
511static inline u32 ram_rl_entry_timeslice_timeout_128_f(void)
512{
513 return 0x2000000U;
514}
515static inline u32 ram_rl_entry_tsg_length_f(u32 v)
516{
517 return (v & 0x3fU) << 26U;
518}
519#endif
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