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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/hw/gp106/hw_xp_gp106.h
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/hw/gp106/hw_xp_gp106.h')
-rw-r--r--include/nvgpu/hw/gp106/hw_xp_gp106.h143
1 files changed, 0 insertions, 143 deletions
diff --git a/include/nvgpu/hw/gp106/hw_xp_gp106.h b/include/nvgpu/hw/gp106/hw_xp_gp106.h
deleted file mode 100644
index f6c843c..0000000
--- a/include/nvgpu/hw/gp106/hw_xp_gp106.h
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_xp_gp106_h_
57#define _hw_xp_gp106_h_
58
59static inline u32 xp_dl_mgr_r(u32 i)
60{
61 return 0x0008b8c0U + i*4U;
62}
63static inline u32 xp_dl_mgr_safe_timing_f(u32 v)
64{
65 return (v & 0x1U) << 2U;
66}
67static inline u32 xp_pl_link_config_r(u32 i)
68{
69 return 0x0008c040U + i*4U;
70}
71static inline u32 xp_pl_link_config_ltssm_status_f(u32 v)
72{
73 return (v & 0x1U) << 4U;
74}
75static inline u32 xp_pl_link_config_ltssm_status_idle_v(void)
76{
77 return 0x00000000U;
78}
79static inline u32 xp_pl_link_config_ltssm_directive_f(u32 v)
80{
81 return (v & 0xfU) << 0U;
82}
83static inline u32 xp_pl_link_config_ltssm_directive_m(void)
84{
85 return 0xfU << 0U;
86}
87static inline u32 xp_pl_link_config_ltssm_directive_normal_operations_v(void)
88{
89 return 0x00000000U;
90}
91static inline u32 xp_pl_link_config_ltssm_directive_change_speed_v(void)
92{
93 return 0x00000001U;
94}
95static inline u32 xp_pl_link_config_max_link_rate_f(u32 v)
96{
97 return (v & 0x3U) << 18U;
98}
99static inline u32 xp_pl_link_config_max_link_rate_m(void)
100{
101 return 0x3U << 18U;
102}
103static inline u32 xp_pl_link_config_max_link_rate_2500_mtps_v(void)
104{
105 return 0x00000002U;
106}
107static inline u32 xp_pl_link_config_max_link_rate_5000_mtps_v(void)
108{
109 return 0x00000001U;
110}
111static inline u32 xp_pl_link_config_max_link_rate_8000_mtps_v(void)
112{
113 return 0x00000000U;
114}
115static inline u32 xp_pl_link_config_target_tx_width_f(u32 v)
116{
117 return (v & 0x7U) << 20U;
118}
119static inline u32 xp_pl_link_config_target_tx_width_m(void)
120{
121 return 0x7U << 20U;
122}
123static inline u32 xp_pl_link_config_target_tx_width_x1_v(void)
124{
125 return 0x00000007U;
126}
127static inline u32 xp_pl_link_config_target_tx_width_x2_v(void)
128{
129 return 0x00000006U;
130}
131static inline u32 xp_pl_link_config_target_tx_width_x4_v(void)
132{
133 return 0x00000005U;
134}
135static inline u32 xp_pl_link_config_target_tx_width_x8_v(void)
136{
137 return 0x00000004U;
138}
139static inline u32 xp_pl_link_config_target_tx_width_x16_v(void)
140{
141 return 0x00000000U;
142}
143#endif