diff options
author | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
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committer | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
commit | f347fde22f1297e4f022600d201780d5ead78114 (patch) | |
tree | 76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/hw/gm20b/hw_fuse_gm20b.h | |
parent | 8340d234d78a7d0f46c11a584de538148b78b7cb (diff) |
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/hw/gm20b/hw_fuse_gm20b.h')
-rw-r--r-- | include/nvgpu/hw/gm20b/hw_fuse_gm20b.h | 147 |
1 files changed, 0 insertions, 147 deletions
diff --git a/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h b/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h deleted file mode 100644 index d97eb7d..0000000 --- a/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h +++ /dev/null | |||
@@ -1,147 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | /* | ||
23 | * Function naming determines intended use: | ||
24 | * | ||
25 | * <x>_r(void) : Returns the offset for register <x>. | ||
26 | * | ||
27 | * <x>_o(void) : Returns the offset for element <x>. | ||
28 | * | ||
29 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
30 | * | ||
31 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
32 | * | ||
33 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
34 | * and masked to place it at field <y> of register <x>. This value | ||
35 | * can be |'d with others to produce a full register value for | ||
36 | * register <x>. | ||
37 | * | ||
38 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
39 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
40 | * register <x>. | ||
41 | * | ||
42 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
43 | * to place it at field <y> of register <x>. This value can be |'d | ||
44 | * with others to produce a full register value for <x>. | ||
45 | * | ||
46 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
47 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
48 | * This value is suitable for direct comparison with other unshifted | ||
49 | * values appropriate for use in field <y> of register <x>. | ||
50 | * | ||
51 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
52 | * field <y> of register <x>. This value is suitable for direct | ||
53 | * comparison with unshifted values appropriate for use in field <y> | ||
54 | * of register <x>. | ||
55 | */ | ||
56 | #ifndef _hw_fuse_gm20b_h_ | ||
57 | #define _hw_fuse_gm20b_h_ | ||
58 | |||
59 | static inline u32 fuse_status_opt_gpc_r(void) | ||
60 | { | ||
61 | return 0x00021c1cU; | ||
62 | } | ||
63 | static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) | ||
64 | { | ||
65 | return 0x00021c38U + i*4U; | ||
66 | } | ||
67 | static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) | ||
68 | { | ||
69 | return 0x00021838U + i*4U; | ||
70 | } | ||
71 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) | ||
72 | { | ||
73 | return 0x00021944U; | ||
74 | } | ||
75 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) | ||
76 | { | ||
77 | return (v & 0x3U) << 0U; | ||
78 | } | ||
79 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) | ||
80 | { | ||
81 | return 0x3U << 0U; | ||
82 | } | ||
83 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) | ||
84 | { | ||
85 | return (r >> 0U) & 0x3U; | ||
86 | } | ||
87 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) | ||
88 | { | ||
89 | return 0x00021948U; | ||
90 | } | ||
91 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) | ||
92 | { | ||
93 | return (v & 0x1U) << 0U; | ||
94 | } | ||
95 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) | ||
96 | { | ||
97 | return 0x1U << 0U; | ||
98 | } | ||
99 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) | ||
100 | { | ||
101 | return (r >> 0U) & 0x1U; | ||
102 | } | ||
103 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) | ||
104 | { | ||
105 | return 0x1U; | ||
106 | } | ||
107 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) | ||
108 | { | ||
109 | return 0x0U; | ||
110 | } | ||
111 | static inline u32 fuse_status_opt_fbio_r(void) | ||
112 | { | ||
113 | return 0x00021c14U; | ||
114 | } | ||
115 | static inline u32 fuse_status_opt_fbio_data_f(u32 v) | ||
116 | { | ||
117 | return (v & 0xffffU) << 0U; | ||
118 | } | ||
119 | static inline u32 fuse_status_opt_fbio_data_m(void) | ||
120 | { | ||
121 | return 0xffffU << 0U; | ||
122 | } | ||
123 | static inline u32 fuse_status_opt_fbio_data_v(u32 r) | ||
124 | { | ||
125 | return (r >> 0U) & 0xffffU; | ||
126 | } | ||
127 | static inline u32 fuse_status_opt_rop_l2_fbp_r(u32 i) | ||
128 | { | ||
129 | return 0x00021d70U + i*4U; | ||
130 | } | ||
131 | static inline u32 fuse_status_opt_fbp_r(void) | ||
132 | { | ||
133 | return 0x00021d38U; | ||
134 | } | ||
135 | static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i) | ||
136 | { | ||
137 | return (r >> (0U + i*1U)) & 0x1U; | ||
138 | } | ||
139 | static inline u32 fuse_opt_sec_debug_en_r(void) | ||
140 | { | ||
141 | return 0x00021218U; | ||
142 | } | ||
143 | static inline u32 fuse_opt_priv_sec_en_r(void) | ||
144 | { | ||
145 | return 0x00021434U; | ||
146 | } | ||
147 | #endif | ||