diff options
author | Saman Sahebi <saman63@cs.unc.edu> | 2023-07-19 21:58:37 -0400 |
---|---|---|
committer | Joshua Bakita <bakitajoshua@gmail.com> | 2023-10-29 15:45:32 -0400 |
commit | 923fdb37c54598391b54355de0fcd6ac35e5a221 (patch) | |
tree | 431df452dd82a9f5c1d40c6de95cfdc5563b4bc9 | |
parent | d533fdd9eed3147da77fb4183571e2b060e01471 (diff) |
added offsets for lce mapping in nvdebug.h and code to read lce for each pce in nvdebug_entry.c
-rw-r--r-- | nvdebug.h | 2 | ||||
-rw-r--r-- | nvdebug_entry.c | 19 |
2 files changed, 19 insertions, 2 deletions
@@ -687,6 +687,8 @@ typedef union { | |||
687 | Also see dev_ce.ref.txt of NVIDIA's open-gpu-doc for info. | 687 | Also see dev_ce.ref.txt of NVIDIA's open-gpu-doc for info. |
688 | */ | 688 | */ |
689 | #define NV_PTOP_SCAL_NUM_CES 0x00022444 | 689 | #define NV_PTOP_SCAL_NUM_CES 0x00022444 |
690 | //defined LCE->PCE mapping offset from nvgpu (same as ce_pce2lce_config_r(i) in nvgpu) | ||
691 | #define NV_LCE_FOR_PCE(i)(0x00104040+(i)*4) | ||
690 | 692 | ||
691 | /* Physical Copy Engine (PCE) information | 693 | /* Physical Copy Engine (PCE) information |
692 | On Pascal GPUs or newer, this register complements the above information by | 694 | On Pascal GPUs or newer, this register complements the above information by |
diff --git a/nvdebug_entry.c b/nvdebug_entry.c index 0abe658..84e8a6a 100644 --- a/nvdebug_entry.c +++ b/nvdebug_entry.c | |||
@@ -203,7 +203,7 @@ int create_tpc_mask_files(int device_id, struct proc_dir_entry *dir) { | |||
203 | int __init nvdebug_init(void) { | 203 | int __init nvdebug_init(void) { |
204 | struct proc_dir_entry *dir, *preempt_entry, *disable_channel_entry, | 204 | struct proc_dir_entry *dir, *preempt_entry, *disable_channel_entry, |
205 | *enable_channel_entry, *switch_to_tsg_entry, *device_info_entry, | 205 | *enable_channel_entry, *switch_to_tsg_entry, *device_info_entry, |
206 | *num_gpcs_entry; | 206 | *num_gpcs_entry, *lce_for_pce_entry; |
207 | int rl_create_err, tpc_masks_create_err; | 207 | int rl_create_err, tpc_masks_create_err; |
208 | // Check that an NVIDIA GPU is present and initialize g_nvdebug_state | 208 | // Check that an NVIDIA GPU is present and initialize g_nvdebug_state |
209 | int res = probe_and_cache_device(); | 209 | int res = probe_and_cache_device(); |
@@ -261,8 +261,23 @@ int __init nvdebug_init(void) { | |||
261 | (void*)NV_FUSE_GPC); | 261 | (void*)NV_FUSE_GPC); |
262 | // In both nouveau and nvgpu, the PCE_MAP register is only available on Volta+ | 262 | // In both nouveau and nvgpu, the PCE_MAP register is only available on Volta+ |
263 | if (g_nvdebug_state[res].chip_id >= NV_CHIP_ID_VOLTA) { | 263 | if (g_nvdebug_state[res].chip_id >= NV_CHIP_ID_VOLTA) { |
264 | |||
265 | //create a pce mask for iteration | ||
266 | u32 ce_pce_map = nvdebug_readl(&g_nvdebug_state[device_id], NV_CE_PCE_MAP); | ||
267 | u32 num_pce = U32(hweight32(ce_pce_map)); | ||
268 | u32 disabled_pce_mask = ~ce_pce_map; | ||
269 | char file_name[20]; | ||
270 | for (int pce_id = 0; pce_id < num_pce; pce_id++){ | ||
271 | //if pce is disabled, do nothing | ||
272 | if ((1 << pce_id) & disabled_pce_mask) | ||
273 | continue; | ||
274 | snprintf(file_name, 20, "lce_for_pce%d",pce_id); | ||
275 | lce_for_pce_entry = proc_create_data( | ||
276 | file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops), | ||
277 | (void*)NV_LCE_FOR_PCE(pce_id)); | ||
278 | } | ||
279 | |||
264 | // TODO: Redo to num_pces | 280 | // TODO: Redo to num_pces |
265 | // Create file `/proc/gpu#/pce_map`, world readable | ||
266 | num_gpcs_entry = proc_create_data( | 281 | num_gpcs_entry = proc_create_data( |
267 | "pce_map", 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops), | 282 | "pce_map", 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops), |
268 | (void*)NV_CE_PCE_MAP); | 283 | (void*)NV_CE_PCE_MAP); |