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authorleochanj105 <leochanj@live.unc.edu>2020-10-20 03:07:47 -0400
committerleochanj105 <leochanj@live.unc.edu>2020-10-20 03:14:04 -0400
commit79f30887129145e15e5172e36a7d7602859fc932 (patch)
tree8f7e011db3477ccf8e1c1488ff2574d186b6708d /SD-VBS/preload-times/mser
parent611d48aba30d12419d8a8a0d29aefde4d5b1f9fc (diff)
ignore rules changed
ignore rules change ignore rules changed
Diffstat (limited to 'SD-VBS/preload-times/mser')
-rw-r--r--SD-VBS/preload-times/mser/T_cif.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_fullhd.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_qcif.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_sim.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_sim_fast.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_sqcif.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_test.txt9
-rw-r--r--SD-VBS/preload-times/mser/T_vga.txt9
8 files changed, 72 insertions, 0 deletions
diff --git a/SD-VBS/preload-times/mser/T_cif.txt b/SD-VBS/preload-times/mser/T_cif.txt
new file mode 100644
index 0000000..56f14c8
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_cif.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 17564120
2
3Input size - (264x352)
4Cycles elapsed - 43634710
5
6
7real 0m0.023s
8user 0m0.023s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_fullhd.txt b/SD-VBS/preload-times/mser/T_fullhd.txt
new file mode 100644
index 0000000..45db824
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_fullhd.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 226852710
2
3Input size - (1920x1080)
4Cycles elapsed - 11064831740
5
6
7real 0m0.431s
8user 0m0.403s
9sys 0m0.028s
diff --git a/SD-VBS/preload-times/mser/T_qcif.txt b/SD-VBS/preload-times/mser/T_qcif.txt
new file mode 100644
index 0000000..2571249
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_qcif.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 4424280
2
3Input size - (132x176)
4Cycles elapsed - 18051495
5
6
7real 0m0.008s
8user 0m0.008s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_sim.txt b/SD-VBS/preload-times/mser/T_sim.txt
new file mode 100644
index 0000000..dfdbf56
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_sim.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 1140055
2
3Input size - (66x88)
4Cycles elapsed - 4858315
5
6
7real 0m0.003s
8user 0m0.003s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_sim_fast.txt b/SD-VBS/preload-times/mser/T_sim_fast.txt
new file mode 100644
index 0000000..16a45e7
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_sim_fast.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 373275
2
3Input size - (36x48)
4Cycles elapsed - 1712655
5
6
7real 0m0.001s
8user 0m0.001s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_sqcif.txt b/SD-VBS/preload-times/mser/T_sqcif.txt
new file mode 100644
index 0000000..f5d7315
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_sqcif.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 1416520
2
3Input size - (66x88)
4Cycles elapsed - 5828060
5
6
7real 0m0.003s
8user 0m0.003s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_test.txt b/SD-VBS/preload-times/mser/T_test.txt
new file mode 100644
index 0000000..8df6d92
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_test.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 88690
2
3Input size - (12x16)
4Cycles elapsed - 217490
5
6
7real 0m0.001s
8user 0m0.001s
9sys 0m0.000s
diff --git a/SD-VBS/preload-times/mser/T_vga.txt b/SD-VBS/preload-times/mser/T_vga.txt
new file mode 100644
index 0000000..22c28d0
--- /dev/null
+++ b/SD-VBS/preload-times/mser/T_vga.txt
@@ -0,0 +1,9 @@
1Cycles elapsed - 54885530
2
3Input size - (480x640)
4Cycles elapsed - 101965395
5
6
7real 0m0.054s
8user 0m0.054s
9sys 0m0.000s