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path: root/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
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Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_rf_rf2959.c')
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_rf2959.c279
1 files changed, 279 insertions, 0 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
new file mode 100644
index 0000000000..58247271cc
--- /dev/null
+++ b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
@@ -0,0 +1,279 @@
1/* zd_rf_rfmd.c: Functions for the RFMD RF controller
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17
18#include <linux/kernel.h>
19
20#include "zd_rf.h"
21#include "zd_usb.h"
22#include "zd_chip.h"
23
24static u32 rf2959_table[][2] = {
25 RF_CHANNEL( 1) = { 0x181979, 0x1e6666 },
26 RF_CHANNEL( 2) = { 0x181989, 0x1e6666 },
27 RF_CHANNEL( 3) = { 0x181999, 0x1e6666 },
28 RF_CHANNEL( 4) = { 0x1819a9, 0x1e6666 },
29 RF_CHANNEL( 5) = { 0x1819b9, 0x1e6666 },
30 RF_CHANNEL( 6) = { 0x1819c9, 0x1e6666 },
31 RF_CHANNEL( 7) = { 0x1819d9, 0x1e6666 },
32 RF_CHANNEL( 8) = { 0x1819e9, 0x1e6666 },
33 RF_CHANNEL( 9) = { 0x1819f9, 0x1e6666 },
34 RF_CHANNEL(10) = { 0x181a09, 0x1e6666 },
35 RF_CHANNEL(11) = { 0x181a19, 0x1e6666 },
36 RF_CHANNEL(12) = { 0x181a29, 0x1e6666 },
37 RF_CHANNEL(13) = { 0x181a39, 0x1e6666 },
38 RF_CHANNEL(14) = { 0x181a60, 0x1c0000 },
39};
40
41#if 0
42static int bits(u32 rw, int from, int to)
43{
44 rw &= ~(0xffffffffU << (to+1));
45 rw >>= from;
46 return rw;
47}
48
49static int bit(u32 rw, int bit)
50{
51 return bits(rw, bit, bit);
52}
53
54static void dump_regwrite(u32 rw)
55{
56 int reg = bits(rw, 18, 22);
57 int rw_flag = bits(rw, 23, 23);
58 PDEBUG("rf2959 %#010x reg %d rw %d", rw, reg, rw_flag);
59
60 switch (reg) {
61 case 0:
62 PDEBUG("reg0 CFG1 ref_sel %d hybernate %d rf_vco_reg_en %d"
63 " if_vco_reg_en %d if_vga_en %d",
64 bits(rw, 14, 15), bit(rw, 3), bit(rw, 2), bit(rw, 1),
65 bit(rw, 0));
66 break;
67 case 1:
68 PDEBUG("reg1 IFPLL1 pll_en1 %d kv_en1 %d vtc_en1 %d lpf1 %d"
69 " cpl1 %d pdp1 %d autocal_en1 %d ld_en1 %d ifloopr %d"
70 " ifloopc %d dac1 %d",
71 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
72 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
73 bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0, 3));
74 break;
75 case 2:
76 PDEBUG("reg2 IFPLL2 n1 %d num1 %d",
77 bits(rw, 6, 17), bits(rw, 0, 5));
78 break;
79 case 3:
80 PDEBUG("reg3 IFPLL3 num %d", bits(rw, 0, 17));
81 break;
82 case 4:
83 PDEBUG("reg4 IFPLL4 dn1 %#04x ct_def1 %d kv_def1 %d",
84 bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
85 break;
86 case 5:
87 PDEBUG("reg5 RFPLL1 pll_en %d kv_en %d vtc_en %d lpf %d cpl %d"
88 " pdp %d autocal_en %d ld_en %d rfloopr %d rfloopc %d"
89 " dac %d",
90 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
91 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
92 bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0,3));
93 break;
94 case 6:
95 PDEBUG("reg6 RFPLL2 n %d num %d",
96 bits(rw, 6, 17), bits(rw, 0, 5));
97 break;
98 case 7:
99 PDEBUG("reg7 RFPLL3 num2 %d", bits(rw, 0, 17));
100 break;
101 case 8:
102 PDEBUG("reg8 RFPLL4 dn %#06x ct_def %d kv_def %d",
103 bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
104 break;
105 case 9:
106 PDEBUG("reg9 CAL1 tvco %d tlock %d m_ct_value %d ld_window %d",
107 bits(rw, 13, 17), bits(rw, 8, 12), bits(rw, 3, 7),
108 bits(rw, 0, 2));
109 break;
110 case 10:
111 PDEBUG("reg10 TXRX1 rxdcfbbyps %d pcontrol %d txvgc %d"
112 " rxlpfbw %d txlpfbw %d txdiffmode %d txenmode %d"
113 " intbiasen %d tybypass %d",
114 bit(rw, 17), bits(rw, 15, 16), bits(rw, 10, 14),
115 bits(rw, 7, 9), bits(rw, 4, 6), bit(rw, 3), bit(rw, 2),
116 bit(rw, 1), bit(rw, 0));
117 break;
118 case 11:
119 PDEBUG("reg11 PCNT1 mid_bias %d p_desired %d pc_offset %d"
120 " tx_delay %d",
121 bits(rw, 15, 17), bits(rw, 9, 14), bits(rw, 3, 8),
122 bits(rw, 0, 2));
123 break;
124 case 12:
125 PDEBUG("reg12 PCNT2 max_power %d mid_power %d min_power %d",
126 bits(rw, 12, 17), bits(rw, 6, 11), bits(rw, 0, 5));
127 break;
128 case 13:
129 PDEBUG("reg13 VCOT1 rfpll vco comp %d ifpll vco comp %d"
130 " lobias %d if_biasbuf %d if_biasvco %d rf_biasbuf %d"
131 " rf_biasvco %d",
132 bit(rw, 17), bit(rw, 16), bit(rw, 15),
133 bits(rw, 8, 9), bits(rw, 5, 7), bits(rw, 3, 4),
134 bits(rw, 0, 2));
135 break;
136 case 14:
137 PDEBUG("reg14 IQCAL rx_acal %d rx_pcal %d"
138 " tx_acal %d tx_pcal %d",
139 bits(rw, 13, 17), bits(rw, 9, 12), bits(rw, 4, 8),
140 bits(rw, 0, 3));
141 break;
142 }
143}
144#endif /* 0 */
145
146static int rf2959_init_hw(struct zd_rf *rf)
147{
148 int r;
149 struct zd_chip *chip = zd_rf_to_chip(rf);
150
151 static const struct zd_ioreq16 ioreqs[] = {
152 { CR2, 0x1E }, { CR9, 0x20 }, { CR10, 0x89 },
153 { CR11, 0x00 }, { CR15, 0xD0 }, { CR17, 0x68 },
154 { CR19, 0x4a }, { CR20, 0x0c }, { CR21, 0x0E },
155 { CR23, 0x48 },
156 /* normal size for cca threshold */
157 { CR24, 0x14 },
158 /* { CR24, 0x20 }, */
159 { CR26, 0x90 }, { CR27, 0x30 }, { CR29, 0x20 },
160 { CR31, 0xb2 }, { CR32, 0x43 }, { CR33, 0x28 },
161 { CR38, 0x30 }, { CR34, 0x0f }, { CR35, 0xF0 },
162 { CR41, 0x2a }, { CR46, 0x7F }, { CR47, 0x1E },
163 { CR51, 0xc5 }, { CR52, 0xc5 }, { CR53, 0xc5 },
164 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
165 { CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 },
166 { CR85, 0x00 }, { CR86, 0x10 }, { CR87, 0x2A },
167 { CR88, 0x10 }, { CR89, 0x24 }, { CR90, 0x18 },
168 /* { CR91, 0x18 }, */
169 /* should solve continous CTS frame problems */
170 { CR91, 0x00 },
171 { CR92, 0x0a }, { CR93, 0x00 }, { CR94, 0x01 },
172 { CR95, 0x00 }, { CR96, 0x40 }, { CR97, 0x37 },
173 { CR98, 0x05 }, { CR99, 0x28 }, { CR100, 0x00 },
174 { CR101, 0x13 }, { CR102, 0x27 }, { CR103, 0x27 },
175 { CR104, 0x18 }, { CR105, 0x12 },
176 /* normal size */
177 { CR106, 0x1a },
178 /* { CR106, 0x22 }, */
179 { CR107, 0x24 }, { CR108, 0x0a }, { CR109, 0x13 },
180 { CR110, 0x2F }, { CR111, 0x27 }, { CR112, 0x27 },
181 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x40 },
182 { CR116, 0x40 }, { CR117, 0xF0 }, { CR118, 0xF0 },
183 { CR119, 0x16 },
184 /* no TX continuation */
185 { CR122, 0x00 },
186 /* { CR122, 0xff }, */
187 { CR127, 0x03 }, { CR131, 0x08 }, { CR138, 0x28 },
188 { CR148, 0x44 }, { CR150, 0x10 }, { CR169, 0xBB },
189 { CR170, 0xBB },
190 };
191
192 static const u32 rv[] = {
193 0x000007, /* REG0(CFG1) */
194 0x07dd43, /* REG1(IFPLL1) */
195 0x080959, /* REG2(IFPLL2) */
196 0x0e6666,
197 0x116a57, /* REG4 */
198 0x17dd43, /* REG5 */
199 0x1819f9, /* REG6 */
200 0x1e6666,
201 0x214554,
202 0x25e7fa,
203 0x27fffa,
204 /* The Zydas driver somehow forgets to set this value. It's
205 * only set for Japan. We are using internal power control
206 * for now.
207 */
208 0x294128, /* internal power */
209 /* 0x28252c, */ /* External control TX power */
210 /* CR31_CCK, CR51_6-36M, CR52_48M, CR53_54M */
211 0x2c0000,
212 0x300000,
213 0x340000, /* REG13(0xD) */
214 0x381e0f, /* REG14(0xE) */
215 /* Bogus, RF2959's data sheet doesn't know register 27, which is
216 * actually referenced here. The commented 0x11 is 17.
217 */
218 0x6c180f, /* REG27(0x11) */
219 };
220
221 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
222 if (r)
223 return r;
224
225 return zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
226}
227
228static int rf2959_set_channel(struct zd_rf *rf, u8 channel)
229{
230 int i, r;
231 u32 *rv = rf2959_table[channel-1];
232 struct zd_chip *chip = zd_rf_to_chip(rf);
233
234 for (i = 0; i < 2; i++) {
235 r = zd_rfwrite_locked(chip, rv[i], RF_RV_BITS);
236 if (r)
237 return r;
238 }
239 return 0;
240}
241
242static int rf2959_switch_radio_on(struct zd_rf *rf)
243{
244 static const struct zd_ioreq16 ioreqs[] = {
245 { CR10, 0x89 },
246 { CR11, 0x00 },
247 };
248 struct zd_chip *chip = zd_rf_to_chip(rf);
249
250 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
251}
252
253static int rf2959_switch_radio_off(struct zd_rf *rf)
254{
255 static const struct zd_ioreq16 ioreqs[] = {
256 { CR10, 0x15 },
257 { CR11, 0x81 },
258 };
259 struct zd_chip *chip = zd_rf_to_chip(rf);
260
261 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
262}
263
264int zd_rf_init_rf2959(struct zd_rf *rf)
265{
266 struct zd_chip *chip = zd_rf_to_chip(rf);
267
268 if (chip->is_zd1211b) {
269 dev_err(zd_chip_dev(chip),
270 "RF2959 is currently not supported for ZD1211B"
271 " devices\n");
272 return -ENODEV;
273 }
274 rf->init_hw = rf2959_init_hw;
275 rf->set_channel = rf2959_set_channel;
276 rf->switch_radio_on = rf2959_switch_radio_on;
277 rf->switch_radio_off = rf2959_switch_radio_off;
278 return 0;
279}
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 05:00:42 -0400