diff options
| -rw-r--r-- | include/asm-sparc64/tsb.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h index 1addd91d72..f384565212 100644 --- a/include/asm-sparc64/tsb.h +++ b/include/asm-sparc64/tsb.h | |||
| @@ -37,14 +37,6 @@ | |||
| 37 | * choose to use bit 47 in the tag. Also, since we never map anything | 37 | * choose to use bit 47 in the tag. Also, since we never map anything |
| 38 | * at page zero in context zero, we use zero as an invalid tag entry. | 38 | * at page zero in context zero, we use zero as an invalid tag entry. |
| 39 | * When the lock bit is set, this forces a tag comparison failure. | 39 | * When the lock bit is set, this forces a tag comparison failure. |
| 40 | * | ||
| 41 | * Currently, we allocate an 8K TSB per-process and we use it for both | ||
| 42 | * I-TLB and D-TLB misses. Perhaps at some point we'll add code that | ||
| 43 | * monitors the number of active pages in the process as we get | ||
| 44 | * major/minor faults, and grow the TSB in response. The only trick | ||
| 45 | * in implementing that is synchronizing the freeing of the old TSB | ||
| 46 | * wrt. parallel TSB updates occuring on other processors. On | ||
| 47 | * possible solution is to use RCU for the freeing of the TSB. | ||
| 48 | */ | 40 | */ |
| 49 | 41 | ||
| 50 | #define TSB_TAG_LOCK_BIT 47 | 42 | #define TSB_TAG_LOCK_BIT 47 |