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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-29 14:28:30 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-29 14:28:30 -0500
commit76babde121d2ffef04ca692ce64ef9f8a9866086 (patch)
tree294923bbb4974258d86d223e35eee691abacdfb1 /include
parente71ac6032edf77a1e4a81f3e3b260807e94b37a5 (diff)
parent15e812ad849e142e3dfc984d33c4d8042389f148 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (67 commits) [PATCH] powerpc: Remove oprofile spinlock backtrace code [PATCH] powerpc: Add oprofile calltrace support to all powerpc cpus [PATCH] powerpc: Add oprofile calltrace support [PATCH] for_each_possible_cpu: ppc [PATCH] for_each_possible_cpu: powerpc [PATCH] lock PTE before updating it in 440/BookE page fault handler [PATCH] powerpc: Kill _machine and hard-coded platform numbers ppc: Fix compile error in arch/ppc/lib/strcase.c [PATCH] git-powerpc: WARN was a dumb idea [PATCH] powerpc: a couple of trivial compile warning fixes powerpc: remove OCP references powerpc: Make uImage default build output for MPC8540 ADS powerpc: move math-emu over to arch/powerpc powerpc: use memparse() for mem= command line parsing ppc: fix strncasecmp prototype [PATCH] powerpc: make ISA floppies work again [PATCH] powerpc: Fix some initcall return values [PATCH] powerpc: Workaround for pSeries RTAS bug [PATCH] spufs: fix __init/__exit annotations [PATCH] powerpc: add hvc backend for rtas ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/bug.h36
-rw-r--r--include/asm-powerpc/cputable.h299
-rw-r--r--include/asm-powerpc/firmware.h10
-rw-r--r--include/asm-powerpc/floppy.h5
-rw-r--r--include/asm-powerpc/hvcall.h1
-rw-r--r--include/asm-powerpc/hvconsole.h26
-rw-r--r--include/asm-powerpc/machdep.h43
-rw-r--r--include/asm-powerpc/oprofile_impl.h17
-rw-r--r--include/asm-powerpc/paca.h2
-rw-r--r--include/asm-powerpc/percpu.h2
-rw-r--r--include/asm-powerpc/pmac_feature.h2
-rw-r--r--include/asm-powerpc/processor.h43
-rw-r--r--include/asm-powerpc/prom.h14
-rw-r--r--include/asm-powerpc/reg.h4
-rw-r--r--include/asm-powerpc/smp.h2
-rw-r--r--include/asm-powerpc/spu.h11
-rw-r--r--include/asm-powerpc/syscalls.h58
-rw-r--r--include/asm-powerpc/unistd.h35
-rw-r--r--include/asm-powerpc/vdso_datapage.h3
-rw-r--r--include/asm-ppc/machdep.h17
-rw-r--r--include/asm-ppc/mpc52xx.h4
-rw-r--r--include/asm-ppc/pgtable.h3
-rw-r--r--include/asm-ppc/prom.h156
-rw-r--r--include/asm-ppc/serial.h7
-rw-r--r--include/linux/pci_ids.h1
25 files changed, 363 insertions, 438 deletions
diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h
index 99817a802c..f44b529e32 100644
--- a/include/asm-powerpc/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -30,34 +30,60 @@ struct bug_entry *find_bug(unsigned long bugaddr);
30 30
31#ifdef CONFIG_BUG 31#ifdef CONFIG_BUG
32 32
33/*
34 * BUG_ON() and WARN_ON() do their best to cooperate with compile-time
35 * optimisations. However depending on the complexity of the condition
36 * some compiler versions may not produce optimal results.
37 */
38
33#define BUG() do { \ 39#define BUG() do { \
34 __asm__ __volatile__( \ 40 __asm__ __volatile__( \
35 "1: twi 31,0,0\n" \ 41 "1: twi 31,0,0\n" \
36 ".section __bug_table,\"a\"\n" \ 42 ".section __bug_table,\"a\"\n" \
37 "\t"PPC_LONG" 1b,%0,%1,%2\n" \ 43 "\t"PPC_LONG" 1b,%0,%1,%2\n" \
38 ".previous" \ 44 ".previous" \
39 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ 45 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
40} while (0) 46} while (0)
41 47
42#define BUG_ON(x) do { \ 48#define BUG_ON(x) do { \
43 __asm__ __volatile__( \ 49 if (__builtin_constant_p(x)) { \
50 if (x) \
51 BUG(); \
52 } else { \
53 __asm__ __volatile__( \
44 "1: "PPC_TLNEI" %0,0\n" \ 54 "1: "PPC_TLNEI" %0,0\n" \
45 ".section __bug_table,\"a\"\n" \ 55 ".section __bug_table,\"a\"\n" \
46 "\t"PPC_LONG" 1b,%1,%2,%3\n" \ 56 "\t"PPC_LONG" 1b,%1,%2,%3\n" \
47 ".previous" \ 57 ".previous" \
48 : : "r" ((long)(x)), "i" (__LINE__), \ 58 : : "r" ((long)(x)), "i" (__LINE__), \
49 "i" (__FILE__), "i" (__FUNCTION__)); \ 59 "i" (__FILE__), "i" (__FUNCTION__)); \
60 } \
50} while (0) 61} while (0)
51 62
52#define WARN_ON(x) do { \ 63#define __WARN() do { \
53 __asm__ __volatile__( \ 64 __asm__ __volatile__( \
65 "1: twi 31,0,0\n" \
66 ".section __bug_table,\"a\"\n" \
67 "\t"PPC_LONG" 1b,%0,%1,%2\n" \
68 ".previous" \
69 : : "i" (__LINE__ + BUG_WARNING_TRAP), \
70 "i" (__FILE__), "i" (__FUNCTION__)); \
71} while (0)
72
73#define WARN_ON(x) do { \
74 if (__builtin_constant_p(x)) { \
75 if (x) \
76 __WARN(); \
77 } else { \
78 __asm__ __volatile__( \
54 "1: "PPC_TLNEI" %0,0\n" \ 79 "1: "PPC_TLNEI" %0,0\n" \
55 ".section __bug_table,\"a\"\n" \ 80 ".section __bug_table,\"a\"\n" \
56 "\t"PPC_LONG" 1b,%1,%2,%3\n" \ 81 "\t"PPC_LONG" 1b,%1,%2,%3\n" \
57 ".previous" \ 82 ".previous" \
58 : : "r" ((long)(x)), \ 83 : : "r" ((long)(x)), \
59 "i" (__LINE__ + BUG_WARNING_TRAP), \ 84 "i" (__LINE__ + BUG_WARNING_TRAP), \
60 "i" (__FILE__), "i" (__FUNCTION__)); \ 85 "i" (__FILE__), "i" (__FUNCTION__)); \
86 } \
61} while (0) 87} while (0)
62 88
63#define HAVE_ARCH_BUG 89#define HAVE_ARCH_BUG
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index fe45f6f3a4..4321483cce 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -188,153 +188,154 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
188 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ 188 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
189 !defined(CONFIG_BOOKE)) 189 !defined(CONFIG_BOOKE))
190 190
191enum { 191#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE)
192 CPU_FTRS_PPC601 = CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE, 192#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
193 CPU_FTRS_603 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 193 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
194 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | 194 CPU_FTR_MAYBE_CAN_NAP)
195 CPU_FTR_MAYBE_CAN_NAP, 195#define CPU_FTRS_604 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
196 CPU_FTRS_604 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 196 CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE)
197 CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, 197#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
198 CPU_FTRS_740_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 198 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
199 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 199 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP)
200 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, 200#define CPU_FTRS_740 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
201 CPU_FTRS_740 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 201 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
202 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 202 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP)
203 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, 203#define CPU_FTRS_750 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
204 CPU_FTRS_750 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 204 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
205 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 205 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP)
206 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, 206#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
207 CPU_FTRS_750FX1 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 207 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
208 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 208 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
209 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | 209 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM)
210 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM, 210#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
211 CPU_FTRS_750FX2 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 211 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
212 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 212 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
213 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | 213 CPU_FTR_NO_DPM)
214 CPU_FTR_NO_DPM, 214#define CPU_FTRS_750FX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
215 CPU_FTRS_750FX = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 215 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
216 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 216 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
217 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | 217 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS)
218 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, 218#define CPU_FTRS_750GX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \
219 CPU_FTRS_750GX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 219 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | \
220 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | 220 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \
221 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | 221 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS)
222 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, 222#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
223 CPU_FTRS_7400_NOTAU = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 223 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
224 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 224 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
225 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | 225 CPU_FTR_MAYBE_CAN_NAP)
226 CPU_FTR_MAYBE_CAN_NAP, 226#define CPU_FTRS_7400 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
227 CPU_FTRS_7400 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 227 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
228 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | 228 CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \
229 CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | 229 CPU_FTR_MAYBE_CAN_NAP)
230 CPU_FTR_MAYBE_CAN_NAP, 230#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \
231 CPU_FTRS_7450_20 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 231 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
232 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | 232 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \
233