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authorLinus Torvalds <torvalds@g5.osdl.org>2006-04-02 15:47:12 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-02 15:47:12 -0400
commitbacd3add087770333bdce65cd3dd25e3b2cd67ac (patch)
treeb9a5512a7abbf661020af87ee843e4ad711546ed /drivers
parent29e350944fdc2dfca102500790d8ad6d6ff4f69d (diff)
parent9a1875e60e61b563737d8d1fc3876b279710fe93 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6: [NET]: Fully fix the memory leaks in sys_accept(). [NETFILTER]: iptables 32bit compat layer [NETFILTER]: {ip,nf}_conntrack_netlink: fix expectation notifier unregistration [NETFILTER]: fix ifdef for connmark support in nf_conntrack_netlink [NETFILTER]: x_tables: unify IPv4/IPv6 multiport match [NETFILTER]: x_tables: unify IPv4/IPv6 esp match [NET]: Fix dentry leak in sys_accept(). [IPSEC]: Kill unused decap state structure [IPSEC]: Kill unused decap state argument [NET]: com90xx kmalloc fix [TG3]: Update driver version and reldate. [TG3]: Revert "Speed up SRAM access"
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/arcnet/com90xx.c4
-rw-r--r--drivers/net/tg3.c57
2 files changed, 27 insertions, 34 deletions
diff --git a/drivers/net/arcnet/com90xx.c b/drivers/net/arcnet/com90xx.c
index 43150b2bd1..0d45553ff7 100644
--- a/drivers/net/arcnet/com90xx.c
+++ b/drivers/net/arcnet/com90xx.c
@@ -125,11 +125,11 @@ static void __init com90xx_probe(void)
125 if (!io && !irq && !shmem && !*device && com90xx_skip_probe) 125 if (!io && !irq && !shmem && !*device && com90xx_skip_probe)
126 return; 126 return;
127 127
128 shmems = kzalloc(((0x10000-0xa0000) / 0x800) * sizeof(unsigned long), 128 shmems = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(unsigned long),
129 GFP_KERNEL); 129 GFP_KERNEL);
130 if (!shmems) 130 if (!shmems)
131 return; 131 return;
132 iomem = kzalloc(((0x10000-0xa0000) / 0x800) * sizeof(void __iomem *), 132 iomem = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(void __iomem *),
133 GFP_KERNEL); 133 GFP_KERNEL);
134 if (!iomem) { 134 if (!iomem) {
135 kfree(shmems); 135 kfree(shmems);
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 964c096448..770e6b6cec 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,8 +69,8 @@
69 69
70#define DRV_MODULE_NAME "tg3" 70#define DRV_MODULE_NAME "tg3"
71#define PFX DRV_MODULE_NAME ": " 71#define PFX DRV_MODULE_NAME ": "
72#define DRV_MODULE_VERSION "3.55" 72#define DRV_MODULE_VERSION "3.56"
73#define DRV_MODULE_RELDATE "Mar 27, 2006" 73#define DRV_MODULE_RELDATE "Apr 1, 2006"
74 74
75#define TG3_DEF_MAC_MODE 0 75#define TG3_DEF_MAC_MODE 0
76#define TG3_DEF_RX_MODE 0 76#define TG3_DEF_RX_MODE 0
@@ -497,40 +497,33 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
497 unsigned long flags; 497 unsigned long flags;
498 498
499 spin_lock_irqsave(&tp->indirect_lock, flags); 499 spin_lock_irqsave(&tp->indirect_lock, flags);
500 if (tp->write32 != tg3_write_indirect_reg32) { 500 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
501 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); 501 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
502 tw32_f(TG3PCI_MEM_WIN_DATA, val);
503 502
504 /* Always leave this as zero. */ 503 /* Always leave this as zero. */
505 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); 504 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
506 } else {
507 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
508 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
509
510 /* Always leave this as zero. */
511 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
512 }
513 spin_unlock_irqrestore(&tp->indirect_lock, flags); 505 spin_unlock_irqrestore(&tp->indirect_lock, flags);
514} 506}
515 507
508static void tg3_write_mem_fast(struct tg3 *tp, u32 off, u32 val)
509{
510 /* If no workaround is needed, write to mem space directly */
511 if (tp->write32 != tg3_write_indirect_reg32)
512 tw32(NIC_SRAM_WIN_BASE + off, val);
513 else
514 tg3_write_mem(tp, off, val);
515}
516
516static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) 517static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
517{ 518{
518 unsigned long flags; 519 unsigned long flags;
519 520
520 spin_lock_irqsave(&tp->indirect_lock, flags); 521 spin_lock_irqsave(&tp->indirect_lock, flags);
521 if (tp->write32 != tg3_write_indirect_reg32) { 522 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
522 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); 523 pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
523 *val = tr32(TG3PCI_MEM_WIN_DATA);
524 524
525 /* Always leave this as zero. */ 525 /* Always leave this as zero. */
526 tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); 526 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
527 } else {
528 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
529 pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
530
531 /* Always leave this as zero. */
532 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
533 }
534 spin_unlock_irqrestore(&tp->indirect_lock, flags); 527 spin_unlock_irqrestore(&tp->indirect_lock, flags);
535} 528}
536 529
@@ -1374,12 +1367,12 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1374 } 1367 }
1375 } 1368 }
1376 1369
1377 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
1378
1379 /* Finally, set the new power state. */ 1370 /* Finally, set the new power state. */
1380 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); 1371 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
1381 udelay(100); /* Delay after power state change */ 1372 udelay(100); /* Delay after power state change */
1382 1373
1374 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
1375
1383 return 0; 1376 return 0;
1384} 1377}
1385 1378
@@ -6547,11 +6540,11 @@ static void tg3_timer(unsigned long __opaque)
6547 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) { 6540 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
6548 u32 val; 6541 u32 val;
6549 6542
6550 tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, 6543 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_MBOX,
6551 FWCMD_NICDRV_ALIVE2); 6544 FWCMD_NICDRV_ALIVE2);
6552 tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4); 6545 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
6553 /* 5 seconds timeout */ 6546 /* 5 seconds timeout */
6554 tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5); 6547 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
6555 val = tr32(GRC_RX_CPU_EVENT); 6548 val = tr32(GRC_RX_CPU_EVENT);
6556 val |= (1 << 14); 6549 val |= (1 << 14);
6557 tw32(GRC_RX_CPU_EVENT, val); 6550 tw32(GRC_RX_CPU_EVENT, val);