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authorJeff Garzik <jeff@garzik.org>2006-04-01 14:29:12 -0500
committerJeff Garzik <jeff@garzik.org>2006-04-01 14:29:12 -0500
commit6e07e16404deafadf45895a7d2aeb5feba53b479 (patch)
treea7025d6632f0b3eb6232eafba79f331ead812fcf /drivers
parent08a556db919f67e1e4d33ae8d40f7222da34d994 (diff)
parente8e0619f68bff8f39d98c46aac85ed1d4557ccfd (diff)
Merge branch 'upstream'
Diffstat (limited to 'drivers')
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/acpi/ec.c4
-rw-r--r--drivers/block/amiflop.c1
-rw-r--r--drivers/char/drm/drmP.h16
-rw-r--r--drivers/char/drm/drm_bufs.c20
-rw-r--r--drivers/char/drm/drm_dma.c4
-rw-r--r--drivers/char/drm/drm_memory.c59
-rw-r--r--drivers/char/drm/drm_memory_debug.h70
-rw-r--r--drivers/char/drm/drm_pci.c29
-rw-r--r--drivers/char/drm/drm_pciids.h116
-rw-r--r--drivers/char/drm/i915_dma.c2
-rw-r--r--drivers/char/drm/i915_irq.c2
-rw-r--r--drivers/char/drm/r300_cmdbuf.c86
-rw-r--r--drivers/char/drm/r300_reg.h39
-rw-r--r--drivers/char/drm/radeon_cp.c151
-rw-r--r--drivers/char/drm/radeon_drm.h5
-rw-r--r--drivers/char/drm/radeon_drv.h25
-rw-r--r--drivers/char/drm/radeon_state.c105
-rw-r--r--drivers/char/drm/sis_mm.c2
-rw-r--r--drivers/char/ipmi/ipmi_devintf.c18
-rw-r--r--drivers/char/ipmi/ipmi_kcs_sm.c8
-rw-r--r--drivers/char/ipmi/ipmi_msghandler.c80
-rw-r--r--drivers/char/ipmi/ipmi_poweroff.c2
-rw-r--r--drivers/char/ipmi/ipmi_si_intf.c85
-rw-r--r--drivers/char/ipmi/ipmi_watchdog.c61
-rw-r--r--drivers/char/istallion.c32
-rw-r--r--drivers/char/stallion.c46
-rw-r--r--drivers/char/tty_io.c2
-rw-r--r--drivers/char/vt.c4
-rw-r--r--drivers/edac/Kconfig2
-rw-r--r--drivers/ide/ide-disk.c3
-rw-r--r--drivers/ide/ide-taskfile.c8
-rw-r--r--drivers/infiniband/core/mad.c112
-rw-r--r--drivers/infiniband/core/mad_priv.h3
-rw-r--r--drivers/infiniband/core/mad_rmpp.c54
-rw-r--r--drivers/infiniband/core/user_mad.c30
-rw-r--r--drivers/infiniband/hw/mthca/mthca_av.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cq.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_eq.c6
-rw-r--r--drivers/infiniband/hw/mthca/mthca_mad.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_mcg.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_mr.c4
-rw-r--r--drivers/infiniband/hw/mthca/mthca_pd.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_qp.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_srq.c4
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c2
-rw-r--r--drivers/infiniband/ulp/srp/ib_srp.c4
-rw-r--r--drivers/input/keyboard/hil_kbd.c56
-rw-r--r--drivers/input/keyboard/hilkbd.c53
-rw-r--r--drivers/input/mouse/hil_ptr.c90
-rw-r--r--drivers/input/serio/gscps2.c4
-rw-r--r--drivers/isdn/sc/ioctl.c9
-rw-r--r--drivers/leds/Kconfig77
-rw-r--r--drivers/leds/Makefile16
-rw-r--r--drivers/leds/led-class.c167
-rw-r--r--drivers/leds/led-core.c25
-rw-r--r--drivers/leds/led-triggers.c239
-rw-r--r--drivers/leds/leds-corgi.c121
-rw-r--r--drivers/leds/leds-ixp4xx-gpio.c215
-rw-r--r--drivers/leds/leds-locomo.c95
-rw-r--r--drivers/leds/leds-spitz.c125
-rw-r--r--drivers/leds/leds-tosa.c131
-rw-r--r--drivers/leds/leds.h44
-rw-r--r--drivers/leds/ledtrig-ide-disk.c62
-rw-r--r--drivers/leds/ledtrig-timer.c170
-rw-r--r--drivers/md/md.c8
-rw-r--r--drivers/md/raid1.c13
-rw-r--r--drivers/md/raid6main.c2
-rw-r--r--drivers/media/video/cpia_pp.c2
-rw-r--r--drivers/mmc/Kconfig11
-rw-r--r--drivers/mmc/Makefile5
-rw-r--r--drivers/mmc/au1xmmc.c19
-rw-r--r--drivers/mmc/mmc.c19
-rw-r--r--drivers/mmc/mmci.c4
-rw-r--r--drivers/mmc/omap.c1226
-rw-r--r--drivers/mmc/omap.h55
-rw-r--r--drivers/mmc/pxamci.c24
-rw-r--r--drivers/mmc/sdhci.c6
-rw-r--r--drivers/mmc/wbsd.c9
-rw-r--r--drivers/mtd/chips/amd_flash.c4
-rw-r--r--drivers/mtd/chips/jedec_probe.c19
-rw-r--r--drivers/mtd/chips/sharp.c7
-rw-r--r--drivers/mtd/cmdlinepart.c7
-rw-r--r--drivers/mtd/devices/blkmtd.c13
-rw-r--r--drivers/mtd/devices/block2mtd.c13
-rw-r--r--drivers/mtd/devices/doc2000.c37
-rw-r--r--drivers/mtd/devices/lart.c10
-rw-r--r--drivers/mtd/devices/m25p80.c2
-rw-r--r--drivers/mtd/devices/ms02-nv.c2
-rw-r--r--drivers/mtd/inftlcore.c7
-rw-r--r--drivers/mtd/maps/alchemy-flash.c4
-rw-r--r--drivers/mtd/maps/cfi_flagadm.c2
-rw-r--r--drivers/mtd/maps/dbox2-flash.c2
-rw-r--r--drivers/mtd/maps/dilnetpc.c4
-rw-r--r--drivers/mtd/maps/dmv182.c2
-rw-r--r--drivers/mtd/maps/h720x-flash.c2
-rw-r--r--drivers/mtd/maps/netsc520.c4
-rw-r--r--drivers/mtd/maps/nettel.c3
-rw-r--r--drivers/mtd/maps/ocotea.c6
-rw-r--r--drivers/mtd/maps/pci.c3
-rw-r--r--drivers/mtd/maps/pcmciamtd.c2
-rw-r--r--drivers/mtd/maps/redwood.c3
-rw-r--r--drivers/mtd/maps/sbc8240.c8
-rw-r--r--drivers/mtd/maps/sc520cdp.c2
-rw-r--r--drivers/mtd/maps/scx200_docflash.c2
-rw-r--r--drivers/mtd/maps/sharpsl-flash.c4
-rw-r--r--drivers/mtd/maps/ts5500_flash.c2
-rw-r--r--drivers/mtd/maps/uclinux.c2
-rw-r--r--drivers/mtd/maps/vmax301.c2
-rw-r--r--drivers/mtd/mtd_blkdevs.c32
-rw-r--r--drivers/mtd/mtdblock.c14
-rw-r--r--drivers/mtd/mtdcore.c45
-rw-r--r--drivers/mtd/nand/Kconfig17
-rw-r--r--drivers/mtd/nand/au1550nd.c4
-rw-r--r--drivers/mtd/nand/nand_base.c26
-rw-r--r--drivers/mtd/redboot.c6
-rw-r--r--drivers/net/3c59x.c33
-rw-r--r--drivers/net/8390.h2
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/acenic_firmware.h10
-rw-r--r--drivers/net/b44.c14
-rw-r--r--drivers/net/bonding/bond_3ad.c28
-rw-r--r--drivers/net/bonding/bond_3ad.h1
-rw-r--r--drivers/net/bonding/bond_main.c97
-rw-r--r--drivers/net/bonding/bonding.h4
-rw-r--r--drivers/net/ixp2000/ixpdev.c5
-rw-r--r--drivers/net/natsemi.c18
-rw-r--r--drivers/net/netconsole.c2
-rw-r--r--drivers/net/pcmcia/axnet_cs.c61
-rw-r--r--drivers/net/pcmcia/xirc2ps_cs.c2
-rw-r--r--drivers/net/pcnet32.c4
-rw-r--r--drivers/net/spider_net.c4
-rw-r--r--drivers/net/tokenring/Kconfig2
-rw-r--r--drivers/net/via-rhine.c21
-rw-r--r--drivers/net/wireless/Kconfig9
-rw-r--r--drivers/net/wireless/Makefile1
-rw-r--r--drivers/net/wireless/bcm43xx/Kconfig62
-rw-r--r--drivers/net/wireless/bcm43xx/Makefile12
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx.h926
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c499
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_debugfs.h117
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_dma.c968
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_dma.h218
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_ethtool.c50
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_ethtool.h8
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_ilt.c337
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_ilt.h32
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_leds.c293
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_leds.h56
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.c3973
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.h168
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_phy.c2345
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_phy.h74
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_pio.c606
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_pio.h138
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_power.c358
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_power.h47
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_radio.c2026
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_radio.h99
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_sysfs.c322
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_sysfs.h25
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_wx.c1002
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_wx.h36
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_xmit.c582
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_xmit.h156
-rw-r--r--drivers/net/wireless/hostap/hostap_80211.h2
-rw-r--r--drivers/net/wireless/hostap/hostap_80211_tx.c9
-rw-r--r--drivers/parisc/ccio-dma.c2
-rw-r--r--drivers/parisc/dino.c5
-rw-r--r--drivers/parisc/eisa.c2
-rw-r--r--drivers/parisc/iosapic.c2
-rw-r--r--drivers/parisc/lba_pci.c8
-rw-r--r--drivers/parisc/pdc_stable.c5
-rw-r--r--drivers/parisc/sba_iommu.c6
-rw-r--r--drivers/parisc/superio.c48
-rw-r--r--drivers/pcmcia/vrc4171_card.c12
-rw-r--r--drivers/pcmcia/vrc4173_cardu.c8
-rw-r--r--drivers/scsi/ahci.c4
-rw-r--r--drivers/scsi/ata_piix.c4
-rw-r--r--drivers/scsi/ibmmca.c2
-rw-r--r--drivers/scsi/lasi700.c2
-rw-r--r--drivers/scsi/libata-core.c205
-rw-r--r--drivers/scsi/libata-scsi.c12
-rw-r--r--drivers/scsi/libata.h2
-rw-r--r--drivers/scsi/sata_mv.c2
-rw-r--r--drivers/scsi/sata_sil.c2
-rw-r--r--drivers/scsi/zalon.c2
-rw-r--r--drivers/serial/8250_gsc.c15
-rw-r--r--drivers/serial/Kconfig27
-rw-r--r--drivers/serial/Makefile12
-rw-r--r--drivers/serial/jsm/jsm_tty.c29
-rw-r--r--drivers/serial/mux.c4
-rw-r--r--drivers/usb/net/zd1201.c2
-rw-r--r--drivers/video/Kconfig12
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/backlight/Kconfig4
-rw-r--r--drivers/video/backlight/backlight.c84
-rw-r--r--drivers/video/backlight/corgi_bl.c124
-rw-r--r--drivers/video/backlight/hp680_bl.c139
-rw-r--r--drivers/video/cfbimgblt.c2
-rw-r--r--drivers/video/console/fbcon.c11
-rw-r--r--drivers/video/console/sticore.c22
-rw-r--r--drivers/video/fbmem.c2
-rw-r--r--drivers/video/pxafb.c8
-rw-r--r--drivers/video/radeonfb.c3167
-rw-r--r--drivers/video/sticore.h37
-rw-r--r--drivers/video/stifb.c95
-rw-r--r--drivers/video/w100fb.c162
-rw-r--r--drivers/video/w100fb.h748
210 files changed, 20660 insertions, 4995 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 9f5c0da57c..5c91d6afb1 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -64,6 +64,8 @@ source "drivers/usb/Kconfig"
64 64
65source "drivers/mmc/Kconfig" 65source "drivers/mmc/Kconfig"
66 66
67source "drivers/leds/Kconfig"
68
67source "drivers/infiniband/Kconfig" 69source "drivers/infiniband/Kconfig"
68 70
69source "drivers/sn/Kconfig" 71source "drivers/sn/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 424955274e..d6e8ffbd81 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_MCA) += mca/
69obj-$(CONFIG_EISA) += eisa/ 69obj-$(CONFIG_EISA) += eisa/
70obj-$(CONFIG_CPU_FREQ) += cpufreq/ 70obj-$(CONFIG_CPU_FREQ) += cpufreq/
71obj-$(CONFIG_MMC) += mmc/ 71obj-$(CONFIG_MMC) += mmc/
72obj-$(CONFIG_NEW_LEDS) += leds/
72obj-$(CONFIG_INFINIBAND) += infiniband/ 73obj-$(CONFIG_INFINIBAND) += infiniband/
73obj-$(CONFIG_SGI_SN) += sn/ 74obj-$(CONFIG_SGI_SN) += sn/
74obj-y += firmware/ 75obj-y += firmware/
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 79b09d76c1..eee0864ba3 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -1572,7 +1572,7 @@ static void __exit acpi_ec_exit(void)
1572static int __init acpi_fake_ecdt_setup(char *str) 1572static int __init acpi_fake_ecdt_setup(char *str)
1573{ 1573{
1574 acpi_fake_ecdt_enabled = 1; 1574 acpi_fake_ecdt_enabled = 1;
1575 return 0; 1575 return 1;
1576} 1576}
1577 1577
1578__setup("acpi_fake_ecdt", acpi_fake_ecdt_setup); 1578__setup("acpi_fake_ecdt", acpi_fake_ecdt_setup);
@@ -1591,7 +1591,7 @@ static int __init acpi_ec_set_intr_mode(char *str)
1591 acpi_ec_driver.ops.add = acpi_ec_poll_add; 1591 acpi_ec_driver.ops.add = acpi_ec_poll_add;
1592 } 1592 }
1593 printk(KERN_INFO PREFIX "EC %s mode.\n", intr ? "interrupt" : "polling"); 1593 printk(KERN_INFO PREFIX "EC %s mode.\n", intr ? "interrupt" : "polling");
1594 return 0; 1594 return 1;
1595} 1595}
1596 1596
1597__setup("ec_intr=", acpi_ec_set_intr_mode); 1597__setup("ec_intr=", acpi_ec_set_intr_mode);
diff --git a/drivers/block/amiflop.c b/drivers/block/amiflop.c
index b6e2909562..2a8af68592 100644
--- a/drivers/block/amiflop.c
+++ b/drivers/block/amiflop.c
@@ -1850,6 +1850,7 @@ static int __init amiga_floppy_setup (char *str)
1850 return 0; 1850 return 0;
1851 printk (KERN_INFO "amiflop: Setting default df0 to %x\n", n); 1851 printk (KERN_INFO "amiflop: Setting default df0 to %x\n", n);
1852 fd_def_df0 = n; 1852 fd_def_df0 = n;
1853 return 1;
1853} 1854}
1854 1855
1855__setup("floppy=", amiga_floppy_setup); 1856__setup("floppy=", amiga_floppy_setup);
diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h
index 107df9fdba..edc72a6348 100644
--- a/drivers/char/drm/drmP.h
+++ b/drivers/char/drm/drmP.h
@@ -357,6 +357,12 @@ typedef struct drm_freelist {
357 spinlock_t lock; 357 spinlock_t lock;
358} drm_freelist_t; 358} drm_freelist_t;
359 359
360typedef struct drm_dma_handle {
361 dma_addr_t busaddr;
362 void *vaddr;
363 size_t size;
364} drm_dma_handle_t;
365
360/** 366/**
361 * Buffer entry. There is one of this for each buffer size order. 367 * Buffer entry. There is one of this for each buffer size order.
362 */ 368 */
@@ -366,7 +372,7 @@ typedef struct drm_buf_entry {
366 drm_buf_t *buflist; /**< buffer list */ 372 drm_buf_t *buflist; /**< buffer list */
367 int seg_count; 373 int seg_count;
368 int page_order; 374 int page_order;
369 unsigned long *seglist; 375 drm_dma_handle_t **seglist;
370 376
371 drm_freelist_t freelist; 377 drm_freelist_t freelist;
372} drm_buf_entry_t; 378} drm_buf_entry_t;
@@ -483,12 +489,6 @@ typedef struct drm_sigdata {
483 drm_hw_lock_t *lock; 489 drm_hw_lock_t *lock;
484} drm_sigdata_t; 490} drm_sigdata_t;
485 491
486typedef struct drm_dma_handle {
487 dma_addr_t busaddr;
488 void *vaddr;
489 size_t size;
490} drm_dma_handle_t;
491
492/** 492/**
493 * Mappings list 493 * Mappings list
494 */ 494 */
@@ -813,8 +813,6 @@ extern void drm_mem_init(void);
813extern int drm_mem_info(char *buf, char **start, off_t offset, 813extern int drm_mem_info(char *buf, char **start, off_t offset,
814 int request, int *eof, void *data); 814 int request, int *eof, void *data);
815extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area); 815extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
816extern unsigned long drm_alloc_pages(int order, int area);
817extern void drm_free_pages(unsigned long address, int order, int area);
818extern void *drm_ioremap(unsigned long offset, unsigned long size, 816extern void *drm_ioremap(unsigned long offset, unsigned long size,
819 drm_device_t * dev); 817 drm_device_t * dev);
820extern void *drm_ioremap_nocache(unsigned long offset, unsigned long size, 818extern void *drm_ioremap_nocache(unsigned long offset, unsigned long size,
diff --git a/drivers/char/drm/drm_bufs.c b/drivers/char/drm/drm_bufs.c
index e2637b4d51..8a9cf12e61 100644
--- a/drivers/char/drm/drm_bufs.c
+++ b/drivers/char/drm/drm_bufs.c
@@ -474,8 +474,7 @@ static void drm_cleanup_buf_error(drm_device_t * dev, drm_buf_entry_t * entry)
474 if (entry->seg_count) { 474 if (entry->seg_count) {
475 for (i = 0; i < entry->seg_count; i++) { 475 for (i = 0; i < entry->seg_count; i++) {
476 if (entry->seglist[i]) { 476 if (entry->seglist[i]) {
477 drm_free_pages(entry->seglist[i], 477 drm_pci_free(dev, entry->seglist[i]);
478 entry->page_order, DRM_MEM_DMA);
479 } 478 }
480 } 479 }
481 drm_free(entry->seglist, 480 drm_free(entry->seglist,
@@ -678,7 +677,7 @@ int drm_addbufs_pci(drm_device_t * dev, drm_buf_desc_t * request)
678 int total; 677 int total;
679 int page_order; 678 int page_order;
680 drm_buf_entry_t *entry; 679 drm_buf_entry_t *entry;
681 unsigned long page; 680 drm_dma_handle_t *dmah;
682 drm_buf_t *buf; 681 drm_buf_t *buf;
683 int alignment; 682 int alignment;
684 unsigned long offset; 683 unsigned long offset;
@@ -781,8 +780,10 @@ int drm_addbufs_pci(drm_device_t * dev, drm_buf_desc_t * request)
781 page_count = 0; 780 page_count = 0;
782 781
783 while (entry->buf_count < count) { 782 while (entry->buf_count < count) {
784 page = drm_alloc_pages(page_order, DRM_MEM_DMA); 783
785 if (!page) { 784 dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000, 0xfffffffful);
785
786 if (!dmah) {
786 /* Set count correctly so we free the proper amount. */ 787 /* Set count correctly so we free the proper amount. */
787 entry->buf_count = count; 788 entry->buf_count = count;
788 entry->seg_count = count; 789 entry->seg_count = count;
@@ -794,13 +795,13 @@ int drm_addbufs_pci(drm_device_t * dev, drm_buf_desc_t * request)
794 atomic_dec(&dev->buf_alloc); 795 atomic_dec(&dev->buf_alloc);
795 return -ENOMEM; 796 return -ENOMEM;
796 } 797 }
797 entry->seglist[entry->seg_count++] = page; 798 entry->seglist[entry->seg_count++] = dmah;
798 for (i = 0; i < (1 << page_order); i++) { 799 for (i = 0; i < (1 << page_order); i++) {
799 DRM_DEBUG("page %d @ 0x%08lx\n", 800 DRM_DEBUG("page %d @ 0x%08lx\n",
800 dma->page_count + page_count, 801 dma->page_count + page_count,
801 page + PAGE_SIZE * i); 802 (unsigned long)dmah->vaddr + PAGE_SIZE * i);
802 temp_pagelist[dma->page_count + page_count++] 803 temp_pagelist[dma->page_count + page_count++]
803 = page + PAGE_SIZE * i; 804 = (unsigned long)dmah->vaddr + PAGE_SIZE * i;
804 } 805 }
805 for (offset = 0; 806 for (offset = 0;
806 offset + size <= total && entry->buf_count < count; 807 offset + size <= total && entry->buf_count < count;
@@ -811,7 +812,8 @@ int drm_addbufs_pci(drm_device_t * dev, drm_buf_desc_t * request)
811 buf->order = order; 812 buf->order = order;
812 buf->used = 0; 813 buf->used = 0;
813 buf->offset = (dma->byte_count + byte_count + offset); 814 buf->offset = (dma->byte_count + byte_count + offset);
814 buf->address = (void *)(page + offset); 815 buf->address = (void *)(dmah->vaddr + offset);
816 buf->bus_address = dmah->busaddr + offset;
815 buf->next = NULL; 817 buf->next = NULL;
816 buf->waiting = 0; 818 buf->waiting = 0;
817 buf->pending = 0; 819 buf->pending = 0;
diff --git a/drivers/char/drm/drm_dma.c b/drivers/char/drm/drm_dma.c
index 2afab95ca0..892db70969 100644
--- a/drivers/char/drm/drm_dma.c
+++ b/drivers/char/drm/drm_dma.c
@@ -85,9 +85,7 @@ void drm_dma_takedown(drm_device_t * dev)
85 dma->bufs[i].seg_count); 85 dma->bufs[i].seg_count);
86 for (j = 0; j < dma->bufs[i].seg_count; j++) { 86 for (j = 0; j < dma->bufs[i].seg_count; j++) {
87 if (dma->bufs[i].seglist[j]) { 87 if (dma->bufs[i].seglist[j]) {
88 drm_free_pages(dma->bufs[i].seglist[j], 88 drm_pci_free(dev, dma->bufs[i].seglist[j]);
89 dma->bufs[i].page_order,
90 DRM_MEM_DMA);
91 } 89 }
92 } 90 }
93 drm_free(dma->bufs[i].seglist, 91 drm_free(dma->bufs[i].seglist,
diff --git a/drivers/char/drm/drm_memory.c b/drivers/char/drm/drm_memory.c
index 8074771e34..dddf8de661 100644
--- a/drivers/char/drm/drm_memory.c
+++ b/drivers/char/drm/drm_memory.c
@@ -79,65 +79,6 @@ void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
79 return pt; 79 return pt;
80} 80}
81 81
82/**
83 * Allocate pages.
84 *
85 * \param order size order.
86 * \param area memory area. (Not used.)
87 * \return page address on success, or zero on failure.
88 *
89 * Allocate and reserve free pages.
90 */
91unsigned long drm_alloc_pages(int order, int area)
92{
93 unsigned long address;
94 unsigned long bytes = PAGE_SIZE << order;
95 unsigned long addr;
96 unsigned int sz;
97
98 address = __get_free_pages(GFP_KERNEL|__GFP_COMP, order);
99 if (!address)
100 return 0;
101
102 /* Zero */
103 memset((void *)address, 0, bytes);
104
105 /* Reserve */
106 for (addr = address, sz = bytes;
107 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
108 SetPageReserved(virt_to_page(addr));
109 }
110
111 return address;
112}
113
114/**
115 * Free pages.
116 *
117 * \param address address of the pages to free.
118 * \param order size order.
119 * \param area memory area. (Not used.)
120 *
121 * Unreserve and free pages allocated by alloc_pages().
122 */
123void drm_free_pages(unsigned long address, int order, int area)
124{
125 unsigned long bytes = PAGE_SIZE << order;
126 unsigned long addr;
127 unsigned int sz;
128
129 if (!address)
130 return;
131
132 /* Unreserve */
133 for (addr = address, sz = bytes;
134 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
135 ClearPageReserved(virt_to_page(addr));
136 }
137
138 free_pages(address, order);
139}
140
141#if __OS_HAS_AGP 82#if __OS_HAS_AGP
142/** Wrapper around agp_allocate_memory() */ 83/** Wrapper around agp_allocate_memory() */
143DRM_AGP_MEM *drm_alloc_agp(drm_device_t * dev, int pages, u32 type) 84DRM_AGP_MEM *drm_alloc_agp(drm_device_t * dev, int pages, u32 type)
diff --git a/drivers/char/drm/drm_memory_debug.h b/drivers/char/drm/drm_memory_debug.h
index e84605fc54..7868341817 100644
--- a/drivers/char/drm/drm_memory_debug.h
+++ b/drivers/char/drm/drm_memory_debug.h
@@ -206,76 +206,6 @@ void drm_free (void *pt, size_t size, int area) {
206 } 206 }
207} 207}
208 208
209unsigned long drm_alloc_pages (int order, int area) {
210 unsigned long address;
211 unsigned long bytes = PAGE_SIZE << order;
212 unsigned long addr;
213 unsigned int sz;
214
215 spin_lock(&drm_mem_lock);
216 if ((drm_ram_used >> PAGE_SHIFT)
217 > (DRM_RAM_PERCENT * drm_ram_available) / 100) {
218 spin_unlock(&drm_mem_lock);
219 return 0;
220 }
221 spin_unlock(&drm_mem_lock);
222
223 address = __get_free_pages(GFP_KERNEL|__GFP_COMP, order);
224 if (!address) {
225 spin_lock(&drm_mem_lock);
226 ++drm_mem_stats[area].fail_count;
227 spin_unlock(&drm_mem_lock);
228 return 0;
229 }
230 spin_lock(&drm_mem_lock);
231 ++drm_mem_stats[area].succeed_count;
232 drm_mem_stats[area].bytes_allocated += bytes;
233 drm_ram_used += bytes;
234 spin_unlock(&drm_mem_lock);
235
236 /* Zero outside the lock */
237 memset((void *)address, 0, bytes);
238
239 /* Reserve */
240 for (addr = address, sz = bytes;
241 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
242 SetPageReserved(virt_to_page(addr));
243 }
244
245 return address;
246}
247
248void drm_free_pages (unsigned long address, int order, int area) {
249 unsigned long bytes = PAGE_SIZE << order;
250 int alloc_count;
251 int free_count;
252 unsigned long addr;
253 unsigned int sz;
254
255 if (!address) {
256 DRM_MEM_ERROR(area, "Attempt to free address 0\n");
257 } else {
258 /* Unreserve */
259 for (addr = address, sz = bytes;
260 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
261 ClearPageReserved(virt_to_page(addr));
262 }
263 free_pages(address, order);
264 }
265
266 spin_lock(&drm_mem_lock);
267 free_count = ++drm_mem_stats[area].free_count;
268 alloc_count = drm_mem_stats[area].succeed_count;
269 drm_mem_stats[area].bytes_freed += bytes;
270 drm_ram_used -= bytes;
271 spin_unlock(&drm_mem_lock);
272 if (free_count > alloc_count) {
273 DRM_MEM_ERROR(area,
274 "Excess frees: %d frees, %d allocs\n",
275 free_count, alloc_count);
276 }
277}
278
279void *drm_ioremap (unsigned long offset, unsigned long size, 209void *drm_ioremap (unsigned long offset, unsigned long size,
280 drm_device_t * dev) { 210 drm_device_t * dev) {
281 void *pt; 211 void *pt;
diff --git a/drivers/char/drm/drm_pci.c b/drivers/char/drm/drm_pci.c
index 1fd7ff1648..b28ca9cea8 100644
--- a/drivers/char/drm/drm_pci.c
+++ b/drivers/char/drm/drm_pci.c
@@ -50,6 +50,10 @@ drm_dma_handle_t *drm_pci_alloc(drm_device_t * dev, size_t size, size_t align,
50 dma_addr_t maxaddr) 50 dma_addr_t maxaddr)
51{ 51{
52 drm_dma_handle_t *dmah; 52 drm_dma_handle_t *dmah;
53#if 1
54 unsigned long addr;
55 size_t sz;
56#endif
53#ifdef DRM_DEBUG_MEMORY 57#ifdef DRM_DEBUG_MEMORY
54 int area = DRM_MEM_DMA; 58 int area = DRM_MEM_DMA;
55 59
@@ -79,7 +83,7 @@ drm_dma_handle_t *drm_pci_alloc(drm_device_t * dev, size_t size, size_t align,
79 return NULL; 83 return NULL;
80 84
81 dmah->size = size; 85 dmah->size = size;
82 dmah->vaddr = pci_alloc_consistent(dev->pdev, size, &dmah->busaddr); 86 dmah->vaddr = dma_alloc_coherent(&dev->pdev->dev, size, &dmah->busaddr, GFP_KERNEL | __GFP_COMP);
83 87
84#ifdef DRM_DEBUG_MEMORY 88#ifdef DRM_DEBUG_MEMORY
85 if (dmah->vaddr == NULL) { 89 if (dmah->vaddr == NULL) {
@@ -104,18 +108,29 @@ drm_dma_handle_t *drm_pci_alloc(drm_device_t * dev, size_t size, size_t align,
104 108
105 memset(dmah->vaddr, 0, size); 109 memset(dmah->vaddr, 0, size);
106 110
111 /* XXX - Is virt_to_page() legal for consistent mem? */
112 /* Reserve */
113 for (addr = (unsigned long)dmah->vaddr, sz = size;
114 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
115 SetPageReserved(virt_to_page(addr));
116 }
117
107 return dmah; 118 return dmah;
108} 119}
109 120
110EXPORT_SYMBOL(drm_pci_alloc); 121EXPORT_SYMBOL(drm_pci_alloc);
111 122
112/** 123/**
113 * \brief Free a PCI consistent memory block with freeing its descriptor. 124 * \brief Free a PCI consistent memory block without freeing its descriptor.
114 * 125 *
115 * This function is for internal use in the Linux-specific DRM core code. 126 * This function is for internal use in the Linux-specific DRM core code.
116 */ 127 */
117void __drm_pci_free(drm_device_t * dev, drm_dma_handle_t * dmah) 128void __drm_pci_free(drm_device_t * dev, drm_dma_handle_t * dmah)
118{ 129{
130#if 1
131 unsigned long addr;
132 size_t sz;
133#endif
119#ifdef DRM_DEBUG_MEMORY 134#ifdef DRM_DEBUG_MEMORY
120 int area = DRM_MEM_DMA; 135 int area = DRM_MEM_DMA;
121 int alloc_count; 136 int alloc_count;
@@ -127,8 +142,14 @@ void __drm_pci_free(drm_device_t * dev, drm_dma_handle_t * dmah)
127 DRM_MEM_ERROR(area, "Attempt to free address 0\n"); 142 DRM_MEM_ERROR(area, "Attempt to free address 0\n");
128#endif 143#endif
129 } else { 144 } else {
130 pci_free_consistent(dev->pdev, dmah->size, dmah->vaddr, 145 /* XXX - Is virt_to_page() legal for consistent mem? */
131 dmah->busaddr); 146 /* Unreserve */
147 for (addr = (unsigned long)dmah->vaddr, sz = dmah->size;
148 sz > 0; addr += PAGE_SIZE, sz -= PAGE_SIZE) {
149 ClearPageReserved(virt_to_page(addr));
150 }
151 dma_free_coherent(&dev->pdev->dev, dmah->size, dmah->vaddr,
152 dmah->busaddr);
132 } 153 }
133 154
134#ifdef DRM_DEBUG_MEMORY 155#ifdef DRM_DEBUG_MEMORY
diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h
index 2c17e88a88..b1bb3c7b56 100644
--- a/drivers/char/drm/drm_pciids.h
+++ b/drivers/char/drm/drm_pciids.h
@@ -3,49 +3,69 @@
3 Please contact dri-devel@lists.sf.net to add new cards to this list 3 Please contact dri-devel@lists.sf.net to add new cards to this list
4*/ 4*/
5#define radeon_PCI_IDS \ 5#define radeon_PCI_IDS \
6 {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350},\ 6 {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \
7 {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
8 {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
9 {0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
10 {0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
7 {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP}, \ 11 {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP}, \
8 {0x1002, 0x4137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP}, \ 12 {0x1002, 0x4137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP}, \
9 {0x1002, 0x4144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 13 {0x1002, 0x4144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
10 {0x1002, 0x4145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 14 {0x1002, 0x4145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
11 {0x1002, 0x4146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 15 {0x1002, 0x4146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
12 {0x1002, 0x4147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 16 {0x1002, 0x4147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
17 {0x1002, 0x4148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
18 {0x1002, 0x4149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
19 {0x1002, 0x414A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
20 {0x1002, 0x414B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
13 {0x1002, 0x4150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 21 {0x1002, 0x4150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
14 {0x1002, 0x4151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 22 {0x1002, 0x4151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
15 {0x1002, 0x4152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 23 {0x1002, 0x4152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
16 {0x1002, 0x4153, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 24 {0x1002, 0x4153, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
17 {0x1002, 0x4154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 25 {0x1002, 0x4154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
26 {0x1002, 0x4155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
18 {0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 27 {0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
19 {0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS250|CHIP_IS_IGP}, \ 28 {0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP}, \
20 {0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 29 {0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
21 {0x1002, 0x4243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 30 {0x1002, 0x4243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
22 {0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ 31 {0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \
23 {0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ 32 {0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \
24 {0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS250|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ 33 {0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \
25 {0x1002, 0x4964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250}, \ 34 {0x1002, 0x4966, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \
26 {0x1002, 0x4965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250}, \ 35 {0x1002, 0x4967, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \
27 {0x1002, 0x4966, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250}, \ 36 {0x1002, 0x4A48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
28 {0x1002, 0x4967, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250}, \ 37 {0x1002, 0x4A49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
29 {0x1002, 0x4A49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420}, \ 38 {0x1002, 0x4A4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
30 {0x1002, 0x4A4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420}, \ 39 {0x1002, 0x4A4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
40 {0x1002, 0x4A4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
41 {0x1002, 0x4A4D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
42 {0x1002, 0x4A4E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
43 {0x1002, 0x4A4F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
44 {0x1002, 0x4A50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
45 {0x1002, 0x4A54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
46 {0x1002, 0x4B49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
47 {0x1002, 0x4B4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
48 {0x1002, 0x4B4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
49 {0x1002, 0x4B4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
31 {0x1002, 0x4C57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \ 50 {0x1002, 0x4C57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \
32 {0x1002, 0x4C58, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \ 51 {0x1002, 0x4C58, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|CHIP_IS_MOBILITY}, \
33 {0x1002, 0x4C59, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \ 52 {0x1002, 0x4C59, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \
34 {0x1002, 0x4C5A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \ 53 {0x1002, 0x4C5A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|CHIP_IS_MOBILITY}, \
35 {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250|CHIP_IS_MOBILITY}, \ 54 {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \
36 {0x1002, 0x4C65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250|CHIP_IS_MOBILITY}, \ 55 {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \
37 {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250|CHIP_IS_MOBILITY}, \ 56 {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|CHIP_IS_MOBILITY}, \
38 {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R250|CHIP_IS_MOBILITY}, \
39 {0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 57 {0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
40 {0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 58 {0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
41 {0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 59 {0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
42 {0x1002, 0x4E47, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ 60 {0x1002, 0x4E47, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
43 {0x1002, 0x4E48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ 61 {0x1002, 0x4E48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
44 {0x1002, 0x4E49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ 62 {0x1002, 0x4E49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
45 {0x1002, 0x4E4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 63 {0x1002, 0x4E4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
46 {0x1002, 0x4E4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ 64 {0x1002, 0x4E4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \
47 {0x1002, 0x4E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ 65 {0x1002, 0x4E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
48 {0x1002, 0x4E51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ 66 {0x1002, 0x4E51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
67 {0x1002, 0x4E52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
68 {0x1002, 0x4E53, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
49 {0x1002, 0x4E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ 69 {0x1002, 0x4E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
50 {0x1002, 0x4E56, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \ 70 {0x1002, 0x4E56, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|CHIP_IS_MOBILITY}, \
51 {0x1002, 0x5144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ 71 {0x1002, 0x5144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \
@@ -53,44 +73,66 @@
53 {0x1002, 0x5146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ 73 {0x1002, 0x5146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \
54 {0x1002, 0x5147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \ 74 {0x1002, 0x5147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|CHIP_SINGLE_CRTC}, \
55 {0x1002, 0x5148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 75 {0x1002, 0x5148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
56 {0x1002, 0x5149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
57 {0x1002, 0x514A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
58 {0x1002, 0x514B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
59 {0x1002, 0x514C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 76 {0x1002, 0x514C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
60 {0x1002, 0x514D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 77 {0x1002, 0x514D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
61 {0x1002, 0x514E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
62 {0x1002, 0x514F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
63 {0x1002, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \ 78 {0x1002, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \
64 {0x1002, 0x5158, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \ 79 {0x1002, 0x5158, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \
65 {0x1002, 0x5159, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 80 {0x1002, 0x5159, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
66 {0x1002, 0x515A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 81 {0x1002, 0x515A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
67 {0x1002, 0x515E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 82 {0x1002, 0x515E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
68 {0x1002, 0x5168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 83 {0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \
69 {0x1002, 0x5169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 84 {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \
70 {0x1002, 0x516A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 85 {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_IS_MOBILITY}, \
71 {0x1002, 0x516B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 86 {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
72 {0x1002, 0x516C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ 87 {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
73 {0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ 88 {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
74 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ 89 {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
90 {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
91 {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
92 {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
93 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
94 {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
95 {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
96 {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
97 {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
98 {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
99 {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
100 {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
101 {0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
102 {0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
75 {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP}, \ 103 {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP}, \
76 {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \ 104 {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY}, \
77 {0x1002, 0x5836, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP}, \
78 {0x1002, 0x5837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP}, \
79 {0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 105 {0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
80 {0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 106 {0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
81 {0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 107 {0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
82 {0x1002, 0x5963, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
83 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 108 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
84 {0x1002, 0x5968, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 109 {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
85 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 110 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
86 {0x1002, 0x596A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 111 {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
87 {0x1002, 0x596B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 112 {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
113 {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
114 {0x1002, 0x5b64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
115 {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|CHIP_NEW_MEMMAP}, \
88 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \ 116 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \
89 {0x1002, 0x5c62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
90 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \ 117 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|CHIP_IS_MOBILITY}, \
91 {0x1002, 0x5c64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 118 {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
92 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ 119 {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
93 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420}, \ 120 {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
121 {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
122 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
123 {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
124 {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
125 {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
126 {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
127 {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|CHIP_NEW_MEMMAP}, \
128 {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
129 {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
130 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
131 {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
132 {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
133 {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|CHIP_NEW_MEMMAP}, \
134 {0x1002, 0x7834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_NEW_MEMMAP}, \
135 {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY|CHIP_NEW_MEMMAP}, \
94 {0, 0, 0} 136 {0, 0, 0}
95 137
96#define r128_PCI_IDS \ 138#define r128_PCI_IDS \
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c
index 1ff4c7ca0b..9f4b8ce4c0 100644
--- a/drivers/char/drm/i915_dma.c
+++ b/drivers/char/drm/i915_dma.c
@@ -495,8 +495,6 @@ static int i915_dispatch_batchbuffer(drm_device_t * dev,
495 } 495 }
496 } 496 }
497 497
498 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
499
500 i915_emit_breadcrumb(dev); 498 i915_emit_breadcrumb(dev);
501 499
502 return 0; 500 return 0;
diff --git a/drivers/char/drm/i915_irq.c b/drivers/char/drm/i915_irq.c
index d3879ac997..a752afd86a 100644
--- a/drivers/char/drm/i915_irq.c
+++ b/drivers/char/drm/i915_irq.c
@@ -53,6 +53,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
53 53
54 I915_WRITE16(I915REG_INT_IDENTITY_R, temp); 54 I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
55 55
56 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
57
56 if (temp & USER_INT_FLAG) 58 if (temp & USER_INT_FLAG)
57 DRM_WAKEUP(&dev_priv->irq_queue); 59 DRM_WAKEUP(&dev_priv->irq_queue);
58 60
diff --git a/drivers/char/drm/r300_cmdbuf.c b/drivers/char/drm/r300_cmdbuf.c
index c08fa5076f..b108c7f913 100644
--- a/drivers/char/drm/r300_cmdbuf.c
+++ b/drivers/char/drm/r300_cmdbuf.c
@@ -214,13 +214,13 @@ void r300_init_reg_flags(void)
214 ADD_RANGE(0x4F54, 1); 214 ADD_RANGE(0x4F54, 1);
215 215
216 ADD_RANGE(R300_TX_FILTER_0, 16); 216 ADD_RANGE(R300_TX_FILTER_0, 16);
217 ADD_RANGE(R300_TX_UNK1_0, 16); 217 ADD_RANGE(R300_TX_FILTER1_0, 16);
218 ADD_RANGE(R300_TX_SIZE_0, 16); 218 ADD_RANGE(R300_TX_SIZE_0, 16);
219 ADD_RANGE(R300_TX_FORMAT_0, 16); 219 ADD_RANGE(R300_TX_FORMAT_0, 16);
220 ADD_RANGE(R300_TX_PITCH_0, 16); 220 ADD_RANGE(R300_TX_PITCH_0, 16);
221 /* Texture offset is dangerous and needs more checking */ 221 /* Texture offset is dangerous and needs more checking */
222 ADD_RANGE_MARK(R300_TX_OFFSET_0, 16, MARK_CHECK_OFFSET); 222 ADD_RANGE_MARK(R300_TX_OFFSET_0, 16, MARK_CHECK_OFFSET);
223 ADD_RANGE(R300_TX_UNK4_0, 16); 223 ADD_RANGE(R300_TX_CHROMA_KEY_0, 16);
224 ADD_RANGE(R300_TX_BORDER_COLOR_0, 16); 224 ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
225 225
226 /* Sporadic registers used as primitives are emitted */ 226 /* Sporadic registers used as primitives are emitted */
@@ -242,8 +242,10 @@ static __inline__ int r300_check_range(unsigned reg, int count)
242 return 0; 242 return 0;
243} 243}
244 244
245 /* we expect offsets passed to the framebuffer to be either within video memory or 245/*
246 within AGP space */ 246 * we expect offsets passed to the framebuffer to be either within video
247 * memory or within AGP space
248 */
247static __inline__ int r300_check_offset(drm_radeon_private_t *dev_priv, 249static __inline__ int r300_check_offset(drm_radeon_private_t *dev_priv,
248 u32 offset) 250 u32 offset)
249{ 251{
@@ -251,11 +253,11 @@ static __inline__ int r300_check_offset(drm_radeon_private_t *dev_priv,
251 but this value is not being kept. 253 but this value is not being kept.
252 This code is correct for now (does the same thing as the 254 This code is correct for now (does the same thing as the
253 code that sets MC_FB_LOCATION) in radeon_cp.c */ 255 code that sets MC_FB_LOCATION) in radeon_cp.c */
254 if ((offset >= dev_priv->fb_location) && 256 if (offset >= dev_priv->fb_location &&
255 (offset < dev_priv->gart_vm_start)) 257 offset < (dev_priv->fb_location + dev_priv->fb_size))
256 return 0; 258 return 0;
257 if ((offset >= dev_priv->gart_vm_start) && 259 if (offset >= dev_priv->gart_vm_start &&
258 (offset < dev_priv->gart_vm_start + dev_priv->gart_size)) 260 offset < (dev_priv->gart_vm_start + dev_priv->gart_size))
259 return 0; 261 return 0;
260 return 1; 262 return 1;
261} 263}
@@ -490,6 +492,7 @@ static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t *dev_priv,
490 492
491 return 0; 493 return 0;
492} 494}
495
493static __inline__ int r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv, 496static __inline__ int r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv,
494 drm_radeon_kcmd_buffer_t *cmdbuf) 497 drm_radeon_kcmd_buffer_t *cmdbuf)
495{ 498{
@@ -701,6 +704,64 @@ static void r300_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
701 buf->used = 0; 704 buf->used = 0;
702} 705}
703 706
707static int r300_scratch(drm_radeon_private_t *dev_priv,
708 drm_radeon_kcmd_buffer_t *cmdbuf,
709 drm_r300_cmd_header_t header)
710{
711 u32 *ref_age_base;
712 u32 i, buf_idx, h_pending;
713 RING_LOCALS;
714
715 if (cmdbuf->bufsz <
716 (sizeof(u64) + header.scratch.n_bufs * sizeof(buf_idx))) {
717 return DRM_ERR(EINVAL);
718 }
719
720 if (header.scratch.reg >= 5) {
721 return DRM_ERR(EINVAL);
722 }
723
724 dev_priv->scratch_ages[header.scratch.reg]++;
725
726 ref_age_base = *(u32 **)cmdbuf->buf;
727
728 cmdbuf->buf += sizeof(u64);
729 cmdbuf->bufsz -= sizeof(u64);
730
731 for (i=0; i < header.scratch.n_bufs; i++) {
732 buf_idx = *(u32 *)cmdbuf->buf;
733 buf_idx *= 2; /* 8 bytes per buf */
734
735 if (DRM_COPY_TO_USER(ref_age_base + buf_idx, &dev_priv->scratch_ages[header.scratch.reg], sizeof(u32))) {
736 return DRM_ERR(EINVAL);
737 }
738
739 if (DRM_COPY_FROM_USER(&h_pending, ref_age_base + buf_idx + 1, sizeof(u32))) {
740 return DRM_ERR(EINVAL);
741 }
742
743 if (h_pending == 0) {
744 return DRM_ERR(EINVAL);
745 }
746
747 h_pending--;
748
749 if (DRM_COPY_TO_USER(ref_age_base + buf_idx + 1, &h_pending, sizeof(u32))) {
750 return DRM_ERR(EINVAL);
751 }
752
753 cmdbuf->buf += sizeof(buf_idx);
754 cmdbuf->bufsz -= sizeof(buf_idx);
755 }
756
757 BEGIN_RING(2);
758 OUT_RING(CP_PACKET0(RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0));
759 OUT_RING(dev_priv->scratch_ages[header.scratch.reg]);
760 ADVANCE_RING();
761
762 return 0;
763}
764
704/** 765/**
705 * Parses and validates a user-supplied command buffer and emits appropriate 766 * Parses and validates a user-supplied command buffer and emits appropriate
706 * commands on the DMA ring buffer. 767 * commands on the DMA ring buffer.
@@ -838,6 +899,15 @@ int r300_do_cp_cmdbuf(drm_device_t *dev,
838 } 899 }
839 break; 900 break;
840 901
902 case R300_CMD_SCRATCH:
903 DRM_DEBUG("R300_CMD_SCRATCH\n");
904 ret = r300_scratch(dev_priv, cmdbuf, header);
905 if (ret) {
906 DRM_ERROR("r300_scratch failed\n");
907 goto cleanup;
908 }
909 break;
910
841 default: 911 default:
842 DRM_ERROR("bad cmd_type %i at %p\n", 912 DRM_ERROR("bad cmd_type %i at %p\n",
843 header.header.cmd_type, 913 header.header.cmd_type,
diff --git a/drivers/char/drm/r300_reg.h b/drivers/char/drm/r300_reg.h
index d1e1995440..a881f96c98 100644
--- a/drivers/char/drm/r300_reg.h
+++ b/drivers/char/drm/r300_reg.h
@@ -711,8 +711,22 @@ I am fairly certain that they are correct unless stated otherwise in comments.
711# define R300_TX_MAX_ANISO_16_TO_1 (8 << 21) 711# define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
712# define R300_TX_MAX_ANISO_MASK (14 << 21) 712# define R300_TX_MAX_ANISO_MASK (14 << 21)
713 713
714#define R300_TX_UNK1_0 0x4440 714#define R300_TX_FILTER1_0 0x4440
715# define R300_CHROMA_KEY_MODE_DISABLE 0
716# define R300_CHROMA_KEY_FORCE 1
717# define R300_CHROMA_KEY_BLEND 2
718# define R300_MC_ROUND_NORMAL (0<<2)
719# define R300_MC_ROUND_MPEG4 (1<<2)
715# define R300_LOD_BIAS_MASK 0x1fff 720# define R300_LOD_BIAS_MASK 0x1fff
721# define R300_EDGE_ANISO_EDGE_DIAG (0<<13)
722# define R300_EDGE_ANISO_EDGE_ONLY (1<<13)
723# define R300_MC_COORD_TRUNCATE_DISABLE (0<<14)
724# define R300_MC_COORD_TRUNCATE_MPEG (1<<14)
725# define R300_TX_TRI_PERF_0_8 (0<<15)
726# define R300_TX_TRI_PERF_1_8 (1<<15)
727# define R300_TX_TRI_PERF_1_4 (2<<15)
728# define R300_TX_TRI_PERF_3_8 (3<<15)
729# define R300_ANISO_THRESHOLD_MASK (7<<17)
716 730
717#define R300_TX_SIZE_0 0x4480 731#define R300_TX_SIZE_0 0x4480
718# define R300_TX_WIDTHMASK_SHIFT 0 732# define R300_TX_WIDTHMASK_SHIFT 0
@@ -722,6 +736,8 @@ I am fairly certain that they are correct unless stated otherwise in comments.
722# define R300_TX_UNK23 (1 << 23) 736# define R300_TX_UNK23 (1 << 23)
723# define R300_TX_SIZE_SHIFT 26 /* largest of width, height */ 737# define R300_TX_SIZE_SHIFT 26 /* largest of width, height */
724# define R300_TX_SIZE_MASK (15 << 26) 738# define R300_TX_SIZE_MASK (15 << 26)
739# define R300_TX_SIZE_PROJECTED (1<<30)
740# define R300_TX_SIZE_TXPITCH_EN (1<<31)
725#define R300_TX_FORMAT_0 0x44C0 741#define R300_TX_FORMAT_0 0x44C0
726 /* The interpretation of the format word by Wladimir van der Laan */ 742 /* The interpretation of the format word by Wladimir van der Laan */
727 /* The X, Y, Z and W refer to the layout of the components. 743 /* The X, Y, Z and W refer to the layout of the components.
@@ -750,7 +766,8 @@ I am fairly certain that they are correct unless stated otherwise in comments.
750# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ 766# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */
751# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ 767# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */
752 /* 0x16 - some 16 bit green format.. ?? */ 768 /* 0x16 - some 16 bit green format.. ?? */
753# define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */ 769# define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */
770# define R300_TX_FORMAT_CUBIC_MAP (1 << 26)
754 771
755 /* gap */ 772 /* gap */
756 /* Floating point formats */ 773 /* Floating point formats */
@@ -800,18 +817,20 @@ I am fairly certain that they are correct unless stated otherwise in comments.
800 817
801# define R300_TX_FORMAT_YUV_MODE 0x00800000 818# define R300_TX_FORMAT_YUV_MODE 0x00800000
802 819
803#define R300_TX_PITCH_0 0x4500 820#define R300_TX_PITCH_0 0x4500 /* obvious missing in gap */
804#define R300_TX_OFFSET_0 0x4540 821#define R300_TX_OFFSET_0 0x4540
805/* BEGIN: Guess from R200 */ 822/* BEGIN: Guess from R200 */
806# define R300_TXO_ENDIAN_NO_SWAP (0 << 0) 823# define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
807# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0) 824# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
808# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0) 825# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
809# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0) 826# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
827# define R300_TXO_MACRO_TILE (1 << 2)
828# define R300_TXO_MICRO_TILE (1 << 3)
810# define R300_TXO_OFFSET_MASK 0xffffffe0 829# define R300_TXO_OFFSET_MASK 0xffffffe0
811# define R300_TXO_OFFSET_SHIFT 5 830# define R300_TXO_OFFSET_SHIFT 5
812/* END */ 831/* END */
813#define R300_TX_UNK4_0 0x4580 832#define R300_TX_CHROMA_KEY_0 0x4580 /* 32 bit chroma key */
814#define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 } 833#define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
815 834
816/* END */ 835/* END */
817 836
@@ -868,7 +887,9 @@ I am fairly certain that they are correct unless stated otherwise in comments.
868# define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12) 887# define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12)
869# define R300_PFS_NODE_TEX_END_SHIFT 17 888# define R300_PFS_NODE_TEX_END_SHIFT 17
870# define R300_PFS_NODE_TEX_END_MASK (31 << 17) 889# define R300_PFS_NODE_TEX_END_MASK (31 << 17)
871# define R300_PFS_NODE_LAST_NODE (1 << 22) 890/*# define R300_PFS_NODE_LAST_NODE (1 << 22) */
891# define R300_PFS_NODE_OUTPUT_COLOR (1 << 22)
892# define R300_PFS_NODE_OUTPUT_DEPTH (1 << 23)
872 893
873/* TEX 894/* TEX
874// As far as I can tell, texture instructions cannot write into output 895// As far as I can tell, texture instructions cannot write into output
@@ -887,6 +908,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
887 */ 908 */
888# define R300_FPITX_OPCODE_SHIFT 15 909# define R300_FPITX_OPCODE_SHIFT 15
889# define R300_FPITX_OP_TEX 1 910# define R300_FPITX_OP_TEX 1
911# define R300_FPITX_OP_KIL 2
890# define R300_FPITX_OP_TXP 3 912# define R300_FPITX_OP_TXP 3
891# define R300_FPITX_OP_TXB 4 913# define R300_FPITX_OP_TXB 4
892 914
@@ -962,9 +984,11 @@ I am fairly certain that they are correct unless stated otherwise in comments.
962# define R300_FPI1_SRC2C_CONST (1 << 17) 984# define R300_FPI1_SRC2C_CONST (1 << 17)
963# define R300_FPI1_DSTC_SHIFT 18 985# define R300_FPI1_DSTC_SHIFT 18
964# define R300_FPI1_DSTC_MASK (31 << 18) 986# define R300_FPI1_DSTC_MASK (31 << 18)
987# define R300_FPI1_DSTC_REG_MASK_SHIFT 23
965# define R300_FPI1_DSTC_REG_X (1 << 23) 988# define R300_FPI1_DSTC_REG_X (1 << 23)
966# define R300_FPI1_DSTC_REG_Y (1 << 24) 989# define R300_FPI1_DSTC_REG_Y (1 << 24)
967# define R300_FPI1_DSTC_REG_Z (1 << 25) 990# define R300_FPI1_DSTC_REG_Z (1 << 25)
991# define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT 26
968# define R300_FPI1_DSTC_OUTPUT_X (1 << 26) 992# define R300_FPI1_DSTC_OUTPUT_X (1 << 26)
969# define R300_FPI1_DSTC_OUTPUT_Y (1 << 27) 993# define R300_FPI1_DSTC_OUTPUT_Y (1 << 27)
970# define R300_FPI1_DSTC_OUTPUT_Z (1 << 28) 994# define R300_FPI1_DSTC_OUTPUT_Z (1 << 28)
@@ -983,6 +1007,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
983# define R300_FPI3_DSTA_MASK (31 << 18) 1007# define R300_FPI3_DSTA_MASK (31 << 18)
984# define R300_FPI3_DSTA_REG (1 << 23) 1008# define R300_FPI3_DSTA_REG (1 << 23)
985# define R300_FPI3_DSTA_OUTPUT (1 << 24) 1009# define R300_FPI3_DSTA_OUTPUT (1 << 24)
1010# define R300_FPI3_DSTA_DEPTH (1 << 27)
986 1011
987#define R300_PFS_INSTR0_0 0x48C0 1012#define R300_PFS_INSTR0_0 0x48C0
988# define R300_FPI0_ARGC_SRC0C_XYZ 0 1013# define R300_FPI0_ARGC_SRC0C_XYZ 0
@@ -1036,7 +1061,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
1036# define R300_FPI0_OUTC_FRC (9 << 23) 1061# define R300_FPI0_OUTC_FRC (9 << 23)
1037# define R300_FPI0_OUTC_REPL_ALPHA (10 << 23) 1062# define R300_FPI0_OUTC_REPL_ALPHA (10 << 23)
1038# define R300_FPI0_OUTC_SAT (1 << 30) 1063# define R300_FPI0_OUTC_SAT (1 << 30)
1039# define R300_FPI0_UNKNOWN_31 (1 << 31) 1064# define R300_FPI0_INSERT_NOP (1 << 31)
1040 1065
1041#define R300_PFS_INSTR2_0 0x49C0 1066#define R300_PFS_INSTR2_0 0x49C0
1042# define R300_FPI2_ARGA_SRC0C_X 0 1067# define R300_FPI2_ARGA_SRC0C_X 0
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 9bb8ae0c1c..7f949c9c96 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1118,14 +1118,20 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1118{ 1118{
1119 u32 ring_start, cur_read_ptr; 1119 u32 ring_start, cur_read_ptr;
1120 u32 tmp; 1120 u32 tmp;
1121 1121
1122 /* Initialize the memory controller */ 1122 /* Initialize the memory controller. With new memory map, the fb location
1123 RADEON_WRITE(RADEON_MC_FB_LOCATION, 1123 * is not changed, it should have been properly initialized already. Part
1124 ((dev_priv->gart_vm_start - 1) & 0xffff0000) 1124 * of the problem is that the code below is bogus, assuming the GART is
1125 | (dev_priv->fb_location >> 16)); 1125 * always appended to the fb which is not necessarily the case
1126 */
1127 if (!dev_priv->new_memmap)
1128 RADEON_WRITE(RADEON_MC_FB_LOCATION,
1129 ((dev_priv->gart_vm_start - 1) & 0xffff0000)
1130 | (dev_priv->fb_location >> 16));
1126 1131
1127#if __OS_HAS_AGP 1132#if __OS_HAS_AGP
1128 if (dev_priv->flags & CHIP_IS_AGP) { 1133 if (dev_priv->flags & CHIP_IS_AGP) {
1134 RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
1129 RADEON_WRITE(RADEON_MC_AGP_LOCATION, 1135 RADEON_WRITE(RADEON_MC_AGP_LOCATION,
1130 (((dev_priv->gart_vm_start - 1 + 1136 (((dev_priv->gart_vm_start - 1 +
1131 dev_priv->gart_size) & 0xffff0000) | 1137 dev_priv->gart_size) & 0xffff0000) |
@@ -1153,8 +1159,6 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1153 1159
1154#if __OS_HAS_AGP 1160#if __OS_HAS_AGP
1155 if (dev_priv->flags & CHIP_IS_AGP) { 1161 if (dev_priv->flags & CHIP_IS_AGP) {
1156 /* set RADEON_AGP_BASE here instead of relying on X from user space */
1157 RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
1158 RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, 1162 RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
1159 dev_priv->ring_rptr->offset 1163 dev_priv->ring_rptr->offset
1160 - dev->agp->base + dev_priv->gart_vm_start); 1164 - dev->agp->base + dev_priv->gart_vm_start);
@@ -1174,6 +1178,17 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1174 entry->handle + tmp_ofs); 1178 entry->handle + tmp_ofs);
1175 } 1179 }
1176 1180
1181 /* Set ring buffer size */
1182#ifdef __BIG_ENDIAN
1183 RADEON_WRITE(RADEON_CP_RB_CNTL,
1184 dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT);
1185#else
1186 RADEON_WRITE(RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw);
1187#endif
1188
1189 /* Start with assuming that writeback doesn't work */
1190 dev_priv->writeback_works = 0;
1191
1177 /* Initialize the scratch register pointer. This will cause 1192 /* Initialize the scratch register pointer. This will cause
1178 * the scratch register values to be written out to memory 1193 * the scratch register values to be written out to memory
1179 * whenever they are updated. 1194 * whenever they are updated.
@@ -1190,28 +1205,9 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1190 1205
1191 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); 1206 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
1192 1207
1193 /* Writeback doesn't seem to work everywhere, test it first */ 1208 /* Turn on bus mastering */
1194 DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0); 1209 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
1195 RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef); 1210 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
1196
1197 for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
1198 if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
1199 0xdeadbeef)
1200 break;
1201 DRM_UDELAY(1);
1202 }
1203
1204 if (tmp < dev_priv->usec_timeout) {
1205 dev_priv->writeback_works = 1;
1206 DRM_DEBUG("writeback test succeeded, tmp=%d\n", tmp);
1207 } else {
1208 dev_priv->writeback_works = 0;
1209 DRM_DEBUG("writeback test failed\n");
1210 }
1211 if (radeon_no_wb == 1) {
1212 dev_priv->writeback_works = 0;
1213 DRM_DEBUG("writeback forced off\n");
1214 }
1215 1211
1216 dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0; 1212 dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
1217 RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame); 1213 RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
@@ -1223,26 +1219,45 @@ static void radeon_cp_init_ring_buffer(drm_device_t * dev,
1223 dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0; 1219 dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
1224 RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear); 1220 RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
1225 1221
1226 /* Set ring buffer size */
1227#ifdef __BIG_ENDIAN
1228 RADEON_WRITE(RADEON_CP_RB_CNTL,
1229 dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT);
1230#else
1231 RADEON_WRITE(RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw);
1232#endif
1233
1234 radeon_do_wait_for_idle(dev_priv); 1222 radeon_do_wait_for_idle(dev_priv);
1235 1223
1236 /* Turn on bus mastering */
1237 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
1238 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
1239
1240 /* Sync everything up */ 1224 /* Sync everything up */
1241 RADEON_WRITE(RADEON_ISYNC_CNTL, 1225 RADEON_WRITE(RADEON_ISYNC_CNTL,
1242 (RADEON_ISYNC_ANY2D_IDLE3D | 1226 (RADEON_ISYNC_ANY2D_IDLE3D |
1243 RADEON_ISYNC_ANY3D_IDLE2D | 1227 RADEON_ISYNC_ANY3D_IDLE2D |
1244 RADEON_ISYNC_WAIT_IDLEGUI | 1228 RADEON_ISYNC_WAIT_IDLEGUI |
1245 RADEON_ISYNC_CPSCRATCH_IDLEGUI)); 1229 RADEON_ISYNC_CPSCRATCH_IDLEGUI));
1230
1231}
1232
1233static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
1234{
1235 u32 tmp;
1236
1237 /* Writeback doesn't seem to work everywhere, test it here and possibly
1238 * enable it if it appears to work
1239 */
1240 DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0);
1241 RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
1242
1243 for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
1244 if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
1245 0xdeadbeef)
1246 break;
1247 DRM_UDELAY(1);
1248 }
1249
1250 if (tmp < dev_priv->usec_timeout) {
1251 dev_priv->writeback_works = 1;
1252 DRM_INFO("writeback test succeeded in %d usecs\n", tmp);
1253 } else {
1254 dev_priv->writeback_works = 0;
1255 DRM_INFO("writeback test failed\n");
1256 }
1257 if (radeon_no_wb == 1) {
1258 dev_priv->writeback_works = 0;
1259 DRM_INFO("writeback forced off\n");
1260 }
1246} 1261}
1247 1262
1248/* Enable or disable PCI-E GART on the chip */ 1263/* Enable or disable PCI-E GART on the chip */
@@ -1317,6 +1332,14 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1317 1332
1318 DRM_DEBUG("\n"); 1333 DRM_DEBUG("\n");
1319 1334
1335 /* if we require new memory map but we don't have it fail */
1336 if ((dev_priv->flags & CHIP_NEW_MEMMAP) && !dev_priv->new_memmap)
1337 {
1338 DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX\n");
1339 radeon_do_cleanup_cp(dev);
1340 return DRM_ERR(EINVAL);
1341 }
1342
1320 if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP)) 1343 if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP))
1321 { 1344 {
1322 DRM_DEBUG("Forcing AGP card to PCI mode\n"); 1345 DRM_DEBUG("Forcing AGP card to PCI mode\n");
@@ -1496,6 +1519,9 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1496 1519
1497 dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION) 1520 dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION)
1498 & 0xffff) << 16; 1521 & 0xffff) << 16;
1522 dev_priv->fb_size =
1523 ((RADEON_READ(RADEON_MC_FB_LOCATION) & 0xffff0000u) + 0x10000)
1524 - dev_priv->fb_location;
1499 1525
1500 dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) | 1526 dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
1501 ((dev_priv->front_offset 1527 ((dev_priv->front_offset
@@ -1510,8 +1536,46 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1510 + dev_priv->fb_location) >> 10)); 1536 + dev_priv->fb_location) >> 10));
1511 1537
1512 dev_priv->gart_size = init->gart_size; 1538 dev_priv->gart_size = init->gart_size;
1513 dev_priv->gart_vm_start = dev_priv->fb_location 1539
1514 + RADEON_READ(RADEON_CONFIG_APER_SIZE); 1540 /* New let's set the memory map ... */
1541 if (dev_priv->new_memmap) {
1542 u32 base = 0;
1543
1544 DRM_INFO("Setting GART location based on new memory map\n");
1545
1546 /* If using AGP, try to locate the AGP aperture at the same
1547 * location in the card and on the bus, though we have to
1548 * align it down.
1549 */
1550#if __OS_HAS_AGP
1551 if (dev_priv->flags & CHIP_IS_AGP) {
1552 base = dev->agp->base;
1553 /* Check if valid */
1554 if ((base + dev_priv->gart_size) > dev_priv->fb_location &&
1555 base < (dev_priv->fb_location + dev_priv->fb_size)) {
1556 DRM_INFO("Can't use AGP base @0x%08lx, won't fit\n",
1557 dev->agp->base);
1558 base = 0;
1559 }
1560 }
1561#endif
1562 /* If not or if AGP is at 0 (Macs), try to put it elsewhere */
1563 if (base == 0) {
1564 base = dev_priv->fb_location + dev_priv->fb_size;
1565 if (((base + dev_priv->gart_size) & 0xfffffffful)
1566 < base)
1567 base = dev_priv->fb_location
1568 - dev_priv->gart_size;
1569 }
1570 dev_priv->gart_vm_start = base & 0xffc00000u;
1571 if (dev_priv->gart_vm_start != base)
1572 DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n",
1573 base, dev_priv->gart_vm_start);
1574 } else {
1575 DRM_INFO("Setting GART location based on old memory map\n");
1576 dev_priv->gart_vm_start = dev_priv->fb_location +
1577 RADEON_READ(RADEON_CONFIG_APER_SIZE);
1578 }
1515 1579
1516#if __OS_HAS_AGP 1580#if __OS_HAS_AGP
1517 if (dev_priv->flags & CHIP_IS_AGP) 1581 if (dev_priv->flags & CHIP_IS_AGP)
@@ -1596,6 +1660,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1596 dev_priv->last_buf = 0; 1660 dev_priv->last_buf = 0;
1597 1661
1598 radeon_do_engine_reset(dev); 1662 radeon_do_engine_reset(dev);
1663 radeon_test_writeback(dev_priv);
1599 1664
1600 return 0; 1665 return 0;
1601} 1666}
diff --git a/drivers/char/drm/radeon_drm.h b/drivers/char/drm/radeon_drm.h
index 9c177a6b2a..c8e279e89c 100644
--- a/drivers/char/drm/radeon_drm.h
+++ b/drivers/char/drm/radeon_drm.h
@@ -222,6 +222,7 @@ typedef union {
222# define R300_WAIT_3D 0x2 222# define R300_WAIT_3D 0x2
223# define R300_WAIT_2D_CLEAN 0x3 223# define R300_WAIT_2D_CLEAN 0x3
224# define R300_WAIT_3D_CLEAN 0x4 224# define R300_WAIT_3D_CLEAN 0x4
225#define R300_CMD_SCRATCH 8
225 226
226typedef union { 227typedef union {
227 unsigned int u; 228 unsigned int u;
@@ -247,6 +248,9 @@ typedef union {
247 struct { 248 struct {
248 unsigned char cmd_type, flags, pad0, pad1; 249 unsigned char cmd_type, flags, pad0, pad1;
249 } wait; 250 } wait;
251 struct {
252 unsigned char cmd_type, reg, n_bufs, flags;
253 } scratch;
250} drm_r300_cmd_header_t; 254} drm_r300_cmd_header_t;
251 255
252#define RADEON_FRONT 0x1 256#define RADEON_FRONT 0x1
@@ -697,6 +701,7 @@ typedef struct drm_radeon_setparam {
697#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ 701#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */
698#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */ 702#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */
699#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */ 703#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */
704#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */
700 705
701/* 1.14: Clients can allocate/free a surface 706/* 1.14: Clients can allocate/free a surface
702 */ 707 */
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index 1f7d2ab8c4..78345cee8f 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -38,7 +38,7 @@
38 38
39#define DRIVER_NAME "radeon" 39#define DRIVER_NAME "radeon"
40#define DRIVER_DESC "ATI Radeon" 40#define DRIVER_DESC "ATI Radeon"
41#define DRIVER_DATE "20051229" 41#define DRIVER_DATE "20060225"
42 42
43/* Interface history: 43/* Interface history:
44 * 44 *
@@ -91,9 +91,11 @@
91 * 1.20- Add support for r300 texrect 91 * 1.20- Add support for r300 texrect
92 * 1.21- Add support for card type getparam 92 * 1.21- Add support for card type getparam
93 * 1.22- Add support for texture cache flushes (R300_TX_CNTL) 93 * 1.22- Add support for texture cache flushes (R300_TX_CNTL)
94 * 1.23- Add new radeon memory map work from benh
95 * 1.24- Add general-purpose packet for manipulating scratch registers (r300)
94 */ 96 */
95#define DRIVER_MAJOR 1 97#define DRIVER_MAJOR 1
96#define DRIVER_MINOR 22 98#define DRIVER_MINOR 24
97#define DRIVER_PATCHLEVEL 0 99#define DRIVER_PATCHLEVEL 0
98 100
99/* 101/*
@@ -101,20 +103,21 @@
101 */ 103 */
102enum radeon_family { 104enum radeon_family {
103 CHIP_R100, 105 CHIP_R100,
104 CHIP_RS100,
105 CHIP_RV100, 106 CHIP_RV100,
107 CHIP_RS100,
106 CHIP_RV200, 108 CHIP_RV200,
107 CHIP_R200,
108 CHIP_RS200, 109 CHIP_RS200,
109 CHIP_R250, 110 CHIP_R200,
110 CHIP_RS250,
111 CHIP_RV250, 111 CHIP_RV250,
112 CHIP_RS300,
112 CHIP_RV280, 113 CHIP_RV280,
113 CHIP_R300, 114 CHIP_R300,
114 CHIP_RS300,
115 CHIP_R350, 115 CHIP_R350,
116 CHIP_RV350, 116 CHIP_RV350,
117 CHIP_RV380,
117 CHIP_R420, 118 CHIP_R420,
119 CHIP_RV410,
120 CHIP_RS400,
118 CHIP_LAST, 121 CHIP_LAST,
119}; 122};
120 123
@@ -136,9 +139,11 @@ enum radeon_chip_flags {
136 CHIP_IS_AGP = 0x00080000UL, 139 CHIP_IS_AGP = 0x00080000UL,
137 CHIP_HAS_HIERZ = 0x00100000UL, 140 CHIP_HAS_HIERZ = 0x00100000UL,
138 CHIP_IS_PCIE = 0x00200000UL, 141 CHIP_IS_PCIE = 0x00200000UL,
142 CHIP_NEW_MEMMAP = 0x00400000UL,
139}; 143};
140 144
141#define GET_RING_HEAD(dev_priv) DRM_READ32( (dev_priv)->ring_rptr, 0 ) 145#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
146 DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
142#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) ) 147#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
143 148
144typedef struct drm_radeon_freelist { 149typedef struct drm_radeon_freelist {
@@ -199,6 +204,8 @@ typedef struct drm_radeon_private {
199 drm_radeon_sarea_t *sarea_priv; 204 drm_radeon_sarea_t *sarea_priv;
200 205
201 u32 fb_location; 206 u32 fb_location;
207 u32 fb_size;
208 int new_memmap;
202 209
203 int gart_size; 210 int gart_size;
204 u32 gart_vm_start; 211 u32 gart_vm_start;
@@ -272,6 +279,8 @@ typedef struct drm_radeon_private {
272 unsigned long pcigart_offset; 279 unsigned long pcigart_offset;
273 drm_ati_pcigart_info gart_info; 280 drm_ati_pcigart_info gart_info;
274 281
282 u32 scratch_ages[5];
283
275 /* starting from here on, data is preserved accross an open */ 284 /* starting from here on, data is preserved accross an open */
276 uint32_t flags; /* see radeon_chip_flags */ 285 uint32_t flags; /* see radeon_chip_flags */
277} drm_radeon_private_t; 286} drm_radeon_private_t;
diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 7bc27516d4..c5b8f774a5 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -45,22 +45,53 @@ static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
45 u32 off = *offset; 45 u32 off = *offset;
46 struct drm_radeon_driver_file_fields *radeon_priv; 46 struct drm_radeon_driver_file_fields *radeon_priv;
47 47
48 if (off >= dev_priv->fb_location && 48 /* Hrm ... the story of the offset ... So this function converts
49 off < (dev_priv->gart_vm_start + dev_priv->gart_size)) 49 * the various ideas of what userland clients might have for an
50 return 0; 50 * offset in the card address space into an offset into the card
51 51 * address space :) So with a sane client, it should just keep
52 radeon_priv = filp_priv->driver_priv; 52 * the value intact and just do some boundary checking. However,
53 off += radeon_priv->radeon_fb_delta; 53 * not all clients are sane. Some older clients pass us 0 based
54 * offsets relative to the start of the framebuffer and some may
55 * assume the AGP aperture it appended to the framebuffer, so we
56 * try to detect those cases and fix them up.
57 *
58 * Note: It might be a good idea here to make sure the offset lands
59 * in some "allowed" area to protect things like the PCIE GART...
60 */
54 61
55 DRM_DEBUG("offset fixed up to 0x%x\n", off); 62 /* First, the best case, the offset already lands in either the
63 * framebuffer or the GART mapped space
64 */
65 if ((off >= dev_priv->fb_location &&
66 off < (dev_priv->fb_location + dev_priv->fb_size)) ||
67 (off >= dev_priv->gart_vm_start &&
68 off < (dev_priv->gart_vm_start + dev_priv->gart_size)))
69 return 0;
56 70
57 if (off < dev_priv->fb_location || 71 /* Ok, that didn't happen... now check if we have a zero based
58 off >= (dev_priv->gart_vm_start + dev_priv->gart_size)) 72 * offset that fits in the framebuffer + gart space, apply the
59 return DRM_ERR(EINVAL); 73 * magic offset we get from SETPARAM or calculated from fb_location
74 */
75 if (off < (dev_priv->fb_size + dev_priv->gart_size)) {
76 radeon_priv = filp_priv->driver_priv;
77 off += radeon_priv->radeon_fb_delta;
78 }
60 79
61 *offset = off; 80 /* Finally, assume we aimed at a GART offset if beyond the fb */
81 if (off > (dev_priv->fb_location + dev_priv->fb_size))
82 off = off - (dev_priv->fb_location + dev_priv->fb_size) +
83 dev_priv->gart_vm_start;
62 84
63 return 0; 85 /* Now recheck and fail if out of bounds */
86 if ((off >= dev_priv->fb_location &&
87 off < (dev_priv->fb_location + dev_priv->fb_size)) ||
88 (off >= dev_priv->gart_vm_start &&
89 off < (dev_priv->gart_vm_start + dev_priv->gart_size))) {
90 DRM_DEBUG("offset fixed up to 0x%x\n", off);
91 *offset = off;
92 return 0;
93 }
94 return DRM_ERR(EINVAL);
64} 95}
65 96
66static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t * 97static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
@@ -1939,11 +1970,6 @@ static int radeon_surface_alloc(DRM_IOCTL_ARGS)
1939 drm_radeon_private_t *dev_priv = dev->dev_private; 1970 drm_radeon_private_t *dev_priv = dev->dev_private;
1940 drm_radeon_surface_alloc_t alloc; 1971 drm_radeon_surface_alloc_t alloc;
1941 1972
1942 if (!dev_priv) {
1943 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1944 return DRM_ERR(EINVAL);
1945 }
1946
1947 DRM_COPY_FROM_USER_IOCTL(alloc, 1973 DRM_COPY_FROM_USER_IOCTL(alloc,
1948 (drm_radeon_surface_alloc_t __user *) data, 1974 (drm_radeon_surface_alloc_t __user *) data,
1949 sizeof(alloc)); 1975 sizeof(alloc));
@@ -1960,12 +1986,7 @@ static int radeon_surface_free(DRM_IOCTL_ARGS)
1960 drm_radeon_private_t *dev_priv = dev->dev_private; 1986 drm_radeon_private_t *dev_priv = dev->dev_private;
1961 drm_radeon_surface_free_t memfree; 1987 drm_radeon_surface_free_t memfree;
1962 1988
1963 if (!dev_priv) { 1989 DRM_COPY_FROM_USER_IOCTL(memfree, (drm_radeon_surface_free_t __user *) data,
1964 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
1965 return DRM_ERR(EINVAL);
1966 }
1967
1968 DRM_COPY_FROM_USER_IOCTL(memfree, (drm_radeon_mem_free_t __user *) data,
1969 sizeof(memfree)); 1990 sizeof(memfree));
1970 1991
1971 if (free_surface(filp, dev_priv, memfree.address)) 1992 if (free_surface(filp, dev_priv, memfree.address))
@@ -2100,11 +2121,6 @@ static int radeon_cp_vertex(DRM_IOCTL_ARGS)
2100 2121
2101 LOCK_TEST_WITH_RETURN(dev, filp); 2122 LOCK_TEST_WITH_RETURN(dev, filp);
2102 2123
2103 if (!dev_priv) {
2104 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2105 return DRM_ERR(EINVAL);
2106 }
2107
2108 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp); 2124 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
2109 2125
2110 DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex_t __user *) data, 2126 DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex_t __user *) data,
@@ -2189,11 +2205,6 @@ static int radeon_cp_indices(DRM_IOCTL_ARGS)
2189 2205
2190 LOCK_TEST_WITH_RETURN(dev, filp); 2206 LOCK_TEST_WITH_RETURN(dev, filp);
2191 2207
2192 if (!dev_priv) {
2193 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2194 return DRM_ERR(EINVAL);
2195 }
2196
2197 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp); 2208 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
2198 2209
2199 DRM_COPY_FROM_USER_IOCTL(elts, (drm_radeon_indices_t __user *) data, 2210 DRM_COPY_FROM_USER_IOCTL(elts, (drm_radeon_indices_t __user *) data,
@@ -2340,11 +2351,6 @@ static int radeon_cp_indirect(DRM_IOCTL_ARGS)
2340 2351
2341 LOCK_TEST_WITH_RETURN(dev, filp); 2352 LOCK_TEST_WITH_RETURN(dev, filp);
2342 2353
2343 if (!dev_priv) {
2344 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2345 return DRM_ERR(EINVAL);
2346 }
2347
2348 DRM_COPY_FROM_USER_IOCTL(indirect, 2354 DRM_COPY_FROM_USER_IOCTL(indirect,
2349 (drm_radeon_indirect_t __user *) data, 2355 (drm_radeon_indirect_t __user *) data,
2350 sizeof(indirect)); 2356 sizeof(indirect));
@@ -2417,11 +2423,6 @@ static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
2417 2423
2418 LOCK_TEST_WITH_RETURN(dev, filp); 2424 LOCK_TEST_WITH_RETURN(dev, filp);
2419 2425
2420 if (!dev_priv) {
2421 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2422 return DRM_ERR(EINVAL);
2423 }
2424
2425 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp); 2426 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
2426 2427
2427 DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex2_t __user *) data, 2428 DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex2_t __user *) data,
@@ -2738,11 +2739,6 @@ static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
2738 2739
2739 LOCK_TEST_WITH_RETURN(dev, filp); 2740 LOCK_TEST_WITH_RETURN(dev, filp);
2740 2741
2741 if (!dev_priv) {
2742 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2743 return DRM_ERR(EINVAL);
2744 }
2745
2746 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp); 2742 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
2747 2743
2748 DRM_COPY_FROM_USER_IOCTL(cmdbuf, 2744 DRM_COPY_FROM_USER_IOCTL(cmdbuf,
@@ -2897,11 +2893,6 @@ static int radeon_cp_getparam(DRM_IOCTL_ARGS)
2897 drm_radeon_getparam_t param; 2893 drm_radeon_getparam_t param;
2898 int value; 2894 int value;
2899 2895
2900 if (!dev_priv) {
2901 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2902 return DRM_ERR(EINVAL);
2903 }
2904
2905 DRM_COPY_FROM_USER_IOCTL(param, (drm_radeon_getparam_t __user *) data, 2896 DRM_COPY_FROM_USER_IOCTL(param, (drm_radeon_getparam_t __user *) data,
2906 sizeof(param)); 2897 sizeof(param));
2907 2898
@@ -2981,11 +2972,6 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS)
2981 drm_radeon_setparam_t sp; 2972 drm_radeon_setparam_t sp;
2982 struct drm_radeon_driver_file_fields *radeon_priv; 2973 struct drm_radeon_driver_file_fields *radeon_priv;
2983 2974
2984 if (!dev_priv) {
2985 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
2986 return DRM_ERR(EINVAL);
2987 }
2988
2989 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp); 2975 DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
2990 2976
2991 DRM_COPY_FROM_USER_IOCTL(sp, (drm_radeon_setparam_t __user *) data, 2977 DRM_COPY_FROM_USER_IOCTL(sp, (drm_radeon_setparam_t __user *) data,
@@ -3012,6 +2998,9 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS)
3012 case RADEON_SETPARAM_PCIGART_LOCATION: 2998 case RADEON_SETPARAM_PCIGART_LOCATION:
3013 dev_priv->pcigart_offset = sp.value; 2999 dev_priv->pcigart_offset = sp.value;
3014 break; 3000 break;
3001 case RADEON_SETPARAM_NEW_MEMMAP:
3002 dev_priv->new_memmap = sp.value;
3003 break;
3015 default: 3004 default:
3016 DRM_DEBUG("Invalid parameter %d\n", sp.param); 3005 DRM_DEBUG("Invalid parameter %d\n", sp.param);
3017 return DRM_ERR(EINVAL); 3006 return DRM_ERR(EINVAL);
diff --git a/drivers/char/drm/sis_mm.c b/drivers/char/drm/sis_mm.c
index 6774d2fe34..5e9936bc30 100644
--- a/drivers/char/drm/sis_mm.c
+++ b/drivers/char/drm/sis_mm.c
@@ -110,7 +110,7 @@ static int sis_fb_alloc(DRM_IOCTL_ARGS)
110 110
111 DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb)); 111 DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb));
112 112
113 DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb.size, req.offset); 113 DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size, req.offset);
114 114
115 return retval; 115 return retval;
116} 116}
diff --git a/drivers/char/ipmi/ipmi_devintf.c b/drivers/char/ipmi/ipmi_devintf.c
index 932feedda2..e1c9537498 100644
--- a/drivers/char/ipmi/ipmi_devintf.c
+++ b/drivers/char/ipmi/ipmi_devintf.c
@@ -42,7 +42,7 @@
42#include <linux/slab.h> 42#include <linux/slab.h>
43#include <linux/devfs_fs_kernel.h> 43#include <linux/devfs_fs_kernel.h>
44#include <linux/ipmi.h> 44#include <linux/ipmi.h>
45#include <asm/semaphore.h> 45#include <linux/mutex.h>
46#include <linux/init.h> 46#include <linux/init.h>
47#include <linux/device.h> 47#include <linux/device.h>
48#include <linux/compat.h> 48#include <linux/compat.h>
@@ -55,7 +55,7 @@ struct ipmi_file_private
55 struct file *file; 55 struct file *file;
56 struct fasync_struct *fasync_queue; 56 struct fasync_struct *fasync_queue;
57 wait_queue_head_t wait; 57 wait_queue_head_t wait;
58 struct semaphore recv_sem; 58 struct mutex recv_mutex;
59 int default_retries; 59 int default_retries;
60 unsigned int default_retry_time_ms; 60 unsigned int default_retry_time_ms;
61}; 61};
@@ -141,7 +141,7 @@ static int ipmi_open(struct inode *inode, struct file *file)
141 INIT_LIST_HEAD(&(priv->recv_msgs)); 141 INIT_LIST_HEAD(&(priv->recv_msgs));
142 init_waitqueue_head(&priv->wait); 142 init_waitqueue_head(&priv->wait);
143 priv->fasync_queue = NULL; 143 priv->fasync_queue = NULL;
144 sema_init(&(priv->recv_sem), 1); 144 mutex_init(&priv->recv_mutex);
145 145
146 /* Use the low-level defaults. */ 146 /* Use the low-level defaults. */
147 priv->default_retries = -1; 147 priv->default_retries = -1;
@@ -285,15 +285,15 @@ static int ipmi_ioctl(struct inode *inode,
285 break; 285 break;
286 } 286 }
287 287
288 /* We claim a semaphore because we don't want two 288 /* We claim a mutex because we don't want two
289 users getting something from the queue at a time. 289 users getting something from the queue at a time.
290 Since we have to release the spinlock before we can 290 Since we have to release the spinlock before we can
291 copy the data to the user, it's possible another 291 copy the data to the user, it's possible another
292 user will grab something from the queue, too. Then 292 user will grab something from the queue, too. Then
293 the messages might get out of order if something 293 the messages might get out of order if something
294 fails and the message gets put back onto the 294 fails and the message gets put back onto the
295 queue. This semaphore prevents that problem. */ 295 queue. This mutex prevents that problem. */
296 down(&(priv->recv_sem)); 296 mutex_lock(&priv->recv_mutex);
297 297
298 /* Grab the message off the list. */ 298 /* Grab the message off the list. */
299 spin_lock_irqsave(&(priv->recv_msg_lock), flags); 299 spin_lock_irqsave(&(priv->recv_msg_lock), flags);
@@ -352,7 +352,7 @@ static int ipmi_ioctl(struct inode *inode,
352 goto recv_putback_on_err; 352 goto recv_putback_on_err;
353 } 353 }
354 354
355 up(&(priv->recv_sem)); 355 mutex_unlock(&priv->recv_mutex);
356 ipmi_free_recv_msg(msg); 356 ipmi_free_recv_msg(msg);
357 break; 357 break;
358 358
@@ -362,11 +362,11 @@ static int ipmi_ioctl(struct inode *inode,
362 spin_lock_irqsave(&(priv->recv_msg_lock), flags); 362 spin_lock_irqsave(&(priv->recv_msg_lock), flags);
363 list_add(entry, &(priv->recv_msgs)); 363 list_add(entry, &(priv->recv_msgs));
364 spin_unlock_irqrestore(&(priv->recv_msg_lock), flags); 364 spin_unlock_irqrestore(&(priv->recv_msg_lock), flags);
365 up(&(priv->recv_sem)); 365 mutex_unlock(&priv->recv_mutex);
366 break; 366 break;
367 367
368 recv_err: 368 recv_err:
369 up(&(priv->recv_sem)); 369 mutex_unlock(&priv->recv_mutex);
370 break; 370 break;
371 } 371 }
372 372
diff --git a/drivers/char/ipmi/ipmi_kcs_sm.c b/drivers/char/ipmi/ipmi_kcs_sm.c
index da1554194d..2062675f9e 100644
--- a/drivers/char/ipmi/ipmi_kcs_sm.c
+++ b/drivers/char/ipmi/ipmi_kcs_sm.c
@@ -227,7 +227,7 @@ static inline int check_ibf(struct si_sm_data *kcs, unsigned char status,
227static inline int check_obf(struct si_sm_data *kcs, unsigned char status, 227static inline int check_obf(struct si_sm_data *kcs, unsigned char status,
228 long time) 228 long time)
229{ 229{
230 if (! GET_STATUS_OBF(status)) { 230 if (!GET_STATUS_OBF(status)) {
231 kcs->obf_timeout -= time; 231 kcs->obf_timeout -= time;
232 if (kcs->obf_timeout < 0) { 232 if (kcs->obf_timeout < 0) {
233 start_error_recovery(kcs, "OBF not ready in time"); 233 start_error_recovery(kcs, "OBF not ready in time");
@@ -407,7 +407,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time)
407 } 407 }
408 408
409 if (state == KCS_READ_STATE) { 409 if (state == KCS_READ_STATE) {
410 if (! check_obf(kcs, status, time)) 410 if (!check_obf(kcs, status, time))
411 return SI_SM_CALL_WITH_DELAY; 411 return SI_SM_CALL_WITH_DELAY;
412 read_next_byte(kcs); 412 read_next_byte(kcs);
413 } else { 413 } else {
@@ -447,7 +447,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time)
447 "Not in read state for error2"); 447 "Not in read state for error2");
448 break; 448 break;
449 } 449 }
450 if (! check_obf(kcs, status, time)) 450 if (!check_obf(kcs, status, time))
451 return SI_SM_CALL_WITH_DELAY; 451 return SI_SM_CALL_WITH_DELAY;
452 452
453 clear_obf(kcs, status); 453 clear_obf(kcs, status);
@@ -462,7 +462,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time)
462 break; 462 break;
463 } 463 }
464 464
465 if (! check_obf(kcs, status, time)) 465 if (!check_obf(kcs, status, time))
466 return SI_SM_CALL_WITH_DELAY; 466 return SI_SM_CALL_WITH_DELAY;
467 467
468 clear_obf(kcs, status); 468 clear_obf(kcs, status);
diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c
index 40eb005b9d..0ded046d5a 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -38,6 +38,7 @@
38#include <linux/sched.h> 38#include <linux/sched.h>
39#include <linux/poll.h> 39#include <linux/poll.h>
40#include <linux/spinlock.h> 40#include <linux/spinlock.h>
41#include <linux/mutex.h>
41#include <linux/slab.h> 42#include <linux/slab.h>
42#include <linux/ipmi.h> 43#include <linux/ipmi.h>
43#include <linux/ipmi_smi.h> 44#include <linux/ipmi_smi.h>
@@ -234,7 +235,7 @@ struct ipmi_smi
234 235
235 /* The list of command receivers that are registered for commands 236 /* The list of command receivers that are registered for commands
236 on this interface. */ 237 on this interface. */
237 struct semaphore cmd_rcvrs_lock; 238 struct mutex cmd_rcvrs_mutex;
238 struct list_head cmd_rcvrs; 239 struct list_head cmd_rcvrs;
239 240
240 /* Events that were queues because no one was there to receive 241 /* Events that were queues because no one was there to receive
@@ -387,10 +388,10 @@ static void clean_up_interface_data(ipmi_smi_t intf)
387 388
388 /* Wholesale remove all the entries from the list in the 389 /* Wholesale remove all the entries from the list in the
389 * interface and wait for RCU to know that none are in use. */ 390 * interface and wait for RCU to know that none are in use. */
390 down(&intf->cmd_rcvrs_lock); 391 mutex_lock(&intf->cmd_rcvrs_mutex);
391 list_add_rcu(&list, &intf->cmd_rcvrs); 392 list_add_rcu(&list, &intf->cmd_rcvrs);
392 list_del_rcu(&intf->cmd_rcvrs); 393 list_del_rcu(&intf->cmd_rcvrs);
393 up(&intf->cmd_rcvrs_lock); 394 mutex_unlock(&intf->cmd_rcvrs_mutex);
394 synchronize_rcu(); 395 synchronize_rcu();
395 396
396 list_for_each_entry_safe(rcvr, rcvr2, &list, link) 397 list_for_each_entry_safe(rcvr, rcvr2, &list, link)
@@ -557,7 +558,7 @@ unsigned int ipmi_addr_length(int addr_type)
557 558
558static void deliver_response(struct ipmi_recv_msg *msg) 559static void deliver_response(struct ipmi_recv_msg *msg)
559{ 560{
560 if (! msg->user) { 561 if (!msg->user) {
561 ipmi_smi_t intf = msg->user_msg_data; 562 ipmi_smi_t intf = msg->user_msg_data;
562 unsigned long flags; 563 unsigned long flags;
563 564
@@ -598,11 +599,11 @@ static int intf_next_seq(ipmi_smi_t intf,
598 (i+1)%IPMI_IPMB_NUM_SEQ != intf->curr_seq; 599 (i+1)%IPMI_IPMB_NUM_SEQ != intf->curr_seq;
599 i = (i+1)%IPMI_IPMB_NUM_SEQ) 600 i = (i+1)%IPMI_IPMB_NUM_SEQ)
600 { 601 {
601 if (! intf->seq_table[i].inuse) 602 if (!intf->seq_table[i].inuse)
602 break; 603 break;
603 } 604 }
604 605
605 if (! intf->seq_table[i].inuse) { 606 if (!intf->seq_table[i].inuse) {
606 intf->seq_table[i].recv_msg = recv_msg; 607 intf->seq_table[i].recv_msg = recv_msg;
607 608
608 /* Start with the maximum timeout, when the send response 609 /* Start with the maximum timeout, when the send response
@@ -763,7 +764,7 @@ int ipmi_create_user(unsigned int if_num,
763 } 764 }
764 765
765 new_user = kmalloc(sizeof(*new_user), GFP_KERNEL); 766 new_user = kmalloc(sizeof(*new_user), GFP_KERNEL);
766 if (! new_user) 767 if (!new_user)
767 return -ENOMEM; 768 return -ENOMEM;
768 769
769 spin_lock_irqsave(&interfaces_lock, flags); 770 spin_lock_irqsave(&interfaces_lock, flags);
@@ -819,14 +820,13 @@ static void free_user(struct kref *ref)
819 820
820int ipmi_destroy_user(ipmi_user_t user) 821int ipmi_destroy_user(ipmi_user_t user)
821{ 822{
822 int rv = -ENODEV;
823 ipmi_smi_t intf = user->intf; 823 ipmi_smi_t intf = user->intf;
824 int i; 824 int i;
825 unsigned long flags; 825 unsigned long flags;
826 struct cmd_rcvr *rcvr; 826 struct cmd_rcvr *rcvr;
827 struct cmd_rcvr *rcvrs = NULL; 827 struct cmd_rcvr *rcvrs = NULL;
828 828
829 user->valid = 1; 829 user->valid = 0;
830 830
831 /* Remove the user from the interface's sequence table. */ 831 /* Remove the user from the interface's sequence table. */
832 spin_lock_irqsave(&intf->seq_lock, flags); 832 spin_lock_irqsave(&intf->seq_lock, flags);
@@ -847,7 +847,7 @@ int ipmi_destroy_user(ipmi_user_t user)
847 * since other things may be using it till we do 847 * since other things may be using it till we do
848 * synchronize_rcu()) then free everything in that list. 848 * synchronize_rcu()) then free everything in that list.
849 */ 849 */
850 down(&intf->cmd_rcvrs_lock); 850 mutex_lock(&intf->cmd_rcvrs_mutex);
851 list_for_each_entry_rcu(rcvr, &intf->cmd_rcvrs, link) { 851 list_for_each_entry_rcu(rcvr, &intf->cmd_rcvrs, link) {
852 if (rcvr->user == user) { 852 if (rcvr->user == user) {
853 list_del_rcu(&rcvr->link); 853 list_del_rcu(&rcvr->link);
@@ -855,7 +855,7 @@ int ipmi_destroy_user(ipmi_user_t user)
855 rcvrs = rcvr; 855 rcvrs = rcvr;
856 } 856 }
857 } 857 }
858 up(&intf->cmd_rcvrs_lock); 858 mutex_unlock(&intf->cmd_rcvrs_mutex);
859 synchronize_rcu(); 859 synchronize_rcu();
860 while (rcvrs) { 860 while (rcvrs) {
861 rcvr = rcvrs; 861 rcvr = rcvrs;
@@ -871,7 +871,7 @@ int ipmi_destroy_user(ipmi_user_t user)
871 871
872 kref_put(&user->refcount, free_user); 872 kref_put(&user->refcount, free_user);
873 873
874 return rv; 874 return 0;
875} 875}
876 876
877void ipmi_get_version(ipmi_user_t user, 877void ipmi_get_version(ipmi_user_t user,
@@ -936,7 +936,8 @@ int ipmi_set_gets_events(ipmi_user_t user, int val)
936 936
937 if (val) { 937 if (val) {
938 /* Deliver any queued events. */ 938 /* Deliver any queued events. */
939 list_for_each_entry_safe(msg, msg2, &intf->waiting_events, link) { 939 list_for_each_entry_safe(msg, msg2, &intf->waiting_events,
940 link) {
940 list_del(&msg->link); 941 list_del(&msg->link);
941 list_add_tail(&msg->link, &msgs); 942 list_add_tail(&msg->link, &msgs);
942 } 943 }
@@ -978,13 +979,13 @@ int ipmi_register_for_cmd(ipmi_user_t user,
978 979
979 980
980 rcvr = kmalloc(sizeof(*rcvr), GFP_KERNEL); 981 rcvr = kmalloc(sizeof(*rcvr), GFP_KERNEL);
981 if (! rcvr) 982 if (!rcvr)
982 return -ENOMEM; 983 return -ENOMEM;
983 rcvr->cmd = cmd; 984 rcvr->cmd = cmd;
984 rcvr->netfn = netfn; 985 rcvr->netfn = netfn;
985 rcvr->user = user; 986 rcvr->user = user;
986 987
987 down(&intf->cmd_rcvrs_lock); 988 mutex_lock(&intf->cmd_rcvrs_mutex);
988 /* Make sure the command/netfn is not already registered. */ 989 /* Make sure the command/netfn is not already registered. */
989 entry = find_cmd_rcvr(intf, netfn, cmd); 990 entry = find_cmd_rcvr(intf, netfn, cmd);
990 if (entry) { 991 if (entry) {
@@ -995,7 +996,7 @@ int ipmi_register_for_cmd(ipmi_user_t user,
995 list_add_rcu(&rcvr->link, &intf->cmd_rcvrs); 996 list_add_rcu(&rcvr->link, &intf->cmd_rcvrs);
996 997
997 out_unlock: 998 out_unlock:
998 up(&intf->cmd_rcvrs_lock); 999 mutex_unlock(&intf->cmd_rcvrs_mutex);
999 if (rv) 1000 if (rv)
1000 kfree(rcvr); 1001 kfree(rcvr);
1001 1002
@@ -1009,17 +1010,17 @@ int ipmi_unregister_for_cmd(ipmi_user_t user,
1009 ipmi_smi_t intf = user->intf; 1010 ipmi_smi_t intf = user->intf;
1010 struct cmd_rcvr *rcvr; 1011 struct cmd_rcvr *rcvr;
1011 1012
1012 down(&intf->cmd_rcvrs_lock); 1013 mutex_lock(&intf->cmd_rcvrs_mutex);
1013 /* Make sure the command/netfn is not already registered. */ 1014 /* Make sure the command/netfn is not already registered. */
1014 rcvr = find_cmd_rcvr(intf, netfn, cmd); 1015 rcvr = find_cmd_rcvr(intf, netfn, cmd);
1015 if ((rcvr) && (rcvr->user == user)) { 1016 if ((rcvr) && (rcvr->user == user)) {
1016 list_del_rcu(&rcvr->link); 1017 list_del_rcu(&rcvr->link);
1017 up(&intf->cmd_rcvrs_lock); 1018 mutex_unlock(&intf->cmd_rcvrs_mutex);
1018 synchronize_rcu(); 1019 synchronize_rcu();
1019 kfree(rcvr); 1020 kfree(rcvr);
1020 return 0; 1021 return 0;
1021 } else { 1022 } else {
1022 up(&intf->cmd_rcvrs_lock); 1023 mutex_unlock(&intf->cmd_rcvrs_mutex);
1023 return -ENOENT; 1024 return -ENOENT;
1024 } 1025 }
1025} 1026}
@@ -1514,7 +1515,7 @@ int ipmi_request_settime(ipmi_user_t user,
1514 unsigned char saddr, lun; 1515 unsigned char saddr, lun;
1515 int rv; 1516 int rv;
1516 1517
1517 if (! user) 1518 if (!user)
1518 return -EINVAL; 1519 return -EINVAL;
1519 rv = check_addr(user->intf, addr, &saddr, &lun); 1520 rv = check_addr(user->intf, addr, &saddr, &lun);
1520 if (rv) 1521 if (rv)
@@ -1545,7 +1546,7 @@ int ipmi_request_supply_msgs(ipmi_user_t user,
1545 unsigned char saddr, lun; 1546 unsigned char saddr, lun;
1546 int rv; 1547 int rv;
1547 1548
1548 if (! user) 1549 if (!user)
1549 return -EINVAL; 1550 return -EINVAL;
1550 rv = check_addr(user->intf, addr, &saddr, &lun); 1551 rv = check_addr(user->intf, addr, &saddr, &lun);
1551 if (rv) 1552 if (rv)
@@ -1570,7 +1571,7 @@ static int ipmb_file_read_proc(char *page, char **start, off_t off,
1570 char *out = (char *) page; 1571 char *out = (char *) page;
1571 ipmi_smi_t intf = data; 1572 ipmi_smi_t intf = data;
1572 int i; 1573 int i;
1573 int rv= 0; 1574 int rv = 0;
1574 1575
1575 for (i = 0; i < IPMI_MAX_CHANNELS; i++) 1576 for (i = 0; i < IPMI_MAX_CHANNELS; i++)
1576 rv += sprintf(out+rv, "%x ", intf->channels[i].address); 1577 rv += sprintf(out+rv, "%x ", intf->channels[i].address);
@@ -1989,7 +1990,7 @@ static int ipmi_bmc_register(ipmi_smi_t intf)
1989 } else { 1990 } else {
1990 bmc->dev = platform_device_alloc("ipmi_bmc", 1991 bmc->dev = platform_device_alloc("ipmi_bmc",
1991 bmc->id.device_id); 1992 bmc->id.device_id);
1992 if (! bmc->dev) { 1993 if (!bmc->dev) {
1993 printk(KERN_ERR 1994 printk(KERN_ERR
1994 "ipmi_msghandler:" 1995 "ipmi_msghandler:"
1995 " Unable to allocate platform device\n"); 1996 " Unable to allocate platform device\n");
@@ -2305,8 +2306,7 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
2305 void *send_info, 2306 void *send_info,
2306 struct ipmi_device_id *device_id, 2307 struct ipmi_device_id *device_id,
2307 struct device *si_dev, 2308 struct device *si_dev,
2308 unsigned char slave_addr, 2309 unsigned char slave_addr)
2309 ipmi_smi_t *new_intf)
2310{ 2310{
2311 int i, j; 2311 int i, j;
2312 int rv; 2312 int rv;
@@ -2366,7 +2366,7 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
2366 spin_lock_init(&intf->events_lock); 2366 spin_lock_init(&intf->events_lock);
2367 INIT_LIST_HEAD(&intf->waiting_events); 2367 INIT_LIST_HEAD(&intf->waiting_events);
2368 intf->waiting_events_count = 0; 2368 intf->waiting_events_count = 0;
2369 init_MUTEX(&intf->cmd_rcvrs_lock); 2369 mutex_init(&intf->cmd_rcvrs_mutex);
2370 INIT_LIST_HEAD(&intf->cmd_rcvrs); 2370 INIT_LIST_HEAD(&intf->cmd_rcvrs);
2371 init_waitqueue_head(&intf->waitq); 2371 init_waitqueue_head(&intf->waitq);
2372 2372
@@ -2388,9 +2388,9 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
2388 if (rv) 2388 if (rv)
2389 goto out; 2389 goto out;
2390 2390
2391 /* FIXME - this is an ugly kludge, this sets the intf for the 2391 rv = handlers->start_processing(send_info, intf);
2392 caller before sending any messages with it. */ 2392 if (rv)
2393 *new_intf = intf; 2393 goto out;
2394 2394
2395 get_guid(intf); 2395 get_guid(intf);
2396 2396
@@ -2622,7 +2622,7 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf,
2622 spin_unlock_irqrestore(&intf->counter_lock, flags); 2622 spin_unlock_irqrestore(&intf->counter_lock, flags);
2623 2623
2624 recv_msg = ipmi_alloc_recv_msg(); 2624 recv_msg = ipmi_alloc_recv_msg();
2625 if (! recv_msg) { 2625 if (!recv_msg) {
2626 /* We couldn't allocate memory for the 2626 /* We couldn't allocate memory for the
2627 message, so requeue it for handling 2627 message, so requeue it for handling
2628 later. */ 2628 later. */
@@ -2777,7 +2777,7 @@ static int handle_lan_get_msg_cmd(ipmi_smi_t intf,
2777 spin_unlock_irqrestore(&intf->counter_lock, flags); 2777 spin_unlock_irqrestore(&intf->counter_lock, flags);
2778 2778
2779 recv_msg = ipmi_alloc_recv_msg(); 2779 recv_msg = ipmi_alloc_recv_msg();
2780 if (! recv_msg) { 2780 if (!recv_msg) {
2781 /* We couldn't allocate memory for the 2781 /* We couldn't allocate memory for the
2782 message, so requeue it for handling 2782 message, so requeue it for handling
2783 later. */ 2783 later. */
@@ -2869,13 +2869,14 @@ static int handle_read_event_rsp(ipmi_smi_t intf,
2869 events. */ 2869 events. */
2870 rcu_read_lock(); 2870 rcu_read_lock();
2871 list_for_each_entry_rcu(user, &intf->users, link) { 2871 list_for_each_entry_rcu(user, &intf->users, link) {
2872 if (! user->gets_events) 2872 if (!user->gets_events)
2873 continue; 2873 continue;
2874 2874
2875 recv_msg = ipmi_alloc_recv_msg(); 2875 recv_msg = ipmi_alloc_recv_msg();
2876 if (! recv_msg) { 2876 if (!recv_msg) {
2877 rcu_read_unlock(); 2877 rcu_read_unlock();
2878 list_for_each_entry_safe(recv_msg, recv_msg2, &msgs, link) { 2878 list_for_each_entry_safe(recv_msg, recv_msg2, &msgs,
2879 link) {
2879 list_del(&recv_msg->link); 2880 list_del(&recv_msg->link);
2880 ipmi_free_recv_msg(recv_msg); 2881 ipmi_free_recv_msg(recv_msg);
2881 } 2882 }
@@ -2905,7 +2906,7 @@ static int handle_read_event_rsp(ipmi_smi_t intf,
2905 /* No one to receive the message, put it in queue if there's 2906 /* No one to receive the message, put it in queue if there's
2906 not already too many things in the queue. */ 2907 not already too many things in the queue. */
2907 recv_msg = ipmi_alloc_recv_msg(); 2908 recv_msg = ipmi_alloc_recv_msg();
2908 if (! recv_msg) { 2909 if (!recv_msg) {
2909 /* We couldn't allocate memory for the 2910 /* We couldn't allocate memory for the
2910 message, so requeue it for handling 2911 message, so requeue it for handling
2911 later. */ 2912 later. */
@@ -3190,7 +3191,7 @@ void ipmi_smi_watchdog_pretimeout(ipmi_smi_t intf)
3190 3191
3191 rcu_read_lock(); 3192 rcu_read_lock();
3192 list_for_each_entry_rcu(user, &intf->users, link) { 3193 list_for_each_entry_rcu(user, &intf->users, link) {
3193 if (! user->handler->ipmi_watchdog_pretimeout) 3194 if (!user->handler->ipmi_watchdog_pretimeout)
3194 continue; 3195 continue;
3195 3196
3196 user->handler->ipmi_watchdog_pretimeout(user->handler_data); 3197 user->handler->ipmi_watchdog_pretimeout(user->handler_data);
@@ -3278,7 +3279,7 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
3278 3279
3279 smi_msg = smi_from_recv_msg(intf, ent->recv_msg, slot, 3280 smi_msg = smi_from_recv_msg(intf, ent->recv_msg, slot,
3280 ent->seqid); 3281 ent->seqid);
3281 if (! smi_msg) 3282 if (!smi_msg)
3282 return; 3283 return;
3283 3284
3284 spin_unlock_irqrestore(&intf->seq_lock, *flags); 3285 spin_unlock_irqrestore(&intf->seq_lock, *flags);
@@ -3314,8 +3315,9 @@ static void ipmi_timeout_handler(long timeout_period)
3314 3315
3315 /* See if any waiting messages need to be processed. */ 3316 /* See if any waiting messages need to be processed. */
3316 spin_lock_irqsave(&intf->waiting_msgs_lock, flags); 3317 spin_lock_irqsave(&intf->waiting_msgs_lock, flags);
3317 list_for_each_entry_safe(smi_msg, smi_msg2, &intf->waiting_msgs, link) { 3318 list_for_each_entry_safe(smi_msg, smi_msg2,
3318 if (! handle_new_recv_msg(intf, smi_msg)) { 3319 &intf->waiting_msgs, link) {
3320 if (!handle_new_recv_msg(intf, smi_msg)) {
3319 list_del(&smi_msg->link); 3321 list_del(&smi_msg->link);
3320 ipmi_free_smi_msg(smi_msg); 3322 ipmi_free_smi_msg(smi_msg);
3321 } else { 3323 } else {
diff --git a/drivers/char/ipmi/ipmi_poweroff.c b/drivers/char/ipmi/ipmi_poweroff.c
index 786a2802ca..d0b5c08e7b 100644
--- a/drivers/char/ipmi/ipmi_poweroff.c
+++ b/drivers/char/ipmi/ipmi_poweroff.c
@@ -346,7 +346,7 @@ static int ipmi_dell_chassis_detect (ipmi_user_t user)
346{ 346{
347 const char ipmi_version_major = ipmi_version & 0xF; 347 const char ipmi_version_major = ipmi_version & 0xF;
348 const char ipmi_version_minor = (ipmi_version >> 4) & 0xF; 348 const char ipmi_version_minor = (ipmi_version >> 4) & 0xF;
349 const char mfr[3]=DELL_IANA_MFR_ID; 349 const char mfr[3] = DELL_IANA_MFR_ID;
350 if (!memcmp(mfr, &mfg_id, sizeof(mfr)) && 350 if (!memcmp(mfr, &mfg_id, sizeof(mfr)) &&
351 ipmi_version_major <= 1 && 351 ipmi_version_major <= 1 &&
352 ipmi_version_minor < 5) 352 ipmi_version_minor < 5)
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 35fbd4d8ed..a86c0f2995 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -803,7 +803,7 @@ static int ipmi_thread(void *data)
803 set_user_nice(current, 19); 803 set_user_nice(current, 19);
804 while (!kthread_should_stop()) { 804 while (!kthread_should_stop()) {
805 spin_lock_irqsave(&(smi_info->si_lock), flags); 805 spin_lock_irqsave(&(smi_info->si_lock), flags);
806 smi_result=smi_event_handler(smi_info, 0); 806 smi_result = smi_event_handler(smi_info, 0);
807 spin_unlock_irqrestore(&(smi_info->si_lock), flags); 807 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
808 if (smi_result == SI_SM_CALL_WITHOUT_DELAY) { 808 if (smi_result == SI_SM_CALL_WITHOUT_DELAY) {
809 /* do nothing */ 809 /* do nothing */
@@ -972,10 +972,37 @@ static irqreturn_t si_bt_irq_handler(int irq, void *data, struct pt_regs *regs)
972 return si_irq_handler(irq, data, regs); 972 return si_irq_handler(irq, data, regs);
973} 973}
974 974
975static int smi_start_processing(void *send_info,
976 ipmi_smi_t intf)
977{
978 struct smi_info *new_smi = send_info;
979
980 new_smi->intf = intf;
981
982 /* Set up the timer that drives the interface. */
983 setup_timer(&new_smi->si_timer, smi_timeout, (long)new_smi);
984 new_smi->last_timeout_jiffies = jiffies;
985 mod_timer(&new_smi->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
986
987 if (new_smi->si_type != SI_BT) {
988 new_smi->thread = kthread_run(ipmi_thread, new_smi,
989 "kipmi%d", new_smi->intf_num);
990 if (IS_ERR(new_smi->thread)) {
991 printk(KERN_NOTICE "ipmi_si_intf: Could not start"
992 " kernel thread due to error %ld, only using"
993 " timers to drive the interface\n",
994 PTR_ERR(new_smi->thread));
995 new_smi->thread = NULL;
996 }
997 }
998
999 return 0;
1000}
975 1001
976static struct ipmi_smi_handlers handlers = 1002static struct ipmi_smi_handlers handlers =
977{ 1003{
978 .owner = THIS_MODULE, 1004 .owner = THIS_MODULE,
1005 .start_processing = smi_start_processing,
979 .sender = sender, 1006 .sender = sender,
980 .request_events = request_events, 1007 .request_events = request_events,
981 .set_run_to_completion = set_run_to_completion, 1008 .set_run_to_completion = set_run_to_completion,
@@ -987,7 +1014,7 @@ static struct ipmi_smi_handlers handlers =
987 1014
988#define SI_MAX_PARMS 4 1015#define SI_MAX_PARMS 4
989static LIST_HEAD(smi_infos); 1016static LIST_HEAD(smi_infos);
990static DECLARE_MUTEX(smi_infos_lock); 1017static DEFINE_MUTEX(smi_infos_lock);
991static int smi_num; /* Used to sequence the SMIs */ 1018static int smi_num; /* Used to sequence the SMIs */
992 1019
993#define DEFAULT_REGSPACING 1 1020#define DEFAULT_REGSPACING 1
@@ -2162,9 +2189,13 @@ static void setup_xaction_handlers(struct smi_info *smi_info)
2162 2189
2163static inline void wait_for_timer_and_thread(struct smi_info *smi_info) 2190static inline void wait_for_timer_and_thread(struct smi_info *smi_info)
2164{ 2191{
2165 if (smi_info->thread != NULL && smi_info->thread != ERR_PTR(-ENOMEM)) 2192 if (smi_info->intf) {
2166 kthread_stop(smi_info->thread); 2193 /* The timer and thread are only running if the
2167 del_timer_sync(&smi_info->si_timer); 2194 interface has been started up and registered. */
2195 if (smi_info->thread != NULL)
2196 kthread_stop(smi_info->thread);
2197 del_timer_sync(&smi_info->si_timer);
2198 }
2168} 2199}
2169 2200
2170static struct ipmi_default_vals 2201static struct ipmi_default_vals
@@ -2245,7 +2276,7 @@ static int try_smi_init(struct smi_info *new_smi)
2245 new_smi->slave_addr, new_smi->irq); 2276 new_smi->slave_addr, new_smi->irq);
2246 } 2277 }
2247 2278
2248 down(&smi_infos_lock); 2279 mutex_lock(&smi_infos_lock);
2249 if (!is_new_interface(new_smi)) { 2280 if (!is_new_interface(new_smi)) {
2250 printk(KERN_WARNING "ipmi_si: duplicate interface\n"); 2281 printk(KERN_WARNING "ipmi_si: duplicate interface\n");
2251 rv = -EBUSY; 2282 rv = -EBUSY;
@@ -2341,21 +2372,6 @@ static int try_smi_init(struct smi_info *new_smi)
2341 if (new_smi->irq) 2372 if (new_smi->irq)
2342 new_smi->si_state = SI_CLEARING_FLAGS_THEN_SET_IRQ; 2373 new_smi->si_state = SI_CLEARING_FLAGS_THEN_SET_IRQ;
2343 2374
2344 /* The ipmi_register_smi() code does some operations to
2345 determine the channel information, so we must be ready to
2346 handle operations before it is called. This means we have
2347 to stop the timer if we get an error after this point. */
2348 init_timer(&(new_smi->si_timer));
2349 new_smi->si_timer.data = (long) new_smi;
2350 new_smi->si_timer.function = smi_timeout;
2351 new_smi->last_timeout_jiffies = jiffies;
2352 new_smi->si_timer.expires = jiffies + SI_TIMEOUT_JIFFIES;
2353
2354 add_timer(&(new_smi->si_timer));
2355 if (new_smi->si_type != SI_BT)
2356 new_smi->thread = kthread_run(ipmi_thread, new_smi,
2357 "kipmi%d", new_smi->intf_num);
2358
2359 if (!new_smi->dev) { 2375 if (!new_smi->dev) {
2360 /* If we don't already have a device from something 2376 /* If we don't already have a device from something
2361 * else (like PCI), then register a new one. */ 2377 * else (like PCI), then register a new one. */
@@ -2365,7 +2381,7 @@ static int try_smi_init(struct smi_info *new_smi)
2365 printk(KERN_ERR 2381 printk(KERN_ERR
2366 "ipmi_si_intf:" 2382 "ipmi_si_intf:"
2367 " Unable to allocate platform device\n"); 2383 " Unable to allocate platform device\n");
2368 goto out_err_stop_timer; 2384 goto out_err;
2369 } 2385 }
2370 new_smi->dev = &new_smi->pdev->dev; 2386 new_smi->dev = &new_smi->pdev->dev;
2371 new_smi->dev->driver = &ipmi_driver; 2387 new_smi->dev->driver = &ipmi_driver;
@@ -2377,7 +2393,7 @@ static int try_smi_init(struct smi_info *new_smi)
2377 " Unable to register system interface device:" 2393 " Unable to register system interface device:"
2378 " %d\n", 2394 " %d\n",
2379 rv); 2395 rv);
2380 goto out_err_stop_timer; 2396 goto out_err;
2381 } 2397 }
2382 new_smi->dev_registered = 1; 2398 new_smi->dev_registered = 1;
2383 } 2399 }
@@ -2386,8 +2402,7 @@ static int try_smi_init(struct smi_info *new_smi)
2386 new_smi, 2402 new_smi,
2387 &new_smi->device_id, 2403 &new_smi->device_id,
2388 new_smi->dev, 2404 new_smi->dev,
2389 new_smi->slave_addr, 2405 new_smi->slave_addr);
2390 &(new_smi->intf));
2391 if (rv) { 2406 if (rv) {
2392 printk(KERN_ERR 2407 printk(KERN_ERR
2393 "ipmi_si: Unable to register device: error %d\n", 2408 "ipmi_si: Unable to register device: error %d\n",
@@ -2417,7 +2432,7 @@ static int try_smi_init(struct smi_info *new_smi)
2417 2432
2418 list_add_tail(&new_smi->link, &smi_infos); 2433 list_add_tail(&new_smi->link, &smi_infos);
2419 2434
2420 up(&smi_infos_lock); 2435 mutex_unlock(&smi_infos_lock);
2421 2436
2422 printk(" IPMI %s interface initialized\n",si_to_str[new_smi->si_type]); 2437 printk(" IPMI %s interface initialized\n",si_to_str[new_smi->si_type]);
2423 2438
@@ -2454,7 +2469,7 @@ static int try_smi_init(struct smi_info *new_smi)
2454 2469
2455 kfree(new_smi); 2470 kfree(new_smi);
2456 2471
2457 up(&smi_infos_lock); 2472 mutex_unlock(&smi_infos_lock);
2458 2473
2459 return rv; 2474 return rv;
2460} 2475}
@@ -2512,26 +2527,26 @@ static __devinit int init_ipmi_si(void)
2512#endif 2527#endif
2513 2528
2514 if (si_trydefaults) { 2529 if (si_trydefaults) {
2515 down(&smi_infos_lock); 2530 mutex_lock(&smi_infos_lock);
2516 if (list_empty(&smi_infos)) { 2531 if (list_empty(&smi_infos)) {
2517 /* No BMC was found, try defaults. */ 2532 /* No BMC was found, try defaults. */
2518 up(&smi_infos_lock); 2533 mutex_unlock(&smi_infos_lock);
2519 default_find_bmc(); 2534 default_find_bmc();
2520 } else { 2535 } else {
2521 up(&smi_infos_lock); 2536 mutex_unlock(&smi_infos_lock);
2522 } 2537 }
2523 } 2538 }
2524 2539
2525 down(&smi_infos_lock); 2540 mutex_lock(&smi_infos_lock);
2526 if (list_empty(&smi_infos)) { 2541 if (list_empty(&smi_infos)) {
2527 up(&smi_infos_lock); 2542 mutex_unlock(&smi_infos_lock);
2528#ifdef CONFIG_PCI 2543#ifdef CONFIG_PCI
2529 pci_unregister_driver(&ipmi_pci_driver); 2544 pci_unregister_driver(&ipmi_pci_driver);
2530#endif 2545#endif
2531 printk("ipmi_si: Unable to find any System Interface(s)\n"); 2546 printk("ipmi_si: Unable to find any System Interface(s)\n");
2532 return -ENODEV; 2547 return -ENODEV;
2533 } else { 2548 } else {
2534 up(&smi_infos_lock); 2549 mutex_unlock(&smi_infos_lock);
2535 return 0; 2550 return 0;
2536 } 2551 }
2537} 2552}
@@ -2607,10 +2622,10 @@ static __exit void cleanup_ipmi_si(void)
2607 pci_unregister_driver(&ipmi_pci_driver); 2622 pci_unregister_driver(&ipmi_pci_driver);
2608#endif 2623#endif
2609 2624
2610 down(&smi_infos_lock); 2625 mutex_lock(&smi_infos_lock);
2611 list_for_each_entry_safe(e, tmp_e, &smi_infos, link) 2626 list_for_each_entry_safe(e, tmp_e, &smi_infos, link)
2612 cleanup_one_si(e); 2627 cleanup_one_si(e);
2613 up(&smi_infos_lock); 2628 mutex_unlock(&smi_infos_lock);
2614 2629
2615 driver_unregister(&ipmi_driver); 2630 driver_unregister(&ipmi_driver);
2616} 2631}
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c
index 7ece9f3c8f..2d11ddd99e 100644
--- a/drivers/char/ipmi/ipmi_watchdog.c
+++ b/drivers/char/ipmi/ipmi_watchdog.c
@@ -39,6 +39,7 @@
39#include <linux/watchdog.h> 39#include <linux/watchdog.h>
40#include <linux/miscdevice.h> 40#include <linux/miscdevice.h>
41#include <linux/init.h> 41#include <linux/init.h>
42#include <linux/completion.h>
42#include <linux/rwsem.h> 43#include <linux/rwsem.h>
43#include <linux/errno.h> 44#include <linux/errno.h>
44#include <asm/uaccess.h> 45#include <asm/uaccess.h>
@@ -303,21 +304,22 @@ static int ipmi_heartbeat(void);
303static void panic_halt_ipmi_heartbeat(void); 304static void panic_halt_ipmi_heartbeat(void);
304 305
305 306
306/* We use a semaphore to make sure that only one thing can send a set 307/* We use a mutex to make sure that only one thing can send a set
307 timeout at one time, because we only have one copy of the data. 308 timeout at one time, because we only have one copy of the data.
308 The semaphore is claimed when the set_timeout is sent and freed 309 The mutex is claimed when the set_timeout is sent and freed
309 when both messages are free. */ 310 when both messages are free. */
310static atomic_t set_timeout_tofree = ATOMIC_INIT(0); 311static atomic_t set_timeout_tofree = ATOMIC_INIT(0);
311static DECLARE_MUTEX(set_timeout_lock); 312static DEFINE_MUTEX(set_timeout_lock);
313static DECLARE_COMPLETION(set_timeout_wait);
312static void set_timeout_free_smi(struct ipmi_smi_msg *msg) 314static void set_timeout_free_smi(struct ipmi_smi_msg *msg)
313{ 315{
314 if (atomic_dec_and_test(&set_timeout_tofree)) 316 if (atomic_dec_and_test(&set_timeout_tofree))
315 up(&set_timeout_lock); 317 complete(&set_timeout_wait);
316} 318}
317static void set_timeout_free_recv(struct ipmi_recv_msg *msg) 319static void set_timeout_free_recv(struct ipmi_recv_msg *msg)
318{ 320{
319 if (atomic_dec_and_test(&set_timeout_tofree)) 321 if (atomic_dec_and_test(&set_timeout_tofree))
320 up(&set_timeout_lock); 322 complete(&set_timeout_wait);
321} 323}
322static struct ipmi_smi_msg set_timeout_smi_msg = 324static struct ipmi_smi_msg set_timeout_smi_msg =
323{ 325{
@@ -399,7 +401,7 @@ static int ipmi_set_timeout(int do_heartbeat)
399 401
400 402
401 /* We can only send one of these at a time. */ 403 /* We can only send one of these at a time. */
402 down(&set_timeout_lock); 404 mutex_lock(&set_timeout_lock);
403 405
404 atomic_set(&set_timeout_tofree, 2); 406 atomic_set(&set_timeout_tofree, 2);
405 407
@@ -407,16 +409,21 @@ static int ipmi_set_timeout(int do_heartbeat)
407 &set_timeout_recv_msg, 409 &set_timeout_recv_msg,
408 &send_heartbeat_now); 410 &send_heartbeat_now);
409 if (rv) { 411 if (rv) {
410 up(&set_timeout_lock); 412 mutex_unlock(&set_timeout_lock);
411 } else { 413 goto out;
412 if ((do_heartbeat == IPMI_SET_TIMEOUT_FORCE_HB)
413 || ((send_heartbeat_now)
414 && (do_heartbeat == IPMI_SET_TIMEOUT_HB_IF_NECESSARY)))
415 {
416 rv = ipmi_heartbeat();
417 }
418 } 414 }
419 415
416 wait_for_completion(&set_timeout_wait);
417
418 if ((do_heartbeat == IPMI_SET_TIMEOUT_FORCE_HB)
419 || ((send_heartbeat_now)
420 && (do_heartbeat == IPMI_SET_TIMEOUT_HB_IF_NECESSARY)))
421 {
422 rv = ipmi_heartbeat();
423 }
424 mutex_unlock(&set_timeout_lock);
425
426out:
420 return rv; 427 return rv;
421} 428}
422 429
@@ -458,17 +465,17 @@ static void panic_halt_ipmi_set_timeout(void)
458 The semaphore is claimed when the set_timeout is sent and freed 465 The semaphore is claimed when the set_timeout is sent and freed
459 when both messages are free. */ 466 when both messages are free. */
460static atomic_t heartbeat_tofree = ATOMIC_INIT(0); 467static atomic_t heartbeat_tofree = ATOMIC_INIT(0);
461static DECLARE_MUTEX(heartbeat_lock); 468static DEFINE_MUTEX(heartbeat_lock);
462static DECLARE_MUTEX_LOCKED(heartbeat_wait_lock); 469static DECLARE_COMPLETION(heartbeat_wait);
463static void heartbeat_free_smi(struct ipmi_smi_msg *msg) 470static void heartbeat_free_smi(struct ipmi_smi_msg *msg)
464{ 471{
465 if (atomic_dec_and_test(&heartbeat_tofree)) 472 if (atomic_dec_and_test(&heartbeat_tofree))
466 up(&heartbeat_wait_lock); 473 complete(&heartbeat_wait);
467} 474}
468static void heartbeat_free_recv(struct ipmi_recv_msg *msg) 475static void heartbeat_free_recv(struct ipmi_recv_msg *msg)
469{ 476{
470 if (atomic_dec_and_test(&heartbeat_tofree)) 477 if (atomic_dec_and_test(&heartbeat_tofree))
471 up(&heartbeat_wait_lock); 478 complete(&heartbeat_wait);
472} 479}
473static struct ipmi_smi_msg heartbeat_smi_msg = 480static struct ipmi_smi_msg heartbeat_smi_msg =
474{ 481{
@@ -511,14 +518,14 @@ static int ipmi_heartbeat(void)
511 return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY); 518 return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY);
512 } 519 }
513 520
514 down(&heartbeat_lock); 521 mutex_lock(&heartbeat_lock);
515 522
516 atomic_set(&heartbeat_tofree, 2); 523 atomic_set(&heartbeat_tofree, 2);
517 524
518 /* Don't reset the timer if we have the timer turned off, that 525 /* Don't reset the timer if we have the timer turned off, that
519 re-enables the watchdog. */ 526 re-enables the watchdog. */
520 if (ipmi_watchdog_state == WDOG_TIMEOUT_NONE) { 527 if (ipmi_watchdog_state == WDOG_TIMEOUT_NONE) {
521 up(&heartbeat_lock); 528 mutex_unlock(&heartbeat_lock);
522 return 0; 529 return 0;
523 } 530 }
524 531
@@ -539,14 +546,14 @@ static int ipmi_heartbeat(void)
539 &heartbeat_recv_msg, 546 &heartbeat_recv_msg,
540 1); 547 1);
541 if (rv) { 548 if (rv) {
542 up(&heartbeat_lock); 549 mutex_unlock(&heartbeat_lock);
543 printk(KERN_WARNING PFX "heartbeat failure: %d\n", 550 printk(KERN_WARNING PFX "heartbeat failure: %d\n",
544 rv); 551 rv);
545 return rv; 552 return rv;
546 } 553 }
547 554
548 /* Wait for the heartbeat to be sent. */ 555 /* Wait for the heartbeat to be sent. */
549 down(&heartbeat_wait_lock); 556 wait_for_completion(&heartbeat_wait);
550 557
551 if (heartbeat_recv_msg.msg.data[0] != 0) { 558 if (heartbeat_recv_msg.msg.data[0] != 0) {
552 /* Got an error in the heartbeat response. It was already 559 /* Got an error in the heartbeat response. It was already
@@ -555,7 +562,7 @@ static int ipmi_heartbeat(void)
555 rv = -EINVAL; 562 rv = -EINVAL;
556 } 563 }
557 564
558 up(&heartbeat_lock); 565 mutex_unlock(&heartbeat_lock);
559 566
560 return rv; 567 return rv;
561} 568}
@@ -589,7 +596,7 @@ static void panic_halt_ipmi_heartbeat(void)
589 1); 596 1);
590} 597}
591 598
592static struct watchdog_info ident= 599static struct watchdog_info ident =
593{ 600{
594 .options = 0, /* WDIOF_SETTIMEOUT, */ 601 .options = 0, /* WDIOF_SETTIMEOUT, */
595 .firmware_version = 1, 602 .firmware_version = 1,
@@ -790,13 +797,13 @@ static int ipmi_fasync(int fd, struct file *file, int on)
790 797
791static int ipmi_close(struct inode *ino, struct file *filep) 798static int ipmi_close(struct inode *ino, struct file *filep)
792{ 799{
793 if (iminor(ino)==WATCHDOG_MINOR) 800 if (iminor(ino) == WATCHDOG_MINOR) {
794 {
795 if (expect_close == 42) { 801 if (expect_close == 42) {
796 ipmi_watchdog_state = WDOG_TIMEOUT_NONE; 802 ipmi_watchdog_state = WDOG_TIMEOUT_NONE;
797 ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); 803 ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB);
798 } else { 804 } else {
799 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); 805 printk(KERN_CRIT PFX
806 "Unexpected close, not stopping watchdog!\n");
800 ipmi_heartbeat(); 807 ipmi_heartbeat();
801 } 808 }
802 clear_bit(0, &ipmi_wdog_open); 809 clear_bit(0, &ipmi_wdog_open);
diff --git a/drivers/char/istallion.c b/drivers/char/istallion.c
index e5247f85a4..ef20c1fc9c 100644
--- a/drivers/char/istallion.c
+++ b/drivers/char/istallion.c
@@ -706,7 +706,6 @@ static int stli_portcmdstats(stliport_t *portp);
706static int stli_clrportstats(stliport_t *portp, comstats_t __user *cp); 706static int stli_clrportstats(stliport_t *portp, comstats_t __user *cp);
707static int stli_getportstruct(stliport_t __user *arg); 707static int stli_getportstruct(stliport_t __user *arg);
708static int stli_getbrdstruct(stlibrd_t __user *arg); 708static int stli_getbrdstruct(stlibrd_t __user *arg);
709static void *stli_memalloc(int len);
710static stlibrd_t *stli_allocbrd(void); 709static stlibrd_t *stli_allocbrd(void);
711 710
712static void stli_ecpinit(stlibrd_t *brdp); 711static void stli_ecpinit(stlibrd_t *brdp);
@@ -997,17 +996,6 @@ static int stli_parsebrd(stlconf_t *confp, char **argp)
997 996
998/*****************************************************************************/ 997/*****************************************************************************/
999 998
1000/*
1001 * Local driver kernel malloc routine.
1002 */
1003
1004static void *stli_memalloc(int len)
1005{
1006 return((void *) kmalloc(len, GFP_KERNEL));
1007}
1008
1009/*****************************************************************************/
1010
1011static int stli_open(struct tty_struct *tty, struct file *filp) 999static int stli_open(struct tty_struct *tty, struct file *filp)
1012{ 1000{
1013 stlibrd_t *brdp; 1001 stlibrd_t *brdp;
@@ -3227,13 +3215,12 @@ static int stli_initports(stlibrd_t *brdp)
3227#endif 3215#endif
3228 3216
3229 for (i = 0, panelnr = 0, panelport = 0; (i < brdp->nrports); i++) { 3217 for (i = 0, panelnr = 0, panelport = 0; (i < brdp->nrports); i++) {
3230 portp = (stliport_t *) stli_memalloc(sizeof(stliport_t)); 3218 portp = kzalloc(sizeof(stliport_t), GFP_KERNEL);
3231 if (portp == (stliport_t *) NULL) { 3219 if (!portp) {
3232 printk("STALLION: failed to allocate port structure\n"); 3220 printk("STALLION: failed to allocate port structure\n");
3233 continue; 3221 continue;
3234 } 3222 }
3235 3223
3236 memset(portp, 0, sizeof(stliport_t));
3237 portp->magic = STLI_PORTMAGIC; 3224 portp->magic = STLI_PORTMAGIC;
3238 portp->portnr = i; 3225 portp->portnr = i;
3239 portp->brdnr = brdp->brdnr; 3226 portp->brdnr = brdp->brdnr;
@@ -4610,14 +4597,13 @@ static stlibrd_t *stli_allocbrd(void)
4610{ 4597{
4611 stlibrd_t *brdp; 4598 stlibrd_t *brdp;
4612 4599
4613 brdp = (stlibrd_t *) stli_memalloc(sizeof(stlibrd_t)); 4600 brdp = kzalloc(sizeof(stlibrd_t), GFP_KERNEL);
4614 if (brdp == (stlibrd_t *) NULL) { 4601 if (!brdp) {
4615 printk(KERN_ERR "STALLION: failed to allocate memory " 4602 printk(KERN_ERR "STALLION: failed to allocate memory "
4616 "(size=%d)\n", sizeof(stlibrd_t)); 4603 "(size=%d)\n", sizeof(stlibrd_t));
4617 return((stlibrd_t *) NULL); 4604 return NULL;
4618 } 4605 }
4619 4606
4620 memset(brdp, 0, sizeof(stlibrd_t));
4621 brdp->magic = STLI_BOARDMAGIC; 4607 brdp->magic = STLI_BOARDMAGIC;
4622 return(brdp); 4608 return(brdp);
4623} 4609}
@@ -5210,12 +5196,12 @@ int __init stli_init(void)
5210/* 5196/*
5211 * Allocate a temporary write buffer. 5197 * Allocate a temporary write buffer.
5212 */ 5198 */
5213 stli_tmpwritebuf = (char *) stli_memalloc(STLI_TXBUFSIZE); 5199 stli_tmpwritebuf = kmalloc(STLI_TXBUFSIZE, GFP_KERNEL);
5214 if (stli_tmpwritebuf == (char *) NULL) 5200 if (!stli_tmpwritebuf)
5215 printk(KERN_ERR "STALLION: failed to allocate memory " 5201 printk(KERN_ERR "STALLION: failed to allocate memory "
5216 "(size=%d)\n", STLI_TXBUFSIZE); 5202 "(size=%d)\n", STLI_TXBUFSIZE);
5217 stli_txcookbuf = stli_memalloc(STLI_TXBUFSIZE); 5203 stli_txcookbuf = kmalloc(STLI_TXBUFSIZE, GFP_KERNEL);
5218 if (stli_txcookbuf == (char *) NULL) 5204 if (!stli_txcookbuf)
5219 printk(KERN_ERR "STALLION: failed to allocate memory " 5205 printk(KERN_ERR "STALLION: failed to allocate memory "
5220 "(size=%d)\n", STLI_TXBUFSIZE); 5206 "(size=%d)\n", STLI_TXBUFSIZE);
5221 5207
diff --git a/drivers/char/stallion.c b/drivers/char/stallion.c
index 3f5d6077f3..a9c5a7230f 100644
--- a/drivers/char/stallion.c
+++ b/drivers/char/stallion.c
@@ -504,7 +504,6 @@ static int stl_echmcaintr(stlbrd_t *brdp);
504static int stl_echpciintr(stlbrd_t *brdp); 504static int stl_echpciintr(stlbrd_t *brdp);
505static int stl_echpci64intr(stlbrd_t *brdp); 505static int stl_echpci64intr(stlbrd_t *brdp);
506static void stl_offintr(void *private); 506static void stl_offintr(void *private);
507static void *stl_memalloc(int len);
508static stlbrd_t *stl_allocbrd(void); 507static stlbrd_t *stl_allocbrd(void);
509static stlport_t *stl_getport(int brdnr, int panelnr, int portnr); 508static stlport_t *stl_getport(int brdnr, int panelnr, int portnr);
510 509
@@ -940,17 +939,6 @@ static int stl_parsebrd(stlconf_t *confp, char **argp)
940/*****************************************************************************/ 939/*****************************************************************************/
941 940
942/* 941/*
943 * Local driver kernel memory allocation routine.
944 */
945
946static void *stl_memalloc(int len)
947{
948 return (void *) kmalloc(len, GFP_KERNEL);
949}
950
951/*****************************************************************************/
952
953/*
954 * Allocate a new board structure. Fill out the basic info in it. 942 * Allocate a new board structure. Fill out the basic info in it.
955 */ 943 */
956 944
@@ -958,14 +946,13 @@ static stlbrd_t *stl_allocbrd(void)
958{ 946{
959 stlbrd_t *brdp; 947 stlbrd_t *brdp;
960 948
961 brdp = (stlbrd_t *) stl_memalloc(sizeof(stlbrd_t)); 949 brdp = kzalloc(sizeof(stlbrd_t), GFP_KERNEL);
962 if (brdp == (stlbrd_t *) NULL) { 950 if (!brdp) {
963 printk("STALLION: failed to allocate memory (size=%d)\n", 951 printk("STALLION: failed to allocate memory (size=%d)\n",
964 sizeof(stlbrd_t)); 952 sizeof(stlbrd_t));
965 return (stlbrd_t *) NULL; 953 return NULL;
966 } 954 }
967 955
968 memset(brdp, 0, sizeof(stlbrd_t));
969 brdp->magic = STL_BOARDMAGIC; 956 brdp->magic = STL_BOARDMAGIC;
970 return brdp; 957 return brdp;
971} 958}
@@ -1017,9 +1004,9 @@ static int stl_open(struct tty_struct *tty, struct file *filp)
1017 portp->refcount++; 1004 portp->refcount++;
1018 1005
1019 if ((portp->flags & ASYNC_INITIALIZED) == 0) { 1006 if ((portp->flags & ASYNC_INITIALIZED) == 0) {
1020 if (portp->tx.buf == (char *) NULL) { 1007 if (!portp->tx.buf) {
1021 portp->tx.buf = (char *) stl_memalloc(STL_TXBUFSIZE); 1008 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
1022 if (portp->tx.buf == (char *) NULL) 1009 if (!portp->tx.buf)
1023 return -ENOMEM; 1010 return -ENOMEM;
1024 portp->tx.head = portp->tx.buf; 1011 portp->tx.head = portp->tx.buf;
1025 portp->tx.tail = portp->tx.buf; 1012 portp->tx.tail = portp->tx.buf;
@@ -2178,13 +2165,12 @@ static int __init stl_initports(stlbrd_t *brdp, stlpanel_t *panelp)
2178 * each ports data structures. 2165 * each ports data structures.
2179 */ 2166 */
2180 for (i = 0; (i < panelp->nrports); i++) { 2167 for (i = 0; (i < panelp->nrports); i++) {
2181 portp = (stlport_t *) stl_memalloc(sizeof(stlport_t)); 2168 portp = kzalloc(sizeof(stlport_t), GFP_KERNEL);
2182 if (portp == (stlport_t *) NULL) { 2169 if (!portp) {
2183 printk("STALLION: failed to allocate memory " 2170 printk("STALLION: failed to allocate memory "
2184 "(size=%d)\n", sizeof(stlport_t)); 2171 "(size=%d)\n", sizeof(stlport_t));
2185 break; 2172 break;
2186 } 2173 }
2187 memset(portp, 0, sizeof(stlport_t));
2188 2174
2189 portp->magic = STL_PORTMAGIC; 2175 portp->magic = STL_PORTMAGIC;
2190 portp->portnr = i; 2176 portp->portnr = i;
@@ -2315,13 +2301,12 @@ static inline int stl_initeio(stlbrd_t *brdp)
2315 * can complete the setup. 2301 * can complete the setup.
2316 */ 2302 */
2317 2303
2318 panelp = (stlpanel_t *) stl_memalloc(sizeof(stlpanel_t)); 2304 panelp = kzalloc(sizeof(stlpanel_t), GFP_KERNEL);
2319 if (panelp == (stlpanel_t *) NULL) { 2305 if (!panelp) {
2320 printk(KERN_WARNING "STALLION: failed to allocate memory " 2306 printk(KERN_WARNING "STALLION: failed to allocate memory "
2321 "(size=%d)\n", sizeof(stlpanel_t)); 2307 "(size=%d)\n", sizeof(stlpanel_t));
2322 return(-ENOMEM); 2308 return -ENOMEM;
2323 } 2309 }
2324 memset(panelp, 0, sizeof(stlpanel_t));
2325 2310
2326 panelp->magic = STL_PANELMAGIC; 2311 panelp->magic = STL_PANELMAGIC;
2327 panelp->brdnr = brdp->brdnr; 2312 panelp->brdnr = brdp->brdnr;
@@ -2490,13 +2475,12 @@ static inline int stl_initech(stlbrd_t *brdp)
2490 status = inb(ioaddr + ECH_PNLSTATUS); 2475 status = inb(ioaddr + ECH_PNLSTATUS);
2491 if ((status & ECH_PNLIDMASK) != nxtid) 2476 if ((status & ECH_PNLIDMASK) != nxtid)
2492 break; 2477 break;
2493 panelp = (stlpanel_t *) stl_memalloc(sizeof(stlpanel_t)); 2478 panelp = kzalloc(sizeof(stlpanel_t), GFP_KERNEL);
2494 if (panelp == (stlpanel_t *) NULL) { 2479 if (!panelp) {
2495 printk("STALLION: failed to allocate memory " 2480 printk("STALLION: failed to allocate memory "
2496 "(size=%d)\n", sizeof(stlpanel_t)); 2481 "(size=%d)\n", sizeof(stlpanel_t));
2497 break; 2482 break;
2498 } 2483 }
2499 memset(panelp, 0, sizeof(stlpanel_t));
2500 panelp->magic = STL_PANELMAGIC; 2484 panelp->magic = STL_PANELMAGIC;
2501 panelp->brdnr = brdp->brdnr; 2485 panelp->brdnr = brdp->brdnr;
2502 panelp->panelnr = panelnr; 2486 panelp->panelnr = panelnr;
@@ -3074,8 +3058,8 @@ static int __init stl_init(void)
3074/* 3058/*
3075 * Allocate a temporary write buffer. 3059 * Allocate a temporary write buffer.
3076 */ 3060 */
3077 stl_tmpwritebuf = (char *) stl_memalloc(STL_TXBUFSIZE); 3061 stl_tmpwritebuf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
3078 if (stl_tmpwritebuf == (char *) NULL) 3062 if (!stl_tmpwritebuf)
3079 printk("STALLION: failed to allocate memory (size=%d)\n", 3063 printk("STALLION: failed to allocate memory (size=%d)\n",
3080 STL_TXBUFSIZE); 3064 STL_TXBUFSIZE);
3081 3065
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index 0bfd1b6366..98b126c2de 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -376,7 +376,7 @@ int tty_insert_flip_string(struct tty_struct *tty, const unsigned char *chars, s
376 return copied; 376 return copied;
377} 377}
378 378
379EXPORT_SYMBOL_GPL(tty_insert_flip_string); 379EXPORT_SYMBOL(tty_insert_flip_string);
380 380
381int tty_insert_flip_string_flags(struct tty_struct *tty, const unsigned char *chars, const char *flags, size_t size) 381int tty_insert_flip_string_flags(struct tty_struct *tty, const unsigned char *chars, const char *flags, size_t size)
382{ 382{
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index ca4844c527..acc5d47844 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -2328,6 +2328,10 @@ int tioclinux(struct tty_struct *tty, unsigned long arg)
2328 case TIOCL_SETVESABLANK: 2328 case TIOCL_SETVESABLANK:
2329 set_vesa_blanking(p); 2329 set_vesa_blanking(p);
2330 break; 2330 break;
2331 case TIOCL_GETKMSGREDIRECT:
2332 data = kmsg_redirect;
2333 ret = __put_user(data, p);
2334 break;
2331 case TIOCL_SETKMSGREDIRECT: 2335 case TIOCL_SETKMSGREDIRECT:
2332 if (!capable(CAP_SYS_ADMIN)) { 2336 if (!capable(CAP_SYS_ADMIN)) {
2333 ret = -EPERM; 2337 ret = -EPERM;
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index b582d0cdc2..4f0898400c 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -71,7 +71,7 @@ config EDAC_E7XXX
71 71
72config EDAC_E752X 72config EDAC_E752X
73 tristate "Intel e752x (e7520, e7525, e7320)" 73 tristate "Intel e752x (e7520, e7525, e7320)"
74 depends on EDAC_MM_EDAC && PCI && X86 74 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
75 help 75 help
76 Support for error detection and correction on the Intel 76 Support for error detection and correction on the Intel
77 E7520, E7525, E7320 server chipsets. 77 E7520, E7525, E7320 server chipsets.
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
index ccf528d733..a5017de72d 100644
--- a/drivers/ide/ide-disk.c
+++ b/drivers/ide/ide-disk.c
@@ -61,6 +61,7 @@
61#include <linux/slab.h> 61#include <linux/slab.h>
62#include <linux/delay.h> 62#include <linux/delay.h>
63#include <linux/mutex.h> 63#include <linux/mutex.h>
64#include <linux/leds.h>
64 65
65#define _IDE_DISK 66#define _IDE_DISK
66 67
@@ -317,6 +318,8 @@ static ide_startstop_t ide_do_rw_disk (ide_drive_t *drive, struct request *rq, s
317 return ide_stopped; 318 return ide_stopped;
318 } 319 }
319 320
321 ledtrig_ide_activity();
322
320 pr_debug("%s: %sing: block=%llu, sectors=%lu, buffer=0x%08lx\n", 323 pr_debug("%s: %sing: block=%llu, sectors=%lu, buffer=0x%08lx\n",
321 drive->name, rq_data_dir(rq) == READ ? "read" : "writ", 324 drive->name, rq_data_dir(rq) == READ ? "read" : "writ",
322 (unsigned long long)block, rq->nr_sectors, 325 (unsigned long long)block, rq->nr_sectors,
diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c
index 0606bd2f60..9233b8109a 100644
--- a/drivers/ide/ide-taskfile.c
+++ b/drivers/ide/ide-taskfile.c
@@ -375,7 +375,13 @@ static void task_end_request(ide_drive_t *drive, struct request *rq, u8 stat)
375 } 375 }
376 } 376 }
377 377
378 ide_end_request(drive, 1, rq->hard_nr_sectors); 378 if (rq->rq_disk) {
379 ide_driver_t *drv;
380
381 drv = *(ide_driver_t **)rq->rq_disk->private_data;;
382 drv->end_request(drive, 1, rq->hard_nr_sectors);
383 } else
384 ide_end_request(drive, 1, rq->hard_nr_sectors);
379} 385}
380 386
381/* 387/*
diff --git a/drivers/infiniband/core/mad.c b/drivers/infiniband/core/mad.c
index f7854b65fd..ba54c856b0 100644
--- a/drivers/infiniband/core/mad.c
+++ b/drivers/infiniband/core/mad.c
@@ -227,6 +227,14 @@ struct ib_mad_agent *ib_register_mad_agent(struct ib_device *device,
227 if (!is_vendor_oui(mad_reg_req->oui)) 227 if (!is_vendor_oui(mad_reg_req->oui))
228 goto error1; 228 goto error1;
229 } 229 }
230 /* Make sure class supplied is consistent with RMPP */
231 if (ib_is_mad_class_rmpp(mad_reg_req->mgmt_class)) {
232 if (!rmpp_version)
233 goto error1;
234 } else {
235 if (rmpp_version)
236 goto error1;
237 }
230 /* Make sure class supplied is consistent with QP type */ 238 /* Make sure class supplied is consistent with QP type */
231 if (qp_type == IB_QPT_SMI) { 239 if (qp_type == IB_QPT_SMI) {
232 if ((mad_reg_req->mgmt_class != 240 if ((mad_reg_req->mgmt_class !=
@@ -890,6 +898,35 @@ struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
890} 898}
891EXPORT_SYMBOL(ib_create_send_mad); 899EXPORT_SYMBOL(ib_create_send_mad);
892 900
901int ib_get_mad_data_offset(u8 mgmt_class)
902{
903 if (mgmt_class == IB_MGMT_CLASS_SUBN_ADM)
904 return IB_MGMT_SA_HDR;
905 else if ((mgmt_class == IB_MGMT_CLASS_DEVICE_MGMT) ||
906 (mgmt_class == IB_MGMT_CLASS_DEVICE_ADM) ||
907 (mgmt_class == IB_MGMT_CLASS_BIS))
908 return IB_MGMT_DEVICE_HDR;
909 else if ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
910 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END))
911 return IB_MGMT_VENDOR_HDR;
912 else
913 return IB_MGMT_MAD_HDR;
914}
915EXPORT_SYMBOL(ib_get_mad_data_offset);
916
917int ib_is_mad_class_rmpp(u8 mgmt_class)
918{
919 if ((mgmt_class == IB_MGMT_CLASS_SUBN_ADM) ||
920 (mgmt_class == IB_MGMT_CLASS_DEVICE_MGMT) ||
921 (mgmt_class == IB_MGMT_CLASS_DEVICE_ADM) ||
922 (mgmt_class == IB_MGMT_CLASS_BIS) ||
923 ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
924 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END)))
925 return 1;
926 return 0;
927}
928EXPORT_SYMBOL(ib_is_mad_class_rmpp);
929
893void *ib_get_rmpp_segment(struct ib_mad_send_buf *send_buf, int seg_num) 930void *ib_get_rmpp_segment(struct ib_mad_send_buf *send_buf, int seg_num)
894{ 931{
895 struct ib_mad_send_wr_private *mad_send_wr; 932 struct ib_mad_send_wr_private *mad_send_wr;
@@ -1022,6 +1059,13 @@ int ib_post_send_mad(struct ib_mad_send_buf *send_buf,
1022 goto error; 1059 goto error;
1023 } 1060 }
1024 1061
1062 if (!ib_is_mad_class_rmpp(((struct ib_mad_hdr *) send_buf->mad)->mgmt_class)) {
1063 if (mad_agent_priv->agent.rmpp_version) {
1064 ret = -EINVAL;
1065 goto error;
1066 }
1067 }
1068
1025 /* 1069 /*
1026 * Save pointer to next work request to post in case the 1070 * Save pointer to next work request to post in case the
1027 * current one completes, and the user modifies the work 1071 * current one completes, and the user modifies the work
@@ -1618,14 +1662,59 @@ static int is_data_mad(struct ib_mad_agent_private *mad_agent_priv,
1618 (rmpp_mad->rmpp_hdr.rmpp_type == IB_MGMT_RMPP_TYPE_DATA); 1662 (rmpp_mad->rmpp_hdr.rmpp_type == IB_MGMT_RMPP_TYPE_DATA);
1619} 1663}
1620 1664
1665static inline int rcv_has_same_class(struct ib_mad_send_wr_private *wr,
1666 struct ib_mad_recv_wc *rwc)
1667{
1668 return ((struct ib_mad *)(wr->send_buf.mad))->mad_hdr.mgmt_class ==
1669 rwc->recv_buf.mad->mad_hdr.mgmt_class;
1670}
1671
1672static inline int rcv_has_same_gid(struct ib_mad_send_wr_private *wr,
1673 struct ib_mad_recv_wc *rwc )
1674{
1675 struct ib_ah_attr attr;
1676 u8 send_resp, rcv_resp;
1677
1678 send_resp = ((struct ib_mad *)(wr->send_buf.mad))->
1679 mad_hdr.method & IB_MGMT_METHOD_RESP;
1680 rcv_resp = rwc->recv_buf.mad->mad_hdr.method & IB_MGMT_METHOD_RESP;
1681
1682 if (!send_resp && rcv_resp)
1683 /* is request/response. GID/LIDs are both local (same). */
1684 return 1;
1685
1686 if (send_resp == rcv_resp)
1687 /* both requests, or both responses. GIDs different */
1688 return 0;
1689
1690 if (ib_query_ah(wr->send_buf.ah, &attr))
1691 /* Assume not equal, to avoid false positives. */
1692 return 0;
1693
1694 if (!(attr.ah_flags & IB_AH_GRH) && !(rwc->wc->wc_flags & IB_WC_GRH))
1695 return attr.dlid == rwc->wc->slid;
1696 else if ((attr.ah_flags & IB_AH_GRH) &&
1697 (rwc->wc->wc_flags & IB_WC_GRH))
1698 return memcmp(attr.grh.dgid.raw,
1699 rwc->recv_buf.grh->sgid.raw, 16) == 0;
1700 else
1701 /* one has GID, other does not. Assume different */
1702 return 0;
1703}
1621struct ib_mad_send_wr_private* 1704struct ib_mad_send_wr_private*
1622ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv, __be64 tid) 1705ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv,
1706 struct ib_mad_recv_wc *mad_recv_wc)
1623{ 1707{
1624 struct ib_mad_send_wr_private *mad_send_wr; 1708 struct ib_mad_send_wr_private *mad_send_wr;
1709 struct ib_mad *mad;
1710
1711 mad = (struct ib_mad *)mad_recv_wc->recv_buf.mad;
1625 1712
1626 list_for_each_entry(mad_send_wr, &mad_agent_priv->wait_list, 1713 list_for_each_entry(mad_send_wr, &mad_agent_priv->wait_list,
1627 agent_list) { 1714 agent_list) {
1628 if (mad_send_wr->tid == tid) 1715 if ((mad_send_wr->tid == mad->mad_hdr.tid) &&
1716 rcv_has_same_class(mad_send_wr, mad_recv_wc) &&
1717 rcv_has_same_gid(mad_send_wr, mad_recv_wc))
1629 return mad_send_wr; 1718 return mad_send_wr;
1630 } 1719 }
1631 1720
@@ -1636,7 +1725,10 @@ ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv, __be64 tid)
1636 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list, 1725 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list,
1637 agent_list) { 1726 agent_list) {
1638 if (is_data_mad(mad_agent_priv, mad_send_wr->send_buf.mad) && 1727 if (is_data_mad(mad_agent_priv, mad_send_wr->send_buf.mad) &&
1639 mad_send_wr->tid == tid && mad_send_wr->timeout) { 1728 mad_send_wr->tid == mad->mad_hdr.tid &&
1729 mad_send_wr->timeout &&
1730 rcv_has_same_class(mad_send_wr, mad_recv_wc) &&
1731 rcv_has_same_gid(mad_send_wr, mad_recv_wc)) {
1640 /* Verify request has not been canceled */ 1732 /* Verify request has not been canceled */
1641 return (mad_send_wr->status == IB_WC_SUCCESS) ? 1733 return (mad_send_wr->status == IB_WC_SUCCESS) ?
1642 mad_send_wr : NULL; 1734 mad_send_wr : NULL;
@@ -1661,7 +1753,6 @@ static void ib_mad_complete_recv(struct ib_mad_agent_private *mad_agent_priv,
1661 struct ib_mad_send_wr_private *mad_send_wr; 1753 struct ib_mad_send_wr_private *mad_send_wr;
1662 struct ib_mad_send_wc mad_send_wc; 1754 struct ib_mad_send_wc mad_send_wc;
1663 unsigned long flags; 1755 unsigned long flags;
1664 __be64 tid;
1665 1756
1666 INIT_LIST_HEAD(&mad_recv_wc->rmpp_list); 1757 INIT_LIST_HEAD(&mad_recv_wc->rmpp_list);
1667 list_add(&mad_recv_wc->recv_buf.list, &mad_recv_wc->rmpp_list); 1758 list_add(&mad_recv_wc->recv_buf.list, &mad_recv_wc->rmpp_list);
@@ -1677,9 +1768,8 @@ static void ib_mad_complete_recv(struct ib_mad_agent_private *mad_agent_priv,
1677 1768
1678 /* Complete corresponding request */ 1769 /* Complete corresponding request */
1679 if (response_mad(mad_recv_wc->recv_buf.mad)) { 1770 if (response_mad(mad_recv_wc->recv_buf.mad)) {
1680 tid = mad_recv_wc->recv_buf.mad->mad_hdr.tid;
1681 spin_lock_irqsave(&mad_agent_priv->lock, flags); 1771 spin_lock_irqsave(&mad_agent_priv->lock, flags);
1682 mad_send_wr = ib_find_send_mad(mad_agent_priv, tid); 1772 mad_send_wr = ib_find_send_mad(mad_agent_priv, mad_recv_wc);
1683 if (!mad_send_wr) { 1773 if (!mad_send_wr) {
1684 spin_unlock_irqrestore(&mad_agent_priv->lock, flags); 1774 spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
1685 ib_free_recv_mad(mad_recv_wc); 1775 ib_free_recv_mad(mad_recv_wc);
@@ -2408,11 +2498,11 @@ static int ib_mad_post_receive_mads(struct ib_mad_qp_info *qp_info,
2408 } 2498 }
2409 } 2499 }
2410 sg_list.addr = dma_map_single(qp_info->port_priv-> 2500 sg_list.addr = dma_map_single(qp_info->port_priv->
2411 device->dma_device, 2501 device->dma_device,
2412 &mad_priv->grh, 2502 &mad_priv->grh,
2413 sizeof *mad_priv - 2503 sizeof *mad_priv -
2414 sizeof mad_priv->header, 2504 sizeof mad_priv->header,
2415 DMA_FROM_DEVICE); 2505 DMA_FROM_DEVICE);
2416 pci_unmap_addr_set(&mad_priv->header, mapping, sg_list.addr); 2506 pci_unmap_addr_set(&mad_priv->header, mapping, sg_list.addr);
2417 recv_wr.wr_id = (unsigned long)&mad_priv->header.mad_list; 2507 recv_wr.wr_id = (unsigned long)&mad_priv->header.mad_list;
2418 mad_priv->header.mad_list.mad_queue = recv_queue; 2508 mad_priv->header.mad_list.mad_queue = recv_queue;
diff --git a/drivers/infiniband/core/mad_priv.h b/drivers/infiniband/core/mad_priv.h
index a7125d4b5c..6c9c133d71 100644
--- a/drivers/infiniband/core/mad_priv.h
+++ b/drivers/infiniband/core/mad_priv.h
@@ -216,7 +216,8 @@ extern kmem_cache_t *ib_mad_cache;
216int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr); 216int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr);
217 217
218struct ib_mad_send_wr_private * 218struct ib_mad_send_wr_private *
219ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv, __be64 tid); 219ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv,
220 struct ib_mad_recv_wc *mad_recv_wc);
220 221
221void ib_mad_complete_send_wr(struct ib_mad_send_wr_private *mad_send_wr, 222void ib_mad_complete_send_wr(struct ib_mad_send_wr_private *mad_send_wr,
222 struct ib_mad_send_wc *mad_send_wc); 223 struct ib_mad_send_wc *mad_send_wc);
diff --git a/drivers/infiniband/core/mad_rmpp.c b/drivers/infiniband/core/mad_rmpp.c
index bacfdd5bdd..dfd4e588ce 100644
--- a/drivers/infiniband/core/mad_rmpp.c
+++ b/drivers/infiniband/core/mad_rmpp.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (c) 2005 Intel Inc. All rights reserved. 2 * Copyright (c) 2005 Intel Inc. All rights reserved.
3 * Copyright (c) 2005 Voltaire, Inc. All rights reserved. 3 * Copyright (c) 2005-2006 Voltaire, Inc. All rights reserved.
4 * 4 *
5 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU 6 * licenses. You may choose to be licensed under the terms of the GNU
@@ -100,17 +100,6 @@ void ib_cancel_rmpp_recvs(struct ib_mad_agent_private *agent)
100 } 100 }
101} 101}
102 102
103static int data_offset(u8 mgmt_class)
104{
105 if (mgmt_class == IB_MGMT_CLASS_SUBN_ADM)
106 return IB_MGMT_SA_HDR;
107 else if ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
108 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END))
109 return IB_MGMT_VENDOR_HDR;
110 else
111 return IB_MGMT_RMPP_HDR;
112}
113
114static void format_ack(struct ib_mad_send_buf *msg, 103static void format_ack(struct ib_mad_send_buf *msg,
115 struct ib_rmpp_mad *data, 104 struct ib_rmpp_mad *data,
116 struct mad_rmpp_recv *rmpp_recv) 105 struct mad_rmpp_recv *rmpp_recv)
@@ -137,7 +126,7 @@ static void ack_recv(struct mad_rmpp_recv *rmpp_recv,
137 struct ib_mad_send_buf *msg; 126 struct ib_mad_send_buf *msg;
138 int ret, hdr_len; 127 int ret, hdr_len;
139 128
140 hdr_len = data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class); 129 hdr_len = ib_get_mad_data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class);
141 msg = ib_create_send_mad(&rmpp_recv->agent->agent, recv_wc->wc->src_qp, 130 msg = ib_create_send_mad(&rmpp_recv->agent->agent, recv_wc->wc->src_qp,
142 recv_wc->wc->pkey_index, 1, hdr_len, 131 recv_wc->wc->pkey_index, 1, hdr_len,
143 0, GFP_KERNEL); 132 0, GFP_KERNEL);
@@ -163,7 +152,7 @@ static struct ib_mad_send_buf *alloc_response_msg(struct ib_mad_agent *agent,
163 if (IS_ERR(ah)) 152 if (IS_ERR(ah))
164 return (void *) ah; 153 return (void *) ah;
165 154
166 hdr_len = data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class); 155 hdr_len = ib_get_mad_data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class);
167 msg = ib_create_send_mad(agent, recv_wc->wc->src_qp, 156 msg = ib_create_send_mad(agent, recv_wc->wc->src_qp,
168 recv_wc->wc->pkey_index, 1, 157 recv_wc->wc->pkey_index, 1,
169 hdr_len, 0, GFP_KERNEL); 158 hdr_len, 0, GFP_KERNEL);
@@ -408,7 +397,7 @@ static inline int get_mad_len(struct mad_rmpp_recv *rmpp_recv)
408 397
409 rmpp_mad = (struct ib_rmpp_mad *)rmpp_recv->cur_seg_buf->mad; 398 rmpp_mad = (struct ib_rmpp_mad *)rmpp_recv->cur_seg_buf->mad;
410 399
411 hdr_size = data_offset(rmpp_mad->mad_hdr.mgmt_class); 400 hdr_size = ib_get_mad_data_offset(rmpp_mad->mad_hdr.mgmt_class);
412 data_size = sizeof(struct ib_rmpp_mad) - hdr_size; 401 data_size = sizeof(struct ib_rmpp_mad) - hdr_size;
413 pad = IB_MGMT_RMPP_DATA - be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin); 402 pad = IB_MGMT_RMPP_DATA - be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin);
414 if (pad > IB_MGMT_RMPP_DATA || pad < 0) 403 if (pad > IB_MGMT_RMPP_DATA || pad < 0)
@@ -562,15 +551,15 @@ static int send_next_seg(struct ib_mad_send_wr_private *mad_send_wr)
562 return ib_send_mad(mad_send_wr); 551 return ib_send_mad(mad_send_wr);
563} 552}
564 553
565static void abort_send(struct ib_mad_agent_private *agent, __be64 tid, 554static void abort_send(struct ib_mad_agent_private *agent,
566 u8 rmpp_status) 555 struct ib_mad_recv_wc *mad_recv_wc, u8 rmpp_status)
567{ 556{
568 struct ib_mad_send_wr_private *mad_send_wr; 557 struct ib_mad_send_wr_private *mad_send_wr;
569 struct ib_mad_send_wc wc; 558 struct ib_mad_send_wc wc;
570 unsigned long flags; 559 unsigned long flags;
571 560
572 spin_lock_irqsave(&agent->lock, flags); 561 spin_lock_irqsave(&agent->lock, flags);
573 mad_send_wr = ib_find_send_mad(agent, tid); 562 mad_send_wr = ib_find_send_mad(agent, mad_recv_wc);
574 if (!mad_send_wr) 563 if (!mad_send_wr)
575 goto out; /* Unmatched send */ 564 goto out; /* Unmatched send */
576 565
@@ -612,8 +601,7 @@ static void process_rmpp_ack(struct ib_mad_agent_private *agent,
612 601
613 rmpp_mad = (struct ib_rmpp_mad *)mad_recv_wc->recv_buf.mad; 602 rmpp_mad = (struct ib_rmpp_mad *)mad_recv_wc->recv_buf.mad;
614 if (rmpp_mad->rmpp_hdr.rmpp_status) { 603 if (rmpp_mad->rmpp_hdr.rmpp_status) {
615 abort_send(agent, rmpp_mad->mad_hdr.tid, 604 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
616 IB_MGMT_RMPP_STATUS_BAD_STATUS);
617 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS); 605 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
618 return; 606 return;
619 } 607 }
@@ -621,14 +609,13 @@ static void process_rmpp_ack(struct ib_mad_agent_private *agent,
621 seg_num = be32_to_cpu(rmpp_mad->rmpp_hdr.seg_num); 609 seg_num = be32_to_cpu(rmpp_mad->rmpp_hdr.seg_num);
622 newwin = be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin); 610 newwin = be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin);
623 if (newwin < seg_num) { 611 if (newwin < seg_num) {
624 abort_send(agent, rmpp_mad->mad_hdr.tid, 612 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_W2S);
625 IB_MGMT_RMPP_STATUS_W2S);
626 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_W2S); 613 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_W2S);
627 return; 614 return;
628 } 615 }
629 616
630 spin_lock_irqsave(&agent->lock, flags); 617 spin_lock_irqsave(&agent->lock, flags);
631 mad_send_wr = ib_find_send_mad(agent, rmpp_mad->mad_hdr.tid); 618 mad_send_wr = ib_find_send_mad(agent, mad_recv_wc);
632 if (!mad_send_wr) 619 if (!mad_send_wr)
633 goto out; /* Unmatched ACK */ 620 goto out; /* Unmatched ACK */
634 621
@@ -639,8 +626,7 @@ static void process_rmpp_ack(struct ib_mad_agent_private *agent,
639 if (seg_num > mad_send_wr->send_buf.seg_count || 626 if (seg_num > mad_send_wr->send_buf.seg_count ||
640 seg_num > mad_send_wr->newwin) { 627 seg_num > mad_send_wr->newwin) {
641 spin_unlock_irqrestore(&agent->lock, flags); 628 spin_unlock_irqrestore(&agent->lock, flags);
642 abort_send(agent, rmpp_mad->mad_hdr.tid, 629 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_S2B);
643 IB_MGMT_RMPP_STATUS_S2B);
644 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_S2B); 630 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_S2B);
645 return; 631 return;
646 } 632 }
@@ -728,12 +714,10 @@ static void process_rmpp_stop(struct ib_mad_agent_private *agent,
728 rmpp_mad = (struct ib_rmpp_mad *)mad_recv_wc->recv_buf.mad; 714 rmpp_mad = (struct ib_rmpp_mad *)mad_recv_wc->recv_buf.mad;
729 715
730 if (rmpp_mad->rmpp_hdr.rmpp_status != IB_MGMT_RMPP_STATUS_RESX) { 716 if (rmpp_mad->rmpp_hdr.rmpp_status != IB_MGMT_RMPP_STATUS_RESX) {
731 abort_send(agent, rmpp_mad->mad_hdr.tid, 717 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
732 IB_MGMT_RMPP_STATUS_BAD_STATUS);
733 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS); 718 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
734 } else 719 } else
735 abort_send(agent, rmpp_mad->mad_hdr.tid, 720 abort_send(agent, mad_recv_wc, rmpp_mad->rmpp_hdr.rmpp_status);
736 rmpp_mad->rmpp_hdr.rmpp_status);
737} 721}
738 722
739static void process_rmpp_abort(struct ib_mad_agent_private *agent, 723static void process_rmpp_abort(struct ib_mad_agent_private *agent,
@@ -745,12 +729,10 @@ static void process_rmpp_abort(struct ib_mad_agent_private *agent,
745 729
746 if (rmpp_mad->rmpp_hdr.rmpp_status < IB_MGMT_RMPP_STATUS_ABORT_MIN || 730 if (rmpp_mad->rmpp_hdr.rmpp_status < IB_MGMT_RMPP_STATUS_ABORT_MIN ||
747 rmpp_mad->rmpp_hdr.rmpp_status > IB_MGMT_RMPP_STATUS_ABORT_MAX) { 731 rmpp_mad->rmpp_hdr.rmpp_status > IB_MGMT_RMPP_STATUS_ABORT_MAX) {
748 abort_send(agent, rmpp_mad->mad_hdr.tid, 732 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
749 IB_MGMT_RMPP_STATUS_BAD_STATUS);
750 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS); 733 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BAD_STATUS);
751 } else 734 } else
752 abort_send(agent, rmpp_mad->mad_hdr.tid, 735 abort_send(agent, mad_recv_wc, rmpp_mad->rmpp_hdr.rmpp_status);
753 rmpp_mad->rmpp_hdr.rmpp_status);
754} 736}
755 737
756struct ib_mad_recv_wc * 738struct ib_mad_recv_wc *
@@ -764,8 +746,7 @@ ib_process_rmpp_recv_wc(struct ib_mad_agent_private *agent,
764 return mad_recv_wc; 746 return mad_recv_wc;
765 747
766 if (rmpp_mad->rmpp_hdr.rmpp_version != IB_MGMT_RMPP_VERSION) { 748 if (rmpp_mad->rmpp_hdr.rmpp_version != IB_MGMT_RMPP_VERSION) {
767 abort_send(agent, rmpp_mad->mad_hdr.tid, 749 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_UNV);
768 IB_MGMT_RMPP_STATUS_UNV);
769 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_UNV); 750 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_UNV);
770 goto out; 751 goto out;
771 } 752 }
@@ -783,8 +764,7 @@ ib_process_rmpp_recv_wc(struct ib_mad_agent_private *agent,
783 process_rmpp_abort(agent, mad_recv_wc); 764 process_rmpp_abort(agent, mad_recv_wc);
784 break; 765 break;
785 default: 766 default:
786 abort_send(agent, rmpp_mad->mad_hdr.tid, 767 abort_send(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BADT);
787 IB_MGMT_RMPP_STATUS_BADT);
788 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BADT); 768 nack_recv(agent, mad_recv_wc, IB_MGMT_RMPP_STATUS_BADT);
789 break; 769 break;
790 } 770 }
diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c
index fb6cd42601..afe70a549c 100644
--- a/drivers/infiniband/core/user_mad.c
+++ b/drivers/infiniband/core/user_mad.c
@@ -177,17 +177,6 @@ static int queue_packet(struct ib_umad_file *file,
177 return ret; 177 return ret;
178} 178}
179 179
180static int data_offset(u8 mgmt_class)
181{
182 if (mgmt_class == IB_MGMT_CLASS_SUBN_ADM)
183 return IB_MGMT_SA_HDR;
184 else if ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
185 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END))
186 return IB_MGMT_VENDOR_HDR;
187 else
188 return IB_MGMT_RMPP_HDR;
189}
190
191static void send_handler(struct ib_mad_agent *agent, 180static void send_handler(struct ib_mad_agent *agent,
192 struct ib_mad_send_wc *send_wc) 181 struct ib_mad_send_wc *send_wc)
193{ 182{
@@ -283,7 +272,7 @@ static ssize_t copy_recv_mad(char __user *buf, struct ib_umad_packet *packet,
283 */ 272 */
284 return -ENOSPC; 273 return -ENOSPC;
285 } 274 }
286 offset = data_offset(recv_buf->mad->mad_hdr.mgmt_class); 275 offset = ib_get_mad_data_offset(recv_buf->mad->mad_hdr.mgmt_class);
287 max_seg_payload = sizeof (struct ib_mad) - offset; 276 max_seg_payload = sizeof (struct ib_mad) - offset;
288 277
289 for (left = packet->length - seg_payload, buf += seg_payload; 278 for (left = packet->length - seg_payload, buf += seg_payload;
@@ -441,21 +430,14 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
441 } 430 }
442 431
443 rmpp_mad = (struct ib_rmpp_mad *) packet->mad.data; 432 rmpp_mad = (struct ib_rmpp_mad *) packet->mad.data;
444 if (rmpp_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_ADM) { 433 hdr_len = ib_get_mad_data_offset(rmpp_mad->mad_hdr.mgmt_class);
445 hdr_len = IB_MGMT_SA_HDR; 434 if (!ib_is_mad_class_rmpp(rmpp_mad->mad_hdr.mgmt_class)) {
446 copy_offset = IB_MGMT_RMPP_HDR; 435 copy_offset = IB_MGMT_MAD_HDR;
447 rmpp_active = ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) & 436 rmpp_active = 0;
448 IB_MGMT_RMPP_FLAG_ACTIVE; 437 } else {
449 } else if (rmpp_mad->mad_hdr.mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START &&
450 rmpp_mad->mad_hdr.mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END) {
451 hdr_len = IB_MGMT_VENDOR_HDR;
452 copy_offset = IB_MGMT_RMPP_HDR; 438 copy_offset = IB_MGMT_RMPP_HDR;
453 rmpp_active = ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) & 439 rmpp_active = ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) &
454 IB_MGMT_RMPP_FLAG_ACTIVE; 440 IB_MGMT_RMPP_FLAG_ACTIVE;
455 } else {
456 hdr_len = IB_MGMT_MAD_HDR;
457 copy_offset = IB_MGMT_MAD_HDR;
458 rmpp_active = 0;
459 } 441 }
460 442
461 data_len = count - sizeof (struct ib_user_mad) - hdr_len; 443 data_len = count - sizeof (struct ib_user_mad) - hdr_len;
diff --git a/drivers/infiniband/hw/mthca/mthca_av.c b/drivers/infiniband/hw/mthca/mthca_av.c
index f023d39365..bc5bdcbe51 100644
--- a/drivers/infiniband/hw/mthca/mthca_av.c
+++ b/drivers/infiniband/hw/mthca/mthca_av.c
@@ -265,7 +265,7 @@ int __devinit mthca_init_av_table(struct mthca_dev *dev)
265 return -ENOMEM; 265 return -ENOMEM;
266} 266}
267 267
268void __devexit mthca_cleanup_av_table(struct mthca_dev *dev) 268void mthca_cleanup_av_table(struct mthca_dev *dev)
269{ 269{
270 if (mthca_is_memfree(dev)) 270 if (mthca_is_memfree(dev))
271 return; 271 return;
diff --git a/drivers/infiniband/hw/mthca/mthca_cq.c b/drivers/infiniband/hw/mthca/mthca_cq.c
index 76aabc5bf3..312cf90731 100644
--- a/drivers/infiniband/hw/mthca/mthca_cq.c
+++ b/drivers/infiniband/hw/mthca/mthca_cq.c
@@ -973,7 +973,7 @@ int __devinit mthca_init_cq_table(struct mthca_dev *dev)
973 return err; 973 return err;
974} 974}
975 975
976void __devexit mthca_cleanup_cq_table(struct mthca_dev *dev) 976void mthca_cleanup_cq_table(struct mthca_dev *dev)
977{ 977{
978 mthca_array_cleanup(&dev->cq_table.cq, dev->limits.num_cqs); 978 mthca_array_cleanup(&dev->cq_table.cq, dev->limits.num_cqs);
979 mthca_alloc_cleanup(&dev->cq_table.alloc); 979 mthca_alloc_cleanup(&dev->cq_table.alloc);
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index cbdc348fb6..99f109c381 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -765,7 +765,7 @@ static int __devinit mthca_map_eq_regs(struct mthca_dev *dev)
765 765
766} 766}
767 767
768static void __devexit mthca_unmap_eq_regs(struct mthca_dev *dev) 768static void mthca_unmap_eq_regs(struct mthca_dev *dev)
769{ 769{
770 if (mthca_is_memfree(dev)) { 770 if (mthca_is_memfree(dev)) {
771 mthca_unmap_reg(dev, (pci_resource_len(dev->pdev, 0) - 1) & 771 mthca_unmap_reg(dev, (pci_resource_len(dev->pdev, 0) - 1) &
@@ -821,7 +821,7 @@ int __devinit mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt)
821 return ret; 821 return ret;
822} 822}
823 823
824void __devexit mthca_unmap_eq_icm(struct mthca_dev *dev) 824void mthca_unmap_eq_icm(struct mthca_dev *dev)
825{ 825{
826 u8 status; 826 u8 status;
827 827
@@ -954,7 +954,7 @@ err_out_free:
954 return err; 954 return err;
955} 955}
956 956
957void __devexit mthca_cleanup_eq_table(struct mthca_dev *dev) 957void mthca_cleanup_eq_table(struct mthca_dev *dev)
958{ 958{
959 u8 status; 959 u8 status;
960 int i; 960 int i;
diff --git a/drivers/infiniband/hw/mthca/mthca_mad.c b/drivers/infiniband/hw/mthca/mthca_mad.c
index 4ace6a392f..dfb482eac9 100644
--- a/drivers/infiniband/hw/mthca/mthca_mad.c
+++ b/drivers/infiniband/hw/mthca/mthca_mad.c
@@ -271,7 +271,7 @@ err:
271 return PTR_ERR(agent); 271 return PTR_ERR(agent);
272} 272}
273 273
274void mthca_free_agents(struct mthca_dev *dev) 274void __devexit mthca_free_agents(struct mthca_dev *dev)
275{ 275{
276 struct ib_mad_agent *agent; 276 struct ib_mad_agent *agent;
277 int p, q; 277 int p, q;
diff --git a/drivers/infiniband/hw/mthca/mthca_mcg.c b/drivers/infiniband/hw/mthca/mthca_mcg.c
index 9965bda9af..47ca8a9b72 100644
--- a/drivers/infiniband/hw/mthca/mthca_mcg.c
+++ b/drivers/infiniband/hw/mthca/mthca_mcg.c
@@ -388,7 +388,7 @@ int __devinit mthca_init_mcg_table(struct mthca_dev *dev)
388 return 0; 388 return 0;
389} 389}
390 390
391void __devexit mthca_cleanup_mcg_table(struct mthca_dev *dev) 391void mthca_cleanup_mcg_table(struct mthca_dev *dev)
392{ 392{
393 mthca_alloc_cleanup(&dev->mcg_table.alloc); 393 mthca_alloc_cleanup(&dev->mcg_table.alloc);
394} 394}
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c
index 698b621257..25e1c1db9a 100644
--- a/drivers/infiniband/hw/mthca/mthca_mr.c
+++ b/drivers/infiniband/hw/mthca/mthca_mr.c
@@ -170,7 +170,7 @@ err_out:
170 return -ENOMEM; 170 return -ENOMEM;
171} 171}
172 172
173static void __devexit mthca_buddy_cleanup(struct mthca_buddy *buddy) 173static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
174{ 174{
175 int i; 175 int i;
176 176
@@ -866,7 +866,7 @@ err_mtt_buddy:
866 return err; 866 return err;
867} 867}
868 868
869void __devexit mthca_cleanup_mr_table(struct mthca_dev *dev) 869void mthca_cleanup_mr_table(struct mthca_dev *dev)
870{ 870{
871 /* XXX check if any MRs are still allocated? */ 871 /* XXX check if any MRs are still allocated? */
872 if (dev->limits.fmr_reserved_mtts) 872 if (dev->limits.fmr_reserved_mtts)
diff --git a/drivers/infiniband/hw/mthca/mthca_pd.c b/drivers/infiniband/hw/mthca/mthca_pd.c
index 105fc5faad..59df51614c 100644
--- a/drivers/infiniband/hw/mthca/mthca_pd.c
+++ b/drivers/infiniband/hw/mthca/mthca_pd.c
@@ -77,7 +77,7 @@ int __devinit mthca_init_pd_table(struct mthca_dev *dev)
77 dev->limits.reserved_pds); 77 dev->limits.reserved_pds);
78} 78}
79 79
80void __devexit mthca_cleanup_pd_table(struct mthca_dev *dev) 80void mthca_cleanup_pd_table(struct mthca_dev *dev)
81{ 81{
82 /* XXX check if any PDs are still allocated? */ 82 /* XXX check if any PDs are still allocated? */
83 mthca_alloc_cleanup(&dev->pd_table.alloc); 83 mthca_alloc_cleanup(&dev->pd_table.alloc);
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c
index 1bc2678c2f..057c8e6af8 100644
--- a/drivers/infiniband/hw/mthca/mthca_qp.c
+++ b/drivers/infiniband/hw/mthca/mthca_qp.c
@@ -2204,7 +2204,7 @@ int __devinit mthca_init_qp_table(struct mthca_dev *dev)
2204 return err; 2204 return err;
2205} 2205}
2206 2206
2207void __devexit mthca_cleanup_qp_table(struct mthca_dev *dev) 2207void mthca_cleanup_qp_table(struct mthca_dev *dev)
2208{ 2208{
2209 int i; 2209 int i;
2210 u8 status; 2210 u8 status;
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c
index 0cfd158022..2dd3aea053 100644
--- a/drivers/infiniband/hw/mthca/mthca_srq.c
+++ b/drivers/infiniband/hw/mthca/mthca_srq.c
@@ -206,7 +206,7 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
206 roundup_pow_of_two(sizeof (struct mthca_next_seg) + 206 roundup_pow_of_two(sizeof (struct mthca_next_seg) +
207 srq->max_gs * sizeof (struct mthca_data_seg))); 207 srq->max_gs * sizeof (struct mthca_data_seg)));
208 208
209 if (ds > dev->limits.max_desc_sz) 209 if (!mthca_is_memfree(dev) && (ds > dev->limits.max_desc_sz))
210 return -EINVAL; 210 return -EINVAL;
211 211
212 srq->wqe_shift = long_log2(ds); 212 srq->wqe_shift = long_log2(ds);
@@ -684,7 +684,7 @@ int __devinit mthca_init_srq_table(struct mthca_dev *dev)
684 return err; 684 return err;
685} 685}
686 686
687void __devexit mthca_cleanup_srq_table(struct mthca_dev *dev) 687void mthca_cleanup_srq_table(struct mthca_dev *dev)
688{ 688{
689 if (!(dev->mthca_flags & MTHCA_FLAG_SRQ)) 689 if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
690 return; 690 return;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 53a32f6578..9b0bd7c746 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -723,7 +723,7 @@ static int ipoib_hard_header(struct sk_buff *skb,
723 * destination address onto the front of the skb so we can 723 * destination address onto the front of the skb so we can
724 * figure out where to send the packet later. 724 * figure out where to send the packet later.
725 */ 725 */
726 if (!skb->dst || !skb->dst->neighbour) { 726 if ((!skb->dst || !skb->dst->neighbour) && daddr) {
727 struct ipoib_pseudoheader *phdr = 727 struct ipoib_pseudoheader *phdr =
728 (struct ipoib_pseudoheader *) skb_push(skb, sizeof *phdr); 728 (struct ipoib_pseudoheader *) skb_push(skb, sizeof *phdr);
729 memcpy(phdr->hwaddr, daddr, INFINIBAND_ALEN); 729 memcpy(phdr->hwaddr, daddr, INFINIBAND_ALEN);
diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c
index 61924cc30e..fd8a95a9c5 100644
--- a/drivers/infiniband/ulp/srp/ib_srp.c
+++ b/drivers/infiniband/ulp/srp/ib_srp.c
@@ -607,10 +607,10 @@ static void srp_unmap_data(struct scsi_cmnd *scmnd,
607 */ 607 */
608 if (likely(scmnd->use_sg)) { 608 if (likely(scmnd->use_sg)) {
609 nents = scmnd->use_sg; 609 nents = scmnd->use_sg;
610 scat = (struct scatterlist *) scmnd->request_buffer; 610 scat = scmnd->request_buffer;
611 } else { 611 } else {
612 nents = 1; 612 nents = 1;
613 scat = (struct scatterlist *) scmnd->request_buffer; 613 scat = &req->fake_sg;
614 } 614 }
615 615
616 dma_unmap_sg(target->srp_host->dev->dma_device, scat, nents, 616 dma_unmap_sg(target->srp_host->dev->dma_device, scat, nents,
diff --git a/drivers/input/keyboard/hil_kbd.c b/drivers/input/keyboard/hil_kbd.c
index 0a90962c38..63f387e4b7 100644
--- a/drivers/input/keyboard/hil_kbd.c
+++ b/drivers/input/keyboard/hil_kbd.c
@@ -66,7 +66,7 @@ static unsigned int hil_kbd_set3[HIL_KEYCODES_SET3_TBLSIZE] =
66static char hil_language[][16] = { HIL_LOCALE_MAP }; 66static char hil_language[][16] = { HIL_LOCALE_MAP };
67 67
68struct hil_kbd { 68struct hil_kbd {
69 struct input_dev dev; 69 struct input_dev *dev;
70 struct serio *serio; 70 struct serio *serio;
71 71
72 /* Input buffer and index for packets from HIL bus. */ 72 /* Input buffer and index for packets from HIL bus. */
@@ -86,7 +86,7 @@ struct hil_kbd {
86/* Process a complete packet after transfer from the HIL */ 86/* Process a complete packet after transfer from the HIL */
87static void hil_kbd_process_record(struct hil_kbd *kbd) 87static void hil_kbd_process_record(struct hil_kbd *kbd)
88{ 88{
89 struct input_dev *dev = &kbd->dev; 89 struct input_dev *dev = kbd->dev;
90 hil_packet *data = kbd->data; 90 hil_packet *data = kbd->data;
91 hil_packet p; 91 hil_packet p;
92 int idx, i, cnt; 92 int idx, i, cnt;
@@ -240,8 +240,8 @@ static void hil_kbd_disconnect(struct serio *serio)
240 return; 240 return;
241 } 241 }
242 242
243 input_unregister_device(&kbd->dev);
244 serio_close(serio); 243 serio_close(serio);
244 input_unregister_device(kbd->dev);
245 kfree(kbd); 245 kfree(kbd);
246} 246}
247 247
@@ -251,16 +251,18 @@ static int hil_kbd_connect(struct serio *serio, struct serio_driver *drv)
251 uint8_t did, *idd; 251 uint8_t did, *idd;
252 int i; 252 int i;
253 253
254 kbd = kmalloc(sizeof(*kbd), GFP_KERNEL); 254 kbd = kzalloc(sizeof(*kbd), GFP_KERNEL);
255 if (!kbd) 255 if (!kbd)
256 return -ENOMEM; 256 return -ENOMEM;
257 memset(kbd, 0, sizeof(struct hil_kbd)); 257
258 kbd->dev = input_allocate_device();
259 if (!kbd->dev) goto bail1;
260 kbd->dev->private = kbd;
258 261
259 if (serio_open(serio, drv)) goto bail0; 262 if (serio_open(serio, drv)) goto bail0;
260 263
261 serio_set_drvdata(serio, kbd); 264 serio_set_drvdata(serio, kbd);
262 kbd->serio = serio; 265 kbd->serio = serio;
263 kbd->dev.private = kbd;
264 266
265 init_MUTEX_LOCKED(&(kbd->sem)); 267 init_MUTEX_LOCKED(&(kbd->sem));
266 268
@@ -302,38 +304,38 @@ static int hil_kbd_connect(struct serio *serio, struct serio_driver *drv)
302 did, hil_language[did & HIL_IDD_DID_TYPE_KB_LANG_MASK]); 304 did, hil_language[did & HIL_IDD_DID_TYPE_KB_LANG_MASK]);
303 break; 305 break;
304 default: 306 default:
305 goto bail1; 307 goto bail2;
306 } 308 }
307 309
308 if(HIL_IDD_NUM_BUTTONS(idd) || HIL_IDD_NUM_AXES_PER_SET(*idd)) { 310 if(HIL_IDD_NUM_BUTTONS(idd) || HIL_IDD_NUM_AXES_PER_SET(*idd)) {
309 printk(KERN_INFO PREFIX "keyboards only, no combo devices supported.\n"); 311 printk(KERN_INFO PREFIX "keyboards only, no combo devices supported.\n");
310 goto bail1; 312 goto bail2;
311 } 313 }
312 314
313 315
314 kbd->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP); 316 kbd->dev->evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
315 kbd->dev.ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_SCROLLL); 317 kbd->dev->ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_SCROLLL);
316 kbd->dev.keycodemax = HIL_KEYCODES_SET1_TBLSIZE; 318 kbd->dev->keycodemax = HIL_KEYCODES_SET1_TBLSIZE;
317 kbd->dev.keycodesize = sizeof(hil_kbd_set1[0]); 319 kbd->dev->keycodesize = sizeof(hil_kbd_set1[0]);
318 kbd->dev.keycode = hil_kbd_set1; 320 kbd->dev->keycode = hil_kbd_set1;
319 kbd->dev.name = strlen(kbd->rnm) ? kbd->rnm : HIL_GENERIC_NAME; 321 kbd->dev->name = strlen(kbd->rnm) ? kbd->rnm : HIL_GENERIC_NAME;
320 kbd->dev.phys = "hpkbd/input0"; /* XXX */ 322 kbd->dev->phys = "hpkbd/input0"; /* XXX */
321 323
322 kbd->dev.id.bustype = BUS_HIL; 324 kbd->dev->id.bustype = BUS_HIL;
323 kbd->dev.id.vendor = PCI_VENDOR_ID_HP; 325 kbd->dev->id.vendor = PCI_VENDOR_ID_HP;
324 kbd->dev.id.product = 0x0001; /* TODO: get from kbd->rsc */ 326 kbd->dev->id.product = 0x0001; /* TODO: get from kbd->rsc */
325 kbd->dev.id.version = 0x0100; /* TODO: get from kbd->rsc */ 327 kbd->dev->id.version = 0x0100; /* TODO: get from kbd->rsc */
326 kbd->dev.dev = &serio->dev; 328 kbd->dev->dev = &serio->dev;
327 329
328 for (i = 0; i < 128; i++) { 330 for (i = 0; i < 128; i++) {
329 set_bit(hil_kbd_set1[i], kbd->dev.keybit); 331 set_bit(hil_kbd_set1[i], kbd->dev->keybit);
330 set_bit(hil_kbd_set3[i], kbd->dev.keybit); 332 set_bit(hil_kbd_set3[i], kbd->dev->keybit);
331 } 333 }
332 clear_bit(0, kbd->dev.keybit); 334 clear_bit(0, kbd->dev->keybit);
333 335
334 input_register_device(&kbd->dev); 336 input_register_device(kbd->dev);
335 printk(KERN_INFO "input: %s, ID: %d\n", 337 printk(KERN_INFO "input: %s, ID: %d\n",
336 kbd->dev.name, did); 338 kbd->dev->name, did);
337 339
338 serio->write(serio, 0); 340 serio->write(serio, 0);
339 serio->write(serio, 0); 341 serio->write(serio, 0);
@@ -343,8 +345,10 @@ static int hil_kbd_connect(struct serio *serio, struct serio_driver *drv)
343 up(&(kbd->sem)); 345 up(&(kbd->sem));
344 346
345 return 0; 347 return 0;
346 bail1: 348 bail2:
347 serio_close(serio); 349 serio_close(serio);
350 bail1:
351 input_free_device(kbd->dev);
348 bail0: 352 bail0:
349 kfree(kbd); 353 kfree(kbd);
350 serio_set_drvdata(serio, NULL); 354 serio_set_drvdata(serio, NULL);
diff --git a/drivers/input/keyboard/hilkbd.c b/drivers/input/keyboard/hilkbd.c
index e95bc052e3..33edd030aa 100644
--- a/drivers/input/keyboard/hilkbd.c
+++ b/drivers/input/keyboard/hilkbd.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1998 Philip Blundell <philb@gnu.org> 4 * Copyright (C) 1998 Philip Blundell <philb@gnu.org>
5 * Copyright (C) 1999 Matthew Wilcox <willy@bofh.ai> 5 * Copyright (C) 1999 Matthew Wilcox <willy@bofh.ai>
6 * Copyright (C) 1999-2003 Helge Deller <deller@gmx.de> 6 * Copyright (C) 1999-2006 Helge Deller <deller@gmx.de>
7 * 7 *
8 * Very basic HP Human Interface Loop (HIL) driver. 8 * Very basic HP Human Interface Loop (HIL) driver.
9 * This driver handles the keyboard on HP300 (m68k) and on some 9 * This driver handles the keyboard on HP300 (m68k) and on some
@@ -90,7 +90,7 @@ static unsigned int hphilkeyb_keycode[HIL_KEYCODES_SET1_TBLSIZE] =
90 90
91/* HIL structure */ 91/* HIL structure */
92static struct { 92static struct {
93 struct input_dev dev; 93 struct input_dev *dev;
94 94
95 unsigned int curdev; 95 unsigned int curdev;
96 96
@@ -117,7 +117,7 @@ static void poll_finished(void)
117 down = (hil_dev.data[1] & 1) == 0; 117 down = (hil_dev.data[1] & 1) == 0;
118 scode = hil_dev.data[1] >> 1; 118 scode = hil_dev.data[1] >> 1;
119 key = hphilkeyb_keycode[scode]; 119 key = hphilkeyb_keycode[scode];
120 input_report_key(&hil_dev.dev, key, down); 120 input_report_key(hil_dev.dev, key, down);
121 break; 121 break;
122 } 122 }
123 hil_dev.curdev = 0; 123 hil_dev.curdev = 0;
@@ -207,9 +207,14 @@ hil_keyb_init(void)
207 unsigned int i, kbid; 207 unsigned int i, kbid;
208 wait_queue_head_t hil_wait; 208 wait_queue_head_t hil_wait;
209 209
210 if (hil_dev.dev.id.bustype) { 210 if (hil_dev.dev) {
211 return -ENODEV; /* already initialized */ 211 return -ENODEV; /* already initialized */
212 } 212 }
213
214 hil_dev.dev = input_allocate_device();
215 if (!hil_dev.dev)
216 return -ENOMEM;
217 hil_dev.dev->private = &hil_dev;
213 218
214#if defined(CONFIG_HP300) 219#if defined(CONFIG_HP300)
215 if (!hwreg_present((void *)(HILBASE + HIL_DATA))) 220 if (!hwreg_present((void *)(HILBASE + HIL_DATA)))
@@ -247,28 +252,26 @@ hil_keyb_init(void)
247 c = 0; 252 c = 0;
248 hil_do(HIL_WRITEKBDSADR, &c, 1); 253 hil_do(HIL_WRITEKBDSADR, &c, 1);
249 254
250 init_input_dev(&hil_dev.dev);
251
252 for (i = 0; i < HIL_KEYCODES_SET1_TBLSIZE; i++) 255 for (i = 0; i < HIL_KEYCODES_SET1_TBLSIZE; i++)
253 if (hphilkeyb_keycode[i] != KEY_RESERVED) 256 if (hphilkeyb_keycode[i] != KEY_RESERVED)
254 set_bit(hphilkeyb_keycode[i], hil_dev.dev.keybit); 257 set_bit(hphilkeyb_keycode[i], hil_dev.dev->keybit);
255 258
256 hil_dev.dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP); 259 hil_dev.dev->evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
257 hil_dev.dev.ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_SCROLLL); 260 hil_dev.dev->ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_SCROLLL);
258 hil_dev.dev.keycodemax = HIL_KEYCODES_SET1_TBLSIZE; 261 hil_dev.dev->keycodemax = HIL_KEYCODES_SET1_TBLSIZE;
259 hil_dev.dev.keycodesize = sizeof(hphilkeyb_keycode[0]); 262 hil_dev.dev->keycodesize = sizeof(hphilkeyb_keycode[0]);
260 hil_dev.dev.keycode = hphilkeyb_keycode; 263 hil_dev.dev->keycode = hphilkeyb_keycode;
261 hil_dev.dev.name = "HIL keyboard"; 264 hil_dev.dev->name = "HIL keyboard";
262 hil_dev.dev.phys = "hpkbd/input0"; 265 hil_dev.dev->phys = "hpkbd/input0";
263 266
264 hil_dev.dev.id.bustype = BUS_HIL; 267 hil_dev.dev->id.bustype = BUS_HIL;
265 hil_dev.dev.id.vendor = PCI_VENDOR_ID_HP; 268 hil_dev.dev->id.vendor = PCI_VENDOR_ID_HP;
266 hil_dev.dev.id.product = 0x0001; 269 hil_dev.dev->id.product = 0x0001;
267 hil_dev.dev.id.version = 0x0010; 270 hil_dev.dev->id.version = 0x0010;
268 271
269 input_register_device(&hil_dev.dev); 272 input_register_device(hil_dev.dev);
270 printk(KERN_INFO "input: %s, ID %d at 0x%08lx (irq %d) found and attached\n", 273 printk(KERN_INFO "input: %s, ID %d at 0x%08lx (irq %d) found and attached\n",
271 hil_dev.dev.name, kbid, HILBASE, HIL_IRQ); 274 hil_dev.dev->name, kbid, HILBASE, HIL_IRQ);
272 275
273 return 0; 276 return 0;
274} 277}
@@ -329,7 +332,9 @@ static void __exit hil_exit(void)
329 /* Turn off interrupts */ 332 /* Turn off interrupts */
330 hil_do(HIL_INTOFF, NULL, 0); 333 hil_do(HIL_INTOFF, NULL, 0);
331 334
332 input_unregister_device(&hil_dev.dev); 335 input_unregister_device(hil_dev.dev);
336
337 hil_dev.dev = NULL;
333 338
334#if defined(CONFIG_PARISC) 339#if defined(CONFIG_PARISC)
335 unregister_parisc_driver(&hil_driver); 340 unregister_parisc_driver(&hil_driver);
diff --git a/drivers/input/mouse/hil_ptr.c b/drivers/input/mouse/hil_ptr.c
index c2bf2ed07d..bfb564fd8f 100644
--- a/drivers/input/mouse/hil_ptr.c
+++ b/drivers/input/mouse/hil_ptr.c
@@ -55,7 +55,7 @@ MODULE_LICENSE("Dual BSD/GPL");
55#define HIL_PTR_MAX_LENGTH 16 55#define HIL_PTR_MAX_LENGTH 16
56 56
57struct hil_ptr { 57struct hil_ptr {
58 struct input_dev dev; 58 struct input_dev *dev;
59 struct serio *serio; 59 struct serio *serio;
60 60
61 /* Input buffer and index for packets from HIL bus. */ 61 /* Input buffer and index for packets from HIL bus. */
@@ -79,7 +79,7 @@ struct hil_ptr {
79/* Process a complete packet after transfer from the HIL */ 79/* Process a complete packet after transfer from the HIL */
80static void hil_ptr_process_record(struct hil_ptr *ptr) 80static void hil_ptr_process_record(struct hil_ptr *ptr)
81{ 81{
82 struct input_dev *dev = &ptr->dev; 82 struct input_dev *dev = ptr->dev;
83 hil_packet *data = ptr->data; 83 hil_packet *data = ptr->data;
84 hil_packet p; 84 hil_packet p;
85 int idx, i, cnt, laxis; 85 int idx, i, cnt, laxis;
@@ -148,12 +148,12 @@ static void hil_ptr_process_record(struct hil_ptr *ptr)
148 if (absdev) { 148 if (absdev) {
149 val = lo + (hi<<8); 149 val = lo + (hi<<8);
150#ifdef TABLET_AUTOADJUST 150#ifdef TABLET_AUTOADJUST
151 if (val < ptr->dev.absmin[ABS_X + i]) 151 if (val < dev->absmin[ABS_X + i])
152 ptr->dev.absmin[ABS_X + i] = val; 152 dev->absmin[ABS_X + i] = val;
153 if (val > ptr->dev.absmax[ABS_X + i]) 153 if (val > dev->absmax[ABS_X + i])
154 ptr->dev.absmax[ABS_X + i] = val; 154 dev->absmax[ABS_X + i] = val;
155#endif 155#endif
156 if (i%3) val = ptr->dev.absmax[ABS_X + i] - val; 156 if (i%3) val = dev->absmax[ABS_X + i] - val;
157 input_report_abs(dev, ABS_X + i, val); 157 input_report_abs(dev, ABS_X + i, val);
158 } else { 158 } else {
159 val = (int) (((int8_t)lo) | ((int8_t)hi<<8)); 159 val = (int) (((int8_t)lo) | ((int8_t)hi<<8));
@@ -233,26 +233,29 @@ static void hil_ptr_disconnect(struct serio *serio)
233 return; 233 return;
234 } 234 }
235 235
236 input_unregister_device(&ptr->dev);
237 serio_close(serio); 236 serio_close(serio);
237 input_unregister_device(ptr->dev);
238 kfree(ptr); 238 kfree(ptr);
239} 239}
240 240
241static int hil_ptr_connect(struct serio *serio, struct serio_driver *driver) 241static int hil_ptr_connect(struct serio *serio, struct serio_driver *driver)
242{ 242{
243 struct hil_ptr *ptr; 243 struct hil_ptr *ptr;
244 char *txt; 244 char *txt;
245 unsigned int i, naxsets, btntype; 245 unsigned int i, naxsets, btntype;
246 uint8_t did, *idd; 246 uint8_t did, *idd;
247 247
248 if (!(ptr = kmalloc(sizeof(struct hil_ptr), GFP_KERNEL))) return -ENOMEM; 248 if (!(ptr = kzalloc(sizeof(struct hil_ptr), GFP_KERNEL)))
249 memset(ptr, 0, sizeof(struct hil_ptr)); 249 return -ENOMEM;
250 250
251 if (serio_open(serio, driver)) goto bail0; 251 ptr->dev = input_allocate_device();
252 if (!ptr->dev) goto bail0;
253 ptr->dev->private = ptr;
254
255 if (serio_open(serio, driver)) goto bail1;
252 256
253 serio_set_drvdata(serio, ptr); 257 serio_set_drvdata(serio, ptr);
254 ptr->serio = serio; 258 ptr->serio = serio;
255 ptr->dev.private = ptr;
256 259
257 init_MUTEX_LOCKED(&(ptr->sem)); 260 init_MUTEX_LOCKED(&(ptr->sem));
258 261
@@ -283,25 +286,24 @@ static int hil_ptr_connect(struct serio *serio, struct serio_driver *driver)
283 286
284 up(&(ptr->sem)); 287 up(&(ptr->sem));
285 288
286 init_input_dev(&ptr->dev);
287 did = ptr->idd[0]; 289 did = ptr->idd[0];
288 idd = ptr->idd + 1; 290 idd = ptr->idd + 1;
289 txt = "unknown"; 291 txt = "unknown";
290 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_REL) { 292 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_REL) {
291 ptr->dev.evbit[0] = BIT(EV_REL); 293 ptr->dev->evbit[0] = BIT(EV_REL);
292 txt = "relative"; 294 txt = "relative";
293 } 295 }
294 296
295 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_ABS) { 297 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_ABS) {
296 ptr->dev.evbit[0] = BIT(EV_ABS); 298 ptr->dev->evbit[0] = BIT(EV_ABS);
297 txt = "absolute"; 299 txt = "absolute";
298 } 300 }
299 if (!ptr->dev.evbit[0]) { 301 if (!ptr->dev->evbit[0]) {
300 goto bail1; 302 goto bail2;
301 } 303 }
302 304
303 ptr->nbtn = HIL_IDD_NUM_BUTTONS(idd); 305 ptr->nbtn = HIL_IDD_NUM_BUTTONS(idd);
304 if (ptr->nbtn) ptr->dev.evbit[0] |= BIT(EV_KEY); 306 if (ptr->nbtn) ptr->dev->evbit[0] |= BIT(EV_KEY);
305 307
306 naxsets = HIL_IDD_NUM_AXSETS(*idd); 308 naxsets = HIL_IDD_NUM_AXSETS(*idd);
307 ptr->naxes = HIL_IDD_NUM_AXES_PER_SET(*idd); 309 ptr->naxes = HIL_IDD_NUM_AXES_PER_SET(*idd);
@@ -325,7 +327,7 @@ static int hil_ptr_connect(struct serio *serio, struct serio_driver *driver)
325 btntype = BTN_MOUSE; 327 btntype = BTN_MOUSE;
326 328
327 for (i = 0; i < ptr->nbtn; i++) { 329 for (i = 0; i < ptr->nbtn; i++) {
328 set_bit(btntype | i, ptr->dev.keybit); 330 set_bit(btntype | i, ptr->dev->keybit);
329 ptr->btnmap[i] = btntype | i; 331 ptr->btnmap[i] = btntype | i;
330 } 332 }
331 333
@@ -337,50 +339,52 @@ static int hil_ptr_connect(struct serio *serio, struct serio_driver *driver)
337 339
338 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_REL) { 340 if ((did & HIL_IDD_DID_TYPE_MASK) == HIL_IDD_DID_TYPE_REL) {
339 for (i = 0; i < ptr->naxes; i++) { 341 for (i = 0; i < ptr->naxes; i++) {
340 set_bit(REL_X + i, ptr->dev.relbit); 342 set_bit(REL_X + i, ptr->dev->relbit);
341 } 343 }
342 for (i = 3; (i < ptr->naxes + 3) && (naxsets > 1); i++) { 344 for (i = 3; (i < ptr->naxes + 3) && (naxsets > 1); i++) {
343 set_bit(REL_X + i, ptr->dev.relbit); 345 set_bit(REL_X + i, ptr->dev->relbit);
344 } 346 }
345 } else { 347 } else {
346 for (i = 0; i < ptr->naxes; i++) { 348 for (i = 0; i < ptr->naxes; i++) {
347 set_bit(ABS_X + i, ptr->dev.absbit); 349 set_bit(ABS_X + i, ptr->dev->absbit);
348 ptr->dev.absmin[ABS_X + i] = 0; 350 ptr->dev->absmin[ABS_X + i] = 0;
349 ptr->dev.absmax[ABS_X + i] = 351 ptr->dev->absmax[ABS_X + i] =
350 HIL_IDD_AXIS_MAX((ptr->idd + 1), i); 352 HIL_IDD_AXIS_MAX((ptr->idd + 1), i);
351 } 353 }
352 for (i = 3; (i < ptr->naxes + 3) && (naxsets > 1); i++) { 354 for (i = 3; (i < ptr->naxes + 3) && (naxsets > 1); i++) {
353 set_bit(ABS_X + i, ptr->dev.absbit); 355 set_bit(ABS_X + i, ptr->dev->absbit);
354 ptr->dev.absmin[ABS_X + i] = 0; 356 ptr->dev->absmin[ABS_X + i] = 0;
355 ptr->dev.absmax[ABS_X + i] = 357 ptr->dev->absmax[ABS_X + i] =
356 HIL_IDD_AXIS_MAX((ptr->idd + 1), (i - 3)); 358 HIL_IDD_AXIS_MAX((ptr->idd + 1), (i - 3));
357 } 359 }
358#ifdef TABLET_AUTOADJUST 360#ifdef TABLET_AUTOADJUST
359 for (i = 0; i < ABS_MAX; i++) { 361 for (i = 0; i < ABS_MAX; i++) {
360 int diff = ptr->dev.absmax[ABS_X + i] / 10; 362 int diff = ptr->dev->absmax[ABS_X + i] / 10;
361 ptr->dev.absmin[ABS_X + i] += diff; 363 ptr->dev->absmin[ABS_X + i] += diff;
362 ptr->dev.absmax[ABS_X + i] -= diff; 364 ptr->dev->absmax[ABS_X + i] -= diff;
363 } 365 }
364#endif 366#endif
365 } 367 }
366 368
367 ptr->dev.name = strlen(ptr->rnm) ? ptr->rnm : HIL_GENERIC_NAME; 369 ptr->dev->name = strlen(ptr->rnm) ? ptr->rnm : HIL_GENERIC_NAME;
368 370
369 ptr->dev.id.bustype = BUS_HIL; 371 ptr->dev->id.bustype = BUS_HIL;
370 ptr->dev.id.vendor = PCI_VENDOR_ID_HP; 372 ptr->dev->id.vendor = PCI_VENDOR_ID_HP;
371 ptr->dev.id.product = 0x0001; /* TODO: get from ptr->rsc */ 373 ptr->dev->id.product = 0x0001; /* TODO: get from ptr->rsc */
372 ptr->dev.id.version = 0x0100; /* TODO: get from ptr->rsc */ 374 ptr->dev->id.version = 0x0100; /* TODO: get from ptr->rsc */
373 ptr->dev.dev = &serio->dev; 375 ptr->dev->dev = &serio->dev;
374 376
375 input_register_device(&ptr->dev); 377 input_register_device(ptr->dev);
376 printk(KERN_INFO "input: %s (%s), ID: %d\n", 378 printk(KERN_INFO "input: %s (%s), ID: %d\n",
377 ptr->dev.name, 379 ptr->dev->name,
378 (btntype == BTN_MOUSE) ? "HIL mouse":"HIL tablet or touchpad", 380 (btntype == BTN_MOUSE) ? "HIL mouse":"HIL tablet or touchpad",
379 did); 381 did);
380 382
381 return 0; 383 return 0;
382 bail1: 384 bail2:
383 serio_close(serio); 385 serio_close(serio);
386 bail1:
387 input_free_device(ptr->dev);
384 bail0: 388 bail0:
385 kfree(ptr); 389 kfree(ptr);
386 serio_set_drvdata(serio, NULL); 390 serio_set_drvdata(serio, NULL);
diff --git a/drivers/input/serio/gscps2.c b/drivers/input/serio/gscps2.c
index a7b0de0f92..c0b1e4beca 100644
--- a/drivers/input/serio/gscps2.c
+++ b/drivers/input/serio/gscps2.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/input/serio/gscps2.c 2 * drivers/input/serio/gscps2.c
3 * 3 *
4 * Copyright (c) 2004 Helge Deller <deller@gmx.de> 4 * Copyright (c) 2004-2006 Helge Deller <deller@gmx.de>
5 * Copyright (c) 2002 Laurent Canet <canetl@esiee.fr> 5 * Copyright (c) 2002 Laurent Canet <canetl@esiee.fr>
6 * Copyright (c) 2002 Thibaut Varene <varenet@parisc-linux.org> 6 * Copyright (c) 2002 Thibaut Varene <varenet@parisc-linux.org>
7 * 7 *
@@ -354,7 +354,7 @@ static int __init gscps2_probe(struct parisc_device *dev)
354 memset(serio, 0, sizeof(struct serio)); 354 memset(serio, 0, sizeof(struct serio));
355 ps2port->port = serio; 355 ps2port->port = serio;
356 ps2port->padev = dev; 356 ps2port->padev = dev;
357 ps2port->addr = ioremap(hpa, GSC_STATUS + 4); 357 ps2port->addr = ioremap_nocache(hpa, GSC_STATUS + 4);
358 spin_lock_init(&ps2port->lock); 358 spin_lock_init(&ps2port->lock);
359 359
360 gscps2_reset(ps2port); 360 gscps2_reset(ps2port);
diff --git a/drivers/isdn/sc/ioctl.c b/drivers/isdn/sc/ioctl.c
index 94c9afb701..f4f71226a0 100644
--- a/drivers/isdn/sc/ioctl.c
+++ b/drivers/isdn/sc/ioctl.c
@@ -46,7 +46,8 @@ int sc_ioctl(int card, scs_ioctl *data)
46 pr_debug("%s: SCIOCRESET: ioctl received\n", 46 pr_debug("%s: SCIOCRESET: ioctl received\n",
47 sc_adapter[card]->devicename); 47 sc_adapter[card]->devicename);
48 sc_adapter[card]->StartOnReset = 0; 48 sc_adapter[card]->StartOnReset = 0;
49 return (reset(card)); 49 kfree(rcvmsg);
50 return reset(card);
50 } 51 }
51 52
52 case SCIOCLOAD: 53 case SCIOCLOAD:
@@ -183,7 +184,7 @@ int sc_ioctl(int card, scs_ioctl *data)
183 sc_adapter[card]->devicename); 184 sc_adapter[card]->devicename);
184 185
185 spid = kmalloc(SCIOC_SPIDSIZE, GFP_KERNEL); 186 spid = kmalloc(SCIOC_SPIDSIZE, GFP_KERNEL);
186 if(!spid) { 187 if (!spid) {
187 kfree(rcvmsg); 188 kfree(rcvmsg);
188 return -ENOMEM; 189 return -ENOMEM;
189 } 190 }
@@ -195,10 +196,10 @@ int sc_ioctl(int card, scs_ioctl *data)
195 if (!status) { 196 if (!status) {
196 pr_debug("%s: SCIOCGETSPID: command successful\n", 197 pr_debug("%s: SCIOCGETSPID: command successful\n",
197 sc_adapter[card]->devicename); 198 sc_adapter[card]->devicename);
198 } 199 } else {
199 else {
200 pr_debug("%s: SCIOCGETSPID: command failed (status = %d)\n", 200 pr_debug("%s: SCIOCGETSPID: command failed (status = %d)\n",
201 sc_adapter[card]->devicename, status); 201 sc_adapter[card]->devicename, status);
202 kfree(spid);
202 kfree(rcvmsg); 203 kfree(rcvmsg);
203 return status; 204 return status;
204 } 205 }
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
new file mode 100644
index 0000000000..2c4f20b7f0
--- /dev/null
+++ b/drivers/leds/Kconfig
@@ -0,0 +1,77 @@
1
2menu "LED devices"
3
4config NEW_LEDS
5 bool "LED Support"
6 help
7 Say Y to enable Linux LED support. This is not related to standard
8 keyboard LEDs which are controlled via the input system.
9
10config LEDS_CLASS
11 tristate "LED Class Support"
12 depends NEW_LEDS
13 help
14 This option enables the led sysfs class in /sys/class/leds. You'll
15 need this to do anything useful with LEDs. If unsure, say N.
16
17config LEDS_TRIGGERS
18 bool "LED Trigger support"
19 depends NEW_LEDS
20 help
21 This option enables trigger support for the leds class.
22 These triggers allow kernel events to drive the LEDs and can
23 be configured via sysfs. If unsure, say Y.
24
25config LEDS_CORGI
26 tristate "LED Support for the Sharp SL-C7x0 series"
27 depends LEDS_CLASS && PXA_SHARP_C7xx
28 help
29 This option enables support for the LEDs on Sharp Zaurus
30 SL-C7x0 series (C700, C750, C760, C860).
31
32config LEDS_LOCOMO
33 tristate "LED Support for Locomo device"
34 depends LEDS_CLASS && SHARP_LOCOMO
35 help
36 This option enables support for the LEDs on Sharp Locomo.
37 Zaurus models SL-5500 and SL-5600.
38
39config LEDS_SPITZ
40 tristate "LED Support for the Sharp SL-Cxx00 series"
41 depends LEDS_CLASS && PXA_SHARP_Cxx00
42 help
43 This option enables support for the LEDs on Sharp Zaurus
44 SL-Cxx00 series (C1000, C3000, C3100).
45
46config LEDS_IXP4XX
47 tristate "LED Support for GPIO connected LEDs on IXP4XX processors"
48 depends LEDS_CLASS && ARCH_IXP4XX
49 help
50 This option enables support for the LEDs connected to GPIO
51 outputs of the Intel IXP4XX processors. To be useful the
52 particular board must have LEDs and they must be connected
53 to the GPIO lines. If unsure, say Y.
54
55config LEDS_TOSA
56 tristate "LED Support for the Sharp SL-6000 series"
57 depends LEDS_CLASS && PXA_SHARPSL
58 help
59 This option enables support for the LEDs on Sharp Zaurus
60 SL-6000 series.
61
62config LEDS_TRIGGER_TIMER
63 tristate "LED Timer Trigger"
64 depends LEDS_TRIGGERS
65 help
66 This allows LEDs to be controlled by a programmable timer
67 via sysfs. If unsure, say Y.
68
69config LEDS_TRIGGER_IDE_DISK
70 bool "LED Timer Trigger"
71 depends LEDS_TRIGGERS && BLK_DEV_IDEDISK
72 help
73 This allows LEDs to be controlled by IDE disk activity.
74 If unsure, say Y.
75
76endmenu
77
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
new file mode 100644
index 0000000000..40699d3cab
--- /dev/null
+++ b/drivers/leds/Makefile
@@ -0,0 +1,16 @@
1
2# LED Core
3obj-$(CONFIG_NEW_LEDS) += led-core.o
4obj-$(CONFIG_LEDS_CLASS) += led-class.o
5obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
6
7# LED Platform Drivers
8obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
9obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
10obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
11obj-$(CONFIG_LEDS_IXP4XX) += leds-ixp4xx-gpio.o
12obj-$(CONFIG_LEDS_TOSA) += leds-tosa.o
13
14# LED Triggers
15obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
16obj-$(CONFIG_LEDS_TRIGGER_IDE_DISK) += ledtrig-ide-disk.o
diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c
new file mode 100644
index 0000000000..b0b5d05fad
--- /dev/null
+++ b/drivers/leds/led-class.c
@@ -0,0 +1,167 @@
1/*
2 * LED Class Core
3 *
4 * Copyright (C) 2005 John Lenz <lenz@cs.wisc.edu>
5 * Copyright (C) 2005-2006 Richard Purdie <rpurdie@openedhand.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/list.h>
17#include <linux/spinlock.h>
18#include <linux/device.h>
19#include <linux/sysdev.h>
20#include <linux/timer.h>
21#include <linux/err.h>
22#include <linux/leds.h>
23#include "leds.h"
24
25static struct class *leds_class;
26
27static ssize_t led_brightness_show(struct class_device *dev, char *buf)
28{
29 struct led_classdev *led_cdev = class_get_devdata(dev);
30 ssize_t ret = 0;
31
32 /* no lock needed for this */
33 sprintf(buf, "%u\n", led_cdev->brightness);
34 ret = strlen(buf) + 1;
35
36 return ret;
37}
38
39static ssize_t led_brightness_store(struct class_device *dev,
40 const char *buf, size_t size)
41{
42 struct led_classdev *led_cdev = class_get_devdata(dev);
43 ssize_t ret = -EINVAL;
44 char *after;
45 unsigned long state = simple_strtoul(buf, &after, 10);
46
47 if (after - buf > 0) {
48 ret = after - buf;
49 led_set_brightness(led_cdev, state);
50 }
51
52 return ret;
53}
54
55static CLASS_DEVICE_ATTR(brightness, 0644, led_brightness_show,
56 led_brightness_store);
57#ifdef CONFIG_LEDS_TRIGGERS
58static CLASS_DEVICE_ATTR(trigger, 0644, led_trigger_show, led_trigger_store);
59#endif
60
61/**
62 * led_classdev_suspend - suspend an led_classdev.
63 * @led_cdev: the led_classdev to suspend.
64 */
65void led_classdev_suspend(struct led_classdev *led_cdev)
66{
67 led_cdev->flags |= LED_SUSPENDED;
68 led_cdev->brightness_set(led_cdev, 0);
69}
70EXPORT_SYMBOL_GPL(led_classdev_suspend);
71
72/**
73 * led_classdev_resume - resume an led_classdev.
74 * @led_cdev: the led_classdev to resume.
75 */
76void led_classdev_resume(struct led_classdev *led_cdev)
77{
78 led_cdev->brightness_set(led_cdev, led_cdev->brightness);
79 led_cdev->flags &= ~LED_SUSPENDED;
80}
81EXPORT_SYMBOL_GPL(led_classdev_resume);
82
83/**
84 * led_classdev_register - register a new object of led_classdev class.
85 * @dev: The device to register.
86 * @led_cdev: the led_classdev structure for this device.
87 */
88int led_classdev_register(struct device *parent, struct led_classdev *led_cdev)
89{
90 led_cdev->class_dev = class_device_create(leds_class, NULL, 0,
91 parent, "%s", led_cdev->name);
92 if (unlikely(IS_ERR(led_cdev->class_dev)))
93 return PTR_ERR(led_cdev->class_dev);
94
95 class_set_devdata(led_cdev->class_dev, led_cdev);
96
97 /* register the attributes */
98 class_device_create_file(led_cdev->class_dev,
99 &class_device_attr_brightness);
100
101 /* add to the list of leds */
102 write_lock(&leds_list_lock);
103 list_add_tail(&led_cdev->node, &leds_list);
104 write_unlock(&leds_list_lock);
105
106#ifdef CONFIG_LEDS_TRIGGERS
107 rwlock_init(&led_cdev->trigger_lock);
108
109 led_trigger_set_default(led_cdev);
110
111 class_device_create_file(led_cdev->class_dev,
112 &class_device_attr_trigger);
113#endif
114
115 printk(KERN_INFO "Registered led device: %s\n",
116 led_cdev->class_dev->class_id);
117
118 return 0;
119}
120EXPORT_SYMBOL_GPL(led_classdev_register);
121
122/**
123 * led_classdev_unregister - unregisters a object of led_properties class.
124 * @led_cdev: the led device to unreigister
125 *
126 * Unregisters a previously registered via led_classdev_register object.
127 */
128void led_classdev_unregister(struct led_classdev *led_cdev)
129{
130 class_device_remove_file(led_cdev->class_dev,
131 &class_device_attr_brightness);
132#ifdef CONFIG_LEDS_TRIGGERS
133 class_device_remove_file(led_cdev->class_dev,
134 &class_device_attr_trigger);
135 write_lock(&led_cdev->trigger_lock);
136 if (led_cdev->trigger)
137 led_trigger_set(led_cdev, NULL);
138 write_unlock(&led_cdev->trigger_lock);
139#endif
140
141 class_device_unregister(led_cdev->class_dev);
142
143 write_lock(&leds_list_lock);
144 list_del(&led_cdev->node);
145 write_unlock(&leds_list_lock);
146}
147EXPORT_SYMBOL_GPL(led_classdev_unregister);
148
149static int __init leds_init(void)
150{
151 leds_class = class_create(THIS_MODULE, "leds");
152 if (IS_ERR(leds_class))
153 return PTR_ERR(leds_class);
154 return 0;
155}
156
157static void __exit leds_exit(void)
158{
159 class_destroy(leds_class);
160}
161
162subsys_initcall(leds_init);
163module_exit(leds_exit);
164
165MODULE_AUTHOR("John Lenz, Richard Purdie");
166MODULE_LICENSE("GPL");
167MODULE_DESCRIPTION("LED Class Interface");
diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c
new file mode 100644
index 0000000000..fe6541326c
--- /dev/null
+++ b/drivers/leds/led-core.c
@@ -0,0 +1,25 @@
1/*
2 * LED Class Core
3 *
4 * Copyright 2005-2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/module.h>
17#include <linux/spinlock.h>
18#include <linux/leds.h>
19#include "leds.h"
20
21rwlock_t leds_list_lock = RW_LOCK_UNLOCKED;
22LIST_HEAD(leds_list);
23
24EXPORT_SYMBOL_GPL(leds_list);
25EXPORT_SYMBOL_GPL(leds_list_lock);
diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c
new file mode 100644
index 0000000000..5e2cd8be11
--- /dev/null
+++ b/drivers/leds/led-triggers.c
@@ -0,0 +1,239 @@
1/*
2 * LED Triggers Core
3 *
4 * Copyright 2005-2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/list.h>
19#include <linux/spinlock.h>
20#include <linux/device.h>
21#include <linux/sysdev.h>
22#include <linux/timer.h>
23#include <linux/leds.h>
24#include "leds.h"
25
26/*
27 * Nests outside led_cdev->trigger_lock
28 */
29static rwlock_t triggers_list_lock = RW_LOCK_UNLOCKED;
30static LIST_HEAD(trigger_list);
31
32ssize_t led_trigger_store(struct class_device *dev, const char *buf,
33 size_t count)
34{
35 struct led_classdev *led_cdev = class_get_devdata(dev);
36 char trigger_name[TRIG_NAME_MAX];
37 struct led_trigger *trig;
38 size_t len;
39
40 trigger_name[sizeof(trigger_name) - 1] = '\0';
41 strncpy(trigger_name, buf, sizeof(trigger_name) - 1);
42 len = strlen(trigger_name);
43
44 if (len && trigger_name[len - 1] == '\n')
45 trigger_name[len - 1] = '\0';
46
47 if (!strcmp(trigger_name, "none")) {
48 write_lock(&led_cdev->trigger_lock);
49 led_trigger_set(led_cdev, NULL);
50 write_unlock(&led_cdev->trigger_lock);
51 return count;
52 }
53
54 read_lock(&triggers_list_lock);
55 list_for_each_entry(trig, &trigger_list, next_trig) {
56 if (!strcmp(trigger_name, trig->name)) {
57 write_lock(&led_cdev->trigger_lock);
58 led_trigger_set(led_cdev, trig);
59 write_unlock(&led_cdev->trigger_lock);
60
61 read_unlock(&triggers_list_lock);
62 return count;
63 }
64 }
65 read_unlock(&triggers_list_lock);
66
67 return -EINVAL;
68}
69
70
71ssize_t led_trigger_show(struct class_device *dev, char *buf)
72{
73 struct led_classdev *led_cdev = class_get_devdata(dev);
74 struct led_trigger *trig;
75 int len = 0;
76
77 read_lock(&triggers_list_lock);
78 read_lock(&led_cdev->trigger_lock);
79
80 if (!led_cdev->trigger)
81 len += sprintf(buf+len, "[none] ");
82 else
83 len += sprintf(buf+len, "none ");
84
85 list_for_each_entry(trig, &trigger_list, next_trig) {
86 if (led_cdev->trigger && !strcmp(led_cdev->trigger->name,
87 trig->name))
88 len += sprintf(buf+len, "[%s] ", trig->name);
89 else
90 len += sprintf(buf+len, "%s ", trig->name);
91 }
92 read_unlock(&led_cdev->trigger_lock);
93 read_unlock(&triggers_list_lock);
94
95 len += sprintf(len+buf, "\n");
96 return len;
97}
98
99void led_trigger_event(struct led_trigger *trigger,
100 enum led_brightness brightness)
101{
102 struct list_head *entry;
103
104 if (!trigger)
105 return;
106
107 read_lock(&trigger->leddev_list_lock);
108 list_for_each(entry, &trigger->led_cdevs) {
109 struct led_classdev *led_cdev;
110
111 led_cdev = list_entry(entry, struct led_classdev, trig_list);
112 led_set_brightness(led_cdev, brightness);
113 }
114 read_unlock(&trigger->leddev_list_lock);
115}
116
117/* Caller must ensure led_cdev->trigger_lock held */
118void led_trigger_set(struct led_classdev *led_cdev, struct led_trigger *trigger)
119{
120 unsigned long flags;
121
122 /* Remove any existing trigger */
123 if (led_cdev->trigger) {
124 write_lock_irqsave(&led_cdev->trigger->leddev_list_lock, flags);
125 list_del(&led_cdev->trig_list);
126 write_unlock_irqrestore(&led_cdev->trigger->leddev_list_lock, flags);
127 if (led_cdev->trigger->deactivate)
128 led_cdev->trigger->deactivate(led_cdev);
129 }
130 if (trigger) {
131 write_lock_irqsave(&trigger->leddev_list_lock, flags);
132 list_add_tail(&led_cdev->trig_list, &trigger->led_cdevs);
133 write_unlock_irqrestore(&trigger->leddev_list_lock, flags);
134 if (trigger->activate)
135 trigger->activate(led_cdev);
136 }
137 led_cdev->trigger = trigger;
138}
139
140void led_trigger_set_default(struct led_classdev *led_cdev)
141{
142 struct led_trigger *trig;
143
144 if (!led_cdev->default_trigger)
145 return;
146
147 read_lock(&triggers_list_lock);
148 write_lock(&led_cdev->trigger_lock);
149 list_for_each_entry(trig, &trigger_list, next_trig) {
150 if (!strcmp(led_cdev->default_trigger, trig->name))
151 led_trigger_set(led_cdev, trig);
152 }
153 write_unlock(&led_cdev->trigger_lock);
154 read_unlock(&triggers_list_lock);
155}
156
157int led_trigger_register(struct led_trigger *trigger)
158{
159 struct led_classdev *led_cdev;
160
161 rwlock_init(&trigger->leddev_list_lock);
162 INIT_LIST_HEAD(&trigger->led_cdevs);
163
164 /* Add to the list of led triggers */
165 write_lock(&triggers_list_lock);
166 list_add_tail(&trigger->next_trig, &trigger_list);
167 write_unlock(&triggers_list_lock);
168
169 /* Register with any LEDs that have this as a default trigger */
170 read_lock(&leds_list_lock);
171 list_for_each_entry(led_cdev, &leds_list, node) {
172 write_lock(&led_cdev->trigger_lock);
173 if (!led_cdev->trigger && led_cdev->default_trigger &&
174 !strcmp(led_cdev->default_trigger, trigger->name))
175 led_trigger_set(led_cdev, trigger);
176 write_unlock(&led_cdev->trigger_lock);
177 }
178 read_unlock(&leds_list_lock);
179
180 return 0;
181}
182
183void led_trigger_register_simple(const char *name, struct led_trigger **tp)
184{
185 struct led_trigger *trigger;
186
187 trigger = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
188
189 if (trigger) {
190 trigger->name = name;
191 led_trigger_register(trigger);
192 }
193 *tp = trigger;
194}
195
196void led_trigger_unregister(struct led_trigger *trigger)
197{
198 struct led_classdev *led_cdev;
199
200 /* Remove from the list of led triggers */
201 write_lock(&triggers_list_lock);
202 list_del(&trigger->next_trig);
203 write_unlock(&triggers_list_lock);
204
205 /* Remove anyone actively using this trigger */
206 read_lock(&leds_list_lock);
207 list_for_each_entry(led_cdev, &leds_list, node) {
208 write_lock(&led_cdev->trigger_lock);
209 if (led_cdev->trigger == trigger)
210 led_trigger_set(led_cdev, NULL);
211 write_unlock(&led_cdev->trigger_lock);
212 }
213 read_unlock(&leds_list_lock);
214}
215
216void led_trigger_unregister_simple(struct led_trigger *trigger)
217{
218 led_trigger_unregister(trigger);
219 kfree(trigger);
220}
221
222/* Used by LED Class */
223EXPORT_SYMBOL_GPL(led_trigger_set);
224EXPORT_SYMBOL_GPL(led_trigger_set_default);
225EXPORT_SYMBOL_GPL(led_trigger_show);
226EXPORT_SYMBOL_GPL(led_trigger_store);
227
228/* LED Trigger Interface */
229EXPORT_SYMBOL_GPL(led_trigger_register);
230EXPORT_SYMBOL_GPL(led_trigger_unregister);
231
232/* Simple LED Tigger Interface */
233EXPORT_SYMBOL_GPL(led_trigger_register_simple);
234EXPORT_SYMBOL_GPL(led_trigger_unregister_simple);
235EXPORT_SYMBOL_GPL(led_trigger_event);
236
237MODULE_AUTHOR("Richard Purdie");
238MODULE_LICENSE("GPL");
239MODULE_DESCRIPTION("LED Triggers Core");
diff --git a/drivers/leds/leds-corgi.c b/drivers/leds/leds-corgi.c
new file mode 100644
index 0000000000..bb7d84df01
--- /dev/null
+++ b/drivers/leds/leds-corgi.c
@@ -0,0 +1,121 @@
1/*
2 * LED Triggers Core
3 *
4 * Copyright 2005-2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/leds.h>
19#include <asm/mach-types.h>
20#include <asm/arch/corgi.h>
21#include <asm/arch/hardware.h>
22#include <asm/arch/pxa-regs.h>
23#include <asm/hardware/scoop.h>
24
25static void corgiled_amber_set(struct led_classdev *led_cdev, enum led_brightness value)
26{
27 if (value)
28 GPSR0 = GPIO_bit(CORGI_GPIO_LED_ORANGE);
29 else
30 GPCR0 = GPIO_bit(CORGI_GPIO_LED_ORANGE);
31}
32
33static void corgiled_green_set(struct led_classdev *led_cdev, enum led_brightness value)
34{
35 if (value)
36 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
37 else
38 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
39}
40
41static struct led_classdev corgi_amber_led = {
42 .name = "corgi:amber",
43 .default_trigger = "sharpsl-charge",
44 .brightness_set = corgiled_amber_set,
45};
46
47static struct led_classdev corgi_green_led = {
48 .name = "corgi:green",
49 .default_trigger = "nand-disk",
50 .brightness_set = corgiled_green_set,
51};
52
53#ifdef CONFIG_PM
54static int corgiled_suspend(struct platform_device *dev, pm_message_t state)
55{
56#ifdef CONFIG_LEDS_TRIGGERS
57 if (corgi_amber_led.trigger && strcmp(corgi_amber_led.trigger->name, "sharpsl-charge"))
58#endif
59 led_classdev_suspend(&corgi_amber_led);
60 led_classdev_suspend(&corgi_green_led);
61 return 0;
62}
63
64static int corgiled_resume(struct platform_device *dev)
65{
66 led_classdev_resume(&corgi_amber_led);
67 led_classdev_resume(&corgi_green_led);
68 return 0;
69}
70#endif
71
72static int corgiled_probe(struct platform_device *pdev)
73{
74 int ret;
75
76 ret = led_classdev_register(&pdev->dev, &corgi_amber_led);
77 if (ret < 0)
78 return ret;
79
80 ret = led_classdev_register(&pdev->dev, &corgi_green_led);
81 if (ret < 0)
82 led_classdev_unregister(&corgi_amber_led);
83
84 return ret;
85}
86
87static int corgiled_remove(struct platform_device *pdev)
88{
89 led_classdev_unregister(&corgi_amber_led);
90 led_classdev_unregister(&corgi_green_led);
91 return 0;
92}
93
94static struct platform_driver corgiled_driver = {
95 .probe = corgiled_probe,
96 .remove = corgiled_remove,
97#ifdef CONFIG_PM
98 .suspend = corgiled_suspend,
99 .resume = corgiled_resume,
100#endif
101 .driver = {
102 .name = "corgi-led",
103 },
104};
105
106static int __init corgiled_init(void)
107{
108 return platform_driver_register(&corgiled_driver);
109}
110
111static void __exit corgiled_exit(void)
112{
113 platform_driver_unregister(&corgiled_driver);
114}
115
116module_init(corgiled_init);
117module_exit(corgiled_exit);
118
119MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
120MODULE_DESCRIPTION("Corgi LED driver");
121MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-ixp4xx-gpio.c b/drivers/leds/leds-ixp4xx-gpio.c
new file mode 100644
index 0000000000..30ced150e4
--- /dev/null
+++ b/drivers/leds/leds-ixp4xx-gpio.c
@@ -0,0 +1,215 @@
1/*
2 * IXP4XX GPIO driver LED driver
3 *
4 * Author: John Bowler <jbowler@acm.org>
5 *
6 * Copyright (c) 2006 John Bowler
7 *
8 * Permission is hereby granted, free of charge, to any
9 * person obtaining a copy of this software and associated
10 * documentation files (the "Software"), to deal in the
11 * Software without restriction, including without
12 * limitation the rights to use, copy, modify, merge,
13 * publish, distribute, sublicense, and/or sell copies of
14 * the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the
16 * following conditions:
17 *
18 * The above copyright notice and this permission notice
19 * shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
23 * ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
24 * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
25 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
26 * SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
27 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
29 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
30 * OTHER DEALINGS IN THE SOFTWARE.
31 *
32 */
33
34#include <linux/config.h>
35#include <linux/kernel.h>
36#include <linux/init.h>
37#include <linux/platform_device.h>
38#include <linux/spinlock.h>
39#include <linux/leds.h>
40#include <asm/arch/hardware.h>
41
42extern spinlock_t gpio_lock;
43
44/* Up to 16 gpio lines are possible. */
45#define GPIO_MAX 16
46static struct ixp4xxgpioled_device {
47 struct led_classdev ancestor;
48 int flags;
49} ixp4xxgpioled_devices[GPIO_MAX];
50
51void ixp4xxgpioled_brightness_set(struct led_classdev *pled,
52 enum led_brightness value)
53{
54 const struct ixp4xxgpioled_device *const ixp4xx_dev =
55 container_of(pled, struct ixp4xxgpioled_device, ancestor);
56 const u32 gpio_pin = ixp4xx_dev - ixp4xxgpioled_devices;
57
58 if (gpio_pin < GPIO_MAX && ixp4xx_dev->ancestor.name != 0) {
59 /* Set or clear the 'gpio_pin' bit according to the style
60 * and the required setting (value > 0 == on)
61 */
62 const int gpio_value =
63 (value > 0) == (ixp4xx_dev->flags != IXP4XX_GPIO_LOW) ?
64 IXP4XX_GPIO_HIGH : IXP4XX_GPIO_LOW;
65
66 {
67 unsigned long flags;
68 spin_lock_irqsave(&gpio_lock, flags);
69 gpio_line_set(gpio_pin, gpio_value);
70 spin_unlock_irqrestore(&gpio_lock, flags);
71 }
72 }
73}
74
75/* LEDs are described in resources, the following iterates over the valid
76 * LED resources.
77 */
78#define for_all_leds(i, pdev) \
79 for (i=0; i<pdev->num_resources; ++i) \
80 if (pdev->resource[i].start < GPIO_MAX && \
81 pdev->resource[i].name != 0)
82
83/* The following applies 'operation' to each LED from the given platform,
84 * the function always returns 0 to allow tail call elimination.
85 */
86static int apply_to_all_leds(struct platform_device *pdev,
87 void (*operation)(struct led_classdev *pled))
88{
89 int i;
90
91 for_all_leds(i, pdev)
92 operation(&ixp4xxgpioled_devices[pdev->resource[i].start].ancestor);
93 return 0;
94}
95
96#ifdef CONFIG_PM
97static int ixp4xxgpioled_suspend(struct platform_device *pdev,
98 pm_message_t state)
99{
100 return apply_to_all_leds(pdev, led_classdev_suspend);
101}
102
103static int ixp4xxgpioled_resume(struct platform_device *pdev)
104{
105 return apply_to_all_leds(pdev, led_classdev_resume);
106}
107#endif
108
109static void ixp4xxgpioled_remove_one_led(struct led_classdev *pled)
110{
111 led_classdev_unregister(pled);
112 pled->name = 0;
113}
114
115static int ixp4xxgpioled_remove(struct platform_device *pdev)
116{
117 return apply_to_all_leds(pdev, ixp4xxgpioled_remove_one_led);
118}
119
120static int ixp4xxgpioled_probe(struct platform_device *pdev)
121{
122 /* The board level has to tell the driver where the
123 * LEDs are connected - there is no way to find out
124 * electrically. It must also say whether the GPIO
125 * lines are active high or active low.
126 *
127 * To do this read the num_resources (the number of
128 * LEDs) and the struct resource (the data for each
129 * LED). The name comes from the resource, and it
130 * isn't copied.
131 */
132 int i;
133
134 for_all_leds(i, pdev) {
135 const u8 gpio_pin = pdev->resource[i].start;
136 int rc;
137
138 if (ixp4xxgpioled_devices[gpio_pin].ancestor.name == 0) {
139 unsigned long flags;
140
141 spin_lock_irqsave(&gpio_lock, flags);
142 gpio_line_config(gpio_pin, IXP4XX_GPIO_OUT);
143 /* The config can, apparently, reset the state,
144 * I suspect the gpio line may be an input and
145 * the config may cause the line to be latched,
146 * so the setting depends on how the LED is
147 * connected to the line (which affects how it
148 * floats if not driven).
149 */
150 gpio_line_set(gpio_pin, IXP4XX_GPIO_HIGH);
151 spin_unlock_irqrestore(&gpio_lock, flags);
152
153 ixp4xxgpioled_devices[gpio_pin].flags =
154 pdev->resource[i].flags & IORESOURCE_BITS;
155
156 ixp4xxgpioled_devices[gpio_pin].ancestor.name =
157 pdev->resource[i].name;
158
159 /* This is how a board manufacturer makes the LED
160 * come on on reset - the GPIO line will be high, so
161 * make the LED light when the line is low...
162 */
163 if (ixp4xxgpioled_devices[gpio_pin].flags != IXP4XX_GPIO_LOW)
164 ixp4xxgpioled_devices[gpio_pin].ancestor.brightness = 100;
165 else
166 ixp4xxgpioled_devices[gpio_pin].ancestor.brightness = 0;
167
168 ixp4xxgpioled_devices[gpio_pin].ancestor.flags = 0;
169
170 ixp4xxgpioled_devices[gpio_pin].ancestor.brightness_set =
171 ixp4xxgpioled_brightness_set;
172
173 ixp4xxgpioled_devices[gpio_pin].ancestor.default_trigger = 0;
174 }
175
176 rc = led_classdev_register(&pdev->dev,
177 &ixp4xxgpioled_devices[gpio_pin].ancestor);
178 if (rc < 0) {
179 ixp4xxgpioled_devices[gpio_pin].ancestor.name = 0;
180 ixp4xxgpioled_remove(pdev);
181 return rc;
182 }
183 }
184
185 return 0;
186}
187
188static struct platform_driver ixp4xxgpioled_driver = {
189 .probe = ixp4xxgpioled_probe,
190 .remove = ixp4xxgpioled_remove,
191#ifdef CONFIG_PM
192 .suspend = ixp4xxgpioled_suspend,
193 .resume = ixp4xxgpioled_resume,
194#endif
195 .driver = {
196 .name = "IXP4XX-GPIO-LED",
197 },
198};
199
200static int __init ixp4xxgpioled_init(void)
201{
202 return platform_driver_register(&ixp4xxgpioled_driver);
203}
204
205static void __exit ixp4xxgpioled_exit(void)
206{
207 platform_driver_unregister(&ixp4xxgpioled_driver);
208}
209
210module_init(ixp4xxgpioled_init);
211module_exit(ixp4xxgpioled_exit);
212
213MODULE_AUTHOR("John Bowler <jbowler@acm.org>");
214MODULE_DESCRIPTION("IXP4XX GPIO LED driver");
215MODULE_LICENSE("Dual MIT/GPL");
diff --git a/drivers/leds/leds-locomo.c b/drivers/leds/leds-locomo.c
new file mode 100644
index 0000000000..749a86c2ad
--- /dev/null
+++ b/drivers/leds/leds-locomo.c
@@ -0,0 +1,95 @@
1/*
2 * linux/drivers/leds/locomo.c
3 *
4 * Copyright (C) 2005 John Lenz <lenz@cs.wisc.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/config.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/leds.h>
16
17#include <asm/hardware.h>
18#include <asm/hardware/locomo.h>
19
20static void locomoled_brightness_set(struct led_classdev *led_cdev,
21 enum led_brightness value, int offset)
22{
23 struct locomo_dev *locomo_dev = LOCOMO_DEV(led_cdev->class_dev->dev);
24 unsigned long flags;
25
26 local_irq_save(flags);
27 if (value)
28 locomo_writel(LOCOMO_LPT_TOFH, locomo_dev->mapbase + offset);
29 else
30 locomo_writel(LOCOMO_LPT_TOFL, locomo_dev->mapbase + offset);
31 local_irq_restore(flags);
32}
33
34static void locomoled_brightness_set0(struct led_classdev *led_cdev,
35 enum led_brightness value)
36{
37 locomoled_brightness_set(led_cdev, value, LOCOMO_LPT0);
38}
39
40static void locomoled_brightness_set1(struct led_classdev *led_cdev,
41 enum led_brightness value)
42{
43 locomoled_brightness_set(led_cdev, value, LOCOMO_LPT1);
44}
45
46static struct led_classdev locomo_led0 = {
47 .name = "locomo:amber",
48 .brightness_set = locomoled_brightness_set0,
49};
50
51static struct led_classdev locomo_led1 = {
52 .name = "locomo:green",
53 .brightness_set = locomoled_brightness_set1,
54};
55
56static int locomoled_probe(struct locomo_dev *ldev)
57{
58 int ret;
59
60 ret = led_classdev_register(&ldev->dev, &locomo_led0);
61 if (ret < 0)
62 return ret;
63
64 ret = led_classdev_register(&ldev->dev, &locomo_led1);
65 if (ret < 0)
66 led_classdev_unregister(&locomo_led0);
67
68 return ret;
69}
70
71static int locomoled_remove(struct locomo_dev *dev)
72{
73 led_classdev_unregister(&locomo_led0);
74 led_classdev_unregister(&locomo_led1);
75 return 0;
76}
77
78static struct locomo_driver locomoled_driver = {
79 .drv = {
80 .name = "locomoled"
81 },
82 .devid = LOCOMO_DEVID_LED,
83 .probe = locomoled_probe,
84 .remove = locomoled_remove,
85};
86
87static int __init locomoled_init(void)
88{
89 return locomo_driver_register(&locomoled_driver);
90}
91module_init(locomoled_init);
92
93MODULE_AUTHOR("John Lenz <lenz@cs.wisc.edu>");
94MODULE_DESCRIPTION("Locomo LED driver");
95MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-spitz.c b/drivers/leds/leds-spitz.c
new file mode 100644
index 0000000000..65bbef4a5e
--- /dev/null
+++ b/drivers/leds/leds-spitz.c
@@ -0,0 +1,125 @@
1/*
2 * LED Triggers Core
3 *
4 * Copyright 2005-2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/leds.h>
19#include <asm/hardware/scoop.h>
20#include <asm/mach-types.h>
21#include <asm/arch/hardware.h>
22#include <asm/arch/pxa-regs.h>
23#include <asm/arch/spitz.h>
24
25static void spitzled_amber_set(struct led_classdev *led_cdev, enum led_brightness value)
26{
27 if (value)
28 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_ORANGE);
29 else
30 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_ORANGE);
31}
32
33static void spitzled_green_set(struct led_classdev *led_cdev, enum led_brightness value)
34{
35 if (value)
36 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
37 else
38 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
39}
40
41static struct led_classdev spitz_amber_led = {
42 .name = "spitz:amber",
43 .default_trigger = "sharpsl-charge",
44 .brightness_set = spitzled_amber_set,
45};
46
47static struct led_classdev spitz_green_led = {
48 .name = "spitz:green",
49 .default_trigger = "ide-disk",
50 .brightness_set = spitzled_green_set,
51};
52
53#ifdef CONFIG_PM
54static int spitzled_suspend(struct platform_device *dev, pm_message_t state)
55{
56#ifdef CONFIG_LEDS_TRIGGERS
57 if (spitz_amber_led.trigger && strcmp(spitz_amber_led.trigger->name, "sharpsl-charge"))
58#endif
59 led_classdev_suspend(&spitz_amber_led);
60 led_classdev_suspend(&spitz_green_led);
61 return 0;
62}
63
64static int spitzled_resume(struct platform_device *dev)
65{
66 led_classdev_resume(&spitz_amber_led);
67 led_classdev_resume(&spitz_green_led);
68 return 0;
69}
70#endif
71
72static int spitzled_probe(struct platform_device *pdev)
73{
74 int ret;
75
76 if (machine_is_akita())
77 spitz_green_led.default_trigger = "nand-disk";
78
79 ret = led_classdev_register(&pdev->dev, &spitz_amber_led);
80 if (ret < 0)
81 return ret;
82
83 ret = led_classdev_register(&pdev->dev, &spitz_green_led);
84 if (ret < 0)
85 led_classdev_unregister(&spitz_amber_led);
86
87 return ret;
88}
89
90static int spitzled_remove(struct platform_device *pdev)
91{
92 led_classdev_unregister(&spitz_amber_led);
93 led_classdev_unregister(&spitz_green_led);
94
95 return 0;
96}
97
98static struct platform_driver spitzled_driver = {
99 .probe = spitzled_probe,
100 .remove = spitzled_remove,
101#ifdef CONFIG_PM
102 .suspend = spitzled_suspend,
103 .resume = spitzled_resume,
104#endif
105 .driver = {
106 .name = "spitz-led",
107 },
108};
109
110static int __init spitzled_init(void)
111{
112 return platform_driver_register(&spitzled_driver);
113}
114
115static void __exit spitzled_exit(void)
116{
117 platform_driver_unregister(&spitzled_driver);
118}
119
120module_init(spitzled_init);
121module_exit(spitzled_exit);
122
123MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
124MODULE_DESCRIPTION("Spitz LED driver");
125MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-tosa.c b/drivers/leds/leds-tosa.c
new file mode 100644
index 0000000000..c9e8cc1ec4
--- /dev/null
+++ b/drivers/leds/leds-tosa.c
@@ -0,0 +1,131 @@
1/*
2 * LED Triggers Core
3 *
4 * Copyright 2005 Dirk Opfer
5 *
6 * Author: Dirk Opfer <Dirk@Opfer-Online.de>
7 * based on spitz.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/config.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/leds.h>
20#include <asm/hardware/scoop.h>
21#include <asm/mach-types.h>
22#include <asm/arch/hardware.h>
23#include <asm/arch/pxa-regs.h>
24#include <asm/arch/tosa.h>
25
26static void tosaled_amber_set(struct led_classdev *led_cdev,
27 enum led_brightness value)
28{
29 if (value)
30 set_scoop_gpio(&tosascoop_jc_device.dev,
31 TOSA_SCOOP_JC_CHRG_ERR_LED);
32 else
33 reset_scoop_gpio(&tosascoop_jc_device.dev,
34 TOSA_SCOOP_JC_CHRG_ERR_LED);
35}
36
37static void tosaled_green_set(struct led_classdev *led_cdev,
38 enum led_brightness value)
39{
40 if (value)
41 set_scoop_gpio(&tosascoop_jc_device.dev,
42 TOSA_SCOOP_JC_NOTE_LED);
43 else
44 reset_scoop_gpio(&tosascoop_jc_device.dev,
45 TOSA_SCOOP_JC_NOTE_LED);
46}
47
48static struct led_classdev tosa_amber_led = {
49 .name = "tosa:amber",
50 .default_trigger = "sharpsl-charge",
51 .brightness_set = tosaled_amber_set,
52};
53
54static struct led_classdev tosa_green_led = {
55 .name = "tosa:green",
56 .default_trigger = "nand-disk",
57 .brightness_set = tosaled_green_set,
58};
59
60#ifdef CONFIG_PM
61static int tosaled_suspend(struct platform_device *dev, pm_message_t state)
62{
63#ifdef CONFIG_LEDS_TRIGGERS
64 if (tosa_amber_led.trigger && strcmp(tosa_amber_led.trigger->name,
65 "sharpsl-charge"))
66#endif
67 led_classdev_suspend(&tosa_amber_led);
68 led_classdev_suspend(&tosa_green_led);
69 return 0;
70}
71
72static int tosaled_resume(struct platform_device *dev)
73{
74 led_classdev_resume(&tosa_amber_led);
75 led_classdev_resume(&tosa_green_led);
76 return 0;
77}
78#else
79#define tosaled_suspend NULL
80#define tosaled_resume NULL
81#endif
82
83static int tosaled_probe(struct platform_device *pdev)
84{
85 int ret;
86
87 ret = led_classdev_register(&pdev->dev, &tosa_amber_led);
88 if (ret < 0)
89 return ret;
90
91 ret = led_classdev_register(&pdev->dev, &tosa_green_led);
92 if (ret < 0)
93 led_classdev_unregister(&tosa_amber_led);
94
95 return ret;
96}
97
98static int tosaled_remove(struct platform_device *pdev)
99{
100 led_classdev_unregister(&tosa_amber_led);
101 led_classdev_unregister(&tosa_green_led);
102
103 return 0;
104}
105
106static struct platform_driver tosaled_driver = {
107 .probe = tosaled_probe,
108 .remove = tosaled_remove,
109 .suspend = tosaled_suspend,
110 .resume = tosaled_resume,
111 .driver = {
112 .name = "tosa-led",
113 },
114};
115
116static int __init tosaled_init(void)
117{
118 return platform_driver_register(&tosaled_driver);
119}
120
121static void __exit tosaled_exit(void)
122{
123 platform_driver_unregister(&tosaled_driver);
124}
125
126module_init(tosaled_init);
127module_exit(tosaled_exit);
128
129MODULE_AUTHOR("Dirk Opfer <Dirk@Opfer-Online.de>");
130MODULE_DESCRIPTION("Tosa LED driver");
131MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds.h b/drivers/leds/leds.h
new file mode 100644
index 0000000000..a715c4ed93
--- /dev/null
+++ b/drivers/leds/leds.h
@@ -0,0 +1,44 @@
1/*
2 * LED Core
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#ifndef __LEDS_H_INCLUDED
14#define __LEDS_H_INCLUDED
15
16#include <linux/leds.h>
17
18static inline void led_set_brightness(struct led_classdev *led_cdev,
19 enum led_brightness value)
20{
21 if (value > LED_FULL)
22 value = LED_FULL;
23 led_cdev->brightness = value;
24 if (!(led_cdev->flags & LED_SUSPENDED))
25 led_cdev->brightness_set(led_cdev, value);
26}
27
28extern rwlock_t leds_list_lock;
29extern struct list_head leds_list;
30
31#ifdef CONFIG_LEDS_TRIGGERS
32void led_trigger_set_default(struct led_classdev *led_cdev);
33void led_trigger_set(struct led_classdev *led_cdev,
34 struct led_trigger *trigger);
35#else
36#define led_trigger_set_default(x) do {} while(0)
37#define led_trigger_set(x, y) do {} while(0)
38#endif
39
40ssize_t led_trigger_store(struct class_device *dev, const char *buf,
41 size_t count);
42ssize_t led_trigger_show(struct class_device *dev, char *buf);
43
44#endif /* __LEDS_H_INCLUDED */
diff --git a/drivers/leds/ledtrig-ide-disk.c b/drivers/leds/ledtrig-ide-disk.c
new file mode 100644
index 0000000000..fa651886ab
--- /dev/null
+++ b/drivers/leds/ledtrig-ide-disk.c
@@ -0,0 +1,62 @@
1/*
2 * LED IDE-Disk Activity Trigger
3 *
4 * Copyright 2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/timer.h>
18#include <linux/leds.h>
19
20static void ledtrig_ide_timerfunc(unsigned long data);
21
22DEFINE_LED_TRIGGER(ledtrig_ide);
23static DEFINE_TIMER(ledtrig_ide_timer, ledtrig_ide_timerfunc, 0, 0);
24static int ide_activity;
25static int ide_lastactivity;
26
27void ledtrig_ide_activity(void)
28{
29 ide_activity++;
30 if (!timer_pending(&ledtrig_ide_timer))
31 mod_timer(&ledtrig_ide_timer, jiffies + msecs_to_jiffies(10));
32}
33EXPORT_SYMBOL(ledtrig_ide_activity);
34
35static void ledtrig_ide_timerfunc(unsigned long data)
36{
37 if (ide_lastactivity != ide_activity) {
38 ide_lastactivity = ide_activity;
39 led_trigger_event(ledtrig_ide, LED_FULL);
40 mod_timer(&ledtrig_ide_timer, jiffies + msecs_to_jiffies(10));
41 } else {
42 led_trigger_event(ledtrig_ide, LED_OFF);
43 }
44}
45
46static int __init ledtrig_ide_init(void)
47{
48 led_trigger_register_simple("ide-disk", &ledtrig_ide);
49 return 0;
50}
51
52static void __exit ledtrig_ide_exit(void)
53{
54 led_trigger_unregister_simple(ledtrig_ide);
55}
56
57module_init(ledtrig_ide_init);
58module_exit(ledtrig_ide_exit);
59
60MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
61MODULE_DESCRIPTION("LED IDE Disk Activity Trigger");
62MODULE_LICENSE("GPL");
diff --git a/drivers/leds/ledtrig-timer.c b/drivers/leds/ledtrig-timer.c
new file mode 100644
index 0000000000..f484b5d6db
--- /dev/null
+++ b/drivers/leds/ledtrig-timer.c
@@ -0,0 +1,170 @@
1/*
2 * LED Kernel Timer Trigger
3 *
4 * Copyright 2005-2006 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <rpurdie@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/list.h>
19#include <linux/spinlock.h>
20#include <linux/device.h>
21#include <linux/sysdev.h>
22#include <linux/timer.h>
23#include <linux/leds.h>
24#include "leds.h"
25
26struct timer_trig_data {
27 unsigned long delay_on; /* milliseconds on */
28 unsigned long delay_off; /* milliseconds off */
29 struct timer_list timer;
30};
31
32static void led_timer_function(unsigned long data)
33{
34 struct led_classdev *led_cdev = (struct led_classdev *) data;
35 struct timer_trig_data *timer_data = led_cdev->trigger_data;
36 unsigned long brightness = LED_OFF;
37 unsigned long delay = timer_data->delay_off;
38
39 if (!timer_data->delay_on || !timer_data->delay_off) {
40 led_set_brightness(led_cdev, LED_OFF);
41 return;
42 }
43
44 if (!led_cdev->brightness) {
45 brightness = LED_FULL;
46 delay = timer_data->delay_on;
47 }
48
49 led_set_brightness(led_cdev, brightness);
50
51 mod_timer(&timer_data->timer, jiffies + msecs_to_jiffies(delay));
52}
53
54static ssize_t led_delay_on_show(struct class_device *dev, char *buf)
55{
56 struct led_classdev *led_cdev = class_get_devdata(dev);
57 struct timer_trig_data *timer_data = led_cdev->trigger_data;
58
59 sprintf(buf, "%lu\n", timer_data->delay_on);
60
61 return strlen(buf) + 1;
62}
63
64static ssize_t led_delay_on_store(struct class_device *dev, const char *buf,
65 size_t size)
66{
67 struct led_classdev *led_cdev = class_get_devdata(dev);
68 struct timer_trig_data *timer_data = led_cdev->trigger_data;
69 int ret = -EINVAL;
70 char *after;
71 unsigned long state = simple_strtoul(buf, &after, 10);
72
73 if (after - buf > 0) {
74 timer_data->delay_on = state;
75 mod_timer(&timer_data->timer, jiffies + 1);
76 ret = after - buf;
77 }
78
79 return ret;
80}
81
82static ssize_t led_delay_off_show(struct class_device *dev, char *buf)
83{
84 struct led_classdev *led_cdev = class_get_devdata(dev);
85 struct timer_trig_data *timer_data = led_cdev->trigger_data;
86
87 sprintf(buf, "%lu\n", timer_data->delay_off);
88
89 return strlen(buf) + 1;
90}
91
92static ssize_t led_delay_off_store(struct class_device *dev, const char *buf,
93 size_t size)
94{
95 struct led_classdev *led_cdev = class_get_devdata(dev);
96 struct timer_trig_data *timer_data = led_cdev->trigger_data;
97 int ret = -EINVAL;
98 char *after;
99 unsigned long state = simple_strtoul(buf, &after, 10);
100
101 if (after - buf > 0) {
102 timer_data->delay_off = state;
103 mod_timer(&timer_data->timer, jiffies + 1);
104 ret = after - buf;
105 }
106
107 return ret;
108}
109
110static CLASS_DEVICE_ATTR(delay_on, 0644, led_delay_on_show,
111 led_delay_on_store);
112static CLASS_DEVICE_ATTR(delay_off, 0644, led_delay_off_show,
113 led_delay_off_store);
114
115static void timer_trig_activate(struct led_classdev *led_cdev)
116{
117 struct timer_trig_data *timer_data;
118
119 timer_data = kzalloc(sizeof(struct timer_trig_data), GFP_KERNEL);
120 if (!timer_data)
121 return;
122
123 led_cdev->trigger_data = timer_data;
124
125 init_timer(&timer_data->timer);
126 timer_data->timer.function = led_timer_function;
127 timer_data->timer.data = (unsigned long) led_cdev;
128
129 class_device_create_file(led_cdev->class_dev,
130 &class_device_attr_delay_on);
131 class_device_create_file(led_cdev->class_dev,
132 &class_device_attr_delay_off);
133}
134
135static void timer_trig_deactivate(struct led_classdev *led_cdev)
136{
137 struct timer_trig_data *timer_data = led_cdev->trigger_data;
138
139 if (timer_data) {
140 class_device_remove_file(led_cdev->class_dev,
141 &class_device_attr_delay_on);
142 class_device_remove_file(led_cdev->class_dev,
143 &class_device_attr_delay_off);
144 del_timer_sync(&timer_data->timer);
145 kfree(timer_data);
146 }
147}
148
149static struct led_trigger timer_led_trigger = {
150 .name = "timer",
151 .activate = timer_trig_activate,
152 .deactivate = timer_trig_deactivate,
153};
154
155static int __init timer_trig_init(void)
156{
157 return led_trigger_register(&timer_led_trigger);
158}
159
160static void __exit timer_trig_exit(void)
161{
162 led_trigger_unregister(&timer_led_trigger);
163}
164
165module_init(timer_trig_init);
166module_exit(timer_trig_exit);
167
168MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
169MODULE_DESCRIPTION("Timer LED trigger");
170MODULE_LICENSE("GPL");
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 039e071c10..1ed5152db4 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -215,13 +215,11 @@ static void mddev_put(mddev_t *mddev)
215 return; 215 return;
216 if (!mddev->raid_disks && list_empty(&mddev->disks)) { 216 if (!mddev->raid_disks && list_empty(&mddev->disks)) {
217 list_del(&mddev->all_mddevs); 217 list_del(&mddev->all_mddevs);
218 /* that blocks */ 218 spin_unlock(&all_mddevs_lock);
219 blk_cleanup_queue(mddev->queue); 219 blk_cleanup_queue(mddev->queue);
220 /* that also blocks */
221 kobject_unregister(&mddev->kobj); 220 kobject_unregister(&mddev->kobj);
222 /* result blows... */ 221 } else
223 } 222 spin_unlock(&all_mddevs_lock);
224 spin_unlock(&all_mddevs_lock);
225} 223}
226 224
227static mddev_t * mddev_find(dev_t unit) 225static mddev_t * mddev_find(dev_t unit)
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index 3cb0872a84..9b374c91db 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -1135,8 +1135,19 @@ static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error)
1135 mirror = i; 1135 mirror = i;
1136 break; 1136 break;
1137 } 1137 }
1138 if (!uptodate) 1138 if (!uptodate) {
1139 int sync_blocks = 0;
1140 sector_t s = r1_bio->sector;
1141 long sectors_to_go = r1_bio->sectors;
1142 /* make sure these bits doesn't get cleared. */
1143 do {
1144 bitmap_end_sync(mddev->bitmap, r1_bio->sector,
1145 &sync_blocks, 1);
1146 s += sync_blocks;
1147 sectors_to_go -= sync_blocks;
1148 } while (sectors_to_go > 0);
1139 md_error(mddev, conf->mirrors[mirror].rdev); 1149 md_error(mddev, conf->mirrors[mirror].rdev);
1150 }
1140 1151
1141 update_head_pos(mirror, r1_bio); 1152 update_head_pos(mirror, r1_bio);
1142 1153
diff --git a/drivers/md/raid6main.c b/drivers/md/raid6main.c
index 6df4930fdd..ab64b37e49 100644
--- a/drivers/md/raid6main.c
+++ b/drivers/md/raid6main.c
@@ -2151,6 +2151,8 @@ static int run(mddev_t *mddev)
2151 } 2151 }
2152 2152
2153 /* Ok, everything is just fine now */ 2153 /* Ok, everything is just fine now */
2154 sysfs_create_group(&mddev->kobj, &raid6_attrs_group);
2155
2154 mddev->array_size = mddev->size * (mddev->raid_disks - 2); 2156 mddev->array_size = mddev->size * (mddev->raid_disks - 2);
2155 2157
2156 mddev->queue->unplug_fn = raid6_unplug_device; 2158 mddev->queue->unplug_fn = raid6_unplug_device;
diff --git a/drivers/media/video/cpia_pp.c b/drivers/media/video/cpia_pp.c
index 3021f21aae..0b00e6027d 100644
--- a/drivers/media/video/cpia_pp.c
+++ b/drivers/media/video/cpia_pp.c
@@ -873,7 +873,7 @@ static int __init cpia_pp_setup(char *str)
873 parport_nr[parport_ptr++] = PPCPIA_PARPORT_NONE; 873 parport_nr[parport_ptr++] = PPCPIA_PARPORT_NONE;
874 } 874 }
875 875
876 return 0; 876 return 1;
877} 877}
878 878
879__setup("cpia_pp=", cpia_pp_setup); 879__setup("cpia_pp=", cpia_pp_setup);
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 3f5d77f633..7cc162e897 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -60,6 +60,17 @@ config MMC_SDHCI
60 60
61 If unsure, say N. 61 If unsure, say N.
62 62
63config MMC_OMAP
64 tristate "TI OMAP Multimedia Card Interface support"
65 depends on ARCH_OMAP && MMC
66 select TPS65010 if MACH_OMAP_H2
67 help
68 This selects the TI OMAP Multimedia card Interface.
69 If you have an OMAP board with a Multimedia Card slot,
70 say Y or M here.
71
72 If unsure, say N.
73
63config MMC_WBSD 74config MMC_WBSD
64 tristate "Winbond W83L51xD SD/MMC Card Interface support" 75 tristate "Winbond W83L51xD SD/MMC Card Interface support"
65 depends on MMC && ISA_DMA_API 76 depends on MMC && ISA_DMA_API
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 769d545284..c7c34aadfc 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -20,5 +20,10 @@ obj-$(CONFIG_MMC_PXA) += pxamci.o
20obj-$(CONFIG_MMC_SDHCI) += sdhci.o 20obj-$(CONFIG_MMC_SDHCI) += sdhci.o
21obj-$(CONFIG_MMC_WBSD) += wbsd.o 21obj-$(CONFIG_MMC_WBSD) += wbsd.o
22obj-$(CONFIG_MMC_AU1X) += au1xmmc.o 22obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
23obj-$(CONFIG_MMC_OMAP) += omap.o
23 24
24mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o 25mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o
26
27ifeq ($(CONFIG_MMC_DEBUG),y)
28EXTRA_CFLAGS += -DDEBUG
29endif
diff --git a/drivers/mmc/au1xmmc.c b/drivers/mmc/au1xmmc.c
index 85e89c77bd..c0326bbc5f 100644
--- a/drivers/mmc/au1xmmc.c
+++ b/drivers/mmc/au1xmmc.c
@@ -56,12 +56,11 @@
56#define DRIVER_NAME "au1xxx-mmc" 56#define DRIVER_NAME "au1xxx-mmc"
57 57
58/* Set this to enable special debugging macros */ 58/* Set this to enable special debugging macros */
59/* #define MMC_DEBUG */
60 59
61#ifdef MMC_DEBUG 60#ifdef DEBUG
62#define DEBUG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args) 61#define DBG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args)
63#else 62#else
64#define DEBUG(fmt, idx, args...) 63#define DBG(fmt, idx, args...)
65#endif 64#endif
66 65
67const struct { 66const struct {
@@ -424,18 +423,18 @@ static void au1xmmc_receive_pio(struct au1xmmc_host *host)
424 break; 423 break;
425 424
426 if (status & SD_STATUS_RC) { 425 if (status & SD_STATUS_RC) {
427 DEBUG("RX CRC Error [%d + %d].\n", host->id, 426 DBG("RX CRC Error [%d + %d].\n", host->id,
428 host->pio.len, count); 427 host->pio.len, count);
429 break; 428 break;
430 } 429 }
431 430
432 if (status & SD_STATUS_RO) { 431 if (status & SD_STATUS_RO) {
433 DEBUG("RX Overrun [%d + %d]\n", host->id, 432 DBG("RX Overrun [%d + %d]\n", host->id,
434 host->pio.len, count); 433 host->pio.len, count);
435 break; 434 break;
436 } 435 }
437 else if (status & SD_STATUS_RU) { 436 else if (status & SD_STATUS_RU) {
438 DEBUG("RX Underrun [%d + %d]\n", host->id, 437 DBG("RX Underrun [%d + %d]\n", host->id,
439 host->pio.len, count); 438 host->pio.len, count);
440 break; 439 break;
441 } 440 }
@@ -721,7 +720,7 @@ static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
721{ 720{
722 struct au1xmmc_host *host = mmc_priv(mmc); 721 struct au1xmmc_host *host = mmc_priv(mmc);
723 722
724 DEBUG("set_ios (power=%u, clock=%uHz, vdd=%u, mode=%u)\n", 723 DBG("set_ios (power=%u, clock=%uHz, vdd=%u, mode=%u)\n",
725 host->id, ios->power_mode, ios->clock, ios->vdd, 724 host->id, ios->power_mode, ios->clock, ios->vdd,
726 ios->bus_mode); 725 ios->bus_mode);
727 726
@@ -810,7 +809,7 @@ static irqreturn_t au1xmmc_irq(int irq, void *dev_id, struct pt_regs *regs)
810 au1xmmc_receive_pio(host); 809 au1xmmc_receive_pio(host);
811 } 810 }
812 else if (status & 0x203FBC70) { 811 else if (status & 0x203FBC70) {
813 DEBUG("Unhandled status %8.8x\n", host->id, status); 812 DBG("Unhandled status %8.8x\n", host->id, status);
814 handled = 0; 813 handled = 0;
815 } 814 }
816 815
@@ -839,7 +838,7 @@ static void au1xmmc_poll_event(unsigned long arg)
839 838
840 if (host->mrq != NULL) { 839 if (host->mrq != NULL) {
841 u32 status = au_readl(HOST_STATUS(host)); 840 u32 status = au_readl(HOST_STATUS(host));
842 DEBUG("PENDING - %8.8x\n", host->id, status); 841 DBG("PENDING - %8.8x\n", host->id, status);
843 } 842 }
844 843
845 mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT); 844 mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 1888060c5e..da6ddd910f 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -27,12 +27,6 @@
27 27
28#include "mmc.h" 28#include "mmc.h"
29 29
30#ifdef CONFIG_MMC_DEBUG
31#define DBG(x...) printk(KERN_DEBUG x)
32#else
33#define DBG(x...) do { } while (0)
34#endif
35
36#define CMD_RETRIES 3 30#define CMD_RETRIES 3
37 31
38/* 32/*
@@ -77,8 +71,9 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
77{ 71{
78 struct mmc_command *cmd = mrq->cmd; 72 struct mmc_command *cmd = mrq->cmd;
79 int err = mrq->cmd->error; 73 int err = mrq->cmd->error;
80 DBG("MMC: req done (%02x): %d: %08x %08x %08x %08x\n", cmd->opcode, 74 pr_debug("MMC: req done (%02x): %d: %08x %08x %08x %08x\n",
81 err, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); 75 cmd->opcode, err, cmd->resp[0], cmd->resp[1],
76 cmd->resp[2], cmd->resp[3]);
82 77
83 if (err && cmd->retries) { 78 if (err && cmd->retries) {
84 cmd->retries--; 79 cmd->retries--;
@@ -102,8 +97,8 @@ EXPORT_SYMBOL(mmc_request_done);
102void 97void
103mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) 98mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
104{ 99{
105 DBG("MMC: starting cmd %02x arg %08x flags %08x\n", 100 pr_debug("MMC: starting cmd %02x arg %08x flags %08x\n",
106 mrq->cmd->opcode, mrq->cmd->arg, mrq->cmd->flags); 101 mrq->cmd->opcode, mrq->cmd->arg, mrq->cmd->flags);
107 102
108 WARN_ON(host->card_busy == NULL); 103 WARN_ON(host->card_busy == NULL);
109 104
@@ -976,8 +971,8 @@ static unsigned int mmc_calculate_clock(struct mmc_host *host)
976 if (!mmc_card_dead(card) && max_dtr > card->csd.max_dtr) 971 if (!mmc_card_dead(card) && max_dtr > card->csd.max_dtr)
977 max_dtr = card->csd.max_dtr; 972 max_dtr = card->csd.max_dtr;
978 973
979 DBG("MMC: selected %d.%03dMHz transfer rate\n", 974 pr_debug("MMC: selected %d.%03dMHz transfer rate\n",
980 max_dtr / 1000000, (max_dtr / 1000) % 1000); 975 max_dtr / 1000000, (max_dtr / 1000) % 1000);
981 976
982 return max_dtr; 977 return max_dtr;
983} 978}
diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c
index 9fef29d978..df7e861e2f 100644
--- a/drivers/mmc/mmci.c
+++ b/drivers/mmc/mmci.c
@@ -33,12 +33,8 @@
33 33
34#define DRIVER_NAME "mmci-pl18x" 34#define DRIVER_NAME "mmci-pl18x"
35 35
36#ifdef CONFIG_MMC_DEBUG
37#define DBG(host,fmt,args...) \ 36#define DBG(host,fmt,args...) \
38 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args) 37 pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
39#else
40#define DBG(host,fmt,args...) do { } while (0)
41#endif
42 38
43static unsigned int fmax = 515633; 39static unsigned int fmax = 515633;
44 40
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
new file mode 100644
index 0000000000..becb3c68c3
--- /dev/null
+++ b/drivers/mmc/omap.c
@@ -0,0 +1,1226 @@
1/*
2 * linux/drivers/media/mmc/omap.c
3 *
4 * Copyright (C) 2004 Nokia Corporation
5 * Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com>
6 * Misc hacks here and there by Tony Lindgren <tony@atomide.com>
7 * Other hacks (DMA, SD, etc) by David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/config.h>
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/ioport.h>
19#include <linux/platform_device.h>
20#include <linux/interrupt.h>
21#include <linux/dma-mapping.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/timer.h>
25#include <linux/mmc/host.h>
26#include <linux/mmc/protocol.h>
27#include <linux/mmc/card.h>
28#include <linux/clk.h>
29
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/scatterlist.h>
33#include <asm/mach-types.h>
34
35#include <asm/arch/board.h>
36#include <asm/arch/gpio.h>
37#include <asm/arch/dma.h>
38#include <asm/arch/mux.h>
39#include <asm/arch/fpga.h>
40#include <asm/arch/tps65010.h>
41
42#include "omap.h"
43
44#define DRIVER_NAME "mmci-omap"
45#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
46
47/* Specifies how often in millisecs to poll for card status changes
48 * when the cover switch is open */
49#define OMAP_MMC_SWITCH_POLL_DELAY 500
50
51static int mmc_omap_enable_poll = 1;
52
53struct mmc_omap_host {
54 int initialized;
55 int suspended;
56 struct mmc_request * mrq;
57 struct mmc_command * cmd;
58 struct mmc_data * data;
59 struct mmc_host * mmc;
60 struct device * dev;
61 unsigned char id; /* 16xx chips have 2 MMC blocks */
62 struct clk * iclk;
63 struct clk * fclk;
64 void __iomem *base;
65 int irq;
66 unsigned char bus_mode;
67 unsigned char hw_bus_mode;
68
69 unsigned int sg_len;
70 int sg_idx;
71 u16 * buffer;
72 u32 buffer_bytes_left;
73 u32 total_bytes_left;
74
75 unsigned use_dma:1;
76 unsigned brs_received:1, dma_done:1;
77 unsigned dma_is_read:1;
78 unsigned dma_in_use:1;
79 int dma_ch;
80 spinlock_t dma_lock;
81 struct timer_list dma_timer;
82 unsigned dma_len;
83
84 short power_pin;
85 short wp_pin;
86
87 int switch_pin;
88 struct work_struct switch_work;
89 struct timer_list switch_timer;
90 int switch_last_state;
91};
92
93static inline int
94mmc_omap_cover_is_open(struct mmc_omap_host *host)
95{
96 if (host->switch_pin < 0)
97 return 0;
98 return omap_get_gpio_datain(host->switch_pin);
99}
100
101static ssize_t
102mmc_omap_show_cover_switch(struct device *dev,
103 struct device_attribute *attr, char *buf)
104{
105 struct mmc_omap_host *host = dev_get_drvdata(dev);
106
107 return sprintf(buf, "%s\n", mmc_omap_cover_is_open(host) ? "open" :
108 "closed");
109}
110
111static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
112
113static ssize_t
114mmc_omap_show_enable_poll(struct device *dev,
115 struct device_attribute *attr, char *buf)
116{
117 return snprintf(buf, PAGE_SIZE, "%d\n", mmc_omap_enable_poll);
118}
119
120static ssize_t
121mmc_omap_store_enable_poll(struct device *dev,
122 struct device_attribute *attr, const char *buf,
123 size_t size)
124{
125 int enable_poll;
126
127 if (sscanf(buf, "%10d", &enable_poll) != 1)
128 return -EINVAL;
129
130 if (enable_poll != mmc_omap_enable_poll) {
131 struct mmc_omap_host *host = dev_get_drvdata(dev);
132
133 mmc_omap_enable_poll = enable_poll;
134 if (enable_poll && host->switch_pin >= 0)
135 schedule_work(&host->switch_work);
136 }
137 return size;
138}
139
140static DEVICE_ATTR(enable_poll, 0664,
141 mmc_omap_show_enable_poll, mmc_omap_store_enable_poll);
142
143static void
144mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
145{
146 u32 cmdreg;
147 u32 resptype;
148 u32 cmdtype;
149
150 host->cmd = cmd;
151
152 resptype = 0;
153 cmdtype = 0;
154
155 /* Our hardware needs to know exact type */
156 switch (RSP_TYPE(mmc_resp_type(cmd))) {
157 case RSP_TYPE(MMC_RSP_R1):
158 /* resp 1, resp 1b */
159 resptype = 1;
160 break;
161 case RSP_TYPE(MMC_RSP_R2):
162 resptype = 2;
163 break;
164 case RSP_TYPE(MMC_RSP_R3):
165 resptype = 3;
166 break;
167 default:
168 break;
169 }
170
171 if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) {
172 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
173 } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) {
174 cmdtype = OMAP_MMC_CMDTYPE_BC;
175 } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) {
176 cmdtype = OMAP_MMC_CMDTYPE_BCR;
177 } else {
178 cmdtype = OMAP_MMC_CMDTYPE_AC;
179 }
180
181 cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
182
183 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
184 cmdreg |= 1 << 6;
185
186 if (cmd->flags & MMC_RSP_BUSY)
187 cmdreg |= 1 << 11;
188
189 if (host->data && !(host->data->flags & MMC_DATA_WRITE))
190 cmdreg |= 1 << 15;
191
192 clk_enable(host->fclk);
193
194 OMAP_MMC_WRITE(host->base, CTO, 200);
195 OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
196 OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
197 OMAP_MMC_WRITE(host->base, IE,
198 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
199 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
200 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
201 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
202 OMAP_MMC_STAT_END_OF_DATA);
203 OMAP_MMC_WRITE(host->base, CMD, cmdreg);
204}
205
206static void
207mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
208{
209 if (host->dma_in_use) {
210 enum dma_data_direction dma_data_dir;
211
212 BUG_ON(host->dma_ch < 0);
213 if (data->error != MMC_ERR_NONE)
214 omap_stop_dma(host->dma_ch);
215 /* Release DMA channel lazily */
216 mod_timer(&host->dma_timer, jiffies + HZ);
217 if (data->flags & MMC_DATA_WRITE)
218 dma_data_dir = DMA_TO_DEVICE;
219 else
220 dma_data_dir = DMA_FROM_DEVICE;
221 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
222 dma_data_dir);
223 }
224 host->data = NULL;
225 host->sg_len = 0;
226 clk_disable(host->fclk);
227
228 /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing
229 * dozens of requests until the card finishes writing data.
230 * It'd be cheaper to just wait till an EOFB interrupt arrives...
231 */
232
233 if (!data->stop) {
234 host->mrq = NULL;
235 mmc_request_done(host->mmc, data->mrq);
236 return;
237 }
238
239 mmc_omap_start_command(host, data->stop);
240}
241
242static void
243mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
244{
245 unsigned long flags;
246 int done;
247
248 if (!host->dma_in_use) {
249 mmc_omap_xfer_done(host, data);
250 return;
251 }
252 done = 0;
253 spin_lock_irqsave(&host->dma_lock, flags);
254 if (host->dma_done)
255 done = 1;
256 else
257 host->brs_received = 1;
258 spin_unlock_irqrestore(&host->dma_lock, flags);
259 if (done)
260 mmc_omap_xfer_done(host, data);
261}
262
263static void
264mmc_omap_dma_timer(unsigned long data)
265{
266 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
267
268 BUG_ON(host->dma_ch < 0);
269 omap_free_dma(host->dma_ch);
270 host->dma_ch = -1;
271}
272
273static void
274mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
275{
276 unsigned long flags;
277 int done;
278
279 done = 0;
280 spin_lock_irqsave(&host->dma_lock, flags);
281 if (host->brs_received)
282 done = 1;
283 else
284 host->dma_done = 1;
285 spin_unlock_irqrestore(&host->dma_lock, flags);
286 if (done)
287 mmc_omap_xfer_done(host, data);
288}
289
290static void
291mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
292{
293 host->cmd = NULL;
294
295 if (cmd->flags & MMC_RSP_PRESENT) {
296 if (cmd->flags & MMC_RSP_136) {
297 /* response type 2 */
298 cmd->resp[3] =
299 OMAP_MMC_READ(host->base, RSP0) |
300 (OMAP_MMC_READ(host->base, RSP1) << 16);
301 cmd->resp[2] =
302 OMAP_MMC_READ(host->base, RSP2) |
303 (OMAP_MMC_READ(host->base, RSP3) << 16);
304 cmd->resp[1] =
305 OMAP_MMC_READ(host->base, RSP4) |
306 (OMAP_MMC_READ(host->base, RSP5) << 16);
307 cmd->resp[0] =
308 OMAP_MMC_READ(host->base, RSP6) |
309 (OMAP_MMC_READ(host->base, RSP7) << 16);
310 } else {
311 /* response types 1, 1b, 3, 4, 5, 6 */
312 cmd->resp[0] =
313 OMAP_MMC_READ(host->base, RSP6) |
314 (OMAP_MMC_READ(host->base, RSP7) << 16);
315 }
316 }
317
318 if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
319 host->mrq = NULL;
320 clk_disable(host->fclk);
321 mmc_request_done(host->mmc, cmd->mrq);
322 }
323}
324
325/* PIO only */
326static void
327mmc_omap_sg_to_buf(struct mmc_omap_host *host)
328{
329 struct scatterlist *sg;
330
331 sg = host->data->sg + host->sg_idx;
332 host->buffer_bytes_left = sg->length;
333 host->buffer = page_address(sg->page) + sg->offset;
334 if (host->buffer_bytes_left > host->total_bytes_left)
335 host->buffer_bytes_left = host->total_bytes_left;
336}
337
338/* PIO only */
339static void
340mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
341{
342 int n;
343 void __iomem *reg;
344 u16 *p;
345
346 if (host->buffer_bytes_left == 0) {
347 host->sg_idx++;
348 BUG_ON(host->sg_idx == host->sg_len);
349 mmc_omap_sg_to_buf(host);
350 }
351 n = 64;
352 if (n > host->buffer_bytes_left)
353 n = host->buffer_bytes_left;
354 host->buffer_bytes_left -= n;
355 host->total_bytes_left -= n;
356 host->data->bytes_xfered += n;
357
358 if (write) {
359 __raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
360 } else {
361 __raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
362 }
363}
364
365static inline void mmc_omap_report_irq(u16 status)
366{
367 static const char *mmc_omap_status_bits[] = {
368 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
369 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
370 };
371 int i, c = 0;
372
373 for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
374 if (status & (1 << i)) {
375 if (c)
376 printk(" ");
377 printk("%s", mmc_omap_status_bits[i]);
378 c++;
379 }
380}
381
382static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
383{
384 struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
385 u16 status;
386 int end_command;
387 int end_transfer;
388 int transfer_error;
389
390 if (host->cmd == NULL && host->data == NULL) {
391 status = OMAP_MMC_READ(host->base, STAT);
392 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
393 if (status != 0) {
394 OMAP_MMC_WRITE(host->base, STAT, status);
395 OMAP_MMC_WRITE(host->base, IE, 0);
396 }
397 return IRQ_HANDLED;
398 }
399
400 end_command = 0;
401 end_transfer = 0;
402 transfer_error = 0;
403
404 while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
405 OMAP_MMC_WRITE(host->base, STAT, status);
406#ifdef CONFIG_MMC_DEBUG
407 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
408 status, host->cmd != NULL ? host->cmd->opcode : -1);
409 mmc_omap_report_irq(status);
410 printk("\n");
411#endif
412 if (host->total_bytes_left) {
413 if ((status & OMAP_MMC_STAT_A_FULL) ||
414 (status & OMAP_MMC_STAT_END_OF_DATA))
415 mmc_omap_xfer_data(host, 0);
416 if (status & OMAP_MMC_STAT_A_EMPTY)
417 mmc_omap_xfer_data(host, 1);
418 }
419
420 if (status & OMAP_MMC_STAT_END_OF_DATA) {
421 end_transfer = 1;
422 }
423
424 if (status & OMAP_MMC_STAT_DATA_TOUT) {
425 dev_dbg(mmc_dev(host->mmc), "data timeout\n");
426 if (host->data) {
427 host->data->error |= MMC_ERR_TIMEOUT;
428 transfer_error = 1;
429 }
430 }
431
432 if (status & OMAP_MMC_STAT_DATA_CRC) {
433 if (host->data) {
434 host->data->error |= MMC_ERR_BADCRC;
435 dev_dbg(mmc_dev(host->mmc),
436 "data CRC error, bytes left %d\n",
437 host->total_bytes_left);
438 transfer_error = 1;
439 } else {
440 dev_dbg(mmc_dev(host->mmc), "data CRC error\n");
441 }
442 }
443
444 if (status & OMAP_MMC_STAT_CMD_TOUT) {
445 /* Timeouts are routine with some commands */
446 if (host->cmd) {
447 if (host->cmd->opcode != MMC_ALL_SEND_CID &&
448 host->cmd->opcode !=
449 MMC_SEND_OP_COND &&
450 host->cmd->opcode !=
451 MMC_APP_CMD &&
452 !mmc_omap_cover_is_open(host))
453 dev_err(mmc_dev(host->mmc),
454 "command timeout, CMD %d\n",
455 host->cmd->opcode);
456 host->cmd->error = MMC_ERR_TIMEOUT;
457 end_command = 1;
458 }
459 }
460
461 if (status & OMAP_MMC_STAT_CMD_CRC) {
462 if (host->cmd) {
463 dev_err(mmc_dev(host->mmc),
464 "command CRC error (CMD%d, arg 0x%08x)\n",
465 host->cmd->opcode, host->cmd->arg);
466 host->cmd->error = MMC_ERR_BADCRC;
467 end_command = 1;
468 } else
469 dev_err(mmc_dev(host->mmc),
470 "command CRC error without cmd?\n");
471 }
472
473 if (status & OMAP_MMC_STAT_CARD_ERR) {
474 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
475 u32 response = OMAP_MMC_READ(host->base, RSP6)
476 | (OMAP_MMC_READ(host->base, RSP7) << 16);
477 /* STOP sometimes sets must-ignore bits */
478 if (!(response & (R1_CC_ERROR
479 | R1_ILLEGAL_COMMAND
480 | R1_COM_CRC_ERROR))) {
481 end_command = 1;
482 continue;
483 }
484 }
485
486 dev_dbg(mmc_dev(host->mmc), "card status error (CMD%d)\n",
487 host->cmd->opcode);
488 if (host->cmd) {
489 host->cmd->error = MMC_ERR_FAILED;
490 end_command = 1;
491 }
492 if (host->data) {
493 host->data->error = MMC_ERR_FAILED;
494 transfer_error = 1;
495 }
496 }
497
498 /*
499 * NOTE: On 1610 the END_OF_CMD may come too early when
500 * starting a write
501 */
502 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
503 (!(status & OMAP_MMC_STAT_A_EMPTY))) {
504 end_command = 1;
505 }
506 }
507
508 if (end_command) {
509 mmc_omap_cmd_done(host, host->cmd);
510 }
511 if (transfer_error)
512 mmc_omap_xfer_done(host, host->data);
513 else if (end_transfer)
514 mmc_omap_end_of_data(host, host->data);
515
516 return IRQ_HANDLED;
517}
518
519static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
520{
521 struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
522
523 schedule_work(&host->switch_work);
524
525 return IRQ_HANDLED;
526}
527
528static void mmc_omap_switch_timer(unsigned long arg)
529{
530 struct mmc_omap_host *host = (struct mmc_omap_host *) arg;
531
532 schedule_work(&host->switch_work);
533}
534
535/* FIXME: Handle card insertion and removal properly. Maybe use a mask
536 * for MMC state? */
537static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
538{
539}
540
541static void mmc_omap_switch_handler(void *data)
542{
543 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
544 struct mmc_card *card;
545 static int complained = 0;
546 int cards = 0, cover_open;
547
548 if (host->switch_pin == -1)
549 return;
550 cover_open = mmc_omap_cover_is_open(host);
551 if (cover_open != host->switch_last_state) {
552 kobject_uevent(&host->dev->kobj, KOBJ_CHANGE);
553 host->switch_last_state = cover_open;
554 }
555 mmc_detect_change(host->mmc, 0);
556 list_for_each_entry(card, &host->mmc->cards, node) {
557 if (mmc_card_present(card))
558 cards++;
559 }
560 if (mmc_omap_cover_is_open(host)) {
561 if (!complained) {
562 dev_info(mmc_dev(host->mmc), "cover is open");
563 complained = 1;
564 }
565 if (mmc_omap_enable_poll)
566 mod_timer(&host->switch_timer, jiffies +
567 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY));
568 } else {
569 complained = 0;
570 }
571}
572
573/* Prepare to transfer the next segment of a scatterlist */
574static void
575mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
576{
577 int dma_ch = host->dma_ch;
578 unsigned long data_addr;
579 u16 buf, frame;
580 u32 count;
581 struct scatterlist *sg = &data->sg[host->sg_idx];
582 int src_port = 0;
583 int dst_port = 0;
584 int sync_dev = 0;
585
586 data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
587 frame = 1 << data->blksz_bits;
588 count = sg_dma_len(sg);
589
590 if ((data->blocks == 1) && (count > (1 << data->blksz_bits)))
591 count = frame;
592
593 host->dma_len = count;
594
595 /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
596 * Use 16 or 32 word frames when the blocksize is at least that large.
597 * Blocksize is usually 512 bytes; but not for some SD reads.
598 */
599 if (cpu_is_omap15xx() && frame > 32)
600 frame = 32;
601 else if (frame > 64)
602 frame = 64;
603 count /= frame;
604 frame >>= 1;
605
606 if (!(data->flags & MMC_DATA_WRITE)) {
607 buf = 0x800f | ((frame - 1) << 8);
608
609 if (cpu_class_is_omap1()) {
610 src_port = OMAP_DMA_PORT_TIPB;
611 dst_port = OMAP_DMA_PORT_EMIFF;
612 }
613 if (cpu_is_omap24xx())
614 sync_dev = OMAP24XX_DMA_MMC1_RX;
615
616 omap_set_dma_src_params(dma_ch, src_port,
617 OMAP_DMA_AMODE_CONSTANT,
618 data_addr, 0, 0);
619 omap_set_dma_dest_params(dma_ch, dst_port,
620 OMAP_DMA_AMODE_POST_INC,
621 sg_dma_address(sg), 0, 0);
622 omap_set_dma_dest_data_pack(dma_ch, 1);
623 omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
624 } else {
625 buf = 0x0f80 | ((frame - 1) << 0);
626
627 if (cpu_class_is_omap1()) {
628 src_port = OMAP_DMA_PORT_EMIFF;
629 dst_port = OMAP_DMA_PORT_TIPB;
630 }
631 if (cpu_is_omap24xx())
632 sync_dev = OMAP24XX_DMA_MMC1_TX;
633
634 omap_set_dma_dest_params(dma_ch, dst_port,
635 OMAP_DMA_AMODE_CONSTANT,
636 data_addr, 0, 0);
637 omap_set_dma_src_params(dma_ch, src_port,
638 OMAP_DMA_AMODE_POST_INC,
639 sg_dma_address(sg), 0, 0);
640 omap_set_dma_src_data_pack(dma_ch, 1);
641 omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4);
642 }
643
644 /* Max limit for DMA frame count is 0xffff */
645 if (unlikely(count > 0xffff))
646 BUG();
647
648 OMAP_MMC_WRITE(host->base, BUF, buf);
649 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
650 frame, count, OMAP_DMA_SYNC_FRAME,
651 sync_dev, 0);
652}
653
654/* A scatterlist segment completed */
655static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
656{
657 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
658 struct mmc_data *mmcdat = host->data;
659
660 if (unlikely(host->dma_ch < 0)) {
661 dev_err(mmc_dev(host->mmc), "DMA callback while DMA not
662 enabled\n");
663 return;
664 }
665 /* FIXME: We really should do something to _handle_ the errors */
666 if (ch_status & OMAP_DMA_TOUT_IRQ) {
667 dev_err(mmc_dev(host->mmc),"DMA timeout\n");
668 return;
669 }
670 if (ch_status & OMAP_DMA_DROP_IRQ) {
671 dev_err(mmc_dev(host->mmc), "DMA sync error\n");
672 return;
673 }
674 if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) {
675 return;
676 }
677 mmcdat->bytes_xfered += host->dma_len;
678 host->sg_idx++;
679 if (host->sg_idx < host->sg_len) {
680 mmc_omap_prepare_dma(host, host->data);
681 omap_start_dma(host->dma_ch);
682 } else
683 mmc_omap_dma_done(host, host->data);
684}
685
686static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data)
687{
688 const char *dev_name;
689 int sync_dev, dma_ch, is_read, r;
690
691 is_read = !(data->flags & MMC_DATA_WRITE);
692 del_timer_sync(&host->dma_timer);
693 if (host->dma_ch >= 0) {
694 if (is_read == host->dma_is_read)
695 return 0;
696 omap_free_dma(host->dma_ch);
697 host->dma_ch = -1;
698 }
699
700 if (is_read) {
701 if (host->id == 1) {
702 sync_dev = OMAP_DMA_MMC_RX;
703 dev_name = "MMC1 read";
704 } else {
705 sync_dev = OMAP_DMA_MMC2_RX;
706 dev_name = "MMC2 read";
707 }
708 } else {
709 if (host->id == 1) {
710 sync_dev = OMAP_DMA_MMC_TX;
711 dev_name = "MMC1 write";
712 } else {
713 sync_dev = OMAP_DMA_MMC2_TX;
714 dev_name = "MMC2 write";
715 }
716 }
717 r = omap_request_dma(sync_dev, dev_name, mmc_omap_dma_cb,
718 host, &dma_ch);
719 if (r != 0) {
720 dev_dbg(mmc_dev(host->mmc), "omap_request_dma() failed with %d\n", r);
721 return r;
722 }
723 host->dma_ch = dma_ch;
724 host->dma_is_read = is_read;
725
726 return 0;
727}
728
729static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
730{
731 u16 reg;
732
733 reg = OMAP_MMC_READ(host->base, SDIO);
734 reg &= ~(1 << 5);
735 OMAP_MMC_WRITE(host->base, SDIO, reg);
736 /* Set maximum timeout */
737 OMAP_MMC_WRITE(host->base, CTO, 0xff);
738}
739
740static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
741{
742 int timeout;
743 u16 reg;
744
745 /* Convert ns to clock cycles by assuming 20MHz frequency
746 * 1 cycle at 20MHz = 500 ns
747 */
748 timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
749
750 /* Check if we need to use timeout multiplier register */
751 reg = OMAP_MMC_READ(host->base, SDIO);
752 if (timeout > 0xffff) {
753 reg |= (1 << 5);
754 timeout /= 1024;
755 } else
756 reg &= ~(1 << 5);
757 OMAP_MMC_WRITE(host->base, SDIO, reg);
758 OMAP_MMC_WRITE(host->base, DTO, timeout);
759}
760
761static void
762mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
763{
764 struct mmc_data *data = req->data;
765 int i, use_dma, block_size;
766 unsigned sg_len;
767
768 host->data = data;
769 if (data == NULL) {
770 OMAP_MMC_WRITE(host->base, BLEN, 0);
771 OMAP_MMC_WRITE(host->base, NBLK, 0);
772 OMAP_MMC_WRITE(host->base, BUF, 0);
773 host->dma_in_use = 0;
774 set_cmd_timeout(host, req);
775 return;
776 }
777
778
779 block_size = 1 << data->blksz_bits;
780
781 OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
782 OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
783 set_data_timeout(host, req);
784
785 /* cope with calling layer confusion; it issues "single
786 * block" writes using multi-block scatterlists.
787 */
788 sg_len = (data->blocks == 1) ? 1 : data->sg_len;
789
790 /* Only do DMA for entire blocks */
791 use_dma = host->use_dma;
792 if (use_dma) {
793 for (i = 0; i < sg_len; i++) {
794 if ((data->sg[i].length % block_size) != 0) {
795 use_dma = 0;
796 break;
797 }
798 }
799 }
800
801 host->sg_idx = 0;
802 if (use_dma) {
803 if (mmc_omap_get_dma_channel(host, data) == 0) {
804 enum dma_data_direction dma_data_dir;
805
806 if (data->flags & MMC_DATA_WRITE)
807 dma_data_dir = DMA_TO_DEVICE;
808 else
809 dma_data_dir = DMA_FROM_DEVICE;
810
811 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
812 sg_len, dma_data_dir);
813 host->total_bytes_left = 0;
814 mmc_omap_prepare_dma(host, req->data);
815 host->brs_received = 0;
816 host->dma_done = 0;
817 host->dma_in_use = 1;
818 } else
819 use_dma = 0;
820 }
821
822 /* Revert to PIO? */
823 if (!use_dma) {
824 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
825 host->total_bytes_left = data->blocks * block_size;
826 host->sg_len = sg_len;
827 mmc_omap_sg_to_buf(host);
828 host->dma_in_use = 0;
829 }
830}
831
832static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
833{
834 struct mmc_omap_host *host = mmc_priv(mmc);
835
836 WARN_ON(host->mrq != NULL);
837
838 host->mrq = req;
839
840 /* only touch fifo AFTER the controller readies it */
841 mmc_omap_prepare_data(host, req);
842 mmc_omap_start_command(host, req->cmd);
843 if (host->dma_in_use)
844 omap_start_dma(host->dma_ch);
845}
846
847static void innovator_fpga_socket_power(int on)
848{
849#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
850
851 if (on) {
852 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
853 OMAP1510_FPGA_POWER);
854 } else {
855 fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
856 OMAP1510_FPGA_POWER);
857 }
858#endif
859}
860
861/*
862 * Turn the socket power on/off. Innovator uses FPGA, most boards
863 * probably use GPIO.
864 */
865static void mmc_omap_power(struct mmc_omap_host *host, int on)
866{
867 if (on) {
868 if (machine_is_omap_innovator())
869 innovator_fpga_socket_power(1);
870 else if (machine_is_omap_h2())
871 tps65010_set_gpio_out_value(GPIO3, HIGH);
872 else if (machine_is_omap_h3())
873 /* GPIO 4 of TPS65010 sends SD_EN signal */
874 tps65010_set_gpio_out_value(GPIO4, HIGH);
875 else if (cpu_is_omap24xx()) {
876 u16 reg = OMAP_MMC_READ(host->base, CON);
877 OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
878 } else
879 if (host->power_pin >= 0)
880 omap_set_gpio_dataout(host->power_pin, 1);
881 } else {
882 if (machine_is_omap_innovator())
883 innovator_fpga_socket_power(0);
884 else if (machine_is_omap_h2())
885 tps65010_set_gpio_out_value(GPIO3, LOW);
886 else if (machine_is_omap_h3())
887 tps65010_set_gpio_out_value(GPIO4, LOW);
888 else if (cpu_is_omap24xx()) {
889 u16 reg = OMAP_MMC_READ(host->base, CON);
890 OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
891 } else
892 if (host->power_pin >= 0)
893 omap_set_gpio_dataout(host->power_pin, 0);
894 }
895}
896
897static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
898{
899 struct mmc_omap_host *host = mmc_priv(mmc);
900 int dsor;
901 int realclock, i;
902
903 realclock = ios->clock;
904
905 if (ios->clock == 0)
906 dsor = 0;
907 else {
908 int func_clk_rate = clk_get_rate(host->fclk);
909
910 dsor = func_clk_rate / realclock;
911 if (dsor < 1)
912 dsor = 1;
913
914 if (func_clk_rate / dsor > realclock)
915 dsor++;
916
917 if (dsor > 250)
918 dsor = 250;
919 dsor++;
920
921 if (ios->bus_width == MMC_BUS_WIDTH_4)
922 dsor |= 1 << 15;
923 }
924
925 switch (ios->power_mode) {
926 case MMC_POWER_OFF:
927 mmc_omap_power(host, 0);
928 break;
929 case MMC_POWER_UP:
930 case MMC_POWER_ON:
931 mmc_omap_power(host, 1);
932 dsor |= 1<<11;
933 break;
934 }
935
936 host->bus_mode = ios->bus_mode;
937 host->hw_bus_mode = host->bus_mode;
938
939 clk_enable(host->fclk);
940
941 /* On insanely high arm_per frequencies something sometimes
942 * goes somehow out of sync, and the POW bit is not being set,
943 * which results in the while loop below getting stuck.
944 * Writing to the CON register twice seems to do the trick. */
945 for (i = 0; i < 2; i++)
946 OMAP_MMC_WRITE(host->base, CON, dsor);
947 if (ios->power_mode == MMC_POWER_UP) {
948 /* Send clock cycles, poll completion */
949 OMAP_MMC_WRITE(host->base, IE, 0);
950 OMAP_MMC_WRITE(host->base, STAT, 0xffff);
951 OMAP_MMC_WRITE(host->base, CMD, 1<<7);
952 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
953 OMAP_MMC_WRITE(host->base, STAT, 1);
954 }
955 clk_disable(host->fclk);
956}
957
958static int mmc_omap_get_ro(struct mmc_host *mmc)
959{
960 struct mmc_omap_host *host = mmc_priv(mmc);
961
962 return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
963}
964
965static struct mmc_host_ops mmc_omap_ops = {
966 .request = mmc_omap_request,
967 .set_ios = mmc_omap_set_ios,
968 .get_ro = mmc_omap_get_ro,
969};
970
971static int __init mmc_omap_probe(struct platform_device *pdev)
972{
973 struct omap_mmc_conf *minfo = pdev->dev.platform_data;
974 struct mmc_host *mmc;
975 struct mmc_omap_host *host = NULL;
976 int ret = 0;
977
978 if (platform_get_resource(pdev, IORESOURCE_MEM, 0) ||
979 platform_get_irq(pdev, IORESOURCE_IRQ, 0)) {
980 dev_err(&pdev->dev, "mmc_omap_probe: invalid resource type\n");
981 return -ENODEV;
982 }
983
984 if (!request_mem_region(pdev->resource[0].start,
985 pdev->resource[0].end - pdev->resource[0].start + 1,
986 pdev->name)) {
987 dev_dbg(&pdev->dev, "request_mem_region failed\n");
988 return -EBUSY;
989 }
990
991 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
992 if (!mmc) {
993 ret = -ENOMEM;
994 goto out;
995 }
996
997 host = mmc_priv(mmc);
998 host->mmc = mmc;
999
1000 spin_lock_init(&host->dma_lock);
1001 init_timer(&host->dma_timer);
1002 host->dma_timer.function = mmc_omap_dma_timer;
1003 host->dma_timer.data = (unsigned long) host;
1004
1005 host->id = pdev->id;
1006
1007 if (cpu_is_omap24xx()) {
1008 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1009 if (IS_ERR(host->iclk))
1010 goto out;
1011 clk_enable(host->iclk);
1012 }
1013
1014 if (!cpu_is_omap24xx())
1015 host->fclk = clk_get(&pdev->dev, "mmc_ck");
1016 else
1017 host->fclk = clk_get(&pdev->dev, "mmc_fck");
1018
1019 if (IS_ERR(host->fclk)) {
1020 ret = PTR_ERR(host->fclk);
1021 goto out;
1022 }
1023
1024 /* REVISIT:
1025 * Also, use minfo->cover to decide how to manage
1026 * the card detect sensing.
1027 */
1028 host->power_pin = minfo->power_pin;
1029 host->switch_pin = minfo->switch_pin;
1030 host->wp_pin = minfo->wp_pin;
1031 host->use_dma = 1;
1032 host->dma_ch = -1;
1033
1034 host->irq = pdev->resource[1].start;
1035 host->base = ioremap(pdev->res.start, SZ_4K);
1036 if (!host->base) {
1037 ret = -ENOMEM;
1038 goto out;
1039 }
1040
1041 if (minfo->wire4)
1042 mmc->caps |= MMC_CAP_4_BIT_DATA;
1043
1044 mmc->ops = &mmc_omap_ops;
1045 mmc->f_min = 400000;
1046 mmc->f_max = 24000000;
1047 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
1048
1049 /* Use scatterlist DMA to reduce per-transfer costs.
1050 * NOTE max_seg_size assumption that small blocks aren't
1051 * normally used (except e.g. for reading SD registers).
1052 */
1053 mmc->max_phys_segs = 32;
1054 mmc->max_hw_segs = 32;
1055 mmc->max_sectors = 256; /* NBLK max 11-bits, OMAP also limited by DMA */
1056 mmc->max_seg_size = mmc->max_sectors * 512;
1057
1058 if (host->power_pin >= 0) {
1059 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1060 dev_err(mmc_dev(host->mmc), "Unable to get GPIO
1061 pin for MMC power\n");
1062 goto out;
1063 }
1064 omap_set_gpio_direction(host->power_pin, 0);
1065 }
1066
1067 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1068 if (ret)
1069 goto out;
1070
1071 host->dev = &pdev->dev;
1072 platform_set_drvdata(pdev, host);
1073
1074 mmc_add_host(mmc);
1075
1076 if (host->switch_pin >= 0) {
1077 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1078 init_timer(&host->switch_timer);
1079 host->switch_timer.function = mmc_omap_switch_timer;
1080 host->switch_timer.data = (unsigned long) host;
1081 if (omap_request_gpio(host->switch_pin) != 0) {
1082 dev_warn(mmc_dev(host->mmc), "Unable to get GPIO pin for MMC cover switch\n");
1083 host->switch_pin = -1;
1084 goto no_switch;
1085 }
1086
1087 omap_set_gpio_direction(host->switch_pin, 1);
1088 ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
1089 mmc_omap_switch_irq, SA_TRIGGER_RISING, DRIVER_NAME, host);
1090 if (ret) {
1091 dev_warn(mmc_dev(host->mmc), "Unable to get IRQ for MMC cover switch\n");
1092 omap_free_gpio(host->switch_pin);
1093 host->switch_pin = -1;
1094 goto no_switch;
1095 }
1096 ret = device_create_file(&pdev->dev, &dev_attr_cover_switch);
1097 if (ret == 0) {
1098 ret = device_create_file(&pdev->dev, &dev_attr_enable_poll);
1099 if (ret != 0)
1100 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1101 }
1102 if (ret) {
1103 dev_wan(mmc_dev(host->mmc), "Unable to create sysfs attributes\n");
1104 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1105 omap_free_gpio(host->switch_pin);
1106 host->switch_pin = -1;
1107 goto no_switch;
1108 }
1109 if (mmc_omap_enable_poll && mmc_omap_cover_is_open(host))
1110 schedule_work(&host->switch_work);
1111 }
1112
1113no_switch:
1114 return 0;
1115
1116out:
1117 /* FIXME: Free other resources too. */
1118 if (host) {
1119 if (host->iclk && !IS_ERR(host->iclk))
1120 clk_put(host->iclk);
1121 if (host->fclk && !IS_ERR(host->fclk))
1122 clk_put(host->fclk);
1123 mmc_free_host(host->mmc);
1124 }
1125 return ret;
1126}
1127
1128static int mmc_omap_remove(struct platform_device *pdev)
1129{
1130 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1131
1132 platform_set_drvdata(pdev, NULL);
1133
1134 if (host) {
1135 mmc_remove_host(host->mmc);
1136 free_irq(host->irq, host);
1137
1138 if (host->power_pin >= 0)
1139 omap_free_gpio(host->power_pin);
1140 if (host->switch_pin >= 0) {
1141 device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1142 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1143 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1144 omap_free_gpio(host->switch_pin);
1145 host->switch_pin = -1;
1146 del_timer_sync(&host->switch_timer);
1147 flush_scheduled_work();
1148 }
1149 if (host->iclk && !IS_ERR(host->iclk))
1150 clk_put(host->iclk);
1151 if (host->fclk && !IS_ERR(host->fclk))
1152 clk_put(host->fclk);
1153 mmc_free_host(host->mmc);
1154 }
1155
1156 release_mem_region(pdev->resource[0].start,
1157 pdev->resource[0].end - pdev->resource[0].start + 1);
1158
1159 return 0;
1160}
1161
1162#ifdef CONFIG_PM
1163static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg)
1164{
1165 int ret = 0;
1166 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1167
1168 if (host && host->suspended)
1169 return 0;
1170
1171 if (host) {
1172 ret = mmc_suspend_host(host->mmc, mesg);
1173 if (ret == 0)
1174 host->suspended = 1;
1175 }
1176 return ret;
1177}
1178
1179static int mmc_omap_resume(struct platform_device *pdev)
1180{
1181 int ret = 0;
1182 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1183
1184 if (host && !host->suspended)
1185 return 0;
1186
1187 if (host) {
1188 ret = mmc_resume_host(host->mmc);
1189 if (ret == 0)
1190 host->suspended = 0;
1191 }
1192
1193 return ret;
1194}
1195#else
1196#define mmc_omap_suspend NULL
1197#define mmc_omap_resume NULL
1198#endif
1199
1200static struct platform_driver mmc_omap_driver = {
1201 .probe = mmc_omap_probe,
1202 .remove = mmc_omap_remove,
1203 .suspend = mmc_omap_suspend,
1204 .resume = mmc_omap_resume,
1205 .driver = {
1206 .name = DRIVER_NAME,
1207 },
1208};
1209
1210static int __init mmc_omap_init(void)
1211{
1212 return platform_driver_register(&mmc_omap_driver);
1213}
1214
1215static void __exit mmc_omap_exit(void)
1216{
1217 platform_driver_unregister(&mmc_omap_driver);
1218}
1219
1220module_init(mmc_omap_init);
1221module_exit(mmc_omap_exit);
1222
1223MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1224MODULE_LICENSE("GPL");
1225MODULE_ALIAS(DRIVER_NAME);
1226MODULE_AUTHOR("Juha Yrjölä");
diff --git a/drivers/mmc/omap.h b/drivers/mmc/omap.h
new file mode 100644
index 0000000000..c954d355a5
--- /dev/null
+++ b/drivers/mmc/omap.h
@@ -0,0 +1,55 @@
1#ifndef DRIVERS_MEDIA_MMC_OMAP_H
2#define DRIVERS_MEDIA_MMC_OMAP_H
3
4#define OMAP_MMC_REG_CMD 0x00
5#define OMAP_MMC_REG_ARGL 0x04
6#define OMAP_MMC_REG_ARGH 0x08
7#define OMAP_MMC_REG_CON 0x0c
8#define OMAP_MMC_REG_STAT 0x10
9#define OMAP_MMC_REG_IE 0x14
10#define OMAP_MMC_REG_CTO 0x18
11#define OMAP_MMC_REG_DTO 0x1c
12#define OMAP_MMC_REG_DATA 0x20
13#define OMAP_MMC_REG_BLEN 0x24
14#define OMAP_MMC_REG_NBLK 0x28
15#define OMAP_MMC_REG_BUF 0x2c
16#define OMAP_MMC_REG_SDIO 0x34
17#define OMAP_MMC_REG_REV 0x3c
18#define OMAP_MMC_REG_RSP0 0x40
19#define OMAP_MMC_REG_RSP1 0x44
20#define OMAP_MMC_REG_RSP2 0x48
21#define OMAP_MMC_REG_RSP3 0x4c
22#define OMAP_MMC_REG_RSP4 0x50
23#define OMAP_MMC_REG_RSP5 0x54
24#define OMAP_MMC_REG_RSP6 0x58
25#define OMAP_MMC_REG_RSP7 0x5c
26#define OMAP_MMC_REG_IOSR 0x60
27#define OMAP_MMC_REG_SYSC 0x64
28#define OMAP_MMC_REG_SYSS 0x68
29
30#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
31#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
32#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
33#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
34#define OMAP_MMC_STAT_A_FULL (1 << 10)
35#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
36#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
37#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
38#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
39#define OMAP_MMC_STAT_END_BUSY (1 << 4)
40#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
41#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
42#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
43
44#define OMAP_MMC_READ(base, reg) __raw_readw((base) + OMAP_MMC_REG_##reg)
45#define OMAP_MMC_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MMC_REG_##reg)
46
47/*
48 * Command types
49 */
50#define OMAP_MMC_CMDTYPE_BC 0
51#define OMAP_MMC_CMDTYPE_BCR 1
52#define OMAP_MMC_CMDTYPE_AC 2
53#define OMAP_MMC_CMDTYPE_ADTC 3
54
55#endif
diff --git a/drivers/mmc/pxamci.c b/drivers/mmc/pxamci.c
index c32fad1ce5..eb9a8826e9 100644
--- a/drivers/mmc/pxamci.c
+++ b/drivers/mmc/pxamci.c
@@ -37,12 +37,6 @@
37 37
38#include "pxamci.h" 38#include "pxamci.h"
39 39
40#ifdef CONFIG_MMC_DEBUG
41#define DBG(x...) printk(KERN_DEBUG x)
42#else
43#define DBG(x...) do { } while (0)
44#endif
45
46#define DRIVER_NAME "pxa2xx-mci" 40#define DRIVER_NAME "pxa2xx-mci"
47 41
48#define NR_SG 1 42#define NR_SG 1
@@ -206,7 +200,7 @@ static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd,
206 200
207static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq) 201static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
208{ 202{
209 DBG("PXAMCI: request done\n"); 203 pr_debug("PXAMCI: request done\n");
210 host->mrq = NULL; 204 host->mrq = NULL;
211 host->cmd = NULL; 205 host->cmd = NULL;
212 host->data = NULL; 206 host->data = NULL;
@@ -252,7 +246,7 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
252 if ((cmd->resp[0] & 0x80000000) == 0) 246 if ((cmd->resp[0] & 0x80000000) == 0)
253 cmd->error = MMC_ERR_BADCRC; 247 cmd->error = MMC_ERR_BADCRC;
254 } else { 248 } else {
255 DBG("ignoring CRC from command %d - *risky*\n",cmd->opcode); 249 pr_debug("ignoring CRC from command %d - *risky*\n",cmd->opcode);
256 } 250 }
257#else 251#else
258 cmd->error = MMC_ERR_BADCRC; 252 cmd->error = MMC_ERR_BADCRC;
@@ -317,12 +311,12 @@ static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
317 311
318 ireg = readl(host->base + MMC_I_REG); 312 ireg = readl(host->base + MMC_I_REG);
319 313
320 DBG("PXAMCI: irq %08x\n", ireg); 314 pr_debug("PXAMCI: irq %08x\n", ireg);
321 315
322 if (ireg) { 316 if (ireg) {
323 unsigned stat = readl(host->base + MMC_STAT); 317 unsigned stat = readl(host->base + MMC_STAT);
324 318
325 DBG("PXAMCI: stat %08x\n", stat); 319 pr_debug("PXAMCI: stat %08x\n", stat);
326 320
327 if (ireg & END_CMD_RES) 321 if (ireg & END_CMD_RES)
328 handled |= pxamci_cmd_done(host, stat); 322 handled |= pxamci_cmd_done(host, stat);
@@ -376,9 +370,9 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
376{ 370{
377 struct pxamci_host *host = mmc_priv(mmc); 371 struct pxamci_host *host = mmc_priv(mmc);
378 372
379 DBG("pxamci_set_ios: clock %u power %u vdd %u.%02u\n", 373 pr_debug("pxamci_set_ios: clock %u power %u vdd %u.%02u\n",
380 ios->clock, ios->power_mode, ios->vdd / 100, 374 ios->clock, ios->power_mode, ios->vdd / 100,
381 ios->vdd % 100); 375 ios->vdd % 100);
382 376
383 if (ios->clock) { 377 if (ios->clock) {
384 unsigned int clk = CLOCKRATE / ios->clock; 378 unsigned int clk = CLOCKRATE / ios->clock;
@@ -405,8 +399,8 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
405 host->cmdat |= CMDAT_INIT; 399 host->cmdat |= CMDAT_INIT;
406 } 400 }
407 401
408 DBG("pxamci_set_ios: clkrt = %x cmdat = %x\n", 402 pr_debug("pxamci_set_ios: clkrt = %x cmdat = %x\n",
409 host->clkrt, host->cmdat); 403 host->clkrt, host->cmdat);
410} 404}
411 405
412static struct mmc_host_ops pxamci_ops = { 406static struct mmc_host_ops pxamci_ops = {
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 8b811d9437..bdbfca0500 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -31,12 +31,8 @@
31 31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>" 32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33 33
34#ifdef CONFIG_MMC_DEBUG
35#define DBG(f, x...) \ 34#define DBG(f, x...) \
36 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__,## x) 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
37#else
38#define DBG(f, x...) do { } while (0)
39#endif
40 36
41static const struct pci_device_id pci_ids[] __devinitdata = { 37static const struct pci_device_id pci_ids[] __devinitdata = {
42 /* handle any SD host controller */ 38 /* handle any SD host controller */
diff --git a/drivers/mmc/wbsd.c b/drivers/mmc/wbsd.c
index 3be397d436..511f7b0b31 100644
--- a/drivers/mmc/wbsd.c
+++ b/drivers/mmc/wbsd.c
@@ -44,15 +44,10 @@
44#define DRIVER_NAME "wbsd" 44#define DRIVER_NAME "wbsd"
45#define DRIVER_VERSION "1.5" 45#define DRIVER_VERSION "1.5"
46 46
47#ifdef CONFIG_MMC_DEBUG
48#define DBG(x...) \ 47#define DBG(x...) \
49 printk(KERN_DEBUG DRIVER_NAME ": " x) 48 pr_debug(DRIVER_NAME ": " x)
50#define DBGF(f, x...) \ 49#define DBGF(f, x...) \
51 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x) 50 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
52#else
53#define DBG(x...) do { } while (0)
54#define DBGF(x...) do { } while (0)
55#endif
56 51
57/* 52/*
58 * Device resources 53 * Device resources
diff --git a/drivers/mtd/chips/amd_flash.c b/drivers/mtd/chips/amd_flash.c
index fdb91b6f1d..57115618c4 100644
--- a/drivers/mtd/chips/amd_flash.c
+++ b/drivers/mtd/chips/amd_flash.c
@@ -664,7 +664,7 @@ static struct mtd_info *amd_flash_probe(struct map_info *map)
664 printk("%s: Probing for AMD compatible flash...\n", map->name); 664 printk("%s: Probing for AMD compatible flash...\n", map->name);
665 665
666 if ((table_pos[0] = probe_new_chip(mtd, 0, NULL, &temp, table, 666 if ((table_pos[0] = probe_new_chip(mtd, 0, NULL, &temp, table,
667 sizeof(table)/sizeof(table[0]))) 667 ARRAY_SIZE(table)))
668 == -1) { 668 == -1) {
669 printk(KERN_WARNING 669 printk(KERN_WARNING
670 "%s: Found no AMD compatible device at location zero\n", 670 "%s: Found no AMD compatible device at location zero\n",
@@ -696,7 +696,7 @@ static struct mtd_info *amd_flash_probe(struct map_info *map)
696 base += (1 << temp.chipshift)) { 696 base += (1 << temp.chipshift)) {
697 int numchips = temp.numchips; 697 int numchips = temp.numchips;
698 table_pos[numchips] = probe_new_chip(mtd, base, chips, 698 table_pos[numchips] = probe_new_chip(mtd, base, chips,
699 &temp, table, sizeof(table)/sizeof(table[0])); 699 &temp, table, ARRAY_SIZE(table));
700 } 700 }
701 701
702 mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) * 702 mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) *
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index edb306c03c..517ea33e72 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -34,6 +34,7 @@
34#define MANUFACTURER_MACRONIX 0x00C2 34#define MANUFACTURER_MACRONIX 0x00C2
35#define MANUFACTURER_NEC 0x0010 35#define MANUFACTURER_NEC 0x0010
36#define MANUFACTURER_PMC 0x009D 36#define MANUFACTURER_PMC 0x009D
37#define MANUFACTURER_SHARP 0x00b0
37#define MANUFACTURER_SST 0x00BF 38#define MANUFACTURER_SST 0x00BF
38#define MANUFACTURER_ST 0x0020 39#define MANUFACTURER_ST 0x0020
39#define MANUFACTURER_TOSHIBA 0x0098 40#define MANUFACTURER_TOSHIBA 0x0098
@@ -124,6 +125,9 @@
124#define PM49FL004 0x006E 125#define PM49FL004 0x006E
125#define PM49FL008 0x006A 126#define PM49FL008 0x006A
126 127
128/* Sharp */
129#define LH28F640BF 0x00b0
130
127/* ST - www.st.com */ 131/* ST - www.st.com */
128#define M29W800DT 0x00D7 132#define M29W800DT 0x00D7
129#define M29W800DB 0x005B 133#define M29W800DB 0x005B
@@ -1267,6 +1271,19 @@ static const struct amd_flash_info jedec_table[] = {
1267 .regions = { 1271 .regions = {
1268 ERASEINFO( 0x01000, 256 ) 1272 ERASEINFO( 0x01000, 256 )
1269 } 1273 }
1274 }, {
1275 .mfr_id = MANUFACTURER_SHARP,
1276 .dev_id = LH28F640BF,
1277 .name = "LH28F640BF",
1278 .uaddr = {
1279 [0] = MTD_UADDR_UNNECESSARY, /* x8 */
1280 },
1281 .DevSize = SIZE_4MiB,
1282 .CmdSet = P_ID_INTEL_STD,
1283 .NumEraseRegions= 1,
1284 .regions = {
1285 ERASEINFO(0x40000,16),
1286 }
1270 }, { 1287 }, {
1271 .mfr_id = MANUFACTURER_SST, 1288 .mfr_id = MANUFACTURER_SST,
1272 .dev_id = SST39LF512, 1289 .dev_id = SST39LF512,
@@ -2035,7 +2052,7 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,
2035 DEBUG(MTD_DEBUG_LEVEL3, 2052 DEBUG(MTD_DEBUG_LEVEL3,
2036 "Search for id:(%02x %02x) interleave(%d) type(%d)\n", 2053 "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
2037 cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type); 2054 cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
2038 for (i=0; i<sizeof(jedec_table)/sizeof(jedec_table[0]); i++) { 2055 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
2039 if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) { 2056 if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
2040 DEBUG( MTD_DEBUG_LEVEL3, 2057 DEBUG( MTD_DEBUG_LEVEL3,
2041 "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n", 2058 "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
diff --git a/drivers/mtd/chips/sharp.c b/drivers/mtd/chips/sharp.c
index 36f61a6a76..3cc0b23c58 100644
--- a/drivers/mtd/chips/sharp.c
+++ b/drivers/mtd/chips/sharp.c
@@ -64,7 +64,7 @@
64 64
65#undef AUTOUNLOCK /* automatically unlocks blocks before erasing */ 65#undef AUTOUNLOCK /* automatically unlocks blocks before erasing */
66 66
67struct mtd_info *sharp_probe(struct map_info *); 67static struct mtd_info *sharp_probe(struct map_info *);
68 68
69static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd); 69static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd);
70 70
@@ -96,7 +96,6 @@ struct sharp_info{
96 struct flchip chips[1]; 96 struct flchip chips[1];
97}; 97};
98 98
99struct mtd_info *sharp_probe(struct map_info *map);
100static void sharp_destroy(struct mtd_info *mtd); 99static void sharp_destroy(struct mtd_info *mtd);
101 100
102static struct mtd_chip_driver sharp_chipdrv = { 101static struct mtd_chip_driver sharp_chipdrv = {
@@ -107,7 +106,7 @@ static struct mtd_chip_driver sharp_chipdrv = {
107}; 106};
108 107
109 108
110struct mtd_info *sharp_probe(struct map_info *map) 109static struct mtd_info *sharp_probe(struct map_info *map)
111{ 110{
112 struct mtd_info *mtd = NULL; 111 struct mtd_info *mtd = NULL;
113 struct sharp_info *sharp = NULL; 112 struct sharp_info *sharp = NULL;
@@ -581,7 +580,7 @@ static void sharp_destroy(struct mtd_info *mtd)
581 580
582} 581}
583 582
584int __init sharp_probe_init(void) 583static int __init sharp_probe_init(void)
585{ 584{
586 printk("MTD Sharp chip driver <ds@lineo.com>\n"); 585 printk("MTD Sharp chip driver <ds@lineo.com>\n");
587 586
diff --git a/drivers/mtd/cmdlinepart.c b/drivers/mtd/cmdlinepart.c
index 6b8bb2e4dc..a7a7bfe338 100644
--- a/drivers/mtd/cmdlinepart.c
+++ b/drivers/mtd/cmdlinepart.c
@@ -42,7 +42,8 @@
42 42
43 43
44/* special size referring to all the remaining space in a partition */ 44/* special size referring to all the remaining space in a partition */
45#define SIZE_REMAINING 0xffffffff 45#define SIZE_REMAINING UINT_MAX
46#define OFFSET_CONTINUOUS UINT_MAX
46 47
47struct cmdline_mtd_partition { 48struct cmdline_mtd_partition {
48 struct cmdline_mtd_partition *next; 49 struct cmdline_mtd_partition *next;
@@ -75,7 +76,7 @@ static struct mtd_partition * newpart(char *s,
75{ 76{
76 struct mtd_partition *parts; 77 struct mtd_partition *parts;
77 unsigned long size; 78 unsigned long size;
78 unsigned long offset = 0; 79 unsigned long offset = OFFSET_CONTINUOUS;
79 char *name; 80 char *name;
80 int name_len; 81 int name_len;
81 unsigned char *extra_mem; 82 unsigned char *extra_mem;
@@ -314,7 +315,7 @@ static int parse_cmdline_partitions(struct mtd_info *master,
314 { 315 {
315 for(i = 0, offset = 0; i < part->num_parts; i++) 316 for(i = 0, offset = 0; i < part->num_parts; i++)
316 { 317 {
317 if (!part->parts[i].offset) 318 if (part->parts[i].offset == OFFSET_CONTINUOUS)
318 part->parts[i].offset = offset; 319 part->parts[i].offset = offset;
319 else 320 else
320 offset = part->parts[i].offset; 321 offset = part->parts[i].offset;
diff --git a/drivers/mtd/devices/blkmtd.c b/drivers/mtd/devices/blkmtd.c
index 04f864d238..79f2e1f23e 100644
--- a/drivers/mtd/devices/blkmtd.c
+++ b/drivers/mtd/devices/blkmtd.c
@@ -28,8 +28,9 @@
28#include <linux/pagemap.h> 28#include <linux/pagemap.h>
29#include <linux/list.h> 29#include <linux/list.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/mount.h>
31#include <linux/mtd/mtd.h> 32#include <linux/mtd/mtd.h>
32 33#include <linux/mutex.h>
33 34
34#define err(format, arg...) printk(KERN_ERR "blkmtd: " format "\n" , ## arg) 35#define err(format, arg...) printk(KERN_ERR "blkmtd: " format "\n" , ## arg)
35#define info(format, arg...) printk(KERN_INFO "blkmtd: " format "\n" , ## arg) 36#define info(format, arg...) printk(KERN_INFO "blkmtd: " format "\n" , ## arg)
@@ -46,7 +47,7 @@ struct blkmtd_dev {
46 struct list_head list; 47 struct list_head list;
47 struct block_device *blkdev; 48 struct block_device *blkdev;
48 struct mtd_info mtd_info; 49 struct mtd_info mtd_info;
49 struct semaphore wrbuf_mutex; 50 struct mutex wrbuf_mutex;
50}; 51};
51 52
52 53
@@ -268,7 +269,7 @@ static int write_pages(struct blkmtd_dev *dev, const u_char *buf, loff_t to,
268 if(end_len) 269 if(end_len)
269 pagecnt++; 270 pagecnt++;
270 271
271 down(&dev->wrbuf_mutex); 272 mutex_lock(&dev->wrbuf_mutex);
272 273
273 DEBUG(3, "blkmtd: write: start_len = %zd len = %zd end_len = %zd pagecnt = %d\n", 274 DEBUG(3, "blkmtd: write: start_len = %zd len = %zd end_len = %zd pagecnt = %d\n",
274 start_len, len, end_len, pagecnt); 275 start_len, len, end_len, pagecnt);
@@ -376,7 +377,7 @@ static int write_pages(struct blkmtd_dev *dev, const u_char *buf, loff_t to,
376 blkmtd_write_out(bio); 377 blkmtd_write_out(bio);
377 378
378 DEBUG(2, "blkmtd: write: end, retlen = %zd, err = %d\n", *retlen, err); 379 DEBUG(2, "blkmtd: write: end, retlen = %zd, err = %d\n", *retlen, err);
379 up(&dev->wrbuf_mutex); 380 mutex_unlock(&dev->wrbuf_mutex);
380 381
381 if(retlen) 382 if(retlen)
382 *retlen = thislen; 383 *retlen = thislen;
@@ -614,8 +615,6 @@ static struct mtd_erase_region_info *calc_erase_regions(
614} 615}
615 616
616 617
617extern dev_t __init name_to_dev_t(const char *line);
618
619static struct blkmtd_dev *add_device(char *devname, int readonly, int erase_size) 618static struct blkmtd_dev *add_device(char *devname, int readonly, int erase_size)
620{ 619{
621 struct block_device *bdev; 620 struct block_device *bdev;
@@ -659,7 +658,7 @@ static struct blkmtd_dev *add_device(char *devname, int readonly, int erase_size
659 memset(dev, 0, sizeof(struct blkmtd_dev)); 658 memset(dev, 0, sizeof(struct blkmtd_dev));
660 dev->blkdev = bdev; 659 dev->blkdev = bdev;
661 if(!readonly) { 660 if(!readonly) {
662 init_MUTEX(&dev->wrbuf_mutex); 661 mutex_init(&dev->wrbuf_mutex);
663 } 662 }
664 663
665 dev->mtd_info.size = dev->blkdev->bd_inode->i_size & PAGE_MASK; 664 dev->mtd_info.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c
index 7ff403b2a0..4160b8334c 100644
--- a/drivers/mtd/devices/block2mtd.c
+++ b/drivers/mtd/devices/block2mtd.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/mtd/mtd.h> 19#include <linux/mtd/mtd.h>
20#include <linux/buffer_head.h> 20#include <linux/buffer_head.h>
21#include <linux/mutex.h>
21 22
22#define VERSION "$Revision: 1.30 $" 23#define VERSION "$Revision: 1.30 $"
23 24
@@ -31,7 +32,7 @@ struct block2mtd_dev {
31 struct list_head list; 32 struct list_head list;
32 struct block_device *blkdev; 33 struct block_device *blkdev;
33 struct mtd_info mtd; 34 struct mtd_info mtd;
34 struct semaphore write_mutex; 35 struct mutex write_mutex;
35}; 36};
36 37
37 38
@@ -134,9 +135,9 @@ static int block2mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
134 int err; 135 int err;
135 136
136 instr->state = MTD_ERASING; 137 instr->state = MTD_ERASING;
137 down(&dev->write_mutex); 138 mutex_lock(&dev->write_mutex);
138 err = _block2mtd_erase(dev, from, len); 139 err = _block2mtd_erase(dev, from, len);
139 up(&dev->write_mutex); 140 mutex_unlock(&dev->write_mutex);
140 if (err) { 141 if (err) {
141 ERROR("erase failed err = %d", err); 142 ERROR("erase failed err = %d", err);
142 instr->state = MTD_ERASE_FAILED; 143 instr->state = MTD_ERASE_FAILED;
@@ -249,9 +250,9 @@ static int block2mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
249 if (to + len > mtd->size) 250 if (to + len > mtd->size)
250 len = mtd->size - to; 251 len = mtd->size - to;
251 252
252 down(&dev->write_mutex); 253 mutex_lock(&dev->write_mutex);
253 err = _block2mtd_write(dev, buf, to, len, retlen); 254 err = _block2mtd_write(dev, buf, to, len, retlen);
254 up(&dev->write_mutex); 255 mutex_unlock(&dev->write_mutex);
255 if (err > 0) 256 if (err > 0)
256 err = 0; 257 err = 0;
257 return err; 258 return err;
@@ -310,7 +311,7 @@ static struct block2mtd_dev *add_device(char *devname, int erase_size)
310 goto devinit_err; 311 goto devinit_err;
311 } 312 }
312 313
313 init_MUTEX(&dev->write_mutex); 314 mutex_init(&dev->write_mutex);
314 315
315 /* Setup the MTD structure */ 316 /* Setup the MTD structure */
316 /* make the name contain the block device in */ 317 /* make the name contain the block device in */
diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c
index e4345cf744..23e7a5c7d2 100644
--- a/drivers/mtd/devices/doc2000.c
+++ b/drivers/mtd/devices/doc2000.c
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/types.h> 21#include <linux/types.h>
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/mutex.h>
23 24
24#include <linux/mtd/mtd.h> 25#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h> 26#include <linux/mtd/nand.h>
@@ -605,7 +606,7 @@ static void DoC2k_init(struct mtd_info *mtd)
605 606
606 this->curfloor = -1; 607 this->curfloor = -1;
607 this->curchip = -1; 608 this->curchip = -1;
608 init_MUTEX(&this->lock); 609 mutex_init(&this->lock);
609 610
610 /* Ident all the chips present. */ 611 /* Ident all the chips present. */
611 DoC_ScanChips(this, maxchips); 612 DoC_ScanChips(this, maxchips);
@@ -645,7 +646,7 @@ static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
645 if (from >= this->totlen) 646 if (from >= this->totlen)
646 return -EINVAL; 647 return -EINVAL;
647 648
648 down(&this->lock); 649 mutex_lock(&this->lock);
649 650
650 *retlen = 0; 651 *retlen = 0;
651 while (left) { 652 while (left) {
@@ -774,7 +775,7 @@ static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
774 buf += len; 775 buf += len;
775 } 776 }
776 777
777 up(&this->lock); 778 mutex_unlock(&this->lock);
778 779
779 return ret; 780 return ret;
780} 781}
@@ -803,7 +804,7 @@ static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
803 if (to >= this->totlen) 804 if (to >= this->totlen)
804 return -EINVAL; 805 return -EINVAL;
805 806
806 down(&this->lock); 807 mutex_lock(&this->lock);
807 808
808 *retlen = 0; 809 *retlen = 0;
809 while (left) { 810 while (left) {
@@ -873,7 +874,7 @@ static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
873 printk(KERN_ERR "Error programming flash\n"); 874 printk(KERN_ERR "Error programming flash\n");
874 /* Error in programming */ 875 /* Error in programming */
875 *retlen = 0; 876 *retlen = 0;
876 up(&this->lock); 877 mutex_unlock(&this->lock);
877 return -EIO; 878 return -EIO;
878 } 879 }
879 880
@@ -935,7 +936,7 @@ static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
935 printk(KERN_ERR "Error programming flash\n"); 936 printk(KERN_ERR "Error programming flash\n");
936 /* Error in programming */ 937 /* Error in programming */
937 *retlen = 0; 938 *retlen = 0;
938 up(&this->lock); 939 mutex_unlock(&this->lock);
939 return -EIO; 940 return -EIO;
940 } 941 }
941 942
@@ -956,7 +957,7 @@ static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
956 957
957 ret = doc_write_oob_nolock(mtd, to, 8, &dummy, x); 958 ret = doc_write_oob_nolock(mtd, to, 8, &dummy, x);
958 if (ret) { 959 if (ret) {
959 up(&this->lock); 960 mutex_unlock(&this->lock);
960 return ret; 961 return ret;
961 } 962 }
962 } 963 }
@@ -966,7 +967,7 @@ static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
966 buf += len; 967 buf += len;
967 } 968 }
968 969
969 up(&this->lock); 970 mutex_unlock(&this->lock);
970 return 0; 971 return 0;
971} 972}
972 973
@@ -975,13 +976,13 @@ static int doc_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
975 u_char *eccbuf, struct nand_oobinfo *oobsel) 976 u_char *eccbuf, struct nand_oobinfo *oobsel)
976{ 977{
977 static char static_buf[512]; 978 static char static_buf[512];
978 static DECLARE_MUTEX(writev_buf_sem); 979 static DEFINE_MUTEX(writev_buf_mutex);
979 980
980 size_t totretlen = 0; 981 size_t totretlen = 0;
981 size_t thisvecofs = 0; 982 size_t thisvecofs = 0;
982 int ret= 0; 983 int ret= 0;
983 984
984 down(&writev_buf_sem); 985 mutex_lock(&writev_buf_mutex);
985 986
986 while(count) { 987 while(count) {
987 size_t thislen, thisretlen; 988 size_t thislen, thisretlen;
@@ -1024,7 +1025,7 @@ static int doc_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
1024 to += thislen; 1025 to += thislen;
1025 } 1026 }
1026 1027
1027 up(&writev_buf_sem); 1028 mutex_unlock(&writev_buf_mutex);
1028 *retlen = totretlen; 1029 *retlen = totretlen;
1029 return ret; 1030 return ret;
1030} 1031}
@@ -1037,7 +1038,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
1037 int len256 = 0, ret; 1038 int len256 = 0, ret;
1038 struct Nand *mychip; 1039 struct Nand *mychip;
1039 1040
1040 down(&this->lock); 1041 mutex_lock(&this->lock);
1041 1042
1042 mychip = &this->chips[ofs >> this->chipshift]; 1043 mychip = &this->chips[ofs >> this->chipshift];
1043 1044
@@ -1083,7 +1084,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
1083 1084
1084 ret = DoC_WaitReady(this); 1085 ret = DoC_WaitReady(this);
1085 1086
1086 up(&this->lock); 1087 mutex_unlock(&this->lock);
1087 return ret; 1088 return ret;
1088 1089
1089} 1090}
@@ -1197,10 +1198,10 @@ static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
1197 struct DiskOnChip *this = mtd->priv; 1198 struct DiskOnChip *this = mtd->priv;
1198 int ret; 1199 int ret;
1199 1200
1200 down(&this->lock); 1201 mutex_lock(&this->lock);
1201 ret = doc_write_oob_nolock(mtd, ofs, len, retlen, buf); 1202 ret = doc_write_oob_nolock(mtd, ofs, len, retlen, buf);
1202 1203
1203 up(&this->lock); 1204 mutex_unlock(&this->lock);
1204 return ret; 1205 return ret;
1205} 1206}
1206 1207
@@ -1214,10 +1215,10 @@ static int doc_erase(struct mtd_info *mtd, struct erase_info *instr)
1214 struct Nand *mychip; 1215 struct Nand *mychip;
1215 int status; 1216 int status;
1216 1217
1217 down(&this->lock); 1218 mutex_lock(&this->lock);
1218 1219
1219 if (ofs & (mtd->erasesize-1) || len & (mtd->erasesize-1)) { 1220 if (ofs & (mtd->erasesize-1) || len & (mtd->erasesize-1)) {
1220 up(&this->lock); 1221 mutex_unlock(&this->lock);
1221 return -EINVAL; 1222 return -EINVAL;
1222 } 1223 }
1223 1224
@@ -1265,7 +1266,7 @@ static int doc_erase(struct mtd_info *mtd, struct erase_info *instr)
1265 callback: 1266 callback:
1266 mtd_erase_callback(instr); 1267 mtd_erase_callback(instr);
1267 1268
1268 up(&this->lock); 1269 mutex_unlock(&this->lock);
1269 return 0; 1270 return 0;
1270} 1271}
1271 1272
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
index 1e876fcb04..29b0ddaa32 100644
--- a/drivers/mtd/devices/lart.c
+++ b/drivers/mtd/devices/lart.c
@@ -581,8 +581,6 @@ static int flash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen
581 581
582/***************************************************************************************************/ 582/***************************************************************************************************/
583 583
584#define NB_OF(x) (sizeof (x) / sizeof (x[0]))
585
586static struct mtd_info mtd; 584static struct mtd_info mtd;
587 585
588static struct mtd_erase_region_info erase_regions[] = { 586static struct mtd_erase_region_info erase_regions[] = {
@@ -640,7 +638,7 @@ int __init lart_flash_init (void)
640 mtd.flags = MTD_CAP_NORFLASH; 638 mtd.flags = MTD_CAP_NORFLASH;
641 mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN; 639 mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN;
642 mtd.erasesize = FLASH_BLOCKSIZE_MAIN; 640 mtd.erasesize = FLASH_BLOCKSIZE_MAIN;
643 mtd.numeraseregions = NB_OF (erase_regions); 641 mtd.numeraseregions = ARRAY_SIZE(erase_regions);
644 mtd.eraseregions = erase_regions; 642 mtd.eraseregions = erase_regions;
645 mtd.erase = flash_erase; 643 mtd.erase = flash_erase;
646 mtd.read = flash_read; 644 mtd.read = flash_read;
@@ -670,9 +668,9 @@ int __init lart_flash_init (void)
670 result,mtd.eraseregions[result].numblocks); 668 result,mtd.eraseregions[result].numblocks);
671 669
672#ifdef HAVE_PARTITIONS 670#ifdef HAVE_PARTITIONS
673 printk ("\npartitions = %d\n",NB_OF (lart_partitions)); 671 printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions));
674 672
675 for (result = 0; result < NB_OF (lart_partitions); result++) 673 for (result = 0; result < ARRAY_SIZE(lart_partitions); result++)
676 printk (KERN_DEBUG 674 printk (KERN_DEBUG
677 "\n\n" 675 "\n\n"
678 "lart_partitions[%d].name = %s\n" 676 "lart_partitions[%d].name = %s\n"
@@ -687,7 +685,7 @@ int __init lart_flash_init (void)
687#ifndef HAVE_PARTITIONS 685#ifndef HAVE_PARTITIONS
688 result = add_mtd_device (&mtd); 686 result = add_mtd_device (&mtd);
689#else 687#else
690 result = add_mtd_partitions (&mtd,lart_partitions,NB_OF (lart_partitions)); 688 result = add_mtd_partitions (&mtd,lart_partitions, ARRAY_SIZE(lart_partitions));
691#endif 689#endif
692 690
693 return (result); 691 return (result);
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index d5f24089be..04e65d5dae 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -186,7 +186,7 @@ static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
186 struct m25p *flash = mtd_to_m25p(mtd); 186 struct m25p *flash = mtd_to_m25p(mtd);
187 u32 addr,len; 187 u32 addr,len;
188 188
189 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", 189 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n",
190 flash->spi->dev.bus_id, __FUNCTION__, "at", 190 flash->spi->dev.bus_id, __FUNCTION__, "at",
191 (u32)instr->addr, instr->len); 191 (u32)instr->addr, instr->len);
192 192
diff --git a/drivers/mtd/devices/ms02-nv.c b/drivers/mtd/devices/ms02-nv.c
index 0ff2e43782..485f663493 100644
--- a/drivers/mtd/devices/ms02-nv.c
+++ b/drivers/mtd/devices/ms02-nv.c
@@ -308,7 +308,7 @@ static int __init ms02nv_init(void)
308 break; 308 break;
309 } 309 }
310 310
311 for (i = 0; i < (sizeof(ms02nv_addrs) / sizeof(*ms02nv_addrs)); i++) 311 for (i = 0; i < ARRAY_SIZE(ms02nv_addrs); i++)
312 if (!ms02nv_init_one(ms02nv_addrs[i] << stride)) 312 if (!ms02nv_init_one(ms02nv_addrs[i] << stride))
313 count++; 313 count++;
314 314
diff --git a/drivers/mtd/inftlcore.c b/drivers/mtd/inftlcore.c
index 8a54489017..a3b9247971 100644
--- a/drivers/mtd/inftlcore.c
+++ b/drivers/mtd/inftlcore.c
@@ -47,9 +47,6 @@
47 */ 47 */
48#define MAX_LOOPS 10000 48#define MAX_LOOPS 10000
49 49
50extern void INFTL_dumptables(struct INFTLrecord *inftl);
51extern void INFTL_dumpVUchains(struct INFTLrecord *inftl);
52
53static void inftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd) 50static void inftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd)
54{ 51{
55 struct INFTLrecord *inftl; 52 struct INFTLrecord *inftl;
@@ -132,7 +129,7 @@ static void inftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd)
132 return; 129 return;
133 } 130 }
134#ifdef PSYCHO_DEBUG 131#ifdef PSYCHO_DEBUG
135 printk(KERN_INFO "INFTL: Found new nftl%c\n", nftl->mbd.devnum + 'a'); 132 printk(KERN_INFO "INFTL: Found new inftl%c\n", inftl->mbd.devnum + 'a');
136#endif 133#endif
137 return; 134 return;
138} 135}
@@ -885,8 +882,6 @@ static struct mtd_blktrans_ops inftl_tr = {
885 .owner = THIS_MODULE, 882 .owner = THIS_MODULE,
886}; 883};
887 884
888extern char inftlmountrev[];
889
890static int __init init_inftl(void) 885static int __init init_inftl(void)
891{ 886{
892 printk(KERN_INFO "INFTL: inftlcore.c $Revision: 1.19 $, " 887 printk(KERN_INFO "INFTL: inftlcore.c $Revision: 1.19 $, "
diff --git a/drivers/mtd/maps/alchemy-flash.c b/drivers/mtd/maps/alchemy-flash.c
index a57791a6ce..b933a2a27b 100644
--- a/drivers/mtd/maps/alchemy-flash.c
+++ b/drivers/mtd/maps/alchemy-flash.c
@@ -126,8 +126,6 @@ static struct mtd_partition alchemy_partitions[] = {
126 } 126 }
127}; 127};
128 128
129#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
130
131static struct mtd_info *mymtd; 129static struct mtd_info *mymtd;
132 130
133int __init alchemy_mtd_init(void) 131int __init alchemy_mtd_init(void)
@@ -154,7 +152,7 @@ int __init alchemy_mtd_init(void)
154 * Static partition definition selection 152 * Static partition definition selection
155 */ 153 */
156 parts = alchemy_partitions; 154 parts = alchemy_partitions;
157 nb_parts = NB_OF(alchemy_partitions); 155 nb_parts = ARRAY_SIZE(alchemy_partitions);
158 alchemy_map.size = window_size; 156 alchemy_map.size = window_size;
159 157
160 /* 158 /*
diff --git a/drivers/mtd/maps/cfi_flagadm.c b/drivers/mtd/maps/cfi_flagadm.c
index 6a8c0415bd..fd0f0d3187 100644
--- a/drivers/mtd/maps/cfi_flagadm.c
+++ b/drivers/mtd/maps/cfi_flagadm.c
@@ -86,7 +86,7 @@ struct mtd_partition flagadm_parts[] = {
86 } 86 }
87}; 87};
88 88
89#define PARTITION_COUNT (sizeof(flagadm_parts)/sizeof(struct mtd_partition)) 89#define PARTITION_COUNT ARRAY_SIZE(flagadm_parts)
90 90
91static struct mtd_info *mymtd; 91static struct mtd_info *mymtd;
92 92
diff --git a/drivers/mtd/maps/dbox2-flash.c b/drivers/mtd/maps/dbox2-flash.c
index 49d90542fc..652813cd6c 100644
--- a/drivers/mtd/maps/dbox2-flash.c
+++ b/drivers/mtd/maps/dbox2-flash.c
@@ -57,7 +57,7 @@ static struct mtd_partition partition_info[]= {
57 } 57 }
58}; 58};
59 59
60#define NUM_PARTITIONS (sizeof(partition_info) / sizeof(partition_info[0])) 60#define NUM_PARTITIONS ARRAY_SIZE(partition_info)
61 61
62#define WINDOW_ADDR 0x10000000 62#define WINDOW_ADDR 0x10000000
63#define WINDOW_SIZE 0x800000 63#define WINDOW_SIZE 0x800000
diff --git a/drivers/mtd/maps/dilnetpc.c b/drivers/mtd/maps/dilnetpc.c
index efb2216926..c299d10b33 100644
--- a/drivers/mtd/maps/dilnetpc.c
+++ b/drivers/mtd/maps/dilnetpc.c
@@ -300,7 +300,7 @@ static struct mtd_partition partition_info[]=
300 }, 300 },
301}; 301};
302 302
303#define NUM_PARTITIONS (sizeof(partition_info)/sizeof(partition_info[0])) 303#define NUM_PARTITIONS ARRAY_SIZE(partition_info)
304 304
305static struct mtd_info *mymtd; 305static struct mtd_info *mymtd;
306static struct mtd_info *lowlvl_parts[NUM_PARTITIONS]; 306static struct mtd_info *lowlvl_parts[NUM_PARTITIONS];
@@ -345,7 +345,7 @@ static struct mtd_partition higlvl_partition_info[]=
345 }, 345 },
346}; 346};
347 347
348#define NUM_HIGHLVL_PARTITIONS (sizeof(higlvl_partition_info)/sizeof(partition_info[0])) 348#define NUM_HIGHLVL_PARTITIONS ARRAY_SIZE(higlvl_partition_info)
349 349
350 350
351static int dnp_adnp_probe(void) 351static int dnp_adnp_probe(void)
diff --git a/drivers/mtd/maps/dmv182.c b/drivers/mtd/maps/dmv182.c
index b993ac01a9..2bb3c0f0f9 100644
--- a/drivers/mtd/maps/dmv182.c
+++ b/drivers/mtd/maps/dmv182.c
@@ -99,7 +99,7 @@ static struct mtd_info *this_mtd;
99static int __init init_svme182(void) 99static int __init init_svme182(void)
100{ 100{
101 struct mtd_partition *partitions; 101 struct mtd_partition *partitions;
102 int num_parts = sizeof(svme182_partitions) / sizeof(struct mtd_partition); 102 int num_parts = ARRAY_SIZE(svme182_partitions);
103 103
104 partitions = svme182_partitions; 104 partitions = svme182_partitions;
105 105
diff --git a/drivers/mtd/maps/h720x-flash.c b/drivers/mtd/maps/h720x-flash.c
index 3190948211..0667101ccb 100644
--- a/drivers/mtd/maps/h720x-flash.c
+++ b/drivers/mtd/maps/h720x-flash.c
@@ -59,7 +59,7 @@ static struct mtd_partition h720x_partitions[] = {
59 } 59 }
60}; 60};
61 61
62#define NUM_PARTITIONS (sizeof(h720x_partitions)/sizeof(h720x_partitions[0])) 62#define NUM_PARTITIONS ARRAY_SIZE(h720x_partitions)
63 63
64static int nr_mtd_parts; 64static int nr_mtd_parts;
65static struct mtd_partition *mtd_parts; 65static struct mtd_partition *mtd_parts;
diff --git a/drivers/mtd/maps/netsc520.c b/drivers/mtd/maps/netsc520.c
index 33060a3157..ed21547015 100644
--- a/drivers/mtd/maps/netsc520.c
+++ b/drivers/mtd/maps/netsc520.c
@@ -76,7 +76,7 @@ static struct mtd_partition partition_info[]={
76 .size = 0x80000 76 .size = 0x80000
77 }, 77 },
78}; 78};
79#define NUM_PARTITIONS (sizeof(partition_info)/sizeof(partition_info[0])) 79#define NUM_PARTITIONS ARRAY_SIZE(partition_info)
80 80
81#define WINDOW_SIZE 0x00100000 81#define WINDOW_SIZE 0x00100000
82#define WINDOW_ADDR 0x00200000 82#define WINDOW_ADDR 0x00200000
@@ -88,7 +88,7 @@ static struct map_info netsc520_map = {
88 .phys = WINDOW_ADDR, 88 .phys = WINDOW_ADDR,
89}; 89};
90 90
91#define NUM_FLASH_BANKS (sizeof(netsc520_map)/sizeof(struct map_info)) 91#define NUM_FLASH_BANKS ARRAY_SIZE(netsc520_map)
92 92
93static struct mtd_info *mymtd; 93static struct mtd_info *mymtd;
94 94
diff --git a/drivers/mtd/maps/nettel.c b/drivers/mtd/maps/nettel.c
index 632eb2aa96..54a3102ab1 100644
--- a/drivers/mtd/maps/nettel.c
+++ b/drivers/mtd/maps/nettel.c
@@ -128,8 +128,7 @@ static struct mtd_partition nettel_amd_partitions[] = {
128 } 128 }
129}; 129};
130 130
131#define NUM_AMD_PARTITIONS \ 131#define NUM_AMD_PARTITIONS ARRAY_SIZE(nettel_amd_partitions)
132 (sizeof(nettel_amd_partitions)/sizeof(nettel_amd_partitions[0]))
133 132
134/****************************************************************************/ 133/****************************************************************************/
135 134
diff --git a/drivers/mtd/maps/ocotea.c b/drivers/mtd/maps/ocotea.c
index c223514ca2..a21fcd195a 100644
--- a/drivers/mtd/maps/ocotea.c
+++ b/drivers/mtd/maps/ocotea.c
@@ -58,8 +58,6 @@ static struct mtd_partition ocotea_large_partitions[] = {
58 } 58 }
59}; 59};
60 60
61#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
62
63int __init init_ocotea(void) 61int __init init_ocotea(void)
64{ 62{
65 u8 fpga0_reg; 63 u8 fpga0_reg;
@@ -97,7 +95,7 @@ int __init init_ocotea(void)
97 if (flash) { 95 if (flash) {
98 flash->owner = THIS_MODULE; 96 flash->owner = THIS_MODULE;
99 add_mtd_partitions(flash, ocotea_small_partitions, 97 add_mtd_partitions(flash, ocotea_small_partitions,
100 NB_OF(ocotea_small_partitions)); 98 ARRAY_SIZE(ocotea_small_partitions));
101 } else { 99 } else {
102 printk("map probe failed for flash\n"); 100 printk("map probe failed for flash\n");
103 return -ENXIO; 101 return -ENXIO;
@@ -118,7 +116,7 @@ int __init init_ocotea(void)
118 if (flash) { 116 if (flash) {
119 flash->owner = THIS_MODULE; 117 flash->owner = THIS_MODULE;
120 add_mtd_partitions(flash, ocotea_large_partitions, 118 add_mtd_partitions(flash, ocotea_large_partitions,
121 NB_OF(ocotea_large_partitions)); 119 ARRAY_SIZE(ocotea_large_partitions));
122 } else { 120 } else {
123 printk("map probe failed for flash\n"); 121 printk("map probe failed for flash\n");
124 return -ENXIO; 122 return -ENXIO;
diff --git a/drivers/mtd/maps/pci.c b/drivers/mtd/maps/pci.c
index 21822c2edb..d2ab1bae9c 100644
--- a/drivers/mtd/maps/pci.c
+++ b/drivers/mtd/maps/pci.c
@@ -334,9 +334,6 @@ mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
334 return 0; 334 return 0;
335 335
336release: 336release:
337 if (mtd)
338 map_destroy(mtd);
339
340 if (map) { 337 if (map) {
341 map->exit(dev, map); 338 map->exit(dev, map);
342 kfree(map); 339 kfree(map);
diff --git a/drivers/mtd/maps/pcmciamtd.c b/drivers/mtd/maps/pcmciamtd.c
index f988c817e1..8bbc751a60 100644
--- a/drivers/mtd/maps/pcmciamtd.c
+++ b/drivers/mtd/maps/pcmciamtd.c
@@ -616,7 +616,7 @@ static void pcmciamtd_config(dev_link_t *link)
616 } else if(mem_type == 2) { 616 } else if(mem_type == 2) {
617 mtd = do_map_probe("map_rom", &dev->pcmcia_map); 617 mtd = do_map_probe("map_rom", &dev->pcmcia_map);
618 } else { 618 } else {
619 for(i = 0; i < sizeof(probes) / sizeof(char *); i++) { 619 for(i = 0; i < ARRAY_SIZE(probes); i++) {
620 DEBUG(1, "Trying %s", probes[i]); 620 DEBUG(1, "Trying %s", probes[i]);
621 mtd = do_map_probe(probes[i], &dev->pcmcia_map); 621 mtd = do_map_probe(probes[i], &dev->pcmcia_map);
622 if(mtd) 622 if(mtd)
diff --git a/drivers/mtd/maps/redwood.c b/drivers/mtd/maps/redwood.c
index 5b76ed8861..50b1403361 100644
--- a/drivers/mtd/maps/redwood.c
+++ b/drivers/mtd/maps/redwood.c
@@ -121,8 +121,7 @@ struct map_info redwood_flash_map = {
121}; 121};
122 122
123 123
124#define NUM_REDWOOD_FLASH_PARTITIONS \ 124#define NUM_REDWOOD_FLASH_PARTITIONS ARRAY_SIZE(redwood_flash_partitions)
125 (sizeof(redwood_flash_partitions)/sizeof(redwood_flash_partitions[0]))
126 125
127static struct mtd_info *redwood_mtd; 126static struct mtd_info *redwood_mtd;
128 127
diff --git a/drivers/mtd/maps/sbc8240.c b/drivers/mtd/maps/sbc8240.c
index 225cdd9ba5..350286dc1d 100644
--- a/drivers/mtd/maps/sbc8240.c
+++ b/drivers/mtd/maps/sbc8240.c
@@ -66,7 +66,7 @@ static struct map_info sbc8240_map[2] = {
66 } 66 }
67}; 67};
68 68
69#define NUM_FLASH_BANKS (sizeof(sbc8240_map) / sizeof(struct map_info)) 69#define NUM_FLASH_BANKS ARRAY_SIZE(sbc8240_map)
70 70
71/* 71/*
72 * The following defines the partition layout of SBC8240 boards. 72 * The following defines the partition layout of SBC8240 boards.
@@ -125,8 +125,6 @@ static struct mtd_partition sbc8240_fs_partitions [] = {
125 } 125 }
126}; 126};
127 127
128#define NB_OF(x) (sizeof (x) / sizeof (x[0]))
129
130/* trivial struct to describe partition information */ 128/* trivial struct to describe partition information */
131struct mtd_part_def 129struct mtd_part_def
132{ 130{
@@ -190,10 +188,10 @@ int __init init_sbc8240_mtd (void)
190#ifdef CONFIG_MTD_PARTITIONS 188#ifdef CONFIG_MTD_PARTITIONS
191 sbc8240_part_banks[0].mtd_part = sbc8240_uboot_partitions; 189 sbc8240_part_banks[0].mtd_part = sbc8240_uboot_partitions;
192 sbc8240_part_banks[0].type = "static image"; 190 sbc8240_part_banks[0].type = "static image";
193 sbc8240_part_banks[0].nums = NB_OF(sbc8240_uboot_partitions); 191 sbc8240_part_banks[0].nums = ARRAY_SIZE(sbc8240_uboot_partitions);
194 sbc8240_part_banks[1].mtd_part = sbc8240_fs_partitions; 192 sbc8240_part_banks[1].mtd_part = sbc8240_fs_partitions;
195 sbc8240_part_banks[1].type = "static file system"; 193 sbc8240_part_banks[1].type = "static file system";
196 sbc8240_part_banks[1].nums = NB_OF(sbc8240_fs_partitions); 194 sbc8240_part_banks[1].nums = ARRAY_SIZE(sbc8240_fs_partitions);
197 195
198 for (i = 0; i < NUM_FLASH_BANKS; i++) { 196 for (i = 0; i < NUM_FLASH_BANKS; i++) {
199 197
diff --git a/drivers/mtd/maps/sc520cdp.c b/drivers/mtd/maps/sc520cdp.c
index ed92afadd8..e8c130e1ef 100644
--- a/drivers/mtd/maps/sc520cdp.c
+++ b/drivers/mtd/maps/sc520cdp.c
@@ -107,7 +107,7 @@ static struct map_info sc520cdp_map[] = {
107 }, 107 },
108}; 108};
109 109
110#define NUM_FLASH_BANKS (sizeof(sc520cdp_map)/sizeof(struct map_info)) 110#define NUM_FLASH_BANKS ARRAY_SIZE(sc520cdp_map)
111 111
112static struct mtd_info *mymtd[NUM_FLASH_BANKS]; 112static struct mtd_info *mymtd[NUM_FLASH_BANKS];
113static struct mtd_info *merged_mtd; 113static struct mtd_info *merged_mtd;
diff --git a/drivers/mtd/maps/scx200_docflash.c b/drivers/mtd/maps/scx200_docflash.c
index 2c91dff8bb..28b8a571a9 100644
--- a/drivers/mtd/maps/scx200_docflash.c
+++ b/drivers/mtd/maps/scx200_docflash.c
@@ -70,7 +70,7 @@ static struct mtd_partition partition_info[] = {
70 .size = 0x80000 70 .size = 0x80000
71 }, 71 },
72}; 72};
73#define NUM_PARTITIONS (sizeof(partition_info)/sizeof(partition_info[0])) 73#define NUM_PARTITIONS ARRAY_SIZE(partition_info)
74#endif 74#endif
75 75
76 76
diff --git a/drivers/mtd/maps/sharpsl-flash.c b/drivers/mtd/maps/sharpsl-flash.c
index 999f4bb3d8..12fe53c0d2 100644
--- a/drivers/mtd/maps/sharpsl-flash.c
+++ b/drivers/mtd/maps/sharpsl-flash.c
@@ -49,8 +49,6 @@ static struct mtd_partition sharpsl_partitions[1] = {
49 } 49 }
50}; 50};
51 51
52#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
53
54int __init init_sharpsl(void) 52int __init init_sharpsl(void)
55{ 53{
56 struct mtd_partition *parts; 54 struct mtd_partition *parts;
@@ -92,7 +90,7 @@ int __init init_sharpsl(void)
92 } 90 }
93 91
94 parts = sharpsl_partitions; 92 parts = sharpsl_partitions;
95 nb_parts = NB_OF(sharpsl_partitions); 93 nb_parts = ARRAY_SIZE(sharpsl_partitions);
96 94
97 printk(KERN_NOTICE "Using %s partision definition\n", part_type); 95 printk(KERN_NOTICE "Using %s partision definition\n", part_type);
98 add_mtd_partitions(mymtd, parts, nb_parts); 96 add_mtd_partitions(mymtd, parts, nb_parts);
diff --git a/drivers/mtd/maps/ts5500_flash.c b/drivers/mtd/maps/ts5500_flash.c
index 4b372bcb17..a7422c2005 100644
--- a/drivers/mtd/maps/ts5500_flash.c
+++ b/drivers/mtd/maps/ts5500_flash.c
@@ -64,7 +64,7 @@ static struct mtd_partition ts5500_partitions[] = {
64 } 64 }
65}; 65};
66 66
67#define NUM_PARTITIONS (sizeof(ts5500_partitions)/sizeof(struct mtd_partition)) 67#define NUM_PARTITIONS ARRAY_SIZE(ts5500_partitions)
68 68
69static struct mtd_info *mymtd; 69static struct mtd_info *mymtd;
70 70
diff --git a/drivers/mtd/maps/uclinux.c b/drivers/mtd/maps/uclinux.c
index 79d92808b7..f7264dc2ac 100644
--- a/drivers/mtd/maps/uclinux.c
+++ b/drivers/mtd/maps/uclinux.c
@@ -37,7 +37,7 @@ struct mtd_partition uclinux_romfs[] = {
37 { .name = "ROMfs" } 37 { .name = "ROMfs" }
38}; 38};
39 39
40#define NUM_PARTITIONS (sizeof(uclinux_romfs) / sizeof(uclinux_romfs[0])) 40#define NUM_PARTITIONS ARRAY_SIZE(uclinux_romfs)
41 41
42/****************************************************************************/ 42/****************************************************************************/
43 43
diff --git a/drivers/mtd/maps/vmax301.c b/drivers/mtd/maps/vmax301.c
index e0063941c0..b3e4873954 100644
--- a/drivers/mtd/maps/vmax301.c
+++ b/drivers/mtd/maps/vmax301.c
@@ -182,7 +182,7 @@ int __init init_vmax301(void)
182 } 182 }
183 } 183 }
184 184
185 if (!vmax_mtd[1] && !vmax_mtd[2]) { 185 if (!vmax_mtd[0] && !vmax_mtd[1]) {
186 iounmap((void *)iomapadr); 186 iounmap((void *)iomapadr);
187 return -ENXIO; 187 return -ENXIO;
188 } 188 }
diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c
index 840dd66ce2..458d3c8ae1 100644
--- a/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@ -19,12 +19,12 @@
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/hdreg.h> 20#include <linux/hdreg.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <asm/semaphore.h> 22#include <linux/mutex.h>
23#include <asm/uaccess.h> 23#include <asm/uaccess.h>
24 24
25static LIST_HEAD(blktrans_majors); 25static LIST_HEAD(blktrans_majors);
26 26
27extern struct semaphore mtd_table_mutex; 27extern struct mutex mtd_table_mutex;
28extern struct mtd_info *mtd_table[]; 28extern struct mtd_info *mtd_table[];
29 29
30struct mtd_blkcore_priv { 30struct mtd_blkcore_priv {
@@ -122,9 +122,9 @@ static int mtd_blktrans_thread(void *arg)
122 122
123 spin_unlock_irq(rq->queue_lock); 123 spin_unlock_irq(rq->queue_lock);
124 124
125 down(&dev->sem); 125 mutex_lock(&dev->lock);
126 res = do_blktrans_request(tr, dev, req); 126 res = do_blktrans_request(tr, dev, req);
127 up(&dev->sem); 127 mutex_unlock(&dev->lock);
128 128
129 spin_lock_irq(rq->queue_lock); 129 spin_lock_irq(rq->queue_lock);
130 130
@@ -235,8 +235,8 @@ int add_mtd_blktrans_dev(struct mtd_blktrans_dev *new)
235 int last_devnum = -1; 235 int last_devnum = -1;
236 struct gendisk *gd; 236 struct gendisk *gd;
237 237
238 if (!down_trylock(&mtd_table_mutex)) { 238 if (!!mutex_trylock(&mtd_table_mutex)) {
239 up(&mtd_table_mutex); 239 mutex_unlock(&mtd_table_mutex);
240 BUG(); 240 BUG();
241 } 241 }
242 242
@@ -267,7 +267,7 @@ int add_mtd_blktrans_dev(struct mtd_blktrans_dev *new)
267 return -EBUSY; 267 return -EBUSY;
268 } 268 }
269 269
270 init_MUTEX(&new->sem); 270 mutex_init(&new->lock);
271 list_add_tail(&new->list, &tr->devs); 271 list_add_tail(&new->list, &tr->devs);
272 added: 272 added:
273 if (!tr->writesect) 273 if (!tr->writesect)
@@ -313,8 +313,8 @@ int add_mtd_blktrans_dev(struct mtd_blktrans_dev *new)
313 313
314int del_mtd_blktrans_dev(struct mtd_blktrans_dev *old) 314int del_mtd_blktrans_dev(struct mtd_blktrans_dev *old)
315{ 315{
316 if (!down_trylock(&mtd_table_mutex)) { 316 if (!!mutex_trylock(&mtd_table_mutex)) {
317 up(&mtd_table_mutex); 317 mutex_unlock(&mtd_table_mutex);
318 BUG(); 318 BUG();
319 } 319 }
320 320
@@ -378,14 +378,14 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr)
378 378
379 memset(tr->blkcore_priv, 0, sizeof(*tr->blkcore_priv)); 379 memset(tr->blkcore_priv, 0, sizeof(*tr->blkcore_priv));
380 380
381 down(&mtd_table_mutex); 381 mutex_lock(&mtd_table_mutex);
382 382
383 ret = register_blkdev(tr->major, tr->name); 383 ret = register_blkdev(tr->major, tr->name);
384 if (ret) { 384 if (ret) {
385 printk(KERN_WARNING "Unable to register %s block device on major %d: %d\n", 385 printk(KERN_WARNING "Unable to register %s block device on major %d: %d\n",
386 tr->name, tr->major, ret); 386 tr->name, tr->major, ret);
387 kfree(tr->blkcore_priv); 387 kfree(tr->blkcore_priv);
388 up(&mtd_table_mutex); 388 mutex_unlock(&mtd_table_mutex);
389 return ret; 389 return ret;
390 } 390 }
391 spin_lock_init(&tr->blkcore_priv->queue_lock); 391 spin_lock_init(&tr->blkcore_priv->queue_lock);
@@ -396,7 +396,7 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr)
396 if (!tr->blkcore_priv->rq) { 396 if (!tr->blkcore_priv->rq) {
397 unregister_blkdev(tr->major, tr->name); 397 unregister_blkdev(tr->major, tr->name);
398 kfree(tr->blkcore_priv); 398 kfree(tr->blkcore_priv);
399 up(&mtd_table_mutex); 399 mutex_unlock(&mtd_table_mutex);
400 return -ENOMEM; 400 return -ENOMEM;
401 } 401 }
402 402
@@ -407,7 +407,7 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr)
407 blk_cleanup_queue(tr->blkcore_priv->rq); 407 blk_cleanup_queue(tr->blkcore_priv->rq);
408 unregister_blkdev(tr->major, tr->name); 408 unregister_blkdev(tr->major, tr->name);
409 kfree(tr->blkcore_priv); 409 kfree(tr->blkcore_priv);
410 up(&mtd_table_mutex); 410 mutex_unlock(&mtd_table_mutex);
411 return ret; 411 return ret;
412 } 412 }
413 413
@@ -419,7 +419,7 @@ int register_mtd_blktrans(struct mtd_blktrans_ops *tr)
419 tr->add_mtd(tr, mtd_table[i]); 419 tr->add_mtd(tr, mtd_table[i]);
420 } 420 }
421 421
422 up(&mtd_table_mutex); 422 mutex_unlock(&mtd_table_mutex);
423 423
424 return 0; 424 return 0;
425} 425}
@@ -428,7 +428,7 @@ int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr)
428{ 428{
429 struct list_head *this, *next; 429 struct list_head *this, *next;
430 430
431 down(&mtd_table_mutex); 431 mutex_lock(&mtd_table_mutex);
432 432
433 /* Clean up the kernel thread */ 433 /* Clean up the kernel thread */
434 tr->blkcore_priv->exiting = 1; 434 tr->blkcore_priv->exiting = 1;
@@ -446,7 +446,7 @@ int deregister_mtd_blktrans(struct mtd_blktrans_ops *tr)
446 blk_cleanup_queue(tr->blkcore_priv->rq); 446 blk_cleanup_queue(tr->blkcore_priv->rq);
447 unregister_blkdev(tr->major, tr->name); 447 unregister_blkdev(tr->major, tr->name);
448 448
449 up(&mtd_table_mutex); 449 mutex_unlock(&mtd_table_mutex);
450 450
451 kfree(tr->blkcore_priv); 451 kfree(tr->blkcore_priv);
452 452
diff --git a/drivers/mtd/mtdblock.c b/drivers/mtd/mtdblock.c
index e84756644f..2cef280e38 100644
--- a/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@ -19,11 +19,13 @@
19 19
20#include <linux/mtd/mtd.h> 20#include <linux/mtd/mtd.h>
21#include <linux/mtd/blktrans.h> 21#include <linux/mtd/blktrans.h>
22#include <linux/mutex.h>
23
22 24
23static struct mtdblk_dev { 25static struct mtdblk_dev {
24 struct mtd_info *mtd; 26 struct mtd_info *mtd;
25 int count; 27 int count;
26 struct semaphore cache_sem; 28 struct mutex cache_mutex;
27 unsigned char *cache_data; 29 unsigned char *cache_data;
28 unsigned long cache_offset; 30 unsigned long cache_offset;
29 unsigned int cache_size; 31 unsigned int cache_size;
@@ -284,7 +286,7 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
284 mtdblk->count = 1; 286 mtdblk->count = 1;
285 mtdblk->mtd = mtd; 287 mtdblk->mtd = mtd;
286 288
287 init_MUTEX (&mtdblk->cache_sem); 289 mutex_init(&mtdblk->cache_mutex);
288 mtdblk->cache_state = STATE_EMPTY; 290 mtdblk->cache_state = STATE_EMPTY;
289 if ((mtdblk->mtd->flags & MTD_CAP_RAM) != MTD_CAP_RAM && 291 if ((mtdblk->mtd->flags & MTD_CAP_RAM) != MTD_CAP_RAM &&
290 mtdblk->mtd->erasesize) { 292 mtdblk->mtd->erasesize) {
@@ -306,9 +308,9 @@ static int mtdblock_release(struct mtd_blktrans_dev *mbd)
306 308
307 DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n"); 309 DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n");
308 310
309 down(&mtdblk->cache_sem); 311 mutex_lock(&mtdblk->cache_mutex);
310 write_cached_data(mtdblk); 312 write_cached_data(mtdblk);
311 up(&mtdblk->cache_sem); 313 mutex_unlock(&mtdblk->cache_mutex);
312 314
313 if (!--mtdblk->count) { 315 if (!--mtdblk->count) {
314 /* It was the last usage. Free the device */ 316 /* It was the last usage. Free the device */
@@ -327,9 +329,9 @@ static int mtdblock_flush(struct mtd_blktrans_dev *dev)
327{ 329{
328 struct mtdblk_dev *mtdblk = mtdblks[dev->devnum]; 330 struct mtdblk_dev *mtdblk = mtdblks[dev->devnum];
329 331
330 down(&mtdblk->cache_sem); 332 mutex_lock(&mtdblk->cache_mutex);
331 write_cached_data(mtdblk); 333 write_cached_data(mtdblk);
332 up(&mtdblk->cache_sem); 334 mutex_unlock(&mtdblk->cache_mutex);
333 335
334 if (mtdblk->mtd->sync) 336 if (mtdblk->mtd->sync)
335 mtdblk->mtd->sync(mtdblk->mtd); 337 mtdblk->mtd->sync(mtdblk->mtd);
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index dade02ab06..9905870f56 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -19,15 +19,13 @@
19#include <linux/ioctl.h> 19#include <linux/ioctl.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/mtd/compatmac.h> 21#include <linux/mtd/compatmac.h>
22#ifdef CONFIG_PROC_FS
23#include <linux/proc_fs.h> 22#include <linux/proc_fs.h>
24#endif
25 23
26#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
27 25
28/* These are exported solely for the purpose of mtd_blkdevs.c. You 26/* These are exported solely for the purpose of mtd_blkdevs.c. You
29 should not use them for _anything_ else */ 27 should not use them for _anything_ else */
30DECLARE_MUTEX(mtd_table_mutex); 28DEFINE_MUTEX(mtd_table_mutex);
31struct mtd_info *mtd_table[MAX_MTD_DEVICES]; 29struct mtd_info *mtd_table[MAX_MTD_DEVICES];
32 30
33EXPORT_SYMBOL_GPL(mtd_table_mutex); 31EXPORT_SYMBOL_GPL(mtd_table_mutex);
@@ -49,7 +47,7 @@ int add_mtd_device(struct mtd_info *mtd)
49{ 47{
50 int i; 48 int i;
51 49
52 down(&mtd_table_mutex); 50 mutex_lock(&mtd_table_mutex);
53 51
54 for (i=0; i < MAX_MTD_DEVICES; i++) 52 for (i=0; i < MAX_MTD_DEVICES; i++)
55 if (!mtd_table[i]) { 53 if (!mtd_table[i]) {
@@ -67,7 +65,7 @@ int add_mtd_device(struct mtd_info *mtd)
67 not->add(mtd); 65 not->add(mtd);
68 } 66 }
69 67
70 up(&mtd_table_mutex); 68 mutex_unlock(&mtd_table_mutex);
71 /* We _know_ we aren't being removed, because 69 /* We _know_ we aren't being removed, because
72 our caller is still holding us here. So none 70 our caller is still holding us here. So none
73 of this try_ nonsense, and no bitching about it 71 of this try_ nonsense, and no bitching about it
@@ -76,7 +74,7 @@ int add_mtd_device(struct mtd_info *mtd)
76 return 0; 74 return 0;
77 } 75 }
78 76
79 up(&mtd_table_mutex); 77 mutex_unlock(&mtd_table_mutex);
80 return 1; 78 return 1;
81} 79}
82 80
@@ -94,7 +92,7 @@ int del_mtd_device (struct mtd_info *mtd)
94{ 92{
95 int ret; 93 int ret;
96 94
97 down(&mtd_table_mutex); 95 mutex_lock(&mtd_table_mutex);
98 96
99 if (mtd_table[mtd->index] != mtd) { 97 if (mtd_table[mtd->index] != mtd) {
100 ret = -ENODEV; 98 ret = -ENODEV;
@@ -118,7 +116,7 @@ int del_mtd_device (struct mtd_info *mtd)
118 ret = 0; 116 ret = 0;
119 } 117 }
120 118
121 up(&mtd_table_mutex); 119 mutex_unlock(&mtd_table_mutex);
122 return ret; 120 return ret;
123} 121}
124 122
@@ -135,7 +133,7 @@ void register_mtd_user (struct mtd_notifier *new)
135{ 133{
136 int i; 134 int i;
137 135
138 down(&mtd_table_mutex); 136 mutex_lock(&mtd_table_mutex);
139 137
140 list_add(&new->list, &mtd_notifiers); 138 list_add(&new->list, &mtd_notifiers);
141 139
@@ -145,7 +143,7 @@ void register_mtd_user (struct mtd_notifier *new)
145 if (mtd_table[i]) 143 if (mtd_table[i])
146 new->add(mtd_table[i]); 144 new->add(mtd_table[i]);
147 145
148 up(&mtd_table_mutex); 146 mutex_unlock(&mtd_table_mutex);
149} 147}
150 148
151/** 149/**
@@ -162,7 +160,7 @@ int unregister_mtd_user (struct mtd_notifier *old)
162{ 160{
163 int i; 161 int i;
164 162
165 down(&mtd_table_mutex); 163 mutex_lock(&mtd_table_mutex);
166 164
167 module_put(THIS_MODULE); 165 module_put(THIS_MODULE);
168 166
@@ -171,7 +169,7 @@ int unregister_mtd_user (struct mtd_notifier *old)
171 old->remove(mtd_table[i]); 169 old->remove(mtd_table[i]);
172 170
173 list_del(&old->list); 171 list_del(&old->list);
174 up(&mtd_table_mutex); 172 mutex_unlock(&mtd_table_mutex);
175 return 0; 173 return 0;
176} 174}
177 175
@@ -193,7 +191,7 @@ struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num)
193 struct mtd_info *ret = NULL; 191 struct mtd_info *ret = NULL;
194 int i; 192 int i;
195 193
196 down(&mtd_table_mutex); 194 mutex_lock(&mtd_table_mutex);
197 195
198 if (num == -1) { 196 if (num == -1) {
199 for (i=0; i< MAX_MTD_DEVICES; i++) 197 for (i=0; i< MAX_MTD_DEVICES; i++)
@@ -211,7 +209,7 @@ struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num)
211 if (ret) 209 if (ret)
212 ret->usecount++; 210 ret->usecount++;
213 211
214 up(&mtd_table_mutex); 212 mutex_unlock(&mtd_table_mutex);
215 return ret; 213 return ret;
216} 214}
217 215
@@ -219,9 +217,9 @@ void put_mtd_device(struct mtd_info *mtd)
219{ 217{
220 int c; 218 int c;
221 219
222 down(&mtd_table_mutex); 220 mutex_lock(&mtd_table_mutex);
223 c = --mtd->usecount; 221 c = --mtd->usecount;
224 up(&mtd_table_mutex); 222 mutex_unlock(&mtd_table_mutex);
225 BUG_ON(c < 0); 223 BUG_ON(c < 0);
226 224
227 module_put(mtd->owner); 225 module_put(mtd->owner);
@@ -296,10 +294,11 @@ EXPORT_SYMBOL(unregister_mtd_user);
296EXPORT_SYMBOL(default_mtd_writev); 294EXPORT_SYMBOL(default_mtd_writev);
297EXPORT_SYMBOL(default_mtd_readv); 295EXPORT_SYMBOL(default_mtd_readv);
298 296
297#ifdef CONFIG_PROC_FS
298
299/*====================================================================*/ 299/*====================================================================*/
300/* Support for /proc/mtd */ 300/* Support for /proc/mtd */
301 301
302#ifdef CONFIG_PROC_FS
303static struct proc_dir_entry *proc_mtd; 302static struct proc_dir_entry *proc_mtd;
304 303
305static inline int mtd_proc_info (char *buf, int i) 304static inline int mtd_proc_info (char *buf, int i)
@@ -319,7 +318,7 @@ static int mtd_read_proc (char *page, char **start, off_t off, int count,
319 int len, l, i; 318 int len, l, i;
320 off_t begin = 0; 319 off_t begin = 0;
321 320
322 down(&mtd_table_mutex); 321 mutex_lock(&mtd_table_mutex);
323 322
324 len = sprintf(page, "dev: size erasesize name\n"); 323 len = sprintf(page, "dev: size erasesize name\n");
325 for (i=0; i< MAX_MTD_DEVICES; i++) { 324 for (i=0; i< MAX_MTD_DEVICES; i++) {
@@ -337,38 +336,34 @@ static int mtd_read_proc (char *page, char **start, off_t off, int count,
337 *eof = 1; 336 *eof = 1;
338 337
339done: 338done:
340 up(&mtd_table_mutex); 339 mutex_unlock(&mtd_table_mutex);
341 if (off >= len+begin) 340 if (off >= len+begin)
342 return 0; 341 return 0;
343 *start = page + (off-begin); 342 *start = page + (off-begin);
344 return ((count < begin+len-off) ? count : begin+len-off); 343 return ((count < begin+len-off) ? count : begin+len-off);
345} 344}
346 345
347#endif /* CONFIG_PROC_FS */
348
349/*====================================================================*/ 346/*====================================================================*/
350/* Init code */ 347/* Init code */
351 348
352static int __init init_mtd(void) 349static int __init init_mtd(void)
353{ 350{
354#ifdef CONFIG_PROC_FS
355 if ((proc_mtd = create_proc_entry( "mtd", 0, NULL ))) 351 if ((proc_mtd = create_proc_entry( "mtd", 0, NULL )))
356 proc_mtd->read_proc = mtd_read_proc; 352 proc_mtd->read_proc = mtd_read_proc;
357#endif
358 return 0; 353 return 0;
359} 354}
360 355
361static void __exit cleanup_mtd(void) 356static void __exit cleanup_mtd(void)
362{ 357{
363#ifdef CONFIG_PROC_FS
364 if (proc_mtd) 358 if (proc_mtd)
365 remove_proc_entry( "mtd", NULL); 359 remove_proc_entry( "mtd", NULL);
366#endif
367} 360}
368 361
369module_init(init_mtd); 362module_init(init_mtd);
370module_exit(cleanup_mtd); 363module_exit(cleanup_mtd);
371 364
365#endif /* CONFIG_PROC_FS */
366
372 367
373MODULE_LICENSE("GPL"); 368MODULE_LICENSE("GPL");
374MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); 369MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1fc4c134d9..cfe288a6e8 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -178,17 +178,16 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
178 Even if you leave this disabled, you can enable BBT writes at module 178 Even if you leave this disabled, you can enable BBT writes at module
179 load time (assuming you build diskonchip as a module) with the module 179 load time (assuming you build diskonchip as a module) with the module
180 parameter "inftl_bbt_write=1". 180 parameter "inftl_bbt_write=1".
181
182 config MTD_NAND_SHARPSL
183 bool "Support for NAND Flash on Sharp SL Series (C7xx + others)"
184 depends on MTD_NAND && ARCH_PXA
185
186 config MTD_NAND_NANDSIM
187 bool "Support for NAND Flash Simulator"
188 depends on MTD_NAND && MTD_PARTITIONS
189 181
182config MTD_NAND_SHARPSL
183 tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
184 depends on MTD_NAND && ARCH_PXA
185
186config MTD_NAND_NANDSIM
187 tristate "Support for NAND Flash Simulator"
188 depends on MTD_NAND && MTD_PARTITIONS
190 help 189 help
191 The simulator may simulate verious NAND flash chips for the 190 The simulator may simulate verious NAND flash chips for the
192 MTD nand layer. 191 MTD nand layer.
193 192
194endmenu 193endmenu
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index 201e1362da..bde3550910 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -55,8 +55,6 @@ static const struct mtd_partition partition_info[] = {
55 .size = MTDPART_SIZ_FULL 55 .size = MTDPART_SIZ_FULL
56 } 56 }
57}; 57};
58#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
59
60 58
61/** 59/**
62 * au_read_byte - read one byte from the chip 60 * au_read_byte - read one byte from the chip
@@ -462,7 +460,7 @@ int __init au1xxx_nand_init (void)
462 } 460 }
463 461
464 /* Register the partitions */ 462 /* Register the partitions */
465 add_mtd_partitions(au1550_mtd, partition_info, NB_OF(partition_info)); 463 add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info));
466 464
467 return 0; 465 return 0;
468 466
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5d222460b4..95e96fa1fc 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -80,6 +80,7 @@
80#include <linux/mtd/compatmac.h> 80#include <linux/mtd/compatmac.h>
81#include <linux/interrupt.h> 81#include <linux/interrupt.h>
82#include <linux/bitops.h> 82#include <linux/bitops.h>
83#include <linux/leds.h>
83#include <asm/io.h> 84#include <asm/io.h>
84 85
85#ifdef CONFIG_MTD_PARTITIONS 86#ifdef CONFIG_MTD_PARTITIONS
@@ -515,6 +516,8 @@ static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, i
515 return nand_isbad_bbt (mtd, ofs, allowbbt); 516 return nand_isbad_bbt (mtd, ofs, allowbbt);
516} 517}
517 518
519DEFINE_LED_TRIGGER(nand_led_trigger);
520
518/* 521/*
519 * Wait for the ready pin, after a command 522 * Wait for the ready pin, after a command
520 * The timeout is catched later. 523 * The timeout is catched later.
@@ -524,12 +527,14 @@ static void nand_wait_ready(struct mtd_info *mtd)
524 struct nand_chip *this = mtd->priv; 527 struct nand_chip *this = mtd->priv;
525 unsigned long timeo = jiffies + 2; 528 unsigned long timeo = jiffies + 2;
526 529
530 led_trigger_event(nand_led_trigger, LED_FULL);
527 /* wait until command is processed or timeout occures */ 531 /* wait until command is processed or timeout occures */
528 do { 532 do {
529 if (this->dev_ready(mtd)) 533 if (this->dev_ready(mtd))
530 return; 534 break;
531 touch_softlockup_watchdog(); 535 touch_softlockup_watchdog();
532 } while (time_before(jiffies, timeo)); 536 } while (time_before(jiffies, timeo));
537 led_trigger_event(nand_led_trigger, LED_OFF);
533} 538}
534 539
535/** 540/**
@@ -817,6 +822,8 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
817 else 822 else
818 timeo += (HZ * 20) / 1000; 823 timeo += (HZ * 20) / 1000;
819 824
825 led_trigger_event(nand_led_trigger, LED_FULL);
826
820 /* Apply this short delay always to ensure that we do wait tWB in 827 /* Apply this short delay always to ensure that we do wait tWB in
821 * any case on any machine. */ 828 * any case on any machine. */
822 ndelay (100); 829 ndelay (100);
@@ -840,6 +847,8 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
840 } 847 }
841 cond_resched(); 848 cond_resched();
842 } 849 }
850 led_trigger_event(nand_led_trigger, LED_OFF);
851
843 status = (int) this->read_byte(mtd); 852 status = (int) this->read_byte(mtd);
844 return status; 853 return status;
845} 854}
@@ -2724,6 +2733,21 @@ void nand_release (struct mtd_info *mtd)
2724EXPORT_SYMBOL_GPL (nand_scan); 2733EXPORT_SYMBOL_GPL (nand_scan);
2725EXPORT_SYMBOL_GPL (nand_release); 2734EXPORT_SYMBOL_GPL (nand_release);
2726 2735
2736
2737static int __init nand_base_init(void)
2738{
2739 led_trigger_register_simple("nand-disk", &nand_led_trigger);
2740 return 0;
2741}
2742
2743static void __exit nand_base_exit(void)
2744{
2745 led_trigger_unregister_simple(nand_led_trigger);
2746}
2747
2748module_init(nand_base_init);
2749module_exit(nand_base_exit);
2750
2727MODULE_LICENSE ("GPL"); 2751MODULE_LICENSE ("GPL");
2728MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); 2752MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2729MODULE_DESCRIPTION ("Generic NAND flash driver code"); 2753MODULE_DESCRIPTION ("Generic NAND flash driver code");
diff --git a/drivers/mtd/redboot.c b/drivers/mtd/redboot.c
index 8815c8dbef..c077d2ec9c 100644
--- a/drivers/mtd/redboot.c
+++ b/drivers/mtd/redboot.c
@@ -85,10 +85,6 @@ static int parse_redboot_partitions(struct mtd_info *master,
85 85
86 numslots = (master->erasesize / sizeof(struct fis_image_desc)); 86 numslots = (master->erasesize / sizeof(struct fis_image_desc));
87 for (i = 0; i < numslots; i++) { 87 for (i = 0; i < numslots; i++) {
88 if (buf[i].name[0] == 0xff) {
89 i = numslots;
90 break;
91 }
92 if (!memcmp(buf[i].name, "FIS directory", 14)) { 88 if (!memcmp(buf[i].name, "FIS directory", 14)) {
93 /* This is apparently the FIS directory entry for the 89 /* This is apparently the FIS directory entry for the
94 * FIS directory itself. The FIS directory size is 90 * FIS directory itself. The FIS directory size is
@@ -128,7 +124,7 @@ static int parse_redboot_partitions(struct mtd_info *master,
128 struct fis_list *new_fl, **prev; 124 struct fis_list *new_fl, **prev;
129 125
130 if (buf[i].name[0] == 0xff) 126 if (buf[i].name[0] == 0xff)
131 break; 127 continue;
132 if (!redboot_checksum(&buf[i])) 128 if (!redboot_checksum(&buf[i]))
133 break; 129 break;
134 130
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 70f63891b1..274b0138d4 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -788,7 +788,7 @@ struct vortex_private {
788 int options; /* User-settable misc. driver options. */ 788 int options; /* User-settable misc. driver options. */
789 unsigned int media_override:4, /* Passed-in media type. */ 789 unsigned int media_override:4, /* Passed-in media type. */
790 default_media:4, /* Read from the EEPROM/Wn3_Config. */ 790 default_media:4, /* Read from the EEPROM/Wn3_Config. */
791 full_duplex:1, force_fd:1, autoselect:1, 791 full_duplex:1, autoselect:1,
792 bus_master:1, /* Vortex can only do a fragment bus-m. */ 792 bus_master:1, /* Vortex can only do a fragment bus-m. */
793 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */ 793 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
794 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */ 794 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
@@ -1633,12 +1633,6 @@ vortex_set_duplex(struct net_device *dev)
1633 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 1633 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ?
1634 0x100 : 0), 1634 0x100 : 0),
1635 ioaddr + Wn3_MAC_Ctrl); 1635 ioaddr + Wn3_MAC_Ctrl);
1636
1637 issue_and_wait(dev, TxReset);
1638 /*
1639 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1640 */
1641 issue_and_wait(dev, RxReset|0x04);
1642} 1636}
1643 1637
1644static void vortex_check_media(struct net_device *dev, unsigned int init) 1638static void vortex_check_media(struct net_device *dev, unsigned int init)
@@ -1663,7 +1657,7 @@ vortex_up(struct net_device *dev)
1663 struct vortex_private *vp = netdev_priv(dev); 1657 struct vortex_private *vp = netdev_priv(dev);
1664 void __iomem *ioaddr = vp->ioaddr; 1658 void __iomem *ioaddr = vp->ioaddr;
1665 unsigned int config; 1659 unsigned int config;
1666 int i; 1660 int i, mii_reg1, mii_reg5;
1667 1661
1668 if (VORTEX_PCI(vp)) { 1662 if (VORTEX_PCI(vp)) {
1669 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */ 1663 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
@@ -1723,14 +1717,23 @@ vortex_up(struct net_device *dev)
1723 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config); 1717 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1724 iowrite32(config, ioaddr + Wn3_Config); 1718 iowrite32(config, ioaddr + Wn3_Config);
1725 1719
1726 netif_carrier_off(dev);
1727 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) { 1720 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1728 EL3WINDOW(4); 1721 EL3WINDOW(4);
1722 mii_reg1 = mdio_read(dev, vp->phys[0], MII_BMSR);
1723 mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA);
1724 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1725
1729 vortex_check_media(dev, 1); 1726 vortex_check_media(dev, 1);
1730 } 1727 }
1731 else 1728 else
1732 vortex_set_duplex(dev); 1729 vortex_set_duplex(dev);
1733 1730
1731 issue_and_wait(dev, TxReset);
1732 /*
1733 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1734 */
1735 issue_and_wait(dev, RxReset|0x04);
1736
1734 1737
1735 iowrite16(SetStatusEnb | 0x00, ioaddr + EL3_CMD); 1738 iowrite16(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1736 1739
@@ -2083,16 +2086,14 @@ vortex_error(struct net_device *dev, int status)
2083 } 2086 }
2084 if (tx_status & 0x14) vp->stats.tx_fifo_errors++; 2087 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2085 if (tx_status & 0x38) vp->stats.tx_aborted_errors++; 2088 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2089 if (tx_status & 0x08) vp->xstats.tx_max_collisions++;
2086 iowrite8(0, ioaddr + TxStatus); 2090 iowrite8(0, ioaddr + TxStatus);
2087 if (tx_status & 0x30) { /* txJabber or txUnderrun */ 2091 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2088 do_tx_reset = 1; 2092 do_tx_reset = 1;
2089 } else if (tx_status & 0x08) { /* maxCollisions */ 2093 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2090 vp->xstats.tx_max_collisions++; 2094 do_tx_reset = 1;
2091 if (vp->drv_flags & MAX_COLLISION_RESET) { 2095 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2092 do_tx_reset = 1; 2096 } else { /* Merely re-enable the transmitter. */
2093 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2094 }
2095 } else { /* Merely re-enable the transmitter. */
2096 iowrite16(TxEnable, ioaddr + EL3_CMD); 2097 iowrite16(TxEnable, ioaddr + EL3_CMD);
2097 } 2098 }
2098 } 2099 }
diff --git a/drivers/net/8390.h b/drivers/net/8390.h
index 599b68d8c4..51e39dcd06 100644
--- a/drivers/net/8390.h
+++ b/drivers/net/8390.h
@@ -134,7 +134,7 @@ struct ei_device {
134#define inb_p(_p) inb(_p) 134#define inb_p(_p) inb(_p)
135#define outb_p(_v,_p) outb(_v,_p) 135#define outb_p(_v,_p) outb(_v,_p)
136 136
137#elif defined(CONFIG_NET_CBUS) || defined(CONFIG_NE_H8300) || defined(CONFIG_NE_H8300_MODULE) 137#elif defined(CONFIG_NE_H8300) || defined(CONFIG_NE_H8300_MODULE)
138#define EI_SHIFT(x) (ei_local->reg_offset[x]) 138#define EI_SHIFT(x) (ei_local->reg_offset[x])
139#else 139#else
140#define EI_SHIFT(x) (x) 140#define EI_SHIFT(x) (x)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index e20b849a22..bdaaad8f21 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2313,13 +2313,11 @@ config S2IO_NAPI
2313 2313
2314endmenu 2314endmenu
2315 2315
2316if !UML
2317source "drivers/net/tokenring/Kconfig" 2316source "drivers/net/tokenring/Kconfig"
2318 2317
2319source "drivers/net/wireless/Kconfig" 2318source "drivers/net/wireless/Kconfig"
2320 2319
2321source "drivers/net/pcmcia/Kconfig" 2320source "drivers/net/pcmcia/Kconfig"
2322endif
2323 2321
2324source "drivers/net/wan/Kconfig" 2322source "drivers/net/wan/Kconfig"
2325 2323
diff --git a/drivers/net/acenic_firmware.h b/drivers/net/acenic_firmware.h
index 6d625d5956..d7882dd783 100644
--- a/drivers/net/acenic_firmware.h
+++ b/drivers/net/acenic_firmware.h
@@ -4397,7 +4397,7 @@ static u32 tigonFwText[(MAX_TEXT_LEN/4) + 1] __devinitdata = {
43970x3c010001, 0x220821, 0xac317e30, 0x8fbf0024, 43970x3c010001, 0x220821, 0xac317e30, 0x8fbf0024,
43980x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 43980x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014,
43990x8fb00010, 0x3e00008, 0x27bd0028, 0x0 }; 43990x8fb00010, 0x3e00008, 0x27bd0028, 0x0 };
4400static u32 tigonFwRodata[(MAX_RODATA_LEN/4) + 1] __initdata = { 4400static u32 tigonFwRodata[(MAX_RODATA_LEN/4) + 1] __devinitdata = {
44010x24486561, 0x6465723a, 0x202f7072, 44010x24486561, 0x6465723a, 0x202f7072,
44020x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765, 44020x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765,
44030x2f2e2f6e, 0x69632f66, 0x772f636f, 0x6d6d6f6e, 44030x2f2e2f6e, 0x69632f66, 0x772f636f, 0x6d6d6f6e,
@@ -4571,7 +4571,7 @@ static u32 tigonFwRodata[(MAX_RODATA_LEN/4) + 1] __initdata = {
45710x0, 0x14c38, 0x14c38, 0x14b80, 45710x0, 0x14c38, 0x14c38, 0x14b80,
45720x14bc4, 0x14c38, 0x14c38, 0x0, 45720x14bc4, 0x14c38, 0x14c38, 0x0,
45730x0, 0x0 }; 45730x0, 0x0 };
4574static u32 tigonFwData[(MAX_DATA_LEN/4) + 1] __initdata = { 4574static u32 tigonFwData[(MAX_DATA_LEN/4) + 1] __devinitdata = {
45750x416c7465, 45750x416c7465,
45760x6f6e2041, 0x63654e49, 0x43205600, 0x416c7465, 45760x6f6e2041, 0x63654e49, 0x43205600, 0x416c7465,
45770x6f6e2041, 0x63654e49, 0x43205600, 0x42424242, 45770x6f6e2041, 0x63654e49, 0x43205600, 0x42424242,
@@ -4612,7 +4612,7 @@ static u32 tigonFwData[(MAX_DATA_LEN/4) + 1] __initdata = {
4612#define tigon2FwSbssLen 0xcc 4612#define tigon2FwSbssLen 0xcc
4613#define tigon2FwBssAddr 0x00016f50 4613#define tigon2FwBssAddr 0x00016f50
4614#define tigon2FwBssLen 0x20c0 4614#define tigon2FwBssLen 0x20c0
4615static u32 tigon2FwText[(MAX_TEXT_LEN/4) + 1] __initdata = { 4615static u32 tigon2FwText[(MAX_TEXT_LEN/4) + 1] __devinitdata = {
46160x0, 46160x0,
46170x10000003, 0x0, 0xd, 0xd, 46170x10000003, 0x0, 0xd, 0xd,
46180x3c1d0001, 0x8fbd6d20, 0x3a0f021, 0x3c100000, 46180x3c1d0001, 0x8fbd6d20, 0x3a0f021, 0x3c100000,
@@ -9154,7 +9154,7 @@ static u32 tigon2FwText[(MAX_TEXT_LEN/4) + 1] __initdata = {
91540x24020001, 0x8f430328, 0x1021, 0x24630001, 91540x24020001, 0x8f430328, 0x1021, 0x24630001,
91550x3e00008, 0xaf430328, 0x3e00008, 0x0, 91550x3e00008, 0xaf430328, 0x3e00008, 0x0,
91560x0, 0x0, 0x0, 0x0 }; 91560x0, 0x0, 0x0, 0x0 };
9157static u32 tigon2FwRodata[(MAX_RODATA_LEN/4) + 1] __initdata = { 9157static u32 tigon2FwRodata[(MAX_RODATA_LEN/4) + 1] __devinitdata = {
91580x24486561, 0x6465723a, 0x202f7072, 91580x24486561, 0x6465723a, 0x202f7072,
91590x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765, 91590x6f6a6563, 0x74732f72, 0x63732f73, 0x772f6765,
91600x2f2e2f6e, 0x69632f66, 0x77322f63, 0x6f6d6d6f, 91600x2f2e2f6e, 0x69632f66, 0x77322f63, 0x6f6d6d6f,
@@ -9425,7 +9425,7 @@ static u32 tigon2FwRodata[(MAX_RODATA_LEN/4) + 1] __initdata = {
94250x14ed8, 0x14b8c, 0x14bd8, 0x14c24, 94250x14ed8, 0x14b8c, 0x14bd8, 0x14c24,
94260x14ed8, 0x7365746d, 0x61636163, 0x74000000, 94260x14ed8, 0x7365746d, 0x61636163, 0x74000000,
94270x0, 0x0 }; 94270x0, 0x0 };
9428static u32 tigon2FwData[(MAX_DATA_LEN/4) + 1] __initdata = { 9428static u32 tigon2FwData[(MAX_DATA_LEN/4) + 1] __devinitdata = {
94290x1, 94290x1,
94300x1, 0x1, 0xc001fc, 0x3ffc, 94300x1, 0x1, 0xc001fc, 0x3ffc,
94310xc00000, 0x416c7465, 0x6f6e2041, 0x63654e49, 94310xc00000, 0x416c7465, 0x6f6e2041, 0x63654e49,
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index c3267e4e1b..15032f2c78 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -1339,6 +1339,9 @@ static int b44_set_mac_addr(struct net_device *dev, void *p)
1339 if (netif_running(dev)) 1339 if (netif_running(dev))
1340 return -EBUSY; 1340 return -EBUSY;
1341 1341
1342 if (!is_valid_ether_addr(addr->sa_data))
1343 return -EINVAL;
1344
1342 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1345 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1343 1346
1344 spin_lock_irq(&bp->lock); 1347 spin_lock_irq(&bp->lock);
@@ -1876,6 +1879,12 @@ static int __devinit b44_get_invariants(struct b44 *bp)
1876 bp->dev->dev_addr[3] = eeprom[80]; 1879 bp->dev->dev_addr[3] = eeprom[80];
1877 bp->dev->dev_addr[4] = eeprom[83]; 1880 bp->dev->dev_addr[4] = eeprom[83];
1878 bp->dev->dev_addr[5] = eeprom[82]; 1881 bp->dev->dev_addr[5] = eeprom[82];
1882
1883 if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
1884 printk(KERN_ERR PFX "Invalid MAC address found in EEPROM\n");
1885 return -EINVAL;
1886 }
1887
1879 memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len); 1888 memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
1880 1889
1881 bp->phy_addr = eeprom[90] & 0x1f; 1890 bp->phy_addr = eeprom[90] & 0x1f;
@@ -2033,6 +2042,11 @@ static int __devinit b44_init_one(struct pci_dev *pdev,
2033 2042
2034 pci_save_state(bp->pdev); 2043 pci_save_state(bp->pdev);
2035 2044
2045 /* Chip reset provides power to the b44 MAC & PCI cores, which
2046 * is necessary for MAC register access.
2047 */
2048 b44_chip_reset(bp);
2049
2036 printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name); 2050 printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
2037 for (i = 0; i < 6; i++) 2051 for (i = 0; i < 6; i++)
2038 printk("%2.2x%c", dev->dev_addr[i], 2052 printk("%2.2x%c", dev->dev_addr[i],
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index f3f5825469..6a407070c2 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -2294,6 +2294,34 @@ void bond_3ad_handle_link_change(struct slave *slave, char link)
2294 port->sm_vars |= AD_PORT_BEGIN; 2294 port->sm_vars |= AD_PORT_BEGIN;
2295} 2295}
2296 2296
2297/*
2298 * set link state for bonding master: if we have an active partnered
2299 * aggregator, we're up, if not, we're down. Presumes that we cannot
2300 * have an active aggregator if there are no slaves with link up.
2301 *
2302 * Called by bond_set_carrier(). Return zero if carrier state does not
2303 * change, nonzero if it does.
2304 */
2305int bond_3ad_set_carrier(struct bonding *bond)
2306{
2307 struct aggregator *agg;
2308
2309 agg = __get_active_agg(&(SLAVE_AD_INFO(bond->first_slave).aggregator));
2310 if (agg && MAC_ADDRESS_COMPARE(&agg->partner_system, &null_mac_addr)) {
2311 if (!netif_carrier_ok(bond->dev)) {
2312 netif_carrier_on(bond->dev);
2313 return 1;
2314 }
2315 return 0;
2316 }
2317
2318 if (netif_carrier_ok(bond->dev)) {
2319 netif_carrier_off(bond->dev);
2320 return 1;
2321 }
2322 return 0;
2323}
2324
2297/** 2325/**
2298 * bond_3ad_get_active_agg_info - get information of the active aggregator 2326 * bond_3ad_get_active_agg_info - get information of the active aggregator
2299 * @bond: bonding struct to work on 2327 * @bond: bonding struct to work on
diff --git a/drivers/net/bonding/bond_3ad.h b/drivers/net/bonding/bond_3ad.h
index 5ee2cef5b0..6ad5ad6e65 100644
--- a/drivers/net/bonding/bond_3ad.h
+++ b/drivers/net/bonding/bond_3ad.h
@@ -283,5 +283,6 @@ void bond_3ad_handle_link_change(struct slave *slave, char link);
283int bond_3ad_get_active_agg_info(struct bonding *bond, struct ad_info *ad_info); 283int bond_3ad_get_active_agg_info(struct bonding *bond, struct ad_info *ad_info);
284int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev); 284int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev);
285int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct net_device *dev, struct packet_type* ptype, struct net_device *orig_dev); 285int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct net_device *dev, struct packet_type* ptype, struct net_device *orig_dev);
286int bond_3ad_set_carrier(struct bonding *bond);
286#endif //__BOND_3AD_H__ 287#endif //__BOND_3AD_H__
287 288
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index f13a539dc1..55d236726d 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -559,6 +559,42 @@ out:
559/*------------------------------- Link status -------------------------------*/ 559/*------------------------------- Link status -------------------------------*/
560 560
561/* 561/*
562 * Set the carrier state for the master according to the state of its
563 * slaves. If any slaves are up, the master is up. In 802.3ad mode,
564 * do special 802.3ad magic.
565 *
566 * Returns zero if carrier state does not change, nonzero if it does.
567 */
568static int bond_set_carrier(struct bonding *bond)
569{
570 struct slave *slave;
571 int i;
572
573 if (bond->slave_cnt == 0)
574 goto down;
575
576 if (bond->params.mode == BOND_MODE_8023AD)
577 return bond_3ad_set_carrier(bond);
578
579 bond_for_each_slave(bond, slave, i) {
580 if (slave->link == BOND_LINK_UP) {
581 if (!netif_carrier_ok(bond->dev)) {
582 netif_carrier_on(bond->dev);
583 return 1;
584 }
585 return 0;
586 }
587 }
588
589down:
590 if (netif_carrier_ok(bond->dev)) {
591 netif_carrier_off(bond->dev);
592 return 1;
593 }
594 return 0;
595}
596
597/*
562 * Get link speed and duplex from the slave's base driver 598 * Get link speed and duplex from the slave's base driver
563 * using ethtool. If for some reason the call fails or the 599 * using ethtool. If for some reason the call fails or the
564 * values are invalid, fake speed and duplex to 100/Full 600 * values are invalid, fake speed and duplex to 100/Full
@@ -1074,10 +1110,24 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
1074void bond_select_active_slave(struct bonding *bond) 1110void bond_select_active_slave(struct bonding *bond)
1075{ 1111{
1076 struct slave *best_slave; 1112 struct slave *best_slave;
1113 int rv;
1077 1114
1078 best_slave = bond_find_best_slave(bond); 1115 best_slave = bond_find_best_slave(bond);
1079 if (best_slave != bond->curr_active_slave) { 1116 if (best_slave != bond->curr_active_slave) {
1080 bond_change_active_slave(bond, best_slave); 1117 bond_change_active_slave(bond, best_slave);
1118 rv = bond_set_carrier(bond);
1119 if (!rv)
1120 return;
1121
1122 if (netif_carrier_ok(bond->dev)) {
1123 printk(KERN_INFO DRV_NAME
1124 ": %s: first active interface up!\n",
1125 bond->dev->name);
1126 } else {
1127 printk(KERN_INFO DRV_NAME ": %s: "
1128 "now running without any active interface !\n",
1129 bond->dev->name);
1130 }
1081 } 1131 }
1082} 1132}
1083 1133
@@ -1458,10 +1508,14 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1458 if (((!bond->curr_active_slave) || 1508 if (((!bond->curr_active_slave) ||
1459 (bond->curr_active_slave->dev->priv_flags & IFF_SLAVE_INACTIVE)) && 1509 (bond->curr_active_slave->dev->priv_flags & IFF_SLAVE_INACTIVE)) &&
1460 (new_slave->link != BOND_LINK_DOWN)) { 1510 (new_slave->link != BOND_LINK_DOWN)) {
1461 dprintk("This is the first active slave\n");
1462 /* first slave or no active slave yet, and this link 1511 /* first slave or no active slave yet, and this link
1463 is OK, so make this interface the active one */ 1512 is OK, so make this interface the active one */
1464 bond_change_active_slave(bond, new_slave); 1513 bond_change_active_slave(bond, new_slave);
1514 printk(KERN_INFO DRV_NAME
1515 ": %s: first active interface up!\n",
1516 bond->dev->name);
1517 netif_carrier_on(bond->dev);
1518
1465 } else { 1519 } else {
1466 dprintk("This is just a backup slave\n"); 1520 dprintk("This is just a backup slave\n");
1467 bond_set_slave_inactive_flags(new_slave); 1521 bond_set_slave_inactive_flags(new_slave);
@@ -1517,6 +1571,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1517 break; 1571 break;
1518 } /* switch(bond_mode) */ 1572 } /* switch(bond_mode) */
1519 1573
1574 bond_set_carrier(bond);
1575
1520 write_unlock_bh(&bond->lock); 1576 write_unlock_bh(&bond->lock);
1521 1577
1522 res = bond_create_slave_symlinks(bond_dev, slave_dev); 1578 res = bond_create_slave_symlinks(bond_dev, slave_dev);
@@ -1656,18 +1712,12 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1656 bond_alb_deinit_slave(bond, slave); 1712 bond_alb_deinit_slave(bond, slave);
1657 } 1713 }
1658 1714
1659 if (oldcurrent == slave) { 1715 if (oldcurrent == slave)
1660 bond_select_active_slave(bond); 1716 bond_select_active_slave(bond);
1661 1717
1662 if (!bond->curr_active_slave) {
1663 printk(KERN_INFO DRV_NAME
1664 ": %s: now running without any active "
1665 "interface !\n",
1666 bond_dev->name);
1667 }
1668 }
1669
1670 if (bond->slave_cnt == 0) { 1718 if (bond->slave_cnt == 0) {
1719 bond_set_carrier(bond);
1720
1671 /* if the last slave was removed, zero the mac address 1721 /* if the last slave was removed, zero the mac address
1672 * of the master so it will be set by the application 1722 * of the master so it will be set by the application
1673 * to the mac address of the first slave 1723 * to the mac address of the first slave
@@ -1751,6 +1801,8 @@ static int bond_release_all(struct net_device *bond_dev)
1751 1801
1752 write_lock_bh(&bond->lock); 1802 write_lock_bh(&bond->lock);
1753 1803
1804 netif_carrier_off(bond_dev);
1805
1754 if (bond->slave_cnt == 0) { 1806 if (bond->slave_cnt == 0) {
1755 goto out; 1807 goto out;
1756 } 1808 }
@@ -2187,15 +2239,9 @@ void bond_mii_monitor(struct net_device *bond_dev)
2187 2239
2188 bond_select_active_slave(bond); 2240 bond_select_active_slave(bond);
2189 2241
2190 if (oldcurrent && !bond->curr_active_slave) {
2191 printk(KERN_INFO DRV_NAME
2192 ": %s: now running without any active "
2193 "interface !\n",
2194 bond_dev->name);
2195 }
2196
2197 write_unlock(&bond->curr_slave_lock); 2242 write_unlock(&bond->curr_slave_lock);
2198 } 2243 } else
2244 bond_set_carrier(bond);
2199 2245
2200re_arm: 2246re_arm:
2201 if (bond->params.miimon) { 2247 if (bond->params.miimon) {
@@ -2499,13 +2545,6 @@ void bond_loadbalance_arp_mon(struct net_device *bond_dev)
2499 2545
2500 bond_select_active_slave(bond); 2546 bond_select_active_slave(bond);
2501 2547
2502 if (oldcurrent && !bond->curr_active_slave) {
2503 printk(KERN_INFO DRV_NAME
2504 ": %s: now running without any active "
2505 "interface !\n",
2506 bond_dev->name);
2507 }
2508
2509 write_unlock(&bond->curr_slave_lock); 2548 write_unlock(&bond->curr_slave_lock);
2510 } 2549 }
2511 2550
@@ -2579,12 +2618,15 @@ void bond_activebackup_arp_mon(struct net_device *bond_dev)
2579 bond->current_arp_slave = NULL; 2618 bond->current_arp_slave = NULL;
2580 } 2619 }
2581 2620
2621 bond_set_carrier(bond);
2622
2582 if (slave == bond->curr_active_slave) { 2623 if (slave == bond->curr_active_slave) {
2583 printk(KERN_INFO DRV_NAME 2624 printk(KERN_INFO DRV_NAME
2584 ": %s: %s is up and now the " 2625 ": %s: %s is up and now the "
2585 "active interface\n", 2626 "active interface\n",
2586 bond_dev->name, 2627 bond_dev->name,
2587 slave->dev->name); 2628 slave->dev->name);
2629 netif_carrier_on(bond->dev);
2588 } else { 2630 } else {
2589 printk(KERN_INFO DRV_NAME 2631 printk(KERN_INFO DRV_NAME
2590 ": %s: backup interface %s is " 2632 ": %s: backup interface %s is "
@@ -2844,7 +2886,8 @@ static void bond_info_show_master(struct seq_file *seq)
2844 (curr) ? curr->dev->name : "None"); 2886 (curr) ? curr->dev->name : "None");
2845 } 2887 }
2846 2888
2847 seq_printf(seq, "MII Status: %s\n", (curr) ? "up" : "down"); 2889 seq_printf(seq, "MII Status: %s\n", netif_carrier_ok(bond->dev) ?
2890 "up" : "down");
2848 seq_printf(seq, "MII Polling Interval (ms): %d\n", bond->params.miimon); 2891 seq_printf(seq, "MII Polling Interval (ms): %d\n", bond->params.miimon);
2849 seq_printf(seq, "Up Delay (ms): %d\n", 2892 seq_printf(seq, "Up Delay (ms): %d\n",
2850 bond->params.updelay * bond->params.miimon); 2893 bond->params.updelay * bond->params.miimon);
@@ -4531,6 +4574,8 @@ int bond_create(char *name, struct bond_params *params, struct bonding **newbond
4531 if (newbond) 4574 if (newbond)
4532 *newbond = bond_dev->priv; 4575 *newbond = bond_dev->priv;
4533 4576
4577 netif_carrier_off(bond_dev);
4578
4534 rtnl_unlock(); /* allows sysfs registration of net device */ 4579 rtnl_unlock(); /* allows sysfs registration of net device */
4535 res = bond_create_sysfs_entry(bond_dev->priv); 4580 res = bond_create_sysfs_entry(bond_dev->priv);
4536 goto done; 4581 goto done;
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h
index ce9dc9b4e2..0bdfe2c714 100644
--- a/drivers/net/bonding/bonding.h
+++ b/drivers/net/bonding/bonding.h
@@ -22,8 +22,8 @@
22#include "bond_3ad.h" 22#include "bond_3ad.h"
23#include "bond_alb.h" 23#include "bond_alb.h"
24 24
25#define DRV_VERSION "3.0.2" 25#define DRV_VERSION "3.0.3"
26#define DRV_RELDATE "February 21, 2006" 26#define DRV_RELDATE "March 23, 2006"
27#define DRV_NAME "bonding" 27#define DRV_NAME "bonding"
28#define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" 28#define DRV_DESCRIPTION "Ethernet Channel Bonding Driver"
29 29
diff --git a/drivers/net/ixp2000/ixpdev.c b/drivers/net/ixp2000/ixpdev.c
index 77f104a005..fbc2d21020 100644
--- a/drivers/net/ixp2000/ixpdev.c
+++ b/drivers/net/ixp2000/ixpdev.c
@@ -299,10 +299,7 @@ int ixpdev_init(int __nds_count, struct net_device **__nds,
299 int i; 299 int i;
300 int err; 300 int err;
301 301
302 if (RX_BUF_COUNT > 192 || TX_BUF_COUNT > 192) { 302 BUILD_BUG_ON(RX_BUF_COUNT > 192 || TX_BUF_COUNT > 192);
303 static void __too_many_rx_or_tx_buffers(void);
304 __too_many_rx_or_tx_buffers();
305 }
306 303
307 printk(KERN_INFO "IXP2000 MSF ethernet driver %s\n", DRV_MODULE_VERSION); 304 printk(KERN_INFO "IXP2000 MSF ethernet driver %s\n", DRV_MODULE_VERSION);
308 305
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 8d4999837b..7826afbb9d 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -226,7 +226,7 @@ static int full_duplex[MAX_UNITS];
226 NATSEMI_PG1_NREGS) 226 NATSEMI_PG1_NREGS)
227#define NATSEMI_REGS_VER 1 /* v1 added RFDR registers */ 227#define NATSEMI_REGS_VER 1 /* v1 added RFDR registers */
228#define NATSEMI_REGS_SIZE (NATSEMI_NREGS * sizeof(u32)) 228#define NATSEMI_REGS_SIZE (NATSEMI_NREGS * sizeof(u32))
229#define NATSEMI_EEPROM_SIZE 24 /* 12 16-bit values */ 229#define NATSEMI_DEF_EEPROM_SIZE 24 /* 12 16-bit values */
230 230
231/* Buffer sizes: 231/* Buffer sizes:
232 * The nic writes 32-bit values, even if the upper bytes of 232 * The nic writes 32-bit values, even if the upper bytes of
@@ -714,6 +714,8 @@ struct netdev_private {
714 unsigned int iosize; 714 unsigned int iosize;
715 spinlock_t lock; 715 spinlock_t lock;
716 u32 msg_enable; 716 u32 msg_enable;
717 /* EEPROM data */
718 int eeprom_size;
717}; 719};
718 720
719static void move_int_phy(struct net_device *dev, int addr); 721static void move_int_phy(struct net_device *dev, int addr);
@@ -890,6 +892,7 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,
890 np->msg_enable = (debug >= 0) ? (1<<debug)-1 : NATSEMI_DEF_MSG; 892 np->msg_enable = (debug >= 0) ? (1<<debug)-1 : NATSEMI_DEF_MSG;
891 np->hands_off = 0; 893 np->hands_off = 0;
892 np->intr_status = 0; 894 np->intr_status = 0;
895 np->eeprom_size = NATSEMI_DEF_EEPROM_SIZE;
893 896
894 /* Initial port: 897 /* Initial port:
895 * - If the nic was configured to use an external phy and if find_mii 898 * - If the nic was configured to use an external phy and if find_mii
@@ -2582,7 +2585,8 @@ static int get_regs_len(struct net_device *dev)
2582 2585
2583static int get_eeprom_len(struct net_device *dev) 2586static int get_eeprom_len(struct net_device *dev)
2584{ 2587{
2585 return NATSEMI_EEPROM_SIZE; 2588 struct netdev_private *np = netdev_priv(dev);
2589 return np->eeprom_size;
2586} 2590}
2587 2591
2588static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 2592static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
@@ -2669,15 +2673,20 @@ static u32 get_link(struct net_device *dev)
2669static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 2673static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
2670{ 2674{
2671 struct netdev_private *np = netdev_priv(dev); 2675 struct netdev_private *np = netdev_priv(dev);
2672 u8 eebuf[NATSEMI_EEPROM_SIZE]; 2676 u8 *eebuf;
2673 int res; 2677 int res;
2674 2678
2679 eebuf = kmalloc(np->eeprom_size, GFP_KERNEL);
2680 if (!eebuf)
2681 return -ENOMEM;
2682
2675 eeprom->magic = PCI_VENDOR_ID_NS | (PCI_DEVICE_ID_NS_83815<<16); 2683 eeprom->magic = PCI_VENDOR_ID_NS | (PCI_DEVICE_ID_NS_83815<<16);
2676 spin_lock_irq(&np->lock); 2684 spin_lock_irq(&np->lock);
2677 res = netdev_get_eeprom(dev, eebuf); 2685 res = netdev_get_eeprom(dev, eebuf);
2678 spin_unlock_irq(&np->lock); 2686 spin_unlock_irq(&np->lock);
2679 if (!res) 2687 if (!res)
2680 memcpy(data, eebuf+eeprom->offset, eeprom->len); 2688 memcpy(data, eebuf+eeprom->offset, eeprom->len);
2689 kfree(eebuf);
2681 return res; 2690 return res;
2682} 2691}
2683 2692
@@ -3033,9 +3042,10 @@ static int netdev_get_eeprom(struct net_device *dev, u8 *buf)
3033 int i; 3042 int i;
3034 u16 *ebuf = (u16 *)buf; 3043 u16 *ebuf = (u16 *)buf;
3035 void __iomem * ioaddr = ns_ioaddr(dev); 3044 void __iomem * ioaddr = ns_ioaddr(dev);
3045 struct netdev_private *np = netdev_priv(dev);
3036 3046
3037 /* eeprom_read reads 16 bits, and indexes by 16 bits */ 3047 /* eeprom_read reads 16 bits, and indexes by 16 bits */
3038 for (i = 0; i < NATSEMI_EEPROM_SIZE/2; i++) { 3048 for (i = 0; i < np->eeprom_size/2; i++) {
3039 ebuf[i] = eeprom_read(ioaddr, i); 3049 ebuf[i] = eeprom_read(ioaddr, i);
3040 /* The EEPROM itself stores data bit-swapped, but eeprom_read 3050 /* The EEPROM itself stores data bit-swapped, but eeprom_read
3041 * reads it back "sanely". So we swap it back here in order to 3051 * reads it back "sanely". So we swap it back here in order to
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index edd1b5306b..75b35ad760 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -94,7 +94,7 @@ static struct console netconsole = {
94static int option_setup(char *opt) 94static int option_setup(char *opt)
95{ 95{
96 configured = !netpoll_parse_options(&np, opt); 96 configured = !netpoll_parse_options(&np, opt);
97 return 0; 97 return 1;
98} 98}
99 99
100__setup("netconsole=", option_setup); 100__setup("netconsole=", option_setup);
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index aa55813693..1cc94b2d76 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -35,6 +35,7 @@
35#include <linux/spinlock.h> 35#include <linux/spinlock.h>
36#include <linux/ethtool.h> 36#include <linux/ethtool.h>
37#include <linux/netdevice.h> 37#include <linux/netdevice.h>
38#include <linux/crc32.h>
38#include "../8390.h" 39#include "../8390.h"
39 40
40#include <pcmcia/cs_types.h> 41#include <pcmcia/cs_types.h>
@@ -1682,17 +1683,67 @@ static struct net_device_stats *get_stats(struct net_device *dev)
1682 return &ei_local->stat; 1683 return &ei_local->stat;
1683} 1684}
1684 1685
1686/*
1687 * Form the 64 bit 8390 multicast table from the linked list of addresses
1688 * associated with this dev structure.
1689 */
1690
1691static inline void make_mc_bits(u8 *bits, struct net_device *dev)
1692{
1693 struct dev_mc_list *dmi;
1694 u32 crc;
1695
1696 for (dmi=dev->mc_list; dmi; dmi=dmi->next) {
1697
1698 crc = ether_crc(ETH_ALEN, dmi->dmi_addr);
1699 /*
1700 * The 8390 uses the 6 most significant bits of the
1701 * CRC to index the multicast table.
1702 */
1703 bits[crc>>29] |= (1<<((crc>>26)&7));
1704 }
1705}
1706
1685/** 1707/**
1686 * do_set_multicast_list - set/clear multicast filter 1708 * do_set_multicast_list - set/clear multicast filter
1687 * @dev: net device for which multicast filter is adjusted 1709 * @dev: net device for which multicast filter is adjusted
1688 * 1710 *
1689 * Set or clear the multicast filter for this adaptor. May be called 1711 * Set or clear the multicast filter for this adaptor.
1690 * from a BH in 2.1.x. Must be called with lock held. 1712 * Must be called with lock held.
1691 */ 1713 */
1692 1714
1693static void do_set_multicast_list(struct net_device *dev) 1715static void do_set_multicast_list(struct net_device *dev)
1694{ 1716{
1695 long e8390_base = dev->base_addr; 1717 long e8390_base = dev->base_addr;
1718 int i;
1719 struct ei_device *ei_local = (struct ei_device*)netdev_priv(dev);
1720
1721 if (!(dev->flags&(IFF_PROMISC|IFF_ALLMULTI))) {
1722 memset(ei_local->mcfilter, 0, 8);
1723 if (dev->mc_list)
1724 make_mc_bits(ei_local->mcfilter, dev);
1725 } else {
1726 /* set to accept-all */
1727 memset(ei_local->mcfilter, 0xFF, 8);
1728 }
1729
1730 /*
1731 * DP8390 manuals don't specify any magic sequence for altering
1732 * the multicast regs on an already running card. To be safe, we
1733 * ensure multicast mode is off prior to loading up the new hash
1734 * table. If this proves to be not enough, we can always resort
1735 * to stopping the NIC, loading the table and then restarting.
1736 */
1737
1738 if (netif_running(dev))
1739 outb_p(E8390_RXCONFIG, e8390_base + EN0_RXCR);
1740
1741 outb_p(E8390_NODMA + E8390_PAGE1, e8390_base + E8390_CMD);
1742 for(i = 0; i < 8; i++)
1743 {
1744 outb_p(ei_local->mcfilter[i], e8390_base + EN1_MULT_SHIFT(i));
1745 }
1746 outb_p(E8390_NODMA + E8390_PAGE0, e8390_base + E8390_CMD);
1696 1747
1697 if(dev->flags&IFF_PROMISC) 1748 if(dev->flags&IFF_PROMISC)
1698 outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR); 1749 outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR);
@@ -1794,12 +1845,6 @@ static void AX88190_init(struct net_device *dev, int startp)
1794 if(inb_p(e8390_base + EN1_PHYS_SHIFT(i))!=dev->dev_addr[i]) 1845 if(inb_p(e8390_base + EN1_PHYS_SHIFT(i))!=dev->dev_addr[i])
1795 printk(KERN_ERR "Hw. address read/write mismap %d\n",i); 1846 printk(KERN_ERR "Hw. address read/write mismap %d\n",i);
1796 } 1847 }
1797 /*
1798 * Initialize the multicast list to accept-all. If we enable multicast
1799 * the higher levels can do the filtering.
1800 */
1801 for (i = 0; i < 8; i++)
1802 outb_p(0xff, e8390_base + EN1_MULT + i);
1803 1848
1804 outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG); 1849 outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG);
1805 outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); 1850 outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD);
diff --git a/drivers/net/pcmcia/xirc2ps_cs.c b/drivers/net/pcmcia/xirc2ps_cs.c
index eed496803f..e8f849e129 100644
--- a/drivers/net/pcmcia/xirc2ps_cs.c
+++ b/drivers/net/pcmcia/xirc2ps_cs.c
@@ -1973,7 +1973,7 @@ static int __init setup_xirc2ps_cs(char *str)
1973 MAYBE_SET(lockup_hack, 6); 1973 MAYBE_SET(lockup_hack, 6);
1974#undef MAYBE_SET 1974#undef MAYBE_SET
1975 1975
1976 return 0; 1976 return 1;
1977} 1977}
1978 1978
1979__setup("xirc2ps_cs=", setup_xirc2ps_cs); 1979__setup("xirc2ps_cs=", setup_xirc2ps_cs);
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 9595f74da9..07c31f19c6 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -1167,8 +1167,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1167 * station address PROM at the base address and programmed into the 1167 * station address PROM at the base address and programmed into the
1168 * "Physical Address Registers" CSR12-14. 1168 * "Physical Address Registers" CSR12-14.
1169 * As a precautionary measure, we read the PROM values and complain if 1169 * As a precautionary measure, we read the PROM values and complain if
1170 * they disagree with the CSRs. Either way, we use the CSR values, and 1170 * they disagree with the CSRs. If they miscompare, and the PROM addr
1171 * double check that they are valid. 1171 * is valid, then the PROM addr is used.
1172 */ 1172 */
1173 for (i = 0; i < 3; i++) { 1173 for (i = 0; i < 3; i++) {
1174 unsigned int val; 1174 unsigned int val;
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index 1f5975a61e..43f5e86fc5 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -1442,7 +1442,7 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg)
1442 case SPIDER_NET_GRFAFLLINT: /* fallthrough */ 1442 case SPIDER_NET_GRFAFLLINT: /* fallthrough */
1443 case SPIDER_NET_GRMFLLINT: 1443 case SPIDER_NET_GRMFLLINT:
1444 if (netif_msg_intr(card) && net_ratelimit()) 1444 if (netif_msg_intr(card) && net_ratelimit())
1445 pr_err("Spider RX RAM full, incoming packets " 1445 pr_debug("Spider RX RAM full, incoming packets "
1446 "might be discarded!\n"); 1446 "might be discarded!\n");
1447 spider_net_rx_irq_off(card); 1447 spider_net_rx_irq_off(card);
1448 tasklet_schedule(&card->rxram_full_tl); 1448 tasklet_schedule(&card->rxram_full_tl);
@@ -2086,7 +2086,7 @@ spider_net_setup_netdev(struct spider_net_card *card)
2086 2086
2087 spider_net_setup_netdev_ops(netdev); 2087 spider_net_setup_netdev_ops(netdev);
2088 2088
2089 netdev->features = 0; 2089 netdev->features = NETIF_F_HW_CSUM;
2090 /* some time: NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | 2090 /* some time: NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2091 * NETIF_F_HW_VLAN_FILTER */ 2091 * NETIF_F_HW_VLAN_FILTER */
2092 2092
diff --git a/drivers/net/tokenring/Kconfig b/drivers/net/tokenring/Kconfig
index e4cfc80b28..99c4c1922f 100644
--- a/drivers/net/tokenring/Kconfig
+++ b/drivers/net/tokenring/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5menu "Token Ring devices" 5menu "Token Ring devices"
6 depends on NETDEVICES 6 depends on NETDEVICES && !UML
7 7
8# So far, we only have PCI, ISA, and MCA token ring devices 8# So far, we only have PCI, ISA, and MCA token ring devices
9config TR 9config TR
diff --git a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c
index 2418715892..a9b2150909 100644
--- a/drivers/net/via-rhine.c
+++ b/drivers/net/via-rhine.c
@@ -1085,6 +1085,25 @@ static void rhine_check_media(struct net_device *dev, unsigned int init_media)
1085 else 1085 else
1086 iowrite8(ioread8(ioaddr + ChipCmd1) & ~Cmd1FDuplex, 1086 iowrite8(ioread8(ioaddr + ChipCmd1) & ~Cmd1FDuplex,
1087 ioaddr + ChipCmd1); 1087 ioaddr + ChipCmd1);
1088 if (debug > 1)
1089 printk(KERN_INFO "%s: force_media %d, carrier %d\n", dev->name,
1090 rp->mii_if.force_media, netif_carrier_ok(dev));
1091}
1092
1093/* Called after status of force_media possibly changed */
1094void rhine_set_carrier(struct mii_if_info *mii)
1095{
1096 if (mii->force_media) {
1097 /* autoneg is off: Link is always assumed to be up */
1098 if (!netif_carrier_ok(mii->dev))
1099 netif_carrier_on(mii->dev);
1100 }
1101 else /* Let MMI library update carrier status */
1102 rhine_check_media(mii->dev, 0);
1103 if (debug > 1)
1104 printk(KERN_INFO "%s: force_media %d, carrier %d\n",
1105 mii->dev->name, mii->force_media,
1106 netif_carrier_ok(mii->dev));
1088} 1107}
1089 1108
1090static void rhine_check_media_task(struct net_device *dev) 1109static void rhine_check_media_task(struct net_device *dev)
@@ -1782,6 +1801,7 @@ static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1782 spin_lock_irq(&rp->lock); 1801 spin_lock_irq(&rp->lock);
1783 rc = mii_ethtool_sset(&rp->mii_if, cmd); 1802 rc = mii_ethtool_sset(&rp->mii_if, cmd);
1784 spin_unlock_irq(&rp->lock); 1803 spin_unlock_irq(&rp->lock);
1804 rhine_set_carrier(&rp->mii_if);
1785 1805
1786 return rc; 1806 return rc;
1787} 1807}
@@ -1869,6 +1889,7 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1869 spin_lock_irq(&rp->lock); 1889 spin_lock_irq(&rp->lock);
1870 rc = generic_mii_ioctl(&rp->mii_if, if_mii(rq), cmd, NULL); 1890 rc = generic_mii_ioctl(&rp->mii_if, if_mii(rq), cmd, NULL);
1871 spin_unlock_irq(&rp->lock); 1891 spin_unlock_irq(&rp->lock);
1892 rhine_set_carrier(&rp->mii_if);
1872 1893
1873 return rc; 1894 return rc;
1874} 1895}
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index fd17aa8491..bad09ebdb5 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -309,7 +309,10 @@ config APPLE_AIRPORT
309 Say Y here to support the Airport 802.11b wireless Ethernet hardware 309 Say Y here to support the Airport 802.11b wireless Ethernet hardware
310 built into the Macintosh iBook and other recent PowerPC-based 310 built into the Macintosh iBook and other recent PowerPC-based
311 Macintosh machines. This is essentially a Lucent Orinoco card with 311 Macintosh machines. This is essentially a Lucent Orinoco card with
312 a non-standard interface 312 a non-standard interface.
313
314 This driver does not support the Airport Extreme (802.11b/g). Use
315 the BCM43xx driver for Airport Extreme cards.
313 316
314config PLX_HERMES 317config PLX_HERMES
315 tristate "Hermes in PLX9052 based PCI adaptor support (Netgear MA301 etc.)" 318 tristate "Hermes in PLX9052 based PCI adaptor support (Netgear MA301 etc.)"
@@ -353,7 +356,7 @@ config PCI_HERMES
353 356
354config ATMEL 357config ATMEL
355 tristate "Atmel at76c50x chipset 802.11b support" 358 tristate "Atmel at76c50x chipset 802.11b support"
356 depends on NET_RADIO 359 depends on NET_RADIO && (PCI || PCMCIA)
357 select FW_LOADER 360 select FW_LOADER
358 select CRC32 361 select CRC32
359 ---help--- 362 ---help---
@@ -401,6 +404,7 @@ config PCMCIA_HERMES
401config PCMCIA_SPECTRUM 404config PCMCIA_SPECTRUM
402 tristate "Symbol Spectrum24 Trilogy PCMCIA card support" 405 tristate "Symbol Spectrum24 Trilogy PCMCIA card support"
403 depends on NET_RADIO && PCMCIA && HERMES 406 depends on NET_RADIO && PCMCIA && HERMES
407 select FW_LOADER
404 ---help--- 408 ---help---
405 409
406 This is a driver for 802.11b cards using RAM-loadable Symbol 410 This is a driver for 802.11b cards using RAM-loadable Symbol
@@ -500,6 +504,7 @@ config PRISM54
500 will be called prism54.ko. 504 will be called prism54.ko.
501 505
502source "drivers/net/wireless/hostap/Kconfig" 506source "drivers/net/wireless/hostap/Kconfig"
507source "drivers/net/wireless/bcm43xx/Kconfig"
503 508
504# yes, this works even when no drivers are selected 509# yes, this works even when no drivers are selected
505config NET_WIRELESS 510config NET_WIRELESS
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 3a6f7ba326..c867798793 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_PCMCIA_ATMEL) += atmel_cs.o
35obj-$(CONFIG_PRISM54) += prism54/ 35obj-$(CONFIG_PRISM54) += prism54/
36 36
37obj-$(CONFIG_HOSTAP) += hostap/ 37obj-$(CONFIG_HOSTAP) += hostap/
38obj-$(CONFIG_BCM43XX) += bcm43xx/
38 39
39# 16-bit wireless PCMCIA client drivers 40# 16-bit wireless PCMCIA client drivers
40obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o 41obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o
diff --git a/drivers/net/wireless/bcm43xx/Kconfig b/drivers/net/wireless/bcm43xx/Kconfig
new file mode 100644
index 0000000000..418465600a
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/Kconfig
@@ -0,0 +1,62 @@
1config BCM43XX
2 tristate "Broadcom BCM43xx wireless support"
3 depends on PCI && IEEE80211 && IEEE80211_SOFTMAC && NET_RADIO && EXPERIMENTAL
4 select FW_LOADER
5 ---help---
6 This is an experimental driver for the Broadcom 43xx wireless chip,
7 found in the Apple Airport Extreme and various other devices.
8
9config BCM43XX_DEBUG
10 bool "Broadcom BCM43xx debugging (RECOMMENDED)"
11 depends on BCM43XX
12 default y
13 ---help---
14 Broadcom 43xx debugging messages.
15 Say Y, because the driver is still very experimental and
16 this will help you get it running.
17
18config BCM43XX_DMA
19 bool
20config BCM43XX_PIO
21 bool
22
23choice
24 prompt "BCM43xx data transfer mode"
25 depends on BCM43XX
26 default BCM43XX_DMA_AND_PIO_MODE
27
28config BCM43XX_DMA_AND_PIO_MODE
29 bool "DMA + PIO"
30 select BCM43XX_DMA
31 select BCM43XX_PIO
32 ---help---
33 Include both, Direct Memory Access (DMA) and Programmed I/O (PIO)
34 data transfer modes.
35 The actually used mode is selectable through the module
36 parameter "pio". If the module parameter is pio=0, DMA is used.
37 Otherwise PIO is used. DMA is default.
38
39 If unsure, choose this option.
40
41config BCM43XX_DMA_MODE
42 bool "DMA (Direct Memory Access) only"
43 select BCM43XX_DMA
44 ---help---
45 Only include Direct Memory Access (DMA).
46 This reduces the size of the driver module, by omitting the PIO code.
47
48config BCM43XX_PIO_MODE
49 bool "PIO (Programmed I/O) only"
50 select BCM43XX_PIO
51 ---help---
52 Only include Programmed I/O (PIO).
53 This reduces the size of the driver module, by omitting the DMA code.
54 Please note that PIO transfers are slow (compared to DMA).
55
56 Also note that not all devices of the 43xx series support PIO.
57 The 4306 (Apple Airport Extreme and others) supports PIO, while
58 the 4318 is known to _not_ support PIO.
59
60 Only use PIO, if DMA does not work for you.
61
62endchoice
diff --git a/drivers/net/wireless/bcm43xx/Makefile b/drivers/net/wireless/bcm43xx/Makefile
new file mode 100644
index 0000000000..bb5220c629
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/Makefile
@@ -0,0 +1,12 @@
1obj-$(CONFIG_BCM43XX) += bcm43xx.o
2bcm43xx-obj-$(CONFIG_BCM43XX_DEBUG) += bcm43xx_debugfs.o
3
4bcm43xx-obj-$(CONFIG_BCM43XX_DMA) += bcm43xx_dma.o
5bcm43xx-obj-$(CONFIG_BCM43XX_PIO) += bcm43xx_pio.o
6
7bcm43xx-objs := bcm43xx_main.o bcm43xx_ilt.o \
8 bcm43xx_radio.o bcm43xx_phy.o \
9 bcm43xx_power.o bcm43xx_wx.o \
10 bcm43xx_leds.o bcm43xx_ethtool.o \
11 bcm43xx_xmit.o bcm43xx_sysfs.o \
12 $(bcm43xx-obj-y)
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx.h b/drivers/net/wireless/bcm43xx/bcm43xx.h
new file mode 100644
index 0000000000..dcadd295de
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx.h
@@ -0,0 +1,926 @@
1#ifndef BCM43xx_H_
2#define BCM43xx_H_
3
4#include <linux/version.h>
5#include <linux/kernel.h>
6#include <linux/spinlock.h>
7#include <linux/interrupt.h>
8#include <linux/stringify.h>
9#include <linux/pci.h>
10#include <net/ieee80211.h>
11#include <net/ieee80211softmac.h>
12#include <asm/atomic.h>
13#include <asm/io.h>
14
15
16#include "bcm43xx_debugfs.h"
17#include "bcm43xx_leds.h"
18#include "bcm43xx_sysfs.h"
19
20
21#define PFX KBUILD_MODNAME ": "
22
23#define BCM43xx_SWITCH_CORE_MAX_RETRIES 50
24#define BCM43xx_IRQWAIT_MAX_RETRIES 50
25
26#define BCM43xx_IO_SIZE 8192
27
28/* Active Core PCI Configuration Register. */
29#define BCM43xx_PCICFG_ACTIVE_CORE 0x80
30/* SPROM control register. */
31#define BCM43xx_PCICFG_SPROMCTL 0x88
32/* Interrupt Control PCI Configuration Register. (Only on PCI cores with rev >= 6) */
33#define BCM43xx_PCICFG_ICR 0x94
34
35/* MMIO offsets */
36#define BCM43xx_MMIO_DMA1_REASON 0x20
37#define BCM43xx_MMIO_DMA1_IRQ_MASK 0x24
38#define BCM43xx_MMIO_DMA2_REASON 0x28
39#define BCM43xx_MMIO_DMA2_IRQ_MASK 0x2C
40#define BCM43xx_MMIO_DMA3_REASON 0x30
41#define BCM43xx_MMIO_DMA3_IRQ_MASK 0x34
42#define BCM43xx_MMIO_DMA4_REASON 0x38
43#define BCM43xx_MMIO_DMA4_IRQ_MASK 0x3C
44#define BCM43xx_MMIO_STATUS_BITFIELD 0x120
45#define BCM43xx_MMIO_STATUS2_BITFIELD 0x124
46#define BCM43xx_MMIO_GEN_IRQ_REASON 0x128
47#define BCM43xx_MMIO_GEN_IRQ_MASK 0x12C
48#define BCM43xx_MMIO_RAM_CONTROL 0x130
49#define BCM43xx_MMIO_RAM_DATA 0x134
50#define BCM43xx_MMIO_PS_STATUS 0x140
51#define BCM43xx_MMIO_RADIO_HWENABLED_HI 0x158
52#define BCM43xx_MMIO_SHM_CONTROL 0x160
53#define BCM43xx_MMIO_SHM_DATA 0x164
54#define BCM43xx_MMIO_SHM_DATA_UNALIGNED 0x166
55#define BCM43xx_MMIO_XMITSTAT_0 0x170
56#define BCM43xx_MMIO_XMITSTAT_1 0x174
57#define BCM43xx_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
58#define BCM43xx_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
59#define BCM43xx_MMIO_DMA1_BASE 0x200
60#define BCM43xx_MMIO_DMA2_BASE 0x220
61#define BCM43xx_MMIO_DMA3_BASE 0x240
62#define BCM43xx_MMIO_DMA4_BASE 0x260
63#define BCM43xx_MMIO_PIO1_BASE 0x300
64#define BCM43xx_MMIO_PIO2_BASE 0x310
65#define BCM43xx_MMIO_PIO3_BASE 0x320
66#define BCM43xx_MMIO_PIO4_BASE 0x330
67#define BCM43xx_MMIO_PHY_VER 0x3E0
68#define BCM43xx_MMIO_PHY_RADIO 0x3E2
69#define BCM43xx_MMIO_ANTENNA 0x3E8
70#define BCM43xx_MMIO_CHANNEL 0x3F0
71#define BCM43xx_MMIO_CHANNEL_EXT 0x3F4
72#define BCM43xx_MMIO_RADIO_CONTROL 0x3F6
73#define BCM43xx_MMIO_RADIO_DATA_HIGH 0x3F8
74#define BCM43xx_MMIO_RADIO_DATA_LOW 0x3FA
75#define BCM43xx_MMIO_PHY_CONTROL 0x3FC
76#define BCM43xx_MMIO_PHY_DATA 0x3FE
77#define BCM43xx_MMIO_MACFILTER_CONTROL 0x420
78#define BCM43xx_MMIO_MACFILTER_DATA 0x422
79#define BCM43xx_MMIO_RADIO_HWENABLED_LO 0x49A
80#define BCM43xx_MMIO_GPIO_CONTROL 0x49C
81#define BCM43xx_MMIO_GPIO_MASK 0x49E
82#define BCM43xx_MMIO_TSF_0 0x632 /* core rev < 3 only */
83#define BCM43xx_MMIO_TSF_1 0x634 /* core rev < 3 only */
84#define BCM43xx_MMIO_TSF_2 0x636 /* core rev < 3 only */
85#define BCM43xx_MMIO_TSF_3 0x638 /* core rev < 3 only */
86#define BCM43xx_MMIO_POWERUP_DELAY 0x6A8
87
88/* SPROM offsets. */
89#define BCM43xx_SPROM_BASE 0x1000
90#define BCM43xx_SPROM_BOARDFLAGS2 0x1c
91#define BCM43xx_SPROM_IL0MACADDR 0x24
92#define BCM43xx_SPROM_ET0MACADDR 0x27
93#define BCM43xx_SPROM_ET1MACADDR 0x2a
94#define BCM43xx_SPROM_ETHPHY 0x2d
95#define BCM43xx_SPROM_BOARDREV 0x2e
96#define BCM43xx_SPROM_PA0B0 0x2f
97#define BCM43xx_SPROM_PA0B1 0x30
98#define BCM43xx_SPROM_PA0B2 0x31
99#define BCM43xx_SPROM_WL0GPIO0 0x32
100#define BCM43xx_SPROM_WL0GPIO2 0x33
101#define BCM43xx_SPROM_MAXPWR 0x34
102#define BCM43xx_SPROM_PA1B0 0x35
103#define BCM43xx_SPROM_PA1B1 0x36
104#define BCM43xx_SPROM_PA1B2 0x37
105#define BCM43xx_SPROM_IDL_TSSI_TGT 0x38
106#define BCM43xx_SPROM_BOARDFLAGS 0x39
107#define BCM43xx_SPROM_ANTENNA_GAIN 0x3a
108#define BCM43xx_SPROM_VERSION 0x3f
109
110/* BCM43xx_SPROM_BOARDFLAGS values */
111#define BCM43xx_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
112#define BCM43xx_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
113#define BCM43xx_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
114#define BCM43xx_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
115#define BCM43xx_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
116#define BCM43xx_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
117#define BCM43xx_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
118#define BCM43xx_BFL_ENETADM 0x0080 /* has ADMtek switch */
119#define BCM43xx_BFL_ENETVLAN 0x0100 /* can do vlan */
120#define BCM43xx_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
121#define BCM43xx_BFL_NOPCI 0x0400 /* leaves PCI floating */
122#define BCM43xx_BFL_FEM 0x0800 /* supports the Front End Module */
123#define BCM43xx_BFL_EXTLNA 0x1000 /* has an external LNA */
124#define BCM43xx_BFL_HGPA 0x2000 /* had high gain PA */
125#define BCM43xx_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
126#define BCM43xx_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
127
128/* GPIO register offset, in both ChipCommon and PCI core. */
129#define BCM43xx_GPIO_CONTROL 0x6c
130
131/* SHM Routing */
132#define BCM43xx_SHM_SHARED 0x0001
133#define BCM43xx_SHM_WIRELESS 0x0002
134#define BCM43xx_SHM_PCM 0x0003
135#define BCM43xx_SHM_HWMAC 0x0004
136#define BCM43xx_SHM_UCODE 0x0300
137
138/* MacFilter offsets. */
139#define BCM43xx_MACFILTER_SELF 0x0000
140#define BCM43xx_MACFILTER_ASSOC 0x0003
141
142/* Chipcommon registers. */
143#define BCM43xx_CHIPCOMMON_CAPABILITIES 0x04
144#define BCM43xx_CHIPCOMMON_PLLONDELAY 0xB0
145#define BCM43xx_CHIPCOMMON_FREFSELDELAY 0xB4
146#define BCM43xx_CHIPCOMMON_SLOWCLKCTL 0xB8
147#define BCM43xx_CHIPCOMMON_SYSCLKCTL 0xC0
148
149/* PCI core specific registers. */
150#define BCM43xx_PCICORE_BCAST_ADDR 0x50
151#define BCM43xx_PCICORE_BCAST_DATA 0x54
152#define BCM43xx_PCICORE_SBTOPCI2 0x108
153
154/* SBTOPCI2 values. */
155#define BCM43xx_SBTOPCI2_PREFETCH 0x4
156#define BCM43xx_SBTOPCI2_BURST 0x8
157
158/* Chipcommon capabilities. */
159#define BCM43xx_CAPABILITIES_PCTL 0x00040000
160#define BCM43xx_CAPABILITIES_PLLMASK 0x00030000
161#define BCM43xx_CAPABILITIES_PLLSHIFT 16
162#define BCM43xx_CAPABILITIES_FLASHMASK 0x00000700
163#define BCM43xx_CAPABILITIES_FLASHSHIFT 8
164#define BCM43xx_CAPABILITIES_EXTBUSPRESENT 0x00000040
165#define BCM43xx_CAPABILITIES_UARTGPIO 0x00000020
166#define BCM43xx_CAPABILITIES_UARTCLOCKMASK 0x00000018
167#define BCM43xx_CAPABILITIES_UARTCLOCKSHIFT 3
168#define BCM43xx_CAPABILITIES_MIPSBIGENDIAN 0x00000004
169#define BCM43xx_CAPABILITIES_NRUARTSMASK 0x00000003
170
171/* PowerControl */
172#define BCM43xx_PCTL_IN 0xB0
173#define BCM43xx_PCTL_OUT 0xB4
174#define BCM43xx_PCTL_OUTENABLE 0xB8
175#define BCM43xx_PCTL_XTAL_POWERUP 0x40
176#define BCM43xx_PCTL_PLL_POWERDOWN 0x80
177
178/* PowerControl Clock Modes */
179#define BCM43xx_PCTL_CLK_FAST 0x00
180#define BCM43xx_PCTL_CLK_SLOW 0x01
181#define BCM43xx_PCTL_CLK_DYNAMIC 0x02
182
183#define BCM43xx_PCTL_FORCE_SLOW 0x0800
184#define BCM43xx_PCTL_FORCE_PLL 0x1000
185#define BCM43xx_PCTL_DYN_XTAL 0x2000
186
187/* COREIDs */
188#define BCM43xx_COREID_CHIPCOMMON 0x800
189#define BCM43xx_COREID_ILINE20 0x801
190#define BCM43xx_COREID_SDRAM 0x803
191#define BCM43xx_COREID_PCI 0x804
192#define BCM43xx_COREID_MIPS 0x805
193#define BCM43xx_COREID_ETHERNET 0x806
194#define BCM43xx_COREID_V90 0x807
195#define BCM43xx_COREID_USB11_HOSTDEV 0x80a
196#define BCM43xx_COREID_IPSEC 0x80b
197#define BCM43xx_COREID_PCMCIA 0x80d
198#define BCM43xx_COREID_EXT_IF 0x80f
199#define BCM43xx_COREID_80211 0x812
200#define BCM43xx_COREID_MIPS_3302 0x816
201#define BCM43xx_COREID_USB11_HOST 0x817
202#define BCM43xx_COREID_USB11_DEV 0x818
203#define BCM43xx_COREID_USB20_HOST 0x819
204#define BCM43xx_COREID_USB20_DEV 0x81a
205#define BCM43xx_COREID_SDIO_HOST 0x81b
206
207/* Core Information Registers */
208#define BCM43xx_CIR_BASE 0xf00
209#define BCM43xx_CIR_SBTPSFLAG (BCM43xx_CIR_BASE + 0x18)
210#define BCM43xx_CIR_SBIMSTATE (BCM43xx_CIR_BASE + 0x90)
211#define BCM43xx_CIR_SBINTVEC (BCM43xx_CIR_BASE + 0x94)
212#define BCM43xx_CIR_SBTMSTATELOW (BCM43xx_CIR_BASE + 0x98)
213#define BCM43xx_CIR_SBTMSTATEHIGH (BCM43xx_CIR_BASE + 0x9c)
214#define BCM43xx_CIR_SBIMCONFIGLOW (BCM43xx_CIR_BASE + 0xa8)
215#define BCM43xx_CIR_SB_ID_HI (BCM43xx_CIR_BASE + 0xfc)
216
217/* Mask to get the Backplane Flag Number from SBTPSFLAG. */
218#define BCM43xx_BACKPLANE_FLAG_NR_MASK 0x3f
219
220/* SBIMCONFIGLOW values/masks. */
221#define BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_MASK 0x00000007
222#define BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_SHIFT 0
223#define BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_MASK 0x00000070
224#define BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_SHIFT 4
225#define BCM43xx_SBIMCONFIGLOW_CONNID_MASK 0x00ff0000
226#define BCM43xx_SBIMCONFIGLOW_CONNID_SHIFT 16
227
228/* sbtmstatelow state flags */
229#define BCM43xx_SBTMSTATELOW_RESET 0x01
230#define BCM43xx_SBTMSTATELOW_REJECT 0x02
231#define BCM43xx_SBTMSTATELOW_CLOCK 0x10000
232#define BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK 0x20000
233
234/* sbtmstatehigh state flags */
235#define BCM43xx_SBTMSTATEHIGH_SERROR 0x1
236#define BCM43xx_SBTMSTATEHIGH_BUSY 0x4
237
238/* sbimstate flags */
239#define BCM43xx_SBIMSTATE_IB_ERROR 0x20000
240#define BCM43xx_SBIMSTATE_TIMEOUT 0x40000
241
242/* PHYVersioning */
243#define BCM43xx_PHYTYPE_A 0x00
244#define BCM43xx_PHYTYPE_B 0x01
245#define BCM43xx_PHYTYPE_G 0x02
246
247/* PHYRegisters */
248#define BCM43xx_PHY_ILT_A_CTRL 0x0072
249#define BCM43xx_PHY_ILT_A_DATA1 0x0073
250#define BCM43xx_PHY_ILT_A_DATA2 0x0074
251#define BCM43xx_PHY_G_LO_CONTROL 0x0810
252#define BCM43xx_PHY_ILT_G_CTRL 0x0472
253#define BCM43xx_PHY_ILT_G_DATA1 0x0473
254#define BCM43xx_PHY_ILT_G_DATA2 0x0474
255#define BCM43xx_PHY_A_PCTL 0x007B
256#define BCM43xx_PHY_G_PCTL 0x0029
257#define BCM43xx_PHY_A_CRS 0x0029
258#define BCM43xx_PHY_RADIO_BITFIELD 0x0401
259#define BCM43xx_PHY_G_CRS 0x0429
260#define BCM43xx_PHY_NRSSILT_CTRL 0x0803
261#define BCM43xx_PHY_NRSSILT_DATA 0x0804
262
263/* RadioRegisters */
264#define BCM43xx_RADIOCTL_ID 0x01
265
266/* StatusBitField */
267#define BCM43xx_SBF_MAC_ENABLED 0x00000001
268#define BCM43xx_SBF_2 0x00000002 /*FIXME: fix name*/
269#define BCM43xx_SBF_CORE_READY 0x00000004
270#define BCM43xx_SBF_400 0x00000400 /*FIXME: fix name*/
271#define BCM43xx_SBF_4000 0x00004000 /*FIXME: fix name*/
272#define BCM43xx_SBF_8000 0x00008000 /*FIXME: fix name*/
273#define BCM43xx_SBF_XFER_REG_BYTESWAP 0x00010000
274#define BCM43xx_SBF_MODE_NOTADHOC 0x00020000
275#define BCM43xx_SBF_MODE_AP 0x00040000
276#define BCM43xx_SBF_RADIOREG_LOCK 0x00080000
277#define BCM43xx_SBF_MODE_MONITOR 0x00400000
278#define BCM43xx_SBF_MODE_PROMISC 0x01000000
279#define BCM43xx_SBF_PS1 0x02000000
280#define BCM43xx_SBF_PS2 0x04000000
281#define BCM43xx_SBF_NO_SSID_BCAST 0x08000000
282#define BCM43xx_SBF_TIME_UPDATE 0x10000000
283#define BCM43xx_SBF_80000000 0x80000000 /*FIXME: fix name*/
284
285/* MicrocodeFlagsBitfield (addr + lo-word values?)*/
286#define BCM43xx_UCODEFLAGS_OFFSET 0x005E
287
288#define BCM43xx_UCODEFLAG_AUTODIV 0x0001
289#define BCM43xx_UCODEFLAG_UNKBGPHY 0x0002
290#define BCM43xx_UCODEFLAG_UNKBPHY 0x0004
291#define BCM43xx_UCODEFLAG_UNKGPHY 0x0020
292#define BCM43xx_UCODEFLAG_UNKPACTRL 0x0040
293#define BCM43xx_UCODEFLAG_JAPAN 0x0080
294
295/* Generic-Interrupt reasons. */
296#define BCM43xx_IRQ_READY (1 << 0)
297#define BCM43xx_IRQ_BEACON (1 << 1)
298#define BCM43xx_IRQ_PS (1 << 2)
299#define BCM43xx_IRQ_REG124 (1 << 5)
300#define BCM43xx_IRQ_PMQ (1 << 6)
301#define BCM43xx_IRQ_PIO_WORKAROUND (1 << 8)
302#define BCM43xx_IRQ_XMIT_ERROR (1 << 11)
303#define BCM43xx_IRQ_RX (1 << 15)
304#define BCM43xx_IRQ_SCAN (1 << 16)
305#define BCM43xx_IRQ_NOISE (1 << 18)
306#define BCM43xx_IRQ_XMIT_STATUS (1 << 29)
307
308#define BCM43xx_IRQ_ALL 0xffffffff
309#define BCM43xx_IRQ_INITIAL (BCM43xx_IRQ_PS | \
310 BCM43xx_IRQ_REG124 | \
311 BCM43xx_IRQ_PMQ | \
312 BCM43xx_IRQ_XMIT_ERROR | \
313 BCM43xx_IRQ_RX | \
314 BCM43xx_IRQ_SCAN | \
315 BCM43xx_IRQ_NOISE | \
316 BCM43xx_IRQ_XMIT_STATUS)
317
318
319/* Initial default iw_mode */
320#define BCM43xx_INITIAL_IWMODE IW_MODE_INFRA
321
322/* Bus type PCI. */
323#define BCM43xx_BUSTYPE_PCI 0
324/* Bus type Silicone Backplane Bus. */
325#define BCM43xx_BUSTYPE_SB 1
326/* Bus type PCMCIA. */
327#define BCM43xx_BUSTYPE_PCMCIA 2
328
329/* Threshold values. */
330#define BCM43xx_MIN_RTS_THRESHOLD 1U
331#define BCM43xx_MAX_RTS_THRESHOLD 2304U
332#define BCM43xx_DEFAULT_RTS_THRESHOLD BCM43xx_MAX_RTS_THRESHOLD
333
334#define BCM43xx_DEFAULT_SHORT_RETRY_LIMIT 7
335#define BCM43xx_DEFAULT_LONG_RETRY_LIMIT 4
336
337/* Max size of a security key */
338#define BCM43xx_SEC_KEYSIZE 16
339/* Security algorithms. */
340enum {
341 BCM43xx_SEC_ALGO_NONE = 0, /* unencrypted, as of TX header. */
342 BCM43xx_SEC_ALGO_WEP,
343 BCM43xx_SEC_ALGO_UNKNOWN,
344 BCM43xx_SEC_ALGO_AES,
345 BCM43xx_SEC_ALGO_WEP104,
346 BCM43xx_SEC_ALGO_TKIP,
347};
348
349#ifdef assert
350# undef assert
351#endif
352#ifdef CONFIG_BCM43XX_DEBUG
353#define assert(expr) \
354 do { \
355 if (unlikely(!(expr))) { \
356 printk(KERN_ERR PFX "ASSERTION FAILED (%s) at: %s:%d:%s()\n", \
357 #expr, __FILE__, __LINE__, __FUNCTION__); \
358 } \
359 } while (0)
360#else
361#define assert(expr) do { /* nothing */ } while (0)
362#endif
363
364/* rate limited printk(). */
365#ifdef printkl
366# undef printkl
367#endif
368#define printkl(f, x...) do { if (printk_ratelimit()) printk(f ,##x); } while (0)
369/* rate limited printk() for debugging */
370#ifdef dprintkl
371# undef dprintkl
372#endif
373#ifdef CONFIG_BCM43XX_DEBUG
374# define dprintkl printkl
375#else
376# define dprintkl(f, x...) do { /* nothing */ } while (0)
377#endif
378
379/* Helper macro for if branches.
380 * An if branch marked with this macro is only taken in DEBUG mode.
381 * Example:
382 * if (DEBUG_ONLY(foo == bar)) {
383 * do something
384 * }
385 * In DEBUG mode, the branch will be taken if (foo == bar).
386 * In non-DEBUG mode, the branch will never be taken.
387 */
388#ifdef DEBUG_ONLY
389# undef DEBUG_ONLY
390#endif
391#ifdef CONFIG_BCM43XX_DEBUG
392# define DEBUG_ONLY(x) (x)
393#else
394# define DEBUG_ONLY(x) 0
395#endif
396
397/* debugging printk() */
398#ifdef dprintk
399# undef dprintk
400#endif
401#ifdef CONFIG_BCM43XX_DEBUG
402# define dprintk(f, x...) do { printk(f ,##x); } while (0)
403#else
404# define dprintk(f, x...) do { /* nothing */ } while (0)
405#endif
406
407
408struct net_device;
409struct pci_dev;
410struct bcm43xx_dmaring;
411struct bcm43xx_pioqueue;
412
413struct bcm43xx_initval {
414 u16 offset;
415 u16 size;
416 u32 value;
417} __attribute__((__packed__));
418
419/* Values for bcm430x_sprominfo.locale */
420enum {
421 BCM43xx_LOCALE_WORLD = 0,
422 BCM43xx_LOCALE_THAILAND,
423 BCM43xx_LOCALE_ISRAEL,
424 BCM43xx_LOCALE_JORDAN,
425 BCM43xx_LOCALE_CHINA,
426 BCM43xx_LOCALE_JAPAN,
427 BCM43xx_LOCALE_USA_CANADA_ANZ,
428 BCM43xx_LOCALE_EUROPE,
429 BCM43xx_LOCALE_USA_LOW,
430 BCM43xx_LOCALE_JAPAN_HIGH,
431 BCM43xx_LOCALE_ALL,
432 BCM43xx_LOCALE_NONE,
433};
434
435#define BCM43xx_SPROM_SIZE 64 /* in 16-bit words. */
436struct bcm43xx_sprominfo {
437 u16 boardflags2;
438 u8 il0macaddr[6];
439 u8 et0macaddr[6];
440 u8 et1macaddr[6];
441 u8 et0phyaddr:5;
442 u8 et1phyaddr:5;
443 u8 et0mdcport:1;
444 u8 et1mdcport:1;
445 u8 boardrev;
446 u8 locale:4;
447 u8 antennas_aphy:2;
448 u8 antennas_bgphy:2;
449 u16 pa0b0;
450 u16 pa0b1;
451 u16 pa0b2;
452 u8 wl0gpio0;
453 u8 wl0gpio1;
454 u8 wl0gpio2;
455 u8 wl0gpio3;
456 u8 maxpower_aphy;
457 u8 maxpower_bgphy;
458 u16 pa1b0;
459 u16 pa1b1;
460 u16 pa1b2;
461 u8 idle_tssi_tgt_aphy;
462 u8 idle_tssi_tgt_bgphy;
463 u16 boardflags;
464 u16 antennagain_aphy;
465 u16 antennagain_bgphy;
466};
467
468/* Value pair to measure the LocalOscillator. */
469struct bcm43xx_lopair {
470 s8 low;
471 s8 high;
472 u8 used:1;
473};
474#define BCM43xx_LO_COUNT (14*4)
475
476struct bcm43xx_phyinfo {
477 /* Hardware Data */
478 u8 version;
479 u8 type;
480 u8 rev;
481 u16 antenna_diversity;
482 u16 savedpctlreg;
483 u16 minlowsig[2];
484 u16 minlowsigpos[2];
485 u8 connected:1,
486 calibrated:1,
487 is_locked:1, /* used in bcm43xx_phy_{un}lock() */
488 dyn_tssi_tbl:1; /* used in bcm43xx_phy_init_tssi2dbm_table() */
489 /* LO Measurement Data.
490 * Use bcm43xx_get_lopair() to get a value.
491 */
492 struct bcm43xx_lopair *_lo_pairs;
493
494 /* TSSI to dBm table in use */
495 const s8 *tssi2dbm;
496 /* idle TSSI value */
497 s8 idle_tssi;
498
499 /* Values from bcm43xx_calc_loopback_gain() */
500 u16 loopback_gain[2];
501
502 /* PHY lock for core.rev < 3
503 * This lock is only used by bcm43xx_phy_{un}lock()
504 */
505 spinlock_t lock;
506};
507
508
509struct bcm43xx_radioinfo {
510 u16 manufact;
511 u16 version;
512 u8 revision;
513
514 /* Desired TX power in dBm Q5.2 */
515 u16 txpower_desired;
516 /* TX Power control values. */
517 union {
518 /* B/G PHY */
519 struct {
520 u16 baseband_atten;
521 u16 radio_atten;
522 u16 txctl1;
523 u16 txctl2;
524 };
525 /* A PHY */
526 struct {
527 u16 txpwr_offset;
528 };
529 };
530
531 /* Current Interference Mitigation mode */
532 int interfmode;
533 /* Stack of saved values from the Interference Mitigation code.
534 * Each value in the stack is layed out as follows:
535 * bit 0-11: offset
536 * bit 12-15: register ID
537 * bit 16-32: value
538 * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
539 */
540#define BCM43xx_INTERFSTACK_SIZE 26
541 u32 interfstack[BCM43xx_INTERFSTACK_SIZE];
542
543 /* Saved values from the NRSSI Slope calculation */
544 s16 nrssi[2];
545 s32 nrssislope;
546 /* In memory nrssi lookup table. */
547 s8 nrssi_lt[64];
548
549 /* current channel */
550 u8 channel;
551 u8 initial_channel;
552
553 u16 lofcal;
554
555 u16 initval;
556
557 u8 enabled:1;
558 /* ACI (adjacent channel interference) flags. */
559 u8 aci_enable:1,
560 aci_wlan_automatic:1,
561 aci_hw_rssi:1;
562};
563
564/* Data structures for DMA transmission, per 80211 core. */
565struct bcm43xx_dma {
566 struct bcm43xx_dmaring *tx_ring0;
567 struct bcm43xx_dmaring *tx_ring1;
568 struct bcm43xx_dmaring *tx_ring2;
569 struct bcm43xx_dmaring *tx_ring3;
570 struct bcm43xx_dmaring *rx_ring0;
571 struct bcm43xx_dmaring *rx_ring1; /* only available on core.rev < 5 */
572};
573
574/* Data structures for PIO transmission, per 80211 core. */
575struct bcm43xx_pio {
576 struct bcm43xx_pioqueue *queue0;
577 struct bcm43xx_pioqueue *queue1;
578 struct bcm43xx_pioqueue *queue2;
579 struct bcm43xx_pioqueue *queue3;
580};
581
582#define BCM43xx_MAX_80211_CORES 2
583
584#ifdef CONFIG_BCM947XX
585#define core_offset(bcm) (bcm)->current_core_offset
586#else
587#define core_offset(bcm) 0
588#endif
589
590/* Generic information about a core. */
591struct bcm43xx_coreinfo {
592 u8 available:1,
593 enabled:1,
594 initialized:1;
595 /** core_id ID number */
596 u16 id;
597 /** core_rev revision number */
598 u8 rev;
599 /** Index number for _switch_core() */
600 u8 index;
601};
602
603/* Additional information for each 80211 core. */
604struct bcm43xx_coreinfo_80211 {
605 /* PHY device. */
606 struct bcm43xx_phyinfo phy;
607 /* Radio device. */
608 struct bcm43xx_radioinfo radio;
609 union {
610 /* DMA context. */
611 struct bcm43xx_dma dma;
612 /* PIO context. */
613 struct bcm43xx_pio pio;
614 };
615};
616
617/* Context information for a noise calculation (Link Quality). */
618struct bcm43xx_noise_calculation {
619 struct bcm43xx_coreinfo *core_at_start;
620 u8 channel_at_start;
621 u8 calculation_running:1;
622 u8 nr_samples;
623 s8 samples[8][4];
624};
625
626struct bcm43xx_stats {
627 u8 link_quality;
628 u8 noise;
629 struct iw_statistics wstats;
630 /* Store the last TX/RX times here for updating the leds. */
631 unsigned long last_tx;
632 unsigned long last_rx;
633};
634
635struct bcm43xx_key {
636 u8 enabled:1;
637 u8 algorithm;
638};
639
640struct bcm43xx_private {
641 struct bcm43xx_sysfs sysfs;
642
643 struct ieee80211_device *ieee;
644 struct ieee80211softmac_device *softmac;
645
646 struct net_device *net_dev;
647 struct pci_dev *pci_dev;
648 unsigned int irq;
649
650 void __iomem *mmio_addr;
651 unsigned int mmio_len;
652
653 /* Do not use the lock directly. Use the bcm43xx_lock* helper
654 * functions, to be MMIO-safe. */
655 spinlock_t _lock;
656
657 /* Driver status flags. */
658 u32 initialized:1, /* init_board() succeed */
659 was_initialized:1, /* for PCI suspend/resume. */
660 shutting_down:1, /* free_board() in progress */
661 __using_pio:1, /* Internal, use bcm43xx_using_pio(). */
662 bad_frames_preempt:1, /* Use "Bad Frames Preemption" (default off) */
663 reg124_set_0x4:1, /* Some variable to keep track of IRQ stuff. */
664 powersaving:1, /* TRUE if we are in PowerSaving mode. FALSE otherwise. */
665 short_preamble:1, /* TRUE, if short preamble is enabled. */
666 firmware_norelease:1; /* Do not release the firmware. Used on suspend. */
667
668 struct bcm43xx_stats stats;
669
670 /* Bus type we are connected to.
671 * This is currently always BCM43xx_BUSTYPE_PCI
672 */
673 u8 bustype;
674
675 u16 board_vendor;
676 u16 board_type;
677 u16 board_revision;
678
679 u16 chip_id;
680 u8 chip_rev;
681 u8 chip_package;
682
683 struct bcm43xx_sprominfo sprom;
684#define BCM43xx_NR_LEDS 4
685 struct bcm43xx_led leds[BCM43xx_NR_LEDS];
686
687 /* The currently active core. */
688 struct bcm43xx_coreinfo *current_core;
689#ifdef CONFIG_BCM947XX
690 /** current core memory offset */
691 u32 current_core_offset;
692#endif
693 struct bcm43xx_coreinfo *active_80211_core;
694 /* coreinfo structs for all possible cores follow.
695 * Note that a core might not exist.
696 * So check the coreinfo flags before using it.
697 */
698 struct bcm43xx_coreinfo core_chipcommon;
699 struct bcm43xx_coreinfo core_pci;
700 struct bcm43xx_coreinfo core_80211[ BCM43xx_MAX_80211_CORES ];
701 /* Additional information, specific to the 80211 cores. */
702 struct bcm43xx_coreinfo_80211 core_80211_ext[ BCM43xx_MAX_80211_CORES ];
703 /* Index of the current 80211 core. If current_core is not
704 * an 80211 core, this is -1.
705 */
706 int current_80211_core_idx;
707 /* Number of available 80211 cores. */
708 int nr_80211_available;
709
710 u32 chipcommon_capabilities;
711
712 /* Reason code of the last interrupt. */
713 u32 irq_reason;
714 u32 dma_reason[4];
715 /* saved irq enable/disable state bitfield. */
716 u32 irq_savedstate;
717 /* Link Quality calculation context. */
718 struct bcm43xx_noise_calculation noisecalc;
719
720 /* Threshold values. */
721 //TODO: The RTS thr has to be _used_. Currently, it is only set via WX.
722 u32 rts_threshold;
723
724 /* Interrupt Service Routine tasklet (bottom-half) */
725 struct tasklet_struct isr_tasklet;
726
727 /* Periodic tasks */
728 struct timer_list periodic_tasks;
729 unsigned int periodic_state;
730
731 struct work_struct restart_work;
732
733 /* Informational stuff. */
734 char nick[IW_ESSID_MAX_SIZE + 1];
735
736 /* encryption/decryption */
737 u16 security_offset;
738 struct bcm43xx_key key[54];
739 u8 default_key_idx;
740
741 /* Firmware. */
742 const struct firmware *ucode;
743 const struct firmware *pcm;
744 const struct firmware *initvals0;
745 const struct firmware *initvals1;
746
747 /* Debugging stuff follows. */
748#ifdef CONFIG_BCM43XX_DEBUG
749 struct bcm43xx_dfsentry *dfsentry;
750#endif
751};
752
753/* bcm43xx_(un)lock() protect struct bcm43xx_private.
754 * Note that _NO_ MMIO writes are allowed. If you want to
755 * write to the device through MMIO in the critical section, use
756 * the *_mmio lock functions.
757 * MMIO read-access is allowed, though.
758 */
759#define bcm43xx_lock(bcm, flags) spin_lock_irqsave(&(bcm)->_lock, flags)
760#define bcm43xx_unlock(bcm, flags) spin_unlock_irqrestore(&(bcm)->_lock, flags)
761/* bcm43xx_(un)lock_mmio() protect struct bcm43xx_private and MMIO.
762 * MMIO write-access to the device is allowed.
763 * All MMIO writes are flushed on unlock, so it is guaranteed to not
764 * interfere with other threads writing MMIO registers.
765 */
766#define bcm43xx_lock_mmio(bcm, flags) bcm43xx_lock(bcm, flags)
767#define bcm43xx_unlock_mmio(bcm, flags) do { mmiowb(); bcm43xx_unlock(bcm, flags); } while (0)
768
769static inline
770struct bcm43xx_private * bcm43xx_priv(struct net_device *dev)
771{
772 return ieee80211softmac_priv(dev);
773}
774
775
776/* Helper function, which returns a boolean.
777 * TRUE, if PIO is used; FALSE, if DMA is used.
778 */
779#if defined(CONFIG_BCM43XX_DMA) && defined(CONFIG_BCM43XX_PIO)
780static inline
781int bcm43xx_using_pio(struct bcm43xx_private *bcm)
782{
783 return bcm->__using_pio;
784}
785#elif defined(CONFIG_BCM43XX_DMA)
786static inline
787int bcm43xx_using_pio(struct bcm43xx_private *bcm)
788{
789 return 0;
790}
791#elif defined(CONFIG_BCM43XX_PIO)
792static inline
793int bcm43xx_using_pio(struct bcm43xx_private *bcm)
794{
795 return 1;
796}
797#else
798# error "Using neither DMA nor PIO? Confused..."
799#endif
800
801/* Helper functions to access data structures private to the 80211 cores.
802 * Note that we _must_ have an 80211 core mapped when calling
803 * any of these functions.
804 */
805static inline
806struct bcm43xx_pio * bcm43xx_current_pio(struct bcm43xx_private *bcm)
807{
808 assert(bcm43xx_using_pio(bcm));
809 assert(bcm->current_80211_core_idx >= 0);
810 assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES);
811 return &(bcm->core_80211_ext[bcm->current_80211_core_idx].pio);
812}
813static inline
814struct bcm43xx_dma * bcm43xx_current_dma(struct bcm43xx_private *bcm)
815{
816 assert(!bcm43xx_using_pio(bcm));
817 assert(bcm->current_80211_core_idx >= 0);
818 assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES);
819 return &(bcm->core_80211_ext[bcm->current_80211_core_idx].dma);
820}
821static inline
822struct bcm43xx_phyinfo * bcm43xx_current_phy(struct bcm43xx_private *bcm)
823{
824 assert(bcm->current_80211_core_idx >= 0);
825 assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES);
826 return &(bcm->core_80211_ext[bcm->current_80211_core_idx].phy);
827}
828static inline
829struct bcm43xx_radioinfo * bcm43xx_current_radio(struct bcm43xx_private *bcm)
830{
831 assert(bcm->current_80211_core_idx >= 0);
832 assert(bcm->current_80211_core_idx < BCM43xx_MAX_80211_CORES);
833 return &(bcm->core_80211_ext[bcm->current_80211_core_idx].radio);
834}
835
836/* Are we running in init_board() context? */
837static inline
838int bcm43xx_is_initializing(struct bcm43xx_private *bcm)
839{
840 if (bcm->initialized)
841 return 0;
842 if (bcm->shutting_down)
843 return 0;
844 return 1;
845}
846
847static inline
848struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy,
849 u16 radio_attenuation,
850 u16 baseband_attenuation)
851{
852 return phy->_lo_pairs + (radio_attenuation + 14 * (baseband_attenuation / 2));
853}
854
855
856static inline
857u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset)
858{
859 return ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
860}
861
862static inline
863void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value)
864{
865 iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset);
866}
867
868static inline
869u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset)
870{
871 return ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
872}
873
874static inline
875void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value)
876{
877 iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset);
878}
879
880static inline
881int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value)
882{
883 return pci_read_config_word(bcm->pci_dev, offset, value);
884}
885
886static inline
887int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value)
888{
889 return pci_read_config_dword(bcm->pci_dev, offset, value);
890}
891
892static inline
893int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value)
894{
895 return pci_write_config_word(bcm->pci_dev, offset, value);
896}
897
898static inline
899int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value)
900{
901 return pci_write_config_dword(bcm->pci_dev, offset, value);
902}
903
904/** Limit a value between two limits */
905#ifdef limit_value
906# undef limit_value
907#endif
908#define limit_value(value, min, max) \
909 ({ \
910 typeof(value) __value = (value); \
911 typeof(value) __min = (min); \
912 typeof(value) __max = (max); \
913 if (__value < __min) \
914 __value = __min; \
915 else if (__value > __max) \
916 __value = __max; \
917 __value; \
918 })
919
920/** Helpers to print MAC addresses. */
921#define BCM43xx_MACFMT "%02x:%02x:%02x:%02x:%02x:%02x"
922#define BCM43xx_MACARG(x) ((u8*)(x))[0], ((u8*)(x))[1], \
923 ((u8*)(x))[2], ((u8*)(x))[3], \
924 ((u8*)(x))[4], ((u8*)(x))[5]
925
926#endif /* BCM43xx_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c
new file mode 100644
index 0000000000..d2c3401e9b
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c
@@ -0,0 +1,499 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 debugfs driver debugging code
6
7 Copyright (c) 2005 Michael Buesch <mbuesch@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
23
24*/
25
26
27
28#include <linux/fs.h>
29#include <linux/debugfs.h>
30#include <linux/slab.h>
31#include <linux/netdevice.h>
32#include <linux/pci.h>
33#include <asm/io.h>
34
35#include "bcm43xx.h"
36#include "bcm43xx_main.h"
37#include "bcm43xx_debugfs.h"
38#include "bcm43xx_dma.h"
39#include "bcm43xx_pio.h"
40#include "bcm43xx_xmit.h"
41
42#define REALLY_BIG_BUFFER_SIZE (1024*256)
43
44static struct bcm43xx_debugfs fs;
45static char really_big_buffer[REALLY_BIG_BUFFER_SIZE];
46static DECLARE_MUTEX(big_buffer_sem);
47
48
49static ssize_t write_file_dummy(struct file *file, const char __user *buf,
50 size_t count, loff_t *ppos)
51{
52 return count;
53}
54
55static int open_file_generic(struct inode *inode, struct file *file)
56{
57 file->private_data = inode->u.generic_ip;
58 return 0;
59}
60
61#define fappend(fmt, x...) pos += snprintf(buf + pos, len - pos, fmt , ##x)
62
63static ssize_t devinfo_read_file(struct file *file, char __user *userbuf,
64 size_t count, loff_t *ppos)
65{
66 const size_t len = REALLY_BIG_BUFFER_SIZE;
67
68 struct bcm43xx_private *bcm = file->private_data;
69 char *buf = really_big_buffer;
70 size_t pos = 0;
71 ssize_t res;
72 struct net_device *net_dev;
73 struct pci_dev *pci_dev;
74 unsigned long flags;
75 u16 tmp16;
76 int i;
77
78 down(&big_buffer_sem);
79
80 bcm43xx_lock_mmio(bcm, flags);
81 if (!bcm->initialized) {
82 fappend("Board not initialized.\n");
83 goto out;
84 }
85 net_dev = bcm->net_dev;
86 pci_dev = bcm->pci_dev;
87
88 /* This is where the information is written to the "devinfo" file */
89 fappend("*** %s devinfo ***\n", net_dev->name);
90 fappend("vendor: 0x%04x device: 0x%04x\n",
91 pci_dev->vendor, pci_dev->device);
92 fappend("subsystem_vendor: 0x%04x subsystem_device: 0x%04x\n",
93 pci_dev->subsystem_vendor, pci_dev->subsystem_device);
94 fappend("IRQ: %d\n", bcm->irq);
95 fappend("mmio_addr: 0x%p mmio_len: %u\n", bcm->mmio_addr, bcm->mmio_len);
96 fappend("chip_id: 0x%04x chip_rev: 0x%02x\n", bcm->chip_id, bcm->chip_rev);
97 if ((bcm->core_80211[0].rev >= 3) && (bcm43xx_read32(bcm, 0x0158) & (1 << 16)))
98 fappend("Radio disabled by hardware!\n");
99 if ((bcm->core_80211[0].rev < 3) && !(bcm43xx_read16(bcm, 0x049A) & (1 << 4)))
100 fappend("Radio disabled by hardware!\n");
101 fappend("board_vendor: 0x%04x board_type: 0x%04x\n", bcm->board_vendor,
102 bcm->board_type);
103
104 fappend("\nCores:\n");
105#define fappend_core(name, info) fappend("core \"" name "\" %s, %s, id: 0x%04x, " \
106 "rev: 0x%02x, index: 0x%02x\n", \
107 (info).available \
108 ? "available" : "nonavailable", \
109 (info).enabled \
110 ? "enabled" : "disabled", \
111 (info).id, (info).rev, (info).index)
112 fappend_core("CHIPCOMMON", bcm->core_chipcommon);
113 fappend_core("PCI", bcm->core_pci);
114 fappend_core("first 80211", bcm->core_80211[0]);
115 fappend_core("second 80211", bcm->core_80211[1]);
116#undef fappend_core
117 tmp16 = bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_CONTROL);
118 fappend("LEDs: ");
119 for (i = 0; i < BCM43xx_NR_LEDS; i++)
120 fappend("%d ", !!(tmp16 & (1 << i)));
121 fappend("\n");
122
123out:
124 bcm43xx_unlock_mmio(bcm, flags);
125 res = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
126 up(&big_buffer_sem);
127 return res;
128}
129
130static ssize_t drvinfo_read_file(struct file *file, char __user *userbuf,
131 size_t count, loff_t *ppos)
132{
133 const size_t len = REALLY_BIG_BUFFER_SIZE;
134
135 char *buf = really_big_buffer;
136 size_t pos = 0;
137 ssize_t res;
138
139 down(&big_buffer_sem);
140
141 /* This is where the information is written to the "driver" file */
142 fappend(KBUILD_MODNAME " driver\n");
143 fappend("Compiled at: %s %s\n", __DATE__, __TIME__);
144
145 res = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
146 up(&big_buffer_sem);
147 return res;
148}
149
150static ssize_t spromdump_read_file(struct file *file, char __user *userbuf,
151 size_t count, loff_t *ppos)
152{
153 const size_t len = REALLY_BIG_BUFFER_SIZE;
154
155 struct bcm43xx_private *bcm = file->private_data;
156 char *buf = really_big_buffer;
157 size_t pos = 0;
158 ssize_t res;
159 unsigned long flags;
160
161 down(&big_buffer_sem);
162 bcm43xx_lock_mmio(bcm, flags);
163 if (!bcm->initialized) {
164 fappend("Board not initialized.\n");
165 goto out;
166 }
167
168 /* This is where the information is written to the "sprom_dump" file */
169 fappend("boardflags: 0x%04x\n", bcm->sprom.boardflags);
170
171out:
172 bcm43xx_unlock_mmio(bcm, flags);
173 res = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
174 up(&big_buffer_sem);
175 return res;
176}
177
178static ssize_t tsf_read_file(struct file *file, char __user *userbuf,
179 size_t count, loff_t *ppos)
180{
181 const size_t len = REALLY_BIG_BUFFER_SIZE;
182
183 struct bcm43xx_private *bcm = file->private_data;
184 char *buf = really_big_buffer;
185 size_t pos = 0;
186 ssize_t res;
187 unsigned long flags;
188 u64 tsf;
189
190 down(&big_buffer_sem);
191 bcm43xx_lock_mmio(bcm, flags);
192 if (!bcm->initialized) {
193 fappend("Board not initialized.\n");
194 goto out;
195 }
196 bcm43xx_tsf_read(bcm, &tsf);
197 fappend("0x%08x%08x\n",
198 (unsigned int)((tsf & 0xFFFFFFFF00000000ULL) >> 32),
199 (unsigned int)(tsf & 0xFFFFFFFFULL));
200
201out:
202 bcm43xx_unlock_mmio(bcm, flags);
203 res = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
204 up(&big_buffer_sem);
205 return res;
206}
207
208static ssize_t tsf_write_file(struct file *file, const char __user *user_buf,
209 size_t count, loff_t *ppos)
210{
211 struct bcm43xx_private *bcm = file->private_data;
212 char *buf = really_big_buffer;
213 ssize_t buf_size;
214 ssize_t res;
215 unsigned long flags;
216 u64 tsf;
217
218 buf_size = min(count, sizeof (really_big_buffer) - 1);
219 down(&big_buffer_sem);
220 if (copy_from_user(buf, user_buf, buf_size)) {
221 res = -EFAULT;
222 goto out_up;
223 }
224 bcm43xx_lock_mmio(bcm, flags);
225 if (!bcm->initialized) {
226 printk(KERN_INFO PFX "debugfs: Board not initialized.\n");
227 res = -EFAULT;
228 goto out_unlock;
229 }
230 if (sscanf(buf, "%lli", &tsf) != 1) {
231 printk(KERN_INFO PFX "debugfs: invalid values for \"tsf\"\n");
232 res = -EINVAL;
233 goto out_unlock;
234 }
235 bcm43xx_tsf_write(bcm, tsf);
236 res = buf_size;
237
238out_unlock:
239 bcm43xx_unlock_mmio(bcm, flags);
240out_up:
241 up(&big_buffer_sem);
242 return res;
243}
244
245static ssize_t txstat_read_file(struct file *file, char __user *userbuf,
246 size_t count, loff_t *ppos)
247{
248 const size_t len = REALLY_BIG_BUFFER_SIZE;
249
250 struct bcm43xx_private *bcm = file->private_data;
251 char *buf = really_big_buffer;
252 size_t pos = 0;
253 ssize_t res;
254 unsigned long flags;
255 struct bcm43xx_dfsentry *e;
256 struct bcm43xx_xmitstatus *status;
257 int i, cnt, j = 0;
258
259 down(&big_buffer_sem);
260 bcm43xx_lock(bcm, flags);
261
262 fappend("Last %d logged xmitstatus blobs (Latest first):\n\n",
263 BCM43xx_NR_LOGGED_XMITSTATUS);
264 e = bcm->dfsentry;
265 if (e->xmitstatus_printing == 0) {
266 /* At the beginning, make a copy of all data to avoid
267 * concurrency, as this function is called multiple
268 * times for big logs. Without copying, the data might
269 * change between reads. This would result in total trash.
270 */
271 e->xmitstatus_printing = 1;
272 e->saved_xmitstatus_ptr = e->xmitstatus_ptr;
273 e->saved_xmitstatus_cnt = e->xmitstatus_cnt;
274 memcpy(e->xmitstatus_print_buffer, e->xmitstatus_buffer,
275 BCM43xx_NR_LOGGED_XMITSTATUS * sizeof(*(e->xmitstatus_buffer)));
276 }
277 i = e->saved_xmitstatus_ptr - 1;
278 if (i < 0)
279 i = BCM43xx_NR_LOGGED_XMITSTATUS - 1;
280 cnt = e->saved_xmitstatus_cnt;
281 while (cnt) {
282 status = e->xmitstatus_print_buffer + i;
283 fappend("0x%02x: cookie: 0x%04x, flags: 0x%02x, "
284 "cnt1: 0x%02x, cnt2: 0x%02x, seq: 0x%04x, "
285 "unk: 0x%04x\n", j,
286 status->cookie, status->flags,
287 status->cnt1, status->cnt2, status->seq,
288 status->unknown);
289 j++;
290 cnt--;
291 i--;
292 if (i < 0)
293 i = BCM43xx_NR_LOGGED_XMITSTATUS - 1;
294 }
295
296 bcm43xx_unlock(bcm, flags);
297 res = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
298 bcm43xx_lock(bcm, flags);
299 if (*ppos == pos) {
300 /* Done. Drop the copied data. */
301 e->xmitstatus_printing = 0;
302 }
303 bcm43xx_unlock(bcm, flags);
304 up(&big_buffer_sem);
305 return res;
306}
307
308#undef fappend
309
310
311static struct file_operations devinfo_fops = {
312 .read = devinfo_read_file,
313 .write = write_file_dummy,
314 .open = open_file_generic,
315};
316
317static struct file_operations spromdump_fops = {
318 .read = spromdump_read_file,
319 .write = write_file_dummy,
320 .open = open_file_generic,
321};
322
323static struct file_operations drvinfo_fops = {
324 .read = drvinfo_read_file,
325 .write = write_file_dummy,
326 .open = open_file_generic,
327};
328
329static struct file_operations tsf_fops = {
330 .read = tsf_read_file,
331 .write = tsf_write_file,
332 .open = open_file_generic,
333};
334
335static struct file_operations txstat_fops = {
336 .read = txstat_read_file,
337 .write = write_file_dummy,
338 .open = open_file_generic,
339};
340
341
342void bcm43xx_debugfs_add_device(struct bcm43xx_private *bcm)
343{
344 struct bcm43xx_dfsentry *e;
345 char devdir[IFNAMSIZ];
346
347 assert(bcm);
348 e = kzalloc(sizeof(*e), GFP_KERNEL);
349 if (!e) {
350 printk(KERN_ERR PFX "out of memory\n");
351 return;
352 }
353 e->bcm = bcm;
354 e->xmitstatus_buffer = kzalloc(BCM43xx_NR_LOGGED_XMITSTATUS
355 * sizeof(*(e->xmitstatus_buffer)),
356 GFP_KERNEL);
357 if (!e->xmitstatus_buffer) {
358 printk(KERN_ERR PFX "out of memory\n");
359 kfree(e);
360 return;
361 }
362 e->xmitstatus_print_buffer = kzalloc(BCM43xx_NR_LOGGED_XMITSTATUS
363 * sizeof(*(e->xmitstatus_buffer)),
364 GFP_KERNEL);
365 if (!e->xmitstatus_print_buffer) {
366 printk(KERN_ERR PFX "out of memory\n");
367 kfree(e);
368 return;
369 }
370
371
372 bcm->dfsentry = e;
373
374 strncpy(devdir, bcm->net_dev->name, ARRAY_SIZE(devdir));
375 e->subdir = debugfs_create_dir(devdir, fs.root);
376 e->dentry_devinfo = debugfs_create_file("devinfo", 0444, e->subdir,
377 bcm, &devinfo_fops);
378 if (!e->dentry_devinfo)
379 printk(KERN_ERR PFX "debugfs: creating \"devinfo\" for \"%s\" failed!\n", devdir);
380 e->dentry_spromdump = debugfs_create_file("sprom_dump", 0444, e->subdir,
381 bcm, &spromdump_fops);
382 if (!e->dentry_spromdump)
383 printk(KERN_ERR PFX "debugfs: creating \"sprom_dump\" for \"%s\" failed!\n", devdir);
384 e->dentry_tsf = debugfs_create_file("tsf", 0666, e->subdir,
385 bcm, &tsf_fops);
386 if (!e->dentry_tsf)
387 printk(KERN_ERR PFX "debugfs: creating \"tsf\" for \"%s\" failed!\n", devdir);
388 e->dentry_txstat = debugfs_create_file("tx_status", 0444, e->subdir,
389 bcm, &txstat_fops);
390 if (!e->dentry_txstat)
391 printk(KERN_ERR PFX "debugfs: creating \"tx_status\" for \"%s\" failed!\n", devdir);
392}
393
394void bcm43xx_debugfs_remove_device(struct bcm43xx_private *bcm)
395{
396 struct bcm43xx_dfsentry *e;
397
398 if (!bcm)
399 return;
400
401 e = bcm->dfsentry;
402 assert(e);
403 debugfs_remove(e->dentry_spromdump);
404 debugfs_remove(e->dentry_devinfo);
405 debugfs_remove(e->dentry_tsf);
406 debugfs_remove(e->dentry_txstat);
407 debugfs_remove(e->subdir);
408 kfree(e->xmitstatus_buffer);
409 kfree(e->xmitstatus_print_buffer);
410 kfree(e);
411}
412
413void bcm43xx_debugfs_log_txstat(struct bcm43xx_private *bcm,
414 struct bcm43xx_xmitstatus *status)
415{
416 struct bcm43xx_dfsentry *e;
417 struct bcm43xx_xmitstatus *savedstatus;
418
419 /* This is protected by bcm->_lock */
420 e = bcm->dfsentry;
421 assert(e);
422 savedstatus = e->xmitstatus_buffer + e->xmitstatus_ptr;
423 memcpy(savedstatus, status, sizeof(*status));
424 e->xmitstatus_ptr++;
425 if (e->xmitstatus_ptr >= BCM43xx_NR_LOGGED_XMITSTATUS)
426 e->xmitstatus_ptr = 0;
427 if (e->xmitstatus_cnt < BCM43xx_NR_LOGGED_XMITSTATUS)
428 e->xmitstatus_cnt++;
429}
430
431void bcm43xx_debugfs_init(void)
432{
433 memset(&fs, 0, sizeof(fs));
434 fs.root = debugfs_create_dir(KBUILD_MODNAME, NULL);
435 if (!fs.root)
436 printk(KERN_ERR PFX "debugfs: creating \"" KBUILD_MODNAME "\" subdir failed!\n");
437 fs.dentry_driverinfo = debugfs_create_file("driver", 0444, fs.root, NULL, &drvinfo_fops);
438 if (!fs.dentry_driverinfo)
439 printk(KERN_ERR PFX "debugfs: creating \"" KBUILD_MODNAME "/driver\" failed!\n");
440}
441
442void bcm43xx_debugfs_exit(void)
443{
444 debugfs_remove(fs.dentry_driverinfo);
445 debugfs_remove(fs.root);
446}
447
448void bcm43xx_printk_dump(const char *data,
449 size_t size,
450 const char *description)
451{
452 size_t i;
453 char c;
454
455 printk(KERN_INFO PFX "Data dump (%s, %u bytes):",
456 description, size);
457 for (i = 0; i < size; i++) {
458 c = data[i];
459 if (i % 8 == 0)
460 printk("\n" KERN_INFO PFX "0x%08x: 0x%02x, ", i, c & 0xff);
461 else
462 printk("0x%02x, ", c & 0xff);
463 }
464 printk("\n");
465}
466
467void bcm43xx_printk_bitdump(const unsigned char *data,
468 size_t bytes, int msb_to_lsb,
469 const char *description)
470{
471 size_t i;
472 int j;
473 const unsigned char *d;
474
475 printk(KERN_INFO PFX "*** Bitdump (%s, %u bytes, %s) ***",
476 description, bytes, msb_to_lsb ? "MSB to LSB" : "LSB to MSB");
477 for (i = 0; i < bytes; i++) {
478 d = data + i;
479 if (i % 8 == 0)
480 printk("\n" KERN_INFO PFX "0x%08x: ", i);
481 if (msb_to_lsb) {
482 for (j = 7; j >= 0; j--) {
483 if (*d & (1 << j))
484 printk("1");
485 else
486 printk("0");
487 }
488 } else {
489 for (j = 0; j < 8; j++) {
490 if (*d & (1 << j))
491 printk("1");
492 else
493 printk("0");
494 }
495 }
496 printk(" ");
497 }
498 printk("\n");
499}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.h b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.h
new file mode 100644
index 0000000000..50ce267f79
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.h
@@ -0,0 +1,117 @@
1#ifndef BCM43xx_DEBUGFS_H_
2#define BCM43xx_DEBUGFS_H_
3
4struct bcm43xx_private;
5struct bcm43xx_xmitstatus;
6
7#ifdef CONFIG_BCM43XX_DEBUG
8
9#include <linux/list.h>
10#include <asm/semaphore.h>
11
12struct dentry;
13
14/* limited by the size of the "really_big_buffer" */
15#define BCM43xx_NR_LOGGED_XMITSTATUS 100
16
17struct bcm43xx_dfsentry {
18 struct dentry *subdir;
19 struct dentry *dentry_devinfo;
20 struct dentry *dentry_spromdump;
21 struct dentry *dentry_tsf;
22 struct dentry *dentry_txstat;
23
24 struct bcm43xx_private *bcm;
25
26 /* saved xmitstatus. */
27 struct bcm43xx_xmitstatus *xmitstatus_buffer;
28 int xmitstatus_ptr;
29 int xmitstatus_cnt;
30 /* We need a seperate buffer while printing to avoid
31 * concurrency issues. (New xmitstatus can arrive
32 * while we are printing).
33 */
34 struct bcm43xx_xmitstatus *xmitstatus_print_buffer;
35 int saved_xmitstatus_ptr;
36 int saved_xmitstatus_cnt;
37 int xmitstatus_printing;
38};
39
40struct bcm43xx_debugfs {
41 struct dentry *root;
42 struct dentry *dentry_driverinfo;
43};
44
45void bcm43xx_debugfs_init(void);
46void bcm43xx_debugfs_exit(void);
47void bcm43xx_debugfs_add_device(struct bcm43xx_private *bcm);
48void bcm43xx_debugfs_remove_device(struct bcm43xx_private *bcm);
49void bcm43xx_debugfs_log_txstat(struct bcm43xx_private *bcm,
50 struct bcm43xx_xmitstatus *status);
51
52/* Debug helper: Dump binary data through printk. */
53void bcm43xx_printk_dump(const char *data,
54 size_t size,
55 const char *description);
56/* Debug helper: Dump bitwise binary data through printk. */
57void bcm43xx_printk_bitdump(const unsigned char *data,
58 size_t bytes, int msb_to_lsb,
59 const char *description);
60#define bcm43xx_printk_bitdumpt(pointer, msb_to_lsb, description) \
61 do { \
62 bcm43xx_printk_bitdump((const unsigned char *)(pointer), \
63 sizeof(*(pointer)), \
64 (msb_to_lsb), \
65 (description)); \
66 } while (0)
67
68#else /* CONFIG_BCM43XX_DEBUG*/
69
70static inline
71void bcm43xx_debugfs_init(void) { }
72static inline
73void bcm43xx_debugfs_exit(void) { }
74static inline
75void bcm43xx_debugfs_add_device(struct bcm43xx_private *bcm) { }
76static inline
77void bcm43xx_debugfs_remove_device(struct bcm43xx_private *bcm) { }
78static inline
79void bcm43xx_debugfs_log_txstat(struct bcm43xx_private *bcm,
80 struct bcm43xx_xmitstatus *status) { }
81
82static inline
83void bcm43xx_printk_dump(const char *data,
84 size_t size,
85 const char *description)
86{
87}
88static inline
89void bcm43xx_printk_bitdump(const unsigned char *data,
90 size_t bytes, int msb_to_lsb,
91 const char *description)
92{
93}
94#define bcm43xx_printk_bitdumpt(pointer, msb_to_lsb, description) do { /* nothing */ } while (0)
95
96#endif /* CONFIG_BCM43XX_DEBUG*/
97
98/* Ugly helper macros to make incomplete code more verbose on runtime */
99#ifdef TODO
100# undef TODO
101#endif
102#define TODO() \
103 do { \
104 printk(KERN_INFO PFX "TODO: Incomplete code in %s() at %s:%d\n", \
105 __FUNCTION__, __FILE__, __LINE__); \
106 } while (0)
107
108#ifdef FIXME
109# undef FIXME
110#endif
111#define FIXME() \
112 do { \
113 printk(KERN_INFO PFX "FIXME: Possibly broken code in %s() at %s:%d\n", \
114 __FUNCTION__, __FILE__, __LINE__); \
115 } while (0)
116
117#endif /* BCM43xx_DEBUGFS_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_dma.c b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
new file mode 100644
index 0000000000..c3681b8f09
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c
@@ -0,0 +1,968 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 DMA ringbuffer and descriptor allocation/management
6
7 Copyright (c) 2005 Michael Buesch <mbuesch@freenet.de>
8
9 Some code in this file is derived from the b44.c driver
10 Copyright (C) 2002 David S. Miller
11 Copyright (C) Pekka Pietikainen
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
27
28*/
29
30#include "bcm43xx.h"
31#include "bcm43xx_dma.h"
32#include "bcm43xx_main.h"
33#include "bcm43xx_debugfs.h"
34#include "bcm43xx_power.h"
35#include "bcm43xx_xmit.h"
36
37#include <linux/dma-mapping.h>
38#include <linux/pci.h>
39#include <linux/delay.h>
40#include <linux/skbuff.h>
41
42
43static inline int free_slots(struct bcm43xx_dmaring *ring)
44{
45 return (ring->nr_slots - ring->used_slots);
46}
47
48static inline int next_slot(struct bcm43xx_dmaring *ring, int slot)
49{
50 assert(slot >= -1 && slot <= ring->nr_slots - 1);
51 if (slot == ring->nr_slots - 1)
52 return 0;
53 return slot + 1;
54}
55
56static inline int prev_slot(struct bcm43xx_dmaring *ring, int slot)
57{
58 assert(slot >= 0 && slot <= ring->nr_slots - 1);
59 if (slot == 0)
60 return ring->nr_slots - 1;
61 return slot - 1;
62}
63
64/* Request a slot for usage. */
65static inline
66int request_slot(struct bcm43xx_dmaring *ring)
67{
68 int slot;
69
70 assert(ring->tx);
71 assert(!ring->suspended);
72 assert(free_slots(ring) != 0);
73
74 slot = next_slot(ring, ring->current_slot);
75 ring->current_slot = slot;
76 ring->used_slots++;
77
78 /* Check the number of available slots and suspend TX,
79 * if we are running low on free slots.
80 */
81 if (unlikely(free_slots(ring) < ring->suspend_mark)) {
82 netif_stop_queue(ring->bcm->net_dev);
83 ring->suspended = 1;
84 }
85#ifdef CONFIG_BCM43XX_DEBUG
86 if (ring->used_slots > ring->max_used_slots)
87 ring->max_used_slots = ring->used_slots;
88#endif /* CONFIG_BCM43XX_DEBUG*/
89
90 return slot;
91}
92
93/* Return a slot to the free slots. */
94static inline
95void return_slot(struct bcm43xx_dmaring *ring, int slot)
96{
97 assert(ring->tx);
98
99 ring->used_slots--;
100
101 /* Check if TX is suspended and check if we have
102 * enough free slots to resume it again.
103 */
104 if (unlikely(ring->suspended)) {
105 if (free_slots(ring) >= ring->resume_mark) {
106 ring->suspended = 0;
107 netif_wake_queue(ring->bcm->net_dev);
108 }
109 }
110}
111
112static inline
113dma_addr_t map_descbuffer(struct bcm43xx_dmaring *ring,
114 unsigned char *buf,
115 size_t len,
116 int tx)
117{
118 dma_addr_t dmaaddr;
119
120 if (tx) {
121 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
122 buf, len,
123 DMA_TO_DEVICE);
124 } else {
125 dmaaddr = dma_map_single(&ring->bcm->pci_dev->dev,
126 buf, len,
127 DMA_FROM_DEVICE);
128 }
129
130 return dmaaddr;
131}
132
133static inline
134void unmap_descbuffer(struct bcm43xx_dmaring *ring,
135 dma_addr_t addr,
136 size_t len,
137 int tx)
138{
139 if (tx) {
140 dma_unmap_single(&ring->bcm->pci_dev->dev,
141 addr, len,
142 DMA_TO_DEVICE);
143 } else {
144 dma_unmap_single(&ring->bcm->pci_dev->dev,
145 addr, len,
146 DMA_FROM_DEVICE);
147 }
148}
149
150static inline
151void sync_descbuffer_for_cpu(struct bcm43xx_dmaring *ring,
152 dma_addr_t addr,
153 size_t len)
154{
155 assert(!ring->tx);
156
157 dma_sync_single_for_cpu(&ring->bcm->pci_dev->dev,
158 addr, len, DMA_FROM_DEVICE);
159}
160
161static inline
162void sync_descbuffer_for_device(struct bcm43xx_dmaring *ring,
163 dma_addr_t addr,
164 size_t len)
165{
166 assert(!ring->tx);
167
168 dma_sync_single_for_device(&ring->bcm->pci_dev->dev,
169 addr, len, DMA_FROM_DEVICE);
170}
171
172/* Unmap and free a descriptor buffer. */
173static inline
174void free_descriptor_buffer(struct bcm43xx_dmaring *ring,
175 struct bcm43xx_dmadesc *desc,
176 struct bcm43xx_dmadesc_meta *meta,
177 int irq_context)
178{
179 assert(meta->skb);
180 if (irq_context)
181 dev_kfree_skb_irq(meta->skb);
182 else
183 dev_kfree_skb(meta->skb);
184 meta->skb = NULL;
185}
186
187static int alloc_ringmemory(struct bcm43xx_dmaring *ring)
188{
189 struct device *dev = &(ring->bcm->pci_dev->dev);
190
191 ring->vbase = dma_alloc_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
192 &(ring->dmabase), GFP_KERNEL);
193 if (!ring->vbase) {
194 printk(KERN_ERR PFX "DMA ringmemory allocation failed\n");
195 return -ENOMEM;
196 }
197 if (ring->dmabase + BCM43xx_DMA_RINGMEMSIZE > BCM43xx_DMA_BUSADDRMAX) {
198 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RINGMEMORY >1G "
199 "(0x%08x, len: %lu)\n",
200 ring->dmabase, BCM43xx_DMA_RINGMEMSIZE);
201 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
202 ring->vbase, ring->dmabase);
203 return -ENOMEM;
204 }
205 assert(!(ring->dmabase & 0x000003FF));
206 memset(ring->vbase, 0, BCM43xx_DMA_RINGMEMSIZE);
207
208 return 0;
209}
210
211static void free_ringmemory(struct bcm43xx_dmaring *ring)
212{
213 struct device *dev = &(ring->bcm->pci_dev->dev);
214
215 dma_free_coherent(dev, BCM43xx_DMA_RINGMEMSIZE,
216 ring->vbase, ring->dmabase);
217}
218
219/* Reset the RX DMA channel */
220int bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm,
221 u16 mmio_base)
222{
223 int i;
224 u32 value;
225
226 bcm43xx_write32(bcm,
227 mmio_base + BCM43xx_DMA_RX_CONTROL,
228 0x00000000);
229 for (i = 0; i < 1000; i++) {
230 value = bcm43xx_read32(bcm,
231 mmio_base + BCM43xx_DMA_RX_STATUS);
232 value &= BCM43xx_DMA_RXSTAT_STAT_MASK;
233 if (value == BCM43xx_DMA_RXSTAT_STAT_DISABLED) {
234 i = -1;
235 break;
236 }
237 udelay(10);
238 }
239 if (i != -1) {
240 printk(KERN_ERR PFX "Error: Wait on DMA RX status timed out.\n");
241 return -ENODEV;
242 }
243
244 return 0;
245}
246
247/* Reset the RX DMA channel */
248int bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm,
249 u16 mmio_base)
250{
251 int i;
252 u32 value;
253
254 for (i = 0; i < 1000; i++) {
255 value = bcm43xx_read32(bcm,
256 mmio_base + BCM43xx_DMA_TX_STATUS);
257 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
258 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED ||
259 value == BCM43xx_DMA_TXSTAT_STAT_IDLEWAIT ||
260 value == BCM43xx_DMA_TXSTAT_STAT_STOPPED)
261 break;
262 udelay(10);
263 }
264 bcm43xx_write32(bcm,
265 mmio_base + BCM43xx_DMA_TX_CONTROL,
266 0x00000000);
267 for (i = 0; i < 1000; i++) {
268 value = bcm43xx_read32(bcm,
269 mmio_base + BCM43xx_DMA_TX_STATUS);
270 value &= BCM43xx_DMA_TXSTAT_STAT_MASK;
271 if (value == BCM43xx_DMA_TXSTAT_STAT_DISABLED) {
272 i = -1;
273 break;
274 }
275 udelay(10);
276 }
277 if (i != -1) {
278 printk(KERN_ERR PFX "Error: Wait on DMA TX status timed out.\n");
279 return -ENODEV;
280 }
281 /* ensure the reset is completed. */
282 udelay(300);
283
284 return 0;
285}
286
287static int setup_rx_descbuffer(struct bcm43xx_dmaring *ring,
288 struct bcm43xx_dmadesc *desc,
289 struct bcm43xx_dmadesc_meta *meta,
290 gfp_t gfp_flags)
291{
292 struct bcm43xx_rxhdr *rxhdr;
293 dma_addr_t dmaaddr;
294 u32 desc_addr;
295 u32 desc_ctl;
296 const int slot = (int)(desc - ring->vbase);
297 struct sk_buff *skb;
298
299 assert(slot >= 0 && slot < ring->nr_slots);
300 assert(!ring->tx);
301
302 skb = __dev_alloc_skb(ring->rx_buffersize, gfp_flags);
303 if (unlikely(!skb))
304 return -ENOMEM;
305 dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
306 if (unlikely(dmaaddr + ring->rx_buffersize > BCM43xx_DMA_BUSADDRMAX)) {
307 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
308 dev_kfree_skb_any(skb);
309 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA RX SKB >1G "
310 "(0x%08x, len: %u)\n",
311 dmaaddr, ring->rx_buffersize);
312 return -ENOMEM;
313 }
314 meta->skb = skb;
315 meta->dmaaddr = dmaaddr;
316 skb->dev = ring->bcm->net_dev;
317 desc_addr = (u32)(dmaaddr + ring->memoffset);
318 desc_ctl = (BCM43xx_DMADTOR_BYTECNT_MASK &
319 (u32)(ring->rx_buffersize - ring->frameoffset));
320 if (slot == ring->nr_slots - 1)
321 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
322 set_desc_addr(desc, desc_addr);
323 set_desc_ctl(desc, desc_ctl);
324
325 rxhdr = (struct bcm43xx_rxhdr *)(skb->data);
326 rxhdr->frame_length = 0;
327 rxhdr->flags1 = 0;
328
329 return 0;
330}
331
332/* Allocate the initial descbuffers.
333 * This is used for an RX ring only.
334 */
335static int alloc_initial_descbuffers(struct bcm43xx_dmaring *ring)
336{
337 int i, err = -ENOMEM;
338 struct bcm43xx_dmadesc *desc;
339 struct bcm43xx_dmadesc_meta *meta;
340
341 for (i = 0; i < ring->nr_slots; i++) {
342 desc = ring->vbase + i;
343 meta = ring->meta + i;
344
345 err = setup_rx_descbuffer(ring, desc, meta, GFP_KERNEL);
346 if (err)
347 goto err_unwind;
348 }
349 ring->used_slots = ring->nr_slots;
350 err = 0;
351out:
352 return err;
353
354err_unwind:
355 for (i--; i >= 0; i--) {
356 desc = ring->vbase + i;
357 meta = ring->meta + i;
358
359 unmap_descbuffer(ring, meta->dmaaddr, ring->rx_buffersize, 0);
360 dev_kfree_skb(meta->skb);
361 }
362 goto out;
363}
364
365/* Do initial setup of the DMA controller.
366 * Reset the controller, write the ring busaddress
367 * and switch the "enable" bit on.
368 */
369static int dmacontroller_setup(struct bcm43xx_dmaring *ring)
370{
371 int err = 0;
372 u32 value;
373
374 if (ring->tx) {
375 /* Set Transmit Control register to "transmit enable" */
376 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
377 BCM43xx_DMA_TXCTRL_ENABLE);
378 /* Set Transmit Descriptor ring address. */
379 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING,
380 ring->dmabase + ring->memoffset);
381 } else {
382 err = alloc_initial_descbuffers(ring);
383 if (err)
384 goto out;
385 /* Set Receive Control "receive enable" and frame offset */
386 value = (ring->frameoffset << BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT);
387 value |= BCM43xx_DMA_RXCTRL_ENABLE;
388 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_CONTROL, value);
389 /* Set Receive Descriptor ring address. */
390 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING,
391 ring->dmabase + ring->memoffset);
392 /* Init the descriptor pointer. */
393 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX, 200);
394 }
395
396out:
397 return err;
398}
399
400/* Shutdown the DMA controller. */
401static void dmacontroller_cleanup(struct bcm43xx_dmaring *ring)
402{
403 if (ring->tx) {
404 bcm43xx_dmacontroller_tx_reset(ring->bcm, ring->mmio_base);
405 /* Zero out Transmit Descriptor ring address. */
406 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_RING, 0);
407 } else {
408 bcm43xx_dmacontroller_rx_reset(ring->bcm, ring->mmio_base);
409 /* Zero out Receive Descriptor ring address. */
410 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_RING, 0);
411 }
412}
413
414static void free_all_descbuffers(struct bcm43xx_dmaring *ring)
415{
416 struct bcm43xx_dmadesc *desc;
417 struct bcm43xx_dmadesc_meta *meta;
418 int i;
419
420 if (!ring->used_slots)
421 return;
422 for (i = 0; i < ring->nr_slots; i++) {
423 desc = ring->vbase + i;
424 meta = ring->meta + i;
425
426 if (!meta->skb) {
427 assert(ring->tx);
428 continue;
429 }
430 if (ring->tx) {
431 unmap_descbuffer(ring, meta->dmaaddr,
432 meta->skb->len, 1);
433 } else {
434 unmap_descbuffer(ring, meta->dmaaddr,
435 ring->rx_buffersize, 0);
436 }
437 free_descriptor_buffer(ring, desc, meta, 0);
438 }
439}
440
441/* Main initialization function. */
442static
443struct bcm43xx_dmaring * bcm43xx_setup_dmaring(struct bcm43xx_private *bcm,
444 u16 dma_controller_base,
445 int nr_descriptor_slots,
446 int tx)
447{
448 struct bcm43xx_dmaring *ring;
449 int err;
450
451 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
452 if (!ring)
453 goto out;
454
455 ring->meta = kzalloc(sizeof(*ring->meta) * nr_descriptor_slots,
456 GFP_KERNEL);
457 if (!ring->meta)
458 goto err_kfree_ring;
459
460 ring->memoffset = BCM43xx_DMA_DMABUSADDROFFSET;
461#ifdef CONFIG_BCM947XX
462 if (bcm->pci_dev->bus->number == 0)
463 ring->memoffset = 0;
464#endif
465
466 ring->bcm = bcm;
467 ring->nr_slots = nr_descriptor_slots;
468 ring->suspend_mark = ring->nr_slots * BCM43xx_TXSUSPEND_PERCENT / 100;
469 ring->resume_mark = ring->nr_slots * BCM43xx_TXRESUME_PERCENT / 100;
470 assert(ring->suspend_mark < ring->resume_mark);
471 ring->mmio_base = dma_controller_base;
472 if (tx) {
473 ring->tx = 1;
474 ring->current_slot = -1;
475 } else {
476 switch (dma_controller_base) {
477 case BCM43xx_MMIO_DMA1_BASE:
478 ring->rx_buffersize = BCM43xx_DMA1_RXBUFFERSIZE;
479 ring->frameoffset = BCM43xx_DMA1_RX_FRAMEOFFSET;
480 break;
481 case BCM43xx_MMIO_DMA4_BASE:
482 ring->rx_buffersize = BCM43xx_DMA4_RXBUFFERSIZE;
483 ring->frameoffset = BCM43xx_DMA4_RX_FRAMEOFFSET;
484 break;
485 default:
486 assert(0);
487 }
488 }
489
490 err = alloc_ringmemory(ring);
491 if (err)
492 goto err_kfree_meta;
493 err = dmacontroller_setup(ring);
494 if (err)
495 goto err_free_ringmemory;
496
497out:
498 return ring;
499
500err_free_ringmemory:
501 free_ringmemory(ring);
502err_kfree_meta:
503 kfree(ring->meta);
504err_kfree_ring:
505 kfree(ring);
506 ring = NULL;
507 goto out;
508}
509
510/* Main cleanup function. */
511static void bcm43xx_destroy_dmaring(struct bcm43xx_dmaring *ring)
512{
513 if (!ring)
514 return;
515
516 dprintk(KERN_INFO PFX "DMA 0x%04x (%s) max used slots: %d/%d\n",
517 ring->mmio_base,
518 (ring->tx) ? "TX" : "RX",
519 ring->max_used_slots, ring->nr_slots);
520 /* Device IRQs are disabled prior entering this function,
521 * so no need to take care of concurrency with rx handler stuff.
522 */
523 dmacontroller_cleanup(ring);
524 free_all_descbuffers(ring);
525 free_ringmemory(ring);
526
527 kfree(ring->meta);
528 kfree(ring);
529}
530
531void bcm43xx_dma_free(struct bcm43xx_private *bcm)
532{
533 struct bcm43xx_dma *dma;
534
535 if (bcm43xx_using_pio(bcm))
536 return;
537 dma = bcm43xx_current_dma(bcm);
538
539 bcm43xx_destroy_dmaring(dma->rx_ring1);
540 dma->rx_ring1 = NULL;
541 bcm43xx_destroy_dmaring(dma->rx_ring0);
542 dma->rx_ring0 = NULL;
543 bcm43xx_destroy_dmaring(dma->tx_ring3);
544 dma->tx_ring3 = NULL;
545 bcm43xx_destroy_dmaring(dma->tx_ring2);
546 dma->tx_ring2 = NULL;
547 bcm43xx_destroy_dmaring(dma->tx_ring1);
548 dma->tx_ring1 = NULL;
549 bcm43xx_destroy_dmaring(dma->tx_ring0);
550 dma->tx_ring0 = NULL;
551}
552
553int bcm43xx_dma_init(struct bcm43xx_private *bcm)
554{
555 struct bcm43xx_dma *dma = bcm43xx_current_dma(bcm);
556 struct bcm43xx_dmaring *ring;
557 int err = -ENOMEM;
558
559 /* setup TX DMA channels. */
560 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
561 BCM43xx_TXRING_SLOTS, 1);
562 if (!ring)
563 goto out;
564 dma->tx_ring0 = ring;
565
566 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA2_BASE,
567 BCM43xx_TXRING_SLOTS, 1);
568 if (!ring)
569 goto err_destroy_tx0;
570 dma->tx_ring1 = ring;
571
572 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA3_BASE,
573 BCM43xx_TXRING_SLOTS, 1);
574 if (!ring)
575 goto err_destroy_tx1;
576 dma->tx_ring2 = ring;
577
578 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
579 BCM43xx_TXRING_SLOTS, 1);
580 if (!ring)
581 goto err_destroy_tx2;
582 dma->tx_ring3 = ring;
583
584 /* setup RX DMA channels. */
585 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA1_BASE,
586 BCM43xx_RXRING_SLOTS, 0);
587 if (!ring)
588 goto err_destroy_tx3;
589 dma->rx_ring0 = ring;
590
591 if (bcm->current_core->rev < 5) {
592 ring = bcm43xx_setup_dmaring(bcm, BCM43xx_MMIO_DMA4_BASE,
593 BCM43xx_RXRING_SLOTS, 0);
594 if (!ring)
595 goto err_destroy_rx0;
596 dma->rx_ring1 = ring;
597 }
598
599 dprintk(KERN_INFO PFX "DMA initialized\n");
600 err = 0;
601out:
602 return err;
603
604err_destroy_rx0:
605 bcm43xx_destroy_dmaring(dma->rx_ring0);
606 dma->rx_ring0 = NULL;
607err_destroy_tx3:
608 bcm43xx_destroy_dmaring(dma->tx_ring3);
609 dma->tx_ring3 = NULL;
610err_destroy_tx2:
611 bcm43xx_destroy_dmaring(dma->tx_ring2);
612 dma->tx_ring2 = NULL;
613err_destroy_tx1:
614 bcm43xx_destroy_dmaring(dma->tx_ring1);
615 dma->tx_ring1 = NULL;
616err_destroy_tx0:
617 bcm43xx_destroy_dmaring(dma->tx_ring0);
618 dma->tx_ring0 = NULL;
619 goto out;
620}
621
622/* Generate a cookie for the TX header. */
623static u16 generate_cookie(struct bcm43xx_dmaring *ring,
624 int slot)
625{
626 u16 cookie = 0x0000;
627
628 /* Use the upper 4 bits of the cookie as
629 * DMA controller ID and store the slot number
630 * in the lower 12 bits
631 */
632 switch (ring->mmio_base) {
633 default:
634 assert(0);
635 case BCM43xx_MMIO_DMA1_BASE:
636 break;
637 case BCM43xx_MMIO_DMA2_BASE:
638 cookie = 0x1000;
639 break;
640 case BCM43xx_MMIO_DMA3_BASE:
641 cookie = 0x2000;
642 break;
643 case BCM43xx_MMIO_DMA4_BASE:
644 cookie = 0x3000;
645 break;
646 }
647 assert(((u16)slot & 0xF000) == 0x0000);
648 cookie |= (u16)slot;
649
650 return cookie;
651}
652
653/* Inspect a cookie and find out to which controller/slot it belongs. */
654static
655struct bcm43xx_dmaring * parse_cookie(struct bcm43xx_private *bcm,
656 u16 cookie, int *slot)
657{
658 struct bcm43xx_dma *dma = bcm43xx_current_dma(bcm);
659 struct bcm43xx_dmaring *ring = NULL;
660
661 switch (cookie & 0xF000) {
662 case 0x0000:
663 ring = dma->tx_ring0;
664 break;
665 case 0x1000:
666 ring = dma->tx_ring1;
667 break;
668 case 0x2000:
669 ring = dma->tx_ring2;
670 break;
671 case 0x3000:
672 ring = dma->tx_ring3;
673 break;
674 default:
675 assert(0);
676 }
677 *slot = (cookie & 0x0FFF);
678 assert(*slot >= 0 && *slot < ring->nr_slots);
679
680 return ring;
681}
682
683static void dmacontroller_poke_tx(struct bcm43xx_dmaring *ring,
684 int slot)
685{
686 /* Everything is ready to start. Buffers are DMA mapped and
687 * associated with slots.
688 * "slot" is the last slot of the new frame we want to transmit.
689 * Close your seat belts now, please.
690 */
691 wmb();
692 slot = next_slot(ring, slot);
693 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_DESC_INDEX,
694 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
695}
696
697static int dma_tx_fragment(struct bcm43xx_dmaring *ring,
698 struct sk_buff *skb,
699 u8 cur_frag)
700{
701 int slot;
702 struct bcm43xx_dmadesc *desc;
703 struct bcm43xx_dmadesc_meta *meta;
704 u32 desc_ctl;
705 u32 desc_addr;
706
707 assert(skb_shinfo(skb)->nr_frags == 0);
708
709 slot = request_slot(ring);
710 desc = ring->vbase + slot;
711 meta = ring->meta + slot;
712
713 /* Add a device specific TX header. */
714 assert(skb_headroom(skb) >= sizeof(struct bcm43xx_txhdr));
715 /* Reserve enough headroom for the device tx header. */
716 __skb_push(skb, sizeof(struct bcm43xx_txhdr));
717 /* Now calculate and add the tx header.
718 * The tx header includes the PLCP header.
719 */
720 bcm43xx_generate_txhdr(ring->bcm,
721 (struct bcm43xx_txhdr *)skb->data,
722 skb->data + sizeof(struct bcm43xx_txhdr),
723 skb->len - sizeof(struct bcm43xx_txhdr),
724 (cur_frag == 0),
725 generate_cookie(ring, slot));
726
727 meta->skb = skb;
728 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
729 if (unlikely(meta->dmaaddr + skb->len > BCM43xx_DMA_BUSADDRMAX)) {
730 return_slot(ring, slot);
731 printk(KERN_ERR PFX ">>>FATAL ERROR<<< DMA TX SKB >1G "
732 "(0x%08x, len: %u)\n",
733 meta->dmaaddr, skb->len);
734 return -ENOMEM;
735 }
736
737 desc_addr = (u32)(meta->dmaaddr + ring->memoffset);
738 desc_ctl = BCM43xx_DMADTOR_FRAMESTART | BCM43xx_DMADTOR_FRAMEEND;
739 desc_ctl |= BCM43xx_DMADTOR_COMPIRQ;
740 desc_ctl |= (BCM43xx_DMADTOR_BYTECNT_MASK &
741 (u32)(meta->skb->len - ring->frameoffset));
742 if (slot == ring->nr_slots - 1)
743 desc_ctl |= BCM43xx_DMADTOR_DTABLEEND;
744
745 set_desc_ctl(desc, desc_ctl);
746 set_desc_addr(desc, desc_addr);
747 /* Now transfer the whole frame. */
748 dmacontroller_poke_tx(ring, slot);
749
750 return 0;
751}
752
753int bcm43xx_dma_tx(struct bcm43xx_private *bcm,
754 struct ieee80211_txb *txb)
755{
756 /* We just received a packet from the kernel network subsystem.
757 * Add headers and DMA map the memory. Poke
758 * the device to send the stuff.
759 * Note that this is called from atomic context.
760 */
761 struct bcm43xx_dmaring *ring = bcm43xx_current_dma(bcm)->tx_ring1;
762 u8 i;
763 struct sk_buff *skb;
764
765 assert(ring->tx);
766 if (unlikely(free_slots(ring) < txb->nr_frags)) {
767 /* The queue should be stopped,
768 * if we are low on free slots.
769 * If this ever triggers, we have to lower the suspend_mark.
770 */
771 dprintkl(KERN_ERR PFX "Out of DMA descriptor slots!\n");
772 return -ENOMEM;
773 }
774
775 for (i = 0; i < txb->nr_frags; i++) {
776 skb = txb->fragments[i];
777 /* Take skb from ieee80211_txb_free */
778 txb->fragments[i] = NULL;
779 dma_tx_fragment(ring, skb, i);
780 //TODO: handle failure of dma_tx_fragment
781 }
782 ieee80211_txb_free(txb);
783
784 return 0;
785}
786
787void bcm43xx_dma_handle_xmitstatus(struct bcm43xx_private *bcm,
788 struct bcm43xx_xmitstatus *status)
789{
790 struct bcm43xx_dmaring *ring;
791 struct bcm43xx_dmadesc *desc;
792 struct bcm43xx_dmadesc_meta *meta;
793 int is_last_fragment;
794 int slot;
795
796 ring = parse_cookie(bcm, status->cookie, &slot);
797 assert(ring);
798 assert(ring->tx);
799 assert(get_desc_ctl(ring->vbase + slot) & BCM43xx_DMADTOR_FRAMESTART);
800 while (1) {
801 assert(slot >= 0 && slot < ring->nr_slots);
802 desc = ring->vbase + slot;
803 meta = ring->meta + slot;
804
805 is_last_fragment = !!(get_desc_ctl(desc) & BCM43xx_DMADTOR_FRAMEEND);
806 unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len, 1);
807 free_descriptor_buffer(ring, desc, meta, 1);
808 /* Everything belonging to the slot is unmapped
809 * and freed, so we can return it.
810 */
811 return_slot(ring, slot);
812
813 if (is_last_fragment)
814 break;
815 slot = next_slot(ring, slot);
816 }
817 bcm->stats.last_tx = jiffies;
818}
819
820static void dma_rx(struct bcm43xx_dmaring *ring,
821 int *slot)
822{
823 struct bcm43xx_dmadesc *desc;
824 struct bcm43xx_dmadesc_meta *meta;
825 struct bcm43xx_rxhdr *rxhdr;
826 struct sk_buff *skb;
827 u16 len;
828 int err;
829 dma_addr_t dmaaddr;
830
831 desc = ring->vbase + *slot;
832 meta = ring->meta + *slot;
833
834 sync_descbuffer_for_cpu(ring, meta->dmaaddr, ring->rx_buffersize);
835 skb = meta->skb;
836
837 if (ring->mmio_base == BCM43xx_MMIO_DMA4_BASE) {
838 /* We received an xmit status. */
839 struct bcm43xx_hwxmitstatus *hw = (struct bcm43xx_hwxmitstatus *)skb->data;
840 struct bcm43xx_xmitstatus stat;
841
842 stat.cookie = le16_to_cpu(hw->cookie);
843 stat.flags = hw->flags;
844 stat.cnt1 = hw->cnt1;
845 stat.cnt2 = hw->cnt2;
846 stat.seq = le16_to_cpu(hw->seq);
847 stat.unknown = le16_to_cpu(hw->unknown);
848
849 bcm43xx_debugfs_log_txstat(ring->bcm, &stat);
850 bcm43xx_dma_handle_xmitstatus(ring->bcm, &stat);
851 /* recycle the descriptor buffer. */
852 sync_descbuffer_for_device(ring, meta->dmaaddr, ring->rx_buffersize);
853
854 return;
855 }
856 rxhdr = (struct bcm43xx_rxhdr *)skb->data;
857 len = le16_to_cpu(rxhdr->frame_length);
858 if (len == 0) {
859 int i = 0;
860
861 do {
862 udelay(2);
863 barrier();
864 len = le16_to_cpu(rxhdr->frame_length);
865 } while (len == 0 && i++ < 5);
866 if (unlikely(len == 0)) {
867 /* recycle the descriptor buffer. */
868 sync_descbuffer_for_device(ring, meta->dmaaddr,
869 ring->rx_buffersize);
870 goto drop;
871 }
872 }
873 if (unlikely(len > ring->rx_buffersize)) {
874 /* The data did not fit into one descriptor buffer
875 * and is split over multiple buffers.
876 * This should never happen, as we try to allocate buffers
877 * big enough. So simply ignore this packet.
878 */
879 int cnt = 0;
880 s32 tmp = len;
881
882 while (1) {
883 desc = ring->vbase + *slot;
884 meta = ring->meta + *slot;
885 /* recycle the descriptor buffer. */
886 sync_descbuffer_for_device(ring, meta->dmaaddr,
887 ring->rx_buffersize);
888 *slot = next_slot(ring, *slot);
889 cnt++;
890 tmp -= ring->rx_buffersize;
891 if (tmp <= 0)
892 break;
893 }
894 printkl(KERN_ERR PFX "DMA RX buffer too small "
895 "(len: %u, buffer: %u, nr-dropped: %d)\n",
896 len, ring->rx_buffersize, cnt);
897 goto drop;
898 }
899 len -= IEEE80211_FCS_LEN;
900
901 dmaaddr = meta->dmaaddr;
902 err = setup_rx_descbuffer(ring, desc, meta, GFP_ATOMIC);
903 if (unlikely(err)) {
904 dprintkl(KERN_ERR PFX "DMA RX: setup_rx_descbuffer() failed\n");
905 sync_descbuffer_for_device(ring, dmaaddr,
906 ring->rx_buffersize);
907 goto drop;
908 }
909
910 unmap_descbuffer(ring, dmaaddr, ring->rx_buffersize, 0);
911 skb_put(skb, len + ring->frameoffset);
912 skb_pull(skb, ring->frameoffset);
913
914 err = bcm43xx_rx(ring->bcm, skb, rxhdr);
915 if (err) {
916 dev_kfree_skb_irq(skb);
917 goto drop;
918 }
919
920drop:
921 return;
922}
923
924void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
925{
926 u32 status;
927 u16 descptr;
928 int slot, current_slot;
929#ifdef CONFIG_BCM43XX_DEBUG
930 int used_slots = 0;
931#endif
932
933 assert(!ring->tx);
934 status = bcm43xx_dma_read(ring, BCM43xx_DMA_RX_STATUS);
935 descptr = (status & BCM43xx_DMA_RXSTAT_DPTR_MASK);
936 current_slot = descptr / sizeof(struct bcm43xx_dmadesc);
937 assert(current_slot >= 0 && current_slot < ring->nr_slots);
938
939 slot = ring->current_slot;
940 for ( ; slot != current_slot; slot = next_slot(ring, slot)) {
941 dma_rx(ring, &slot);
942#ifdef CONFIG_BCM43XX_DEBUG
943 if (++used_slots > ring->max_used_slots)
944 ring->max_used_slots = used_slots;
945#endif
946 }
947 bcm43xx_dma_write(ring, BCM43xx_DMA_RX_DESC_INDEX,
948 (u32)(slot * sizeof(struct bcm43xx_dmadesc)));
949 ring->current_slot = slot;
950}
951
952void bcm43xx_dma_tx_suspend(struct bcm43xx_dmaring *ring)
953{
954 assert(ring->tx);
955 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, 1);
956 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
957 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
958 | BCM43xx_DMA_TXCTRL_SUSPEND);
959}
960
961void bcm43xx_dma_tx_resume(struct bcm43xx_dmaring *ring)
962{
963 assert(ring->tx);
964 bcm43xx_dma_write(ring, BCM43xx_DMA_TX_CONTROL,
965 bcm43xx_dma_read(ring, BCM43xx_DMA_TX_CONTROL)
966 & ~BCM43xx_DMA_TXCTRL_SUSPEND);
967 bcm43xx_power_saving_ctl_bits(ring->bcm, -1, -1);
968}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_dma.h b/drivers/net/wireless/bcm43xx/bcm43xx_dma.h
new file mode 100644
index 0000000000..2d520e4b02
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_dma.h
@@ -0,0 +1,218 @@
1#ifndef BCM43xx_DMA_H_
2#define BCM43xx_DMA_H_
3
4#include <linux/list.h>
5#include <linux/spinlock.h>
6#include <linux/workqueue.h>
7#include <linux/linkage.h>
8#include <asm/atomic.h>
9
10
11/* DMA-Interrupt reasons. */
12#define BCM43xx_DMAIRQ_FATALMASK ((1 << 10) | (1 << 11) | (1 << 12) \
13 | (1 << 14) | (1 << 15))
14#define BCM43xx_DMAIRQ_NONFATALMASK (1 << 13)
15#define BCM43xx_DMAIRQ_RX_DONE (1 << 16)
16
17/* DMA controller register offsets. (relative to BCM43xx_DMA#_BASE) */
18#define BCM43xx_DMA_TX_CONTROL 0x00
19#define BCM43xx_DMA_TX_DESC_RING 0x04
20#define BCM43xx_DMA_TX_DESC_INDEX 0x08
21#define BCM43xx_DMA_TX_STATUS 0x0c
22#define BCM43xx_DMA_RX_CONTROL 0x10
23#define BCM43xx_DMA_RX_DESC_RING 0x14
24#define BCM43xx_DMA_RX_DESC_INDEX 0x18
25#define BCM43xx_DMA_RX_STATUS 0x1c
26
27/* DMA controller channel control word values. */
28#define BCM43xx_DMA_TXCTRL_ENABLE (1 << 0)
29#define BCM43xx_DMA_TXCTRL_SUSPEND (1 << 1)
30#define BCM43xx_DMA_TXCTRL_LOOPBACK (1 << 2)
31#define BCM43xx_DMA_TXCTRL_FLUSH (1 << 4)
32#define BCM43xx_DMA_RXCTRL_ENABLE (1 << 0)
33#define BCM43xx_DMA_RXCTRL_FRAMEOFF_MASK 0x000000fe
34#define BCM43xx_DMA_RXCTRL_FRAMEOFF_SHIFT 1
35#define BCM43xx_DMA_RXCTRL_PIO (1 << 8)
36/* DMA controller channel status word values. */
37#define BCM43xx_DMA_TXSTAT_DPTR_MASK 0x00000fff
38#define BCM43xx_DMA_TXSTAT_STAT_MASK 0x0000f000
39#define BCM43xx_DMA_TXSTAT_STAT_DISABLED 0x00000000
40#define BCM43xx_DMA_TXSTAT_STAT_ACTIVE 0x00001000
41#define BCM43xx_DMA_TXSTAT_STAT_IDLEWAIT 0x00002000
42#define BCM43xx_DMA_TXSTAT_STAT_STOPPED 0x00003000
43#define BCM43xx_DMA_TXSTAT_STAT_SUSP 0x00004000
44#define BCM43xx_DMA_TXSTAT_ERROR_MASK 0x000f0000
45#define BCM43xx_DMA_TXSTAT_FLUSHED (1 << 20)
46#define BCM43xx_DMA_RXSTAT_DPTR_MASK 0x00000fff
47#define BCM43xx_DMA_RXSTAT_STAT_MASK 0x0000f000
48#define BCM43xx_DMA_RXSTAT_STAT_DISABLED 0x00000000
49#define BCM43xx_DMA_RXSTAT_STAT_ACTIVE 0x00001000
50#define BCM43xx_DMA_RXSTAT_STAT_IDLEWAIT 0x00002000
51#define BCM43xx_DMA_RXSTAT_STAT_RESERVED 0x00003000
52#define BCM43xx_DMA_RXSTAT_STAT_ERRORS 0x00004000
53#define BCM43xx_DMA_RXSTAT_ERROR_MASK 0x000f0000
54
55/* DMA descriptor control field values. */
56#define BCM43xx_DMADTOR_BYTECNT_MASK 0x00001fff
57#define BCM43xx_DMADTOR_DTABLEEND (1 << 28) /* End of descriptor table */
58#define BCM43xx_DMADTOR_COMPIRQ (1 << 29) /* IRQ on completion request */
59#define BCM43xx_DMADTOR_FRAMEEND (1 << 30)
60#define BCM43xx_DMADTOR_FRAMESTART (1 << 31)
61
62/* Misc DMA constants */
63#define BCM43xx_DMA_RINGMEMSIZE PAGE_SIZE
64#define BCM43xx_DMA_BUSADDRMAX 0x3FFFFFFF
65#define BCM43xx_DMA_DMABUSADDROFFSET (1 << 30)
66#define BCM43xx_DMA1_RX_FRAMEOFFSET 30
67#define BCM43xx_DMA4_RX_FRAMEOFFSET 0
68
69/* DMA engine tuning knobs */
70#define BCM43xx_TXRING_SLOTS 512
71#define BCM43xx_RXRING_SLOTS 64
72#define BCM43xx_DMA1_RXBUFFERSIZE (2304 + 100)
73#define BCM43xx_DMA4_RXBUFFERSIZE 16
74/* Suspend the tx queue, if less than this percent slots are free. */
75#define BCM43xx_TXSUSPEND_PERCENT 20
76/* Resume the tx queue, if more than this percent slots are free. */
77#define BCM43xx_TXRESUME_PERCENT 50
78
79
80
81#ifdef CONFIG_BCM43XX_DMA
82
83
84struct sk_buff;
85struct bcm43xx_private;
86struct bcm43xx_xmitstatus;
87
88
89struct bcm43xx_dmadesc {
90 __le32 _control;
91 __le32 _address;
92} __attribute__((__packed__));
93
94/* Macros to access the bcm43xx_dmadesc struct */
95#define get_desc_ctl(desc) le32_to_cpu((desc)->_control)
96#define set_desc_ctl(desc, ctl) do { (desc)->_control = cpu_to_le32(ctl); } while (0)
97#define get_desc_addr(desc) le32_to_cpu((desc)->_address)
98#define set_desc_addr(desc, addr) do { (desc)->_address = cpu_to_le32(addr); } while (0)
99
100struct bcm43xx_dmadesc_meta {
101 /* The kernel DMA-able buffer. */
102 struct sk_buff *skb;
103 /* DMA base bus-address of the descriptor buffer. */
104 dma_addr_t dmaaddr;
105};
106
107struct bcm43xx_dmaring {
108 struct bcm43xx_private *bcm;
109 /* Kernel virtual base address of the ring memory. */
110 struct bcm43xx_dmadesc *vbase;
111 /* DMA memory offset */
112 dma_addr_t memoffset;
113 /* (Unadjusted) DMA base bus-address of the ring memory. */
114 dma_addr_t dmabase;
115 /* Meta data about all descriptors. */
116 struct bcm43xx_dmadesc_meta *meta;
117 /* Number of descriptor slots in the ring. */
118 int nr_slots;
119 /* Number of used descriptor slots. */
120 int used_slots;
121 /* Currently used slot in the ring. */
122 int current_slot;
123 /* Marks to suspend/resume the queue. */
124 int suspend_mark;
125 int resume_mark;
126 /* Frameoffset in octets. */
127 u32 frameoffset;
128 /* Descriptor buffer size. */
129 u16 rx_buffersize;
130 /* The MMIO base register of the DMA controller, this
131 * ring is posted to.
132 */
133 u16 mmio_base;
134 u8 tx:1, /* TRUE, if this is a TX ring. */
135 suspended:1; /* TRUE, if transfers are suspended on this ring. */
136#ifdef CONFIG_BCM43XX_DEBUG
137 /* Maximum number of used slots. */
138 int max_used_slots;
139#endif /* CONFIG_BCM43XX_DEBUG*/
140};
141
142
143static inline
144u32 bcm43xx_dma_read(struct bcm43xx_dmaring *ring,
145 u16 offset)
146{
147 return bcm43xx_read32(ring->bcm, ring->mmio_base + offset);
148}
149
150static inline
151void bcm43xx_dma_write(struct bcm43xx_dmaring *ring,
152 u16 offset, u32 value)
153{
154 bcm43xx_write32(ring->bcm, ring->mmio_base + offset, value);
155}
156
157
158int bcm43xx_dma_init(struct bcm43xx_private *bcm);
159void bcm43xx_dma_free(struct bcm43xx_private *bcm);
160
161int bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm,
162 u16 dmacontroller_mmio_base);
163int bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm,
164 u16 dmacontroller_mmio_base);
165
166void bcm43xx_dma_tx_suspend(struct bcm43xx_dmaring *ring);
167void bcm43xx_dma_tx_resume(struct bcm43xx_dmaring *ring);
168
169void bcm43xx_dma_handle_xmitstatus(struct bcm43xx_private *bcm,
170 struct bcm43xx_xmitstatus *status);
171
172int bcm43xx_dma_tx(struct bcm43xx_private *bcm,
173 struct ieee80211_txb *txb);
174void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring);
175
176
177#else /* CONFIG_BCM43XX_DMA */
178
179
180static inline
181int bcm43xx_dma_init(struct bcm43xx_private *bcm)
182{
183 return 0;
184}
185static inline
186void bcm43xx_dma_free(struct bcm43xx_private *bcm)
187{
188}
189static inline
190int bcm43xx_dmacontroller_rx_reset(struct bcm43xx_private *bcm,
191 u16 dmacontroller_mmio_base)
192{
193 return 0;
194}
195static inline
196int bcm43xx_dmacontroller_tx_reset(struct bcm43xx_private *bcm,
197 u16 dmacontroller_mmio_base)
198{
199 return 0;
200}
201static inline
202int bcm43xx_dma_tx(struct bcm43xx_private *bcm,
203 struct ieee80211_txb *txb)
204{
205 return 0;
206}
207static inline
208void bcm43xx_dma_handle_xmitstatus(struct bcm43xx_private *bcm,
209 struct bcm43xx_xmitstatus *status)
210{
211}
212static inline
213void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring)
214{
215}
216
217#endif /* CONFIG_BCM43XX_DMA */
218#endif /* BCM43xx_DMA_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.c b/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.c
new file mode 100644
index 0000000000..b3ffcf5013
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.c
@@ -0,0 +1,50 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 ethtool support
6
7 Copyright (c) 2006 Jason Lunz <lunz@falooley.org>
8
9 Some code in this file is derived from the 8139too.c driver
10 Copyright (C) 2002 Jeff Garzik
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; see the file COPYING. If not, write to
24 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
25 Boston, MA 02110-1301, USA.
26
27*/
28
29#include "bcm43xx.h"
30#include "bcm43xx_ethtool.h"
31
32#include <linux/netdevice.h>
33#include <linux/pci.h>
34#include <linux/string.h>
35#include <linux/version.h>
36
37
38static void bcm43xx_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
39{
40 struct bcm43xx_private *bcm = bcm43xx_priv(dev);
41
42 strncpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
43 strncpy(info->version, UTS_RELEASE, sizeof(info->version));
44 strncpy(info->bus_info, pci_name(bcm->pci_dev), ETHTOOL_BUSINFO_LEN);
45}
46
47struct ethtool_ops bcm43xx_ethtool_ops = {
48 .get_drvinfo = bcm43xx_get_drvinfo,
49 .get_link = ethtool_op_get_link,
50};
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.h b/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.h
new file mode 100644
index 0000000000..813704991f
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_ethtool.h
@@ -0,0 +1,8 @@
1#ifndef BCM43xx_ETHTOOL_H_
2#define BCM43xx_ETHTOOL_H_
3
4#include <linux/ethtool.h>
5
6extern struct ethtool_ops bcm43xx_ethtool_ops;
7
8#endif /* BCM43xx_ETHTOOL_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_ilt.c b/drivers/net/wireless/bcm43xx/bcm43xx_ilt.c
new file mode 100644
index 0000000000..ad8e569d1f
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_ilt.c
@@ -0,0 +1,337 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; see the file COPYING. If not, write to
23 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
24 Boston, MA 02110-1301, USA.
25
26*/
27
28#include "bcm43xx.h"
29#include "bcm43xx_ilt.h"
30#include "bcm43xx_phy.h"
31
32
33/**** Initial Internal Lookup Tables ****/
34
35const u32 bcm43xx_ilt_rotor[BCM43xx_ILT_ROTOR_SIZE] = {
36 0xFEB93FFD, 0xFEC63FFD, /* 0 */
37 0xFED23FFD, 0xFEDF3FFD,
38 0xFEEC3FFE, 0xFEF83FFE,
39 0xFF053FFE, 0xFF113FFE,
40 0xFF1E3FFE, 0xFF2A3FFF, /* 8 */
41 0xFF373FFF, 0xFF443FFF,
42 0xFF503FFF, 0xFF5D3FFF,
43 0xFF693FFF, 0xFF763FFF,
44 0xFF824000, 0xFF8F4000, /* 16 */
45 0xFF9B4000, 0xFFA84000,
46 0xFFB54000, 0xFFC14000,
47 0xFFCE4000, 0xFFDA4000,
48 0xFFE74000, 0xFFF34000, /* 24 */
49 0x00004000, 0x000D4000,
50 0x00194000, 0x00264000,
51 0x00324000, 0x003F4000,
52 0x004B4000, 0x00584000, /* 32 */
53 0x00654000, 0x00714000,
54 0x007E4000, 0x008A3FFF,
55 0x00973FFF, 0x00A33FFF,
56 0x00B03FFF, 0x00BC3FFF, /* 40 */
57 0x00C93FFF, 0x00D63FFF,
58 0x00E23FFE, 0x00EF3FFE,
59 0x00FB3FFE, 0x01083FFE,
60 0x01143FFE, 0x01213FFD, /* 48 */
61 0x012E3FFD, 0x013A3FFD,
62 0x01473FFD,
63};
64
65const u32 bcm43xx_ilt_retard[BCM43xx_ILT_RETARD_SIZE] = {
66 0xDB93CB87, 0xD666CF64, /* 0 */
67 0xD1FDD358, 0xCDA6D826,
68 0xCA38DD9F, 0xC729E2B4,
69 0xC469E88E, 0xC26AEE2B,
70 0xC0DEF46C, 0xC073FA62, /* 8 */
71 0xC01D00D5, 0xC0760743,
72 0xC1560D1E, 0xC2E51369,
73 0xC4ED18FF, 0xC7AC1ED7,
74 0xCB2823B2, 0xCEFA28D9, /* 16 */
75 0xD2F62D3F, 0xD7BB3197,
76 0xDCE53568, 0xE1FE3875,
77 0xE7D13B35, 0xED663D35,
78 0xF39B3EC4, 0xF98E3FA7, /* 24 */
79 0x00004000, 0x06723FA7,
80 0x0C653EC4, 0x129A3D35,
81 0x182F3B35, 0x1E023875,
82 0x231B3568, 0x28453197, /* 32 */
83 0x2D0A2D3F, 0x310628D9,
84 0x34D823B2, 0x38541ED7,
85 0x3B1318FF, 0x3D1B1369,
86 0x3EAA0D1E, 0x3F8A0743, /* 40 */
87 0x3FE300D5, 0x3F8DFA62,
88 0x3F22F46C, 0x3D96EE2B,
89 0x3B97E88E, 0x38D7E2B4,
90 0x35C8DD9F, 0x325AD826, /* 48 */
91 0x2E03D358, 0x299ACF64,
92 0x246DCB87,
93};
94
95const u16 bcm43xx_ilt_finefreqa[BCM43xx_ILT_FINEFREQA_SIZE] = {
96 0x0082, 0x0082, 0x0102, 0x0182, /* 0 */
97 0x0202, 0x0282, 0x0302, 0x0382,
98 0x0402, 0x0482, 0x0502, 0x0582,
99 0x05E2, 0x0662, 0x06E2, 0x0762,
100 0x07E2, 0x0842, 0x08C2, 0x0942, /* 16 */
101 0x09C2, 0x0A22, 0x0AA2, 0x0B02,
102 0x0B82, 0x0BE2, 0x0C62, 0x0CC2,
103 0x0D42, 0x0DA2, 0x0E02, 0x0E62,
104 0x0EE2, 0x0F42, 0x0FA2, 0x1002, /* 32 */
105 0x1062, 0x10C2, 0x1122, 0x1182,
106 0x11E2, 0x1242, 0x12A2, 0x12E2,
107 0x1342, 0x13A2, 0x1402, 0x1442,
108 0x14A2, 0x14E2, 0x1542, 0x1582, /* 48 */
109 0x15E2, 0x1622, 0x1662, 0x16C1,
110 0x1701, 0x1741, 0x1781, 0x17E1,
111 0x1821, 0x1861, 0x18A1, 0x18E1,
112 0x1921, 0x1961, 0x19A1, 0x19E1, /* 64 */
113 0x1A21, 0x1A61, 0x1AA1, 0x1AC1,
114 0x1B01, 0x1B41, 0x1B81, 0x1BA1,
115 0x1BE1, 0x1C21, 0x1C41, 0x1C81,
116 0x1CA1, 0x1CE1, 0x1D01, 0x1D41, /* 80 */
117 0x1D61, 0x1DA1, 0x1DC1, 0x1E01,
118 0x1E21, 0x1E61, 0x1E81, 0x1EA1,
119 0x1EE1, 0x1F01, 0x1F21, 0x1F41,
120 0x1F81, 0x1FA1, 0x1FC1, 0x1FE1, /* 96 */
121 0x2001, 0x2041, 0x2061, 0x2081,
122 0x20A1, 0x20C1, 0x20E1, 0x2101,
123 0x2121, 0x2141, 0x2161, 0x2181,
124 0x21A1, 0x21C1, 0x21E1, 0x2201, /* 112 */
125 0x2221, 0x2241, 0x2261, 0x2281,
126 0x22A1, 0x22C1, 0x22C1, 0x22E1,
127 0x2301, 0x2321, 0x2341, 0x2361,
128 0x2361, 0x2381, 0x23A1, 0x23C1, /* 128 */
129 0x23E1, 0x23E1, 0x2401, 0x2421,
130 0x2441, 0x2441, 0x2461, 0x2481,
131 0x2481, 0x24A1, 0x24C1, 0x24C1,
132 0x24E1, 0x2501, 0x2501, 0x2521, /* 144 */
133 0x2541, 0x2541, 0x2561, 0x2561,
134 0x2581, 0x25A1, 0x25A1, 0x25C1,
135 0x25C1, 0x25E1, 0x2601, 0x2601,
136 0x2621, 0x2621, 0x2641, 0x2641, /* 160 */
137 0x2661, 0x2661, 0x2681, 0x2681,
138 0x26A1, 0x26A1, 0x26C1, 0x26C1,
139 0x26E1, 0x26E1, 0x2701, 0x2701,
140 0x2721, 0x2721, 0x2740, 0x2740, /* 176 */
141 0x2760, 0x2760, 0x2780, 0x2780,
142 0x2780, 0x27A0, 0x27A0, 0x27C0,
143 0x27C0, 0x27E0, 0x27E0, 0x27E0,
144 0x2800, 0x2800, 0x2820, 0x2820, /* 192 */
145 0x2820, 0x2840, 0x2840, 0x2840,
146 0x2860, 0x2860, 0x2880, 0x2880,
147 0x2880, 0x28A0, 0x28A0, 0x28A0,
148 0x28C0, 0x28C0, 0x28C0, 0x28E0, /* 208 */
149 0x28E0, 0x28E0, 0x2900, 0x2900,
150 0x2900, 0x2920, 0x2920, 0x2920,
151 0x2940, 0x2940, 0x2940, 0x2960,
152 0x2960, 0x2960, 0x2960, 0x2980, /* 224 */
153 0x2980, 0x2980, 0x29A0, 0x29A0,
154 0x29A0, 0x29A0, 0x29C0, 0x29C0,
155 0x29C0, 0x29E0, 0x29E0, 0x29E0,
156 0x29E0, 0x2A00, 0x2A00, 0x2A00, /* 240 */
157 0x2A00, 0x2A20, 0x2A20, 0x2A20,
158 0x2A20, 0x2A40, 0x2A40, 0x2A40,
159 0x2A40, 0x2A60, 0x2A60, 0x2A60,
160};
161
162const u16 bcm43xx_ilt_finefreqg[BCM43xx_ILT_FINEFREQG_SIZE] = {
163 0x0089, 0x02E9, 0x0409, 0x04E9, /* 0 */
164 0x05A9, 0x0669, 0x0709, 0x0789,
165 0x0829, 0x08A9, 0x0929, 0x0989,
166 0x0A09, 0x0A69, 0x0AC9, 0x0B29,
167 0x0BA9, 0x0BE9, 0x0C49, 0x0CA9, /* 16 */
168 0x0D09, 0x0D69, 0x0DA9, 0x0E09,
169 0x0E69, 0x0EA9, 0x0F09, 0x0F49,
170 0x0FA9, 0x0FE9, 0x1029, 0x1089,
171 0x10C9, 0x1109, 0x1169, 0x11A9, /* 32 */
172 0x11E9, 0x1229, 0x1289, 0x12C9,
173 0x1309, 0x1349, 0x1389, 0x13C9,
174 0x1409, 0x1449, 0x14A9, 0x14E9,
175 0x1529, 0x1569, 0x15A9, 0x15E9, /* 48 */
176 0x1629, 0x1669, 0x16A9, 0x16E8,
177 0x1728, 0x1768, 0x17A8, 0x17E8,
178 0x1828, 0x1868, 0x18A8, 0x18E8,
179 0x1928, 0x1968, 0x19A8, 0x19E8, /* 64 */
180 0x1A28, 0x1A68, 0x1AA8, 0x1AE8,
181 0x1B28, 0x1B68, 0x1BA8, 0x1BE8,
182 0x1C28, 0x1C68, 0x1CA8, 0x1CE8,
183 0x1D28, 0x1D68, 0x1DC8, 0x1E08, /* 80 */
184 0x1E48, 0x1E88, 0x1EC8, 0x1F08,
185 0x1F48, 0x1F88, 0x1FE8, 0x2028,
186 0x2068, 0x20A8, 0x2108, 0x2148,
187 0x2188, 0x21C8, 0x2228, 0x2268, /* 96 */
188 0x22C8, 0x2308, 0x2348, 0x23A8,
189 0x23E8, 0x2448, 0x24A8, 0x24E8,
190 0x2548, 0x25A8, 0x2608, 0x2668,
191 0x26C8, 0x2728, 0x2787, 0x27E7, /* 112 */
192 0x2847, 0x28C7, 0x2947, 0x29A7,
193 0x2A27, 0x2AC7, 0x2B47, 0x2BE7,
194 0x2CA7, 0x2D67, 0x2E47, 0x2F67,
195 0x3247, 0x3526, 0x3646, 0x3726, /* 128 */
196 0x3806, 0x38A6, 0x3946, 0x39E6,
197 0x3A66, 0x3AE6, 0x3B66, 0x3BC6,
198 0x3C45, 0x3CA5, 0x3D05, 0x3D85,
199 0x3DE5, 0x3E45, 0x3EA5, 0x3EE5, /* 144 */
200 0x3F45, 0x3FA5, 0x4005, 0x4045,
201 0x40A5, 0x40E5, 0x4145, 0x4185,
202 0x41E5, 0x4225, 0x4265, 0x42C5,
203 0x4305, 0x4345, 0x43A5, 0x43E5, /* 160 */
204 0x4424, 0x4464, 0x44C4, 0x4504,
205 0x4544, 0x4584, 0x45C4, 0x4604,
206 0x4644, 0x46A4, 0x46E4, 0x4724,
207 0x4764, 0x47A4, 0x47E4, 0x4824, /* 176 */
208 0x4864, 0x48A4, 0x48E4, 0x4924,
209 0x4964, 0x49A4, 0x49E4, 0x4A24,
210 0x4A64, 0x4AA4, 0x4AE4, 0x4B23,
211 0x4B63, 0x4BA3, 0x4BE3, 0x4C23, /* 192 */
212 0x4C63, 0x4CA3, 0x4CE3, 0x4D23,
213 0x4D63, 0x4DA3, 0x4DE3, 0x4E23,
214 0x4E63, 0x4EA3, 0x4EE3, 0x4F23,
215 0x4F63, 0x4FC3, 0x5003, 0x5043, /* 208 */
216 0x5083, 0x50C3, 0x5103, 0x5143,
217 0x5183, 0x51E2, 0x5222, 0x5262,
218 0x52A2, 0x52E2, 0x5342, 0x5382,
219 0x53C2, 0x5402, 0x5462, 0x54A2, /* 224 */
220 0x5502, 0x5542, 0x55A2, 0x55E2,
221 0x5642, 0x5682, 0x56E2, 0x5722,
222 0x5782, 0x57E1, 0x5841, 0x58A1,
223 0x5901, 0x5961, 0x59C1, 0x5A21, /* 240 */
224 0x5AA1, 0x5B01, 0x5B81, 0x5BE1,
225 0x5C61, 0x5D01, 0x5D80, 0x5E20,
226 0x5EE0, 0x5FA0, 0x6080, 0x61C0,
227};
228
229const u16 bcm43xx_ilt_noisea2[BCM43xx_ILT_NOISEA2_SIZE] = {
230 0x0001, 0x0001, 0x0001, 0xFFFE,
231 0xFFFE, 0x3FFF, 0x1000, 0x0393,
232};
233
234const u16 bcm43xx_ilt_noisea3[BCM43xx_ILT_NOISEA3_SIZE] = {
235 0x4C4C, 0x4C4C, 0x4C4C, 0x2D36,
236 0x4C4C, 0x4C4C, 0x4C4C, 0x2D36,
237};
238
239const u16 bcm43xx_ilt_noiseg1[BCM43xx_ILT_NOISEG1_SIZE] = {
240 0x013C, 0x01F5, 0x031A, 0x0631,
241 0x0001, 0x0001, 0x0001, 0x0001,
242};
243
244const u16 bcm43xx_ilt_noiseg2[BCM43xx_ILT_NOISEG2_SIZE] = {
245 0x5484, 0x3C40, 0x0000, 0x0000,
246 0x0000, 0x0000, 0x0000, 0x0000,
247};
248
249const u16 bcm43xx_ilt_noisescaleg1[BCM43xx_ILT_NOISESCALEG_SIZE] = {
250 0x6C77, 0x5162, 0x3B40, 0x3335, /* 0 */
251 0x2F2D, 0x2A2A, 0x2527, 0x1F21,
252 0x1A1D, 0x1719, 0x1616, 0x1414,
253 0x1414, 0x1400, 0x1414, 0x1614,
254 0x1716, 0x1A19, 0x1F1D, 0x2521, /* 16 */
255 0x2A27, 0x2F2A, 0x332D, 0x3B35,
256 0x5140, 0x6C62, 0x0077,
257};
258
259const u16 bcm43xx_ilt_noisescaleg2[BCM43xx_ILT_NOISESCALEG_SIZE] = {
260 0xD8DD, 0xCBD4, 0xBCC0, 0XB6B7, /* 0 */
261 0xB2B0, 0xADAD, 0xA7A9, 0x9FA1,
262 0x969B, 0x9195, 0x8F8F, 0x8A8A,
263 0x8A8A, 0x8A00, 0x8A8A, 0x8F8A,
264 0x918F, 0x9695, 0x9F9B, 0xA7A1, /* 16 */
265 0xADA9, 0xB2AD, 0xB6B0, 0xBCB7,
266 0xCBC0, 0xD8D4, 0x00DD,
267};
268
269const u16 bcm43xx_ilt_noisescaleg3[BCM43xx_ILT_NOISESCALEG_SIZE] = {
270 0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4, /* 0 */
271 0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
272 0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
273 0xA4A4, 0xA400, 0xA4A4, 0xA4A4,
274 0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4, /* 16 */
275 0xA4A4, 0xA4A4, 0xA4A4, 0xA4A4,
276 0xA4A4, 0xA4A4, 0x00A4,
277};
278
279const u16 bcm43xx_ilt_sigmasqr1[BCM43xx_ILT_SIGMASQR_SIZE] = {
280 0x007A, 0x0075, 0x0071, 0x006C, /* 0 */
281 0x0067, 0x0063, 0x005E, 0x0059,
282 0x0054, 0x0050, 0x004B, 0x0046,
283 0x0042, 0x003D, 0x003D, 0x003D,
284 0x003D, 0x003D, 0x003D, 0x003D, /* 16 */
285 0x003D, 0x003D, 0x003D, 0x003D,
286 0x003D, 0x003D, 0x0000, 0x003D,
287 0x003D, 0x003D, 0x003D, 0x003D,
288 0x003D, 0x003D, 0x003D, 0x003D, /* 32 */
289 0x003D, 0x003D, 0x003D, 0x003D,
290 0x0042, 0x0046, 0x004B, 0x0050,
291 0x0054, 0x0059, 0x005E, 0x0063,
292 0x0067, 0x006C, 0x0071, 0x0075, /* 48 */
293 0x007A,
294};
295
296const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE] = {
297 0x00DE, 0x00DC, 0x00DA, 0x00D8, /* 0 */
298 0x00D6, 0x00D4, 0x00D2, 0x00CF,
299 0x00CD, 0x00CA, 0x00C7, 0x00C4,
300 0x00C1, 0x00BE, 0x00BE, 0x00BE,
301 0x00BE, 0x00BE, 0x00BE, 0x00BE, /* 16 */
302 0x00BE, 0x00BE, 0x00BE, 0x00BE,
303 0x00BE, 0x00BE, 0x0000, 0x00BE,
304 0x00BE, 0x00BE, 0x00BE, 0x00BE,
305 0x00BE, 0x00BE, 0x00BE, 0x00BE, /* 32 */
306 0x00BE, 0x00BE, 0x00BE, 0x00BE,
307 0x00C1, 0x00C4, 0x00C7, 0x00CA,
308 0x00CD, 0x00CF, 0x00D2, 0x00D4,
309 0x00D6, 0x00D8, 0x00DA, 0x00DC, /* 48 */
310 0x00DE,
311};
312
313/**** Helper functions to access the device Internal Lookup Tables ****/
314
315void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
316{
317 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A) {
318 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
319 mmiowb();
320 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, val);
321 } else {
322 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
323 mmiowb();
324 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_DATA1, val);
325 }
326}
327
328u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset)
329{
330 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A) {
331 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, offset);
332 return bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_A_DATA1);
333 } else {
334 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_G_CTRL, offset);
335 return bcm43xx_phy_read(bcm, BCM43xx_PHY_ILT_G_DATA1);
336 }
337}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_ilt.h b/drivers/net/wireless/bcm43xx/bcm43xx_ilt.h
new file mode 100644
index 0000000000..464521abf7
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_ilt.h
@@ -0,0 +1,32 @@
1#ifndef BCM43xx_ILT_H_
2#define BCM43xx_ILT_H_
3
4#define BCM43xx_ILT_ROTOR_SIZE 53
5extern const u32 bcm43xx_ilt_rotor[BCM43xx_ILT_ROTOR_SIZE];
6#define BCM43xx_ILT_RETARD_SIZE 53
7extern const u32 bcm43xx_ilt_retard[BCM43xx_ILT_RETARD_SIZE];
8#define BCM43xx_ILT_FINEFREQA_SIZE 256
9extern const u16 bcm43xx_ilt_finefreqa[BCM43xx_ILT_FINEFREQA_SIZE];
10#define BCM43xx_ILT_FINEFREQG_SIZE 256
11extern const u16 bcm43xx_ilt_finefreqg[BCM43xx_ILT_FINEFREQG_SIZE];
12#define BCM43xx_ILT_NOISEA2_SIZE 8
13extern const u16 bcm43xx_ilt_noisea2[BCM43xx_ILT_NOISEA2_SIZE];
14#define BCM43xx_ILT_NOISEA3_SIZE 8
15extern const u16 bcm43xx_ilt_noisea3[BCM43xx_ILT_NOISEA3_SIZE];
16#define BCM43xx_ILT_NOISEG1_SIZE 8
17extern const u16 bcm43xx_ilt_noiseg1[BCM43xx_ILT_NOISEG1_SIZE];
18#define BCM43xx_ILT_NOISEG2_SIZE 8
19extern const u16 bcm43xx_ilt_noiseg2[BCM43xx_ILT_NOISEG2_SIZE];
20#define BCM43xx_ILT_NOISESCALEG_SIZE 27
21extern const u16 bcm43xx_ilt_noisescaleg1[BCM43xx_ILT_NOISESCALEG_SIZE];
22extern const u16 bcm43xx_ilt_noisescaleg2[BCM43xx_ILT_NOISESCALEG_SIZE];
23extern const u16 bcm43xx_ilt_noisescaleg3[BCM43xx_ILT_NOISESCALEG_SIZE];
24#define BCM43xx_ILT_SIGMASQR_SIZE 53
25extern const u16 bcm43xx_ilt_sigmasqr1[BCM43xx_ILT_SIGMASQR_SIZE];
26extern const u16 bcm43xx_ilt_sigmasqr2[BCM43xx_ILT_SIGMASQR_SIZE];
27
28
29void bcm43xx_ilt_write(struct bcm43xx_private *bcm, u16 offset, u16 val);
30u16 bcm43xx_ilt_read(struct bcm43xx_private *bcm, u16 offset);
31
32#endif /* BCM43xx_ILT_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_leds.c b/drivers/net/wireless/bcm43xx/bcm43xx_leds.c
new file mode 100644
index 0000000000..4b2c02c0b3
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_leds.c
@@ -0,0 +1,293 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; see the file COPYING. If not, write to
23 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
24 Boston, MA 02110-1301, USA.
25
26*/
27
28#include "bcm43xx_leds.h"
29#include "bcm43xx.h"
30
31#include <asm/bitops.h>
32
33
34static void bcm43xx_led_changestate(struct bcm43xx_led *led)
35{
36 struct bcm43xx_private *bcm = led->bcm;
37 const int index = bcm43xx_led_index(led);
38 const u16 mask = (1 << index);
39 u16 ledctl;
40
41 assert(index >= 0 && index < BCM43xx_NR_LEDS);
42 assert(led->blink_interval);
43 ledctl = bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_CONTROL);
44 ledctl = (ledctl & mask) ? (ledctl & ~mask) : (ledctl | mask);
45 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_CONTROL, ledctl);
46}
47
48static void bcm43xx_led_blink(unsigned long d)
49{
50 struct bcm43xx_led *led = (struct bcm43xx_led *)d;
51 struct bcm43xx_private *bcm = led->bcm;
52 unsigned long flags;
53
54 bcm43xx_lock_mmio(bcm, flags);
55 if (led->blink_interval) {
56 bcm43xx_led_changestate(led);
57 mod_timer(&led->blink_timer, jiffies + led->blink_interval);
58 }
59 bcm43xx_unlock_mmio(bcm, flags);
60}
61
62static void bcm43xx_led_blink_start(struct bcm43xx_led *led,
63 unsigned long interval)
64{
65 if (led->blink_interval)
66 return;
67 led->blink_interval = interval;
68 bcm43xx_led_changestate(led);
69 led->blink_timer.expires = jiffies + interval;
70 add_timer(&led->blink_timer);
71}
72
73static void bcm43xx_led_blink_stop(struct bcm43xx_led *led, int sync)
74{
75 struct bcm43xx_private *bcm = led->bcm;
76 const int index = bcm43xx_led_index(led);
77 u16 ledctl;
78
79 if (!led->blink_interval)
80 return;
81 if (unlikely(sync))
82 del_timer_sync(&led->blink_timer);
83 else
84 del_timer(&led->blink_timer);
85 led->blink_interval = 0;
86
87 /* Make sure the LED is turned off. */
88 assert(index >= 0 && index < BCM43xx_NR_LEDS);
89 ledctl = bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_CONTROL);
90 if (led->activelow)
91 ledctl |= (1 << index);
92 else
93 ledctl &= ~(1 << index);
94 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_CONTROL, ledctl);
95}
96
97static void bcm43xx_led_init_hardcoded(struct bcm43xx_private *bcm,
98 struct bcm43xx_led *led,
99 int led_index)
100{
101 /* This function is called, if the behaviour (and activelow)
102 * information for a LED is missing in the SPROM.
103 * We hardcode the behaviour values for various devices here.
104 * Note that the BCM43xx_LED_TEST_XXX behaviour values can
105 * be used to figure out which led is mapped to which index.
106 */
107
108 switch (led_index) {
109 case 0:
110 led->behaviour = BCM43xx_LED_ACTIVITY;
111 if (bcm->board_vendor == PCI_VENDOR_ID_COMPAQ)
112 led->behaviour = BCM43xx_LED_RADIO_ALL;
113 break;
114 case 1:
115 led->behaviour = BCM43xx_LED_RADIO_B;
116 if (bcm->board_vendor == PCI_VENDOR_ID_ASUSTEK)
117 led->behaviour = BCM43xx_LED_ASSOC;
118 break;
119 case 2:
120 led->behaviour = BCM43xx_LED_RADIO_A;
121 break;
122 case 3:
123 led->behaviour = BCM43xx_LED_OFF;
124 break;
125 default:
126 assert(0);
127 }
128}
129
130int bcm43xx_leds_init(struct bcm43xx_private *bcm)
131{
132 struct bcm43xx_led *led;
133 u8 sprom[4];
134 int i;
135
136 sprom[0] = bcm->sprom.wl0gpio0;
137 sprom[1] = bcm->sprom.wl0gpio1;
138 sprom[2] = bcm->sprom.wl0gpio2;
139 sprom[3] = bcm->sprom.wl0gpio3;
140
141 for (i = 0; i < BCM43xx_NR_LEDS; i++) {
142 led = &(bcm->leds[i]);
143 led->bcm = bcm;
144 setup_timer(&led->blink_timer,
145 bcm43xx_led_blink,
146 (unsigned long)led);
147
148 if (sprom[i] == 0xFF) {
149 bcm43xx_led_init_hardcoded(bcm, led, i);
150 } else {
151 led->behaviour = sprom[i] & BCM43xx_LED_BEHAVIOUR;
152 led->activelow = !!(sprom[i] & BCM43xx_LED_ACTIVELOW);
153 }
154 }
155
156 return 0;
157}
158
159void bcm43xx_leds_exit(struct bcm43xx_private *bcm)
160{
161 struct bcm43xx_led *led;
162 int i;
163
164 for (i = 0; i < BCM43xx_NR_LEDS; i++) {
165 led = &(bcm->leds[i]);
166 bcm43xx_led_blink_stop(led, 1);
167 }
168 bcm43xx_leds_switch_all(bcm, 0);
169}
170
171void bcm43xx_leds_update(struct bcm43xx_private *bcm, int activity)
172{
173 struct bcm43xx_led *led;
174 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
175 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
176 const int transferring = (jiffies - bcm->stats.last_tx) < BCM43xx_LED_XFER_THRES;
177 int i, turn_on;
178 unsigned long interval = 0;
179 u16 ledctl;
180
181 ledctl = bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_CONTROL);
182 for (i = 0; i < BCM43xx_NR_LEDS; i++) {
183 led = &(bcm->leds[i]);
184
185 turn_on = 0;
186 switch (led->behaviour) {
187 case BCM43xx_LED_INACTIVE:
188 continue;
189 case BCM43xx_LED_OFF:
190 break;
191 case BCM43xx_LED_ON:
192 turn_on = 1;
193 break;
194 case BCM43xx_LED_ACTIVITY:
195 turn_on = activity;
196 break;
197 case BCM43xx_LED_RADIO_ALL:
198 turn_on = radio->enabled;
199 break;
200 case BCM43xx_LED_RADIO_A:
201 turn_on = (radio->enabled && phy->type == BCM43xx_PHYTYPE_A);
202 break;
203 case BCM43xx_LED_RADIO_B:
204 turn_on = (radio->enabled &&
205 (phy->type == BCM43xx_PHYTYPE_B ||
206 phy->type == BCM43xx_PHYTYPE_G));
207 break;
208 case BCM43xx_LED_MODE_BG:
209 if (phy->type == BCM43xx_PHYTYPE_G &&
210 1/*FIXME: using G rates.*/)
211 turn_on = 1;
212 break;
213 case BCM43xx_LED_TRANSFER:
214 if (transferring)
215 bcm43xx_led_blink_start(led, BCM43xx_LEDBLINK_MEDIUM);
216 else
217 bcm43xx_led_blink_stop(led, 0);
218 continue;
219 case BCM43xx_LED_APTRANSFER:
220 if (bcm->ieee->iw_mode == IW_MODE_MASTER) {
221 if (transferring) {
222 interval = BCM43xx_LEDBLINK_FAST;
223 turn_on = 1;
224 }
225 } else {
226 turn_on = 1;
227 if (0/*TODO: not assoc*/)
228 interval = BCM43xx_LEDBLINK_SLOW;
229 else if (transferring)
230 interval = BCM43xx_LEDBLINK_FAST;
231 else
232 turn_on = 0;
233 }
234 if (turn_on)
235 bcm43xx_led_blink_start(led, interval);
236 else
237 bcm43xx_led_blink_stop(led, 0);
238 continue;
239 case BCM43xx_LED_WEIRD:
240 //TODO
241 break;
242 case BCM43xx_LED_ASSOC:
243 if (bcm->softmac->associated)
244 turn_on = 1;
245 break;
246#ifdef CONFIG_BCM43XX_DEBUG
247 case BCM43xx_LED_TEST_BLINKSLOW:
248 bcm43xx_led_blink_start(led, BCM43xx_LEDBLINK_SLOW);
249 continue;
250 case BCM43xx_LED_TEST_BLINKMEDIUM:
251 bcm43xx_led_blink_start(led, BCM43xx_LEDBLINK_MEDIUM);
252 continue;
253 case BCM43xx_LED_TEST_BLINKFAST:
254 bcm43xx_led_blink_start(led, BCM43xx_LEDBLINK_FAST);
255 continue;
256#endif /* CONFIG_BCM43XX_DEBUG */
257 default:
258 assert(0);
259 };
260
261 if (led->activelow)
262 turn_on = !turn_on;
263 if (turn_on)
264 ledctl |= (1 << i);
265 else
266 ledctl &= ~(1 << i);
267 }
268 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_CONTROL, ledctl);
269}
270
271void bcm43xx_leds_switch_all(struct bcm43xx_private *bcm, int on)
272{
273 struct bcm43xx_led *led;
274 u16 ledctl;
275 int i;
276 int bit_on;
277
278 ledctl = bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_CONTROL);
279 for (i = 0; i < BCM43xx_NR_LEDS; i++) {
280 led = &(bcm->leds[i]);
281 if (led->behaviour == BCM43xx_LED_INACTIVE)
282 continue;
283 if (on)
284 bit_on = led->activelow ? 0 : 1;
285 else
286 bit_on = led->activelow ? 1 : 0;
287 if (bit_on)
288 ledctl |= (1 << i);
289 else
290 ledctl &= ~(1 << i);
291 }
292 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_CONTROL, ledctl);
293}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_leds.h b/drivers/net/wireless/bcm43xx/bcm43xx_leds.h
new file mode 100644
index 0000000000..d3716cf3ae
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_leds.h
@@ -0,0 +1,56 @@
1#ifndef BCM43xx_LEDS_H_
2#define BCM43xx_LEDS_H_
3
4#include <linux/types.h>
5#include <linux/timer.h>
6
7
8struct bcm43xx_led {
9 u8 behaviour:7;
10 u8 activelow:1;
11
12 struct bcm43xx_private *bcm;
13 struct timer_list blink_timer;
14 unsigned long blink_interval;
15};
16#define bcm43xx_led_index(led) ((int)((led) - (led)->bcm->leds))
17
18/* Delay between state changes when blinking in jiffies */
19#define BCM43xx_LEDBLINK_SLOW (HZ / 1)
20#define BCM43xx_LEDBLINK_MEDIUM (HZ / 4)
21#define BCM43xx_LEDBLINK_FAST (HZ / 8)
22
23#define BCM43xx_LED_XFER_THRES (HZ / 100)
24
25#define BCM43xx_LED_BEHAVIOUR 0x7F
26#define BCM43xx_LED_ACTIVELOW 0x80
27enum { /* LED behaviour values */
28 BCM43xx_LED_OFF,
29 BCM43xx_LED_ON,
30 BCM43xx_LED_ACTIVITY,
31 BCM43xx_LED_RADIO_ALL,
32 BCM43xx_LED_RADIO_A,
33 BCM43xx_LED_RADIO_B,
34 BCM43xx_LED_MODE_BG,
35 BCM43xx_LED_TRANSFER,
36 BCM43xx_LED_APTRANSFER,
37 BCM43xx_LED_WEIRD,//FIXME
38 BCM43xx_LED_ASSOC,
39 BCM43xx_LED_INACTIVE,
40
41 /* Behaviour values for testing.
42 * With these values it is easier to figure out
43 * the real behaviour of leds, in case the SPROM
44 * is missing information.
45 */
46 BCM43xx_LED_TEST_BLINKSLOW,
47 BCM43xx_LED_TEST_BLINKMEDIUM,
48 BCM43xx_LED_TEST_BLINKFAST,
49};
50
51int bcm43xx_leds_init(struct bcm43xx_private *bcm);
52void bcm43xx_leds_exit(struct bcm43xx_private *bcm);
53void bcm43xx_leds_update(struct bcm43xx_private *bcm, int activity);
54void bcm43xx_leds_switch_all(struct bcm43xx_private *bcm, int on);
55
56#endif /* BCM43xx_LEDS_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
new file mode 100644
index 0000000000..c37371fc9e
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
@@ -0,0 +1,3973 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/delay.h>
32#include <linux/init.h>
33#include <linux/moduleparam.h>
34#include <linux/if_arp.h>
35#include <linux/etherdevice.h>
36#include <linux/version.h>
37#include <linux/firmware.h>
38#include <linux/wireless.h>
39#include <linux/workqueue.h>
40#include <linux/skbuff.h>
41#include <linux/dma-mapping.h>
42#include <net/iw_handler.h>
43
44#include "bcm43xx.h"
45#include "bcm43xx_main.h"
46#include "bcm43xx_debugfs.h"
47#include "bcm43xx_radio.h"
48#include "bcm43xx_phy.h"
49#include "bcm43xx_dma.h"
50#include "bcm43xx_pio.h"
51#include "bcm43xx_power.h"
52#include "bcm43xx_wx.h"
53#include "bcm43xx_ethtool.h"
54#include "bcm43xx_xmit.h"
55
56
57MODULE_DESCRIPTION("Broadcom BCM43xx wireless driver");
58MODULE_AUTHOR("Martin Langer");
59MODULE_AUTHOR("Stefano Brivio");
60MODULE_AUTHOR("Michael Buesch");
61MODULE_LICENSE("GPL");
62
63#ifdef CONFIG_BCM947XX
64extern char *nvram_get(char *name);
65#endif
66
67#if defined(CONFIG_BCM43XX_DMA) && defined(CONFIG_BCM43XX_PIO)
68static int modparam_pio;
69module_param_named(pio, modparam_pio, int, 0444);
70MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
71#elif defined(CONFIG_BCM43XX_DMA)
72# define modparam_pio 0
73#elif defined(CONFIG_BCM43XX_PIO)
74# define modparam_pio 1
75#endif
76
77static int modparam_bad_frames_preempt;
78module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
79MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames Preemption");
80
81static int modparam_short_retry = BCM43xx_DEFAULT_SHORT_RETRY_LIMIT;
82module_param_named(short_retry, modparam_short_retry, int, 0444);
83MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
84
85static int modparam_long_retry = BCM43xx_DEFAULT_LONG_RETRY_LIMIT;
86module_param_named(long_retry, modparam_long_retry, int, 0444);
87MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
88
89static int modparam_locale = -1;
90module_param_named(locale, modparam_locale, int, 0444);
91MODULE_PARM_DESC(country, "Select LocaleCode 0-11 (For travelers)");
92
93static int modparam_noleds;
94module_param_named(noleds, modparam_noleds, int, 0444);
95MODULE_PARM_DESC(noleds, "Turn off all LED activity");
96
97#ifdef CONFIG_BCM43XX_DEBUG
98static char modparam_fwpostfix[64];
99module_param_string(fwpostfix, modparam_fwpostfix, 64, 0444);
100MODULE_PARM_DESC(fwpostfix, "Postfix for .fw files. Useful for debugging.");
101#else
102# define modparam_fwpostfix ""
103#endif /* CONFIG_BCM43XX_DEBUG*/
104
105
106/* If you want to debug with just a single device, enable this,
107 * where the string is the pci device ID (as given by the kernel's
108 * pci_name function) of the device to be used.
109 */
110//#define DEBUG_SINGLE_DEVICE_ONLY "0001:11:00.0"
111
112/* If you want to enable printing of each MMIO access, enable this. */
113//#define DEBUG_ENABLE_MMIO_PRINT
114
115/* If you want to enable printing of MMIO access within
116 * ucode/pcm upload, initvals write, enable this.
117 */
118//#define DEBUG_ENABLE_UCODE_MMIO_PRINT
119
120/* If you want to enable printing of PCI Config Space access, enable this */
121//#define DEBUG_ENABLE_PCILOG
122
123
124/* Detailed list maintained at:
125 * http://openfacts.berlios.de/index-en.phtml?title=Bcm43xxDevices
126 */
127 static struct pci_device_id bcm43xx_pci_tbl[] = {
128 /* Broadcom 4303 802.11b */
129 { PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
130 /* Broadcom 4307 802.11b */
131 { PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
132 /* Broadcom 4318 802.11b/g */
133 { PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
134 /* Broadcom 4306 802.11b/g */
135 { PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
136 /* Broadcom 4306 802.11a */
137// { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
138 /* Broadcom 4309 802.11a/b/g */
139 { PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
140 /* Broadcom 43XG 802.11b/g */
141 { PCI_VENDOR_ID_BROADCOM, 0x4325, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
142#ifdef CONFIG_BCM947XX
143 /* SB bus on BCM947xx */
144 { PCI_VENDOR_ID_BROADCOM, 0x0800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
145#endif
146 { 0 },
147};
148MODULE_DEVICE_TABLE(pci, bcm43xx_pci_tbl);
149
150static void bcm43xx_ram_write(struct bcm43xx_private *bcm, u16 offset, u32 val)
151{
152 u32 status;
153
154 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
155 if (!(status & BCM43xx_SBF_XFER_REG_BYTESWAP))
156 val = swab32(val);
157
158 bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_CONTROL, offset);
159 mmiowb();
160 bcm43xx_write32(bcm, BCM43xx_MMIO_RAM_DATA, val);
161}
162
163static inline
164void bcm43xx_shm_control_word(struct bcm43xx_private *bcm,
165 u16 routing, u16 offset)
166{
167 u32 control;
168
169 /* "offset" is the WORD offset. */
170
171 control = routing;
172 control <<= 16;
173 control |= offset;
174 bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_CONTROL, control);
175}
176
177u32 bcm43xx_shm_read32(struct bcm43xx_private *bcm,
178 u16 routing, u16 offset)
179{
180 u32 ret;
181
182 if (routing == BCM43xx_SHM_SHARED) {
183 if (offset & 0x0003) {
184 /* Unaligned access */
185 bcm43xx_shm_control_word(bcm, routing, offset >> 2);
186 ret = bcm43xx_read16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED);
187 ret <<= 16;
188 bcm43xx_shm_control_word(bcm, routing, (offset >> 2) + 1);
189 ret |= bcm43xx_read16(bcm, BCM43xx_MMIO_SHM_DATA);
190
191 return ret;
192 }
193 offset >>= 2;
194 }
195 bcm43xx_shm_control_word(bcm, routing, offset);
196 ret = bcm43xx_read32(bcm, BCM43xx_MMIO_SHM_DATA);
197
198 return ret;
199}
200
201u16 bcm43xx_shm_read16(struct bcm43xx_private *bcm,
202 u16 routing, u16 offset)
203{
204 u16 ret;
205
206 if (routing == BCM43xx_SHM_SHARED) {
207 if (offset & 0x0003) {
208 /* Unaligned access */
209 bcm43xx_shm_control_word(bcm, routing, offset >> 2);
210 ret = bcm43xx_read16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED);
211
212 return ret;
213 }
214 offset >>= 2;
215 }
216 bcm43xx_shm_control_word(bcm, routing, offset);
217 ret = bcm43xx_read16(bcm, BCM43xx_MMIO_SHM_DATA);
218
219 return ret;
220}
221
222void bcm43xx_shm_write32(struct bcm43xx_private *bcm,
223 u16 routing, u16 offset,
224 u32 value)
225{
226 if (routing == BCM43xx_SHM_SHARED) {
227 if (offset & 0x0003) {
228 /* Unaligned access */
229 bcm43xx_shm_control_word(bcm, routing, offset >> 2);
230 mmiowb();
231 bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,
232 (value >> 16) & 0xffff);
233 mmiowb();
234 bcm43xx_shm_control_word(bcm, routing, (offset >> 2) + 1);
235 mmiowb();
236 bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA,
237 value & 0xffff);
238 return;
239 }
240 offset >>= 2;
241 }
242 bcm43xx_shm_control_word(bcm, routing, offset);
243 mmiowb();
244 bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA, value);
245}
246
247void bcm43xx_shm_write16(struct bcm43xx_private *bcm,
248 u16 routing, u16 offset,
249 u16 value)
250{
251 if (routing == BCM43xx_SHM_SHARED) {
252 if (offset & 0x0003) {
253 /* Unaligned access */
254 bcm43xx_shm_control_word(bcm, routing, offset >> 2);
255 mmiowb();
256 bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA_UNALIGNED,
257 value);
258 return;
259 }
260 offset >>= 2;
261 }
262 bcm43xx_shm_control_word(bcm, routing, offset);
263 mmiowb();
264 bcm43xx_write16(bcm, BCM43xx_MMIO_SHM_DATA, value);
265}
266
267void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf)
268{
269 /* We need to be careful. As we read the TSF from multiple
270 * registers, we should take care of register overflows.
271 * In theory, the whole tsf read process should be atomic.
272 * We try to be atomic here, by restaring the read process,
273 * if any of the high registers changed (overflew).
274 */
275 if (bcm->current_core->rev >= 3) {
276 u32 low, high, high2;
277
278 do {
279 high = bcm43xx_read32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_HIGH);
280 low = bcm43xx_read32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW);
281 high2 = bcm43xx_read32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_HIGH);
282 } while (unlikely(high != high2));
283
284 *tsf = high;
285 *tsf <<= 32;
286 *tsf |= low;
287 } else {
288 u64 tmp;
289 u16 v0, v1, v2, v3;
290 u16 test1, test2, test3;
291
292 do {
293 v3 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_3);
294 v2 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_2);
295 v1 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_1);
296 v0 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_0);
297
298 test3 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_3);
299 test2 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_2);
300 test1 = bcm43xx_read16(bcm, BCM43xx_MMIO_TSF_1);
301 } while (v3 != test3 || v2 != test2 || v1 != test1);
302
303 *tsf = v3;
304 *tsf <<= 48;
305 tmp = v2;
306 tmp <<= 32;
307 *tsf |= tmp;
308 tmp = v1;
309 tmp <<= 16;
310 *tsf |= tmp;
311 *tsf |= v0;
312 }
313}
314
315void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf)
316{
317 u32 status;
318
319 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
320 status |= BCM43xx_SBF_TIME_UPDATE;
321 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
322 mmiowb();
323
324 /* Be careful with the in-progress timer.
325 * First zero out the low register, so we have a full
326 * register-overflow duration to complete the operation.
327 */
328 if (bcm->current_core->rev >= 3) {
329 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
330 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
331
332 bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, 0);
333 mmiowb();
334 bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_HIGH, hi);
335 mmiowb();
336 bcm43xx_write32(bcm, BCM43xx_MMIO_REV3PLUS_TSF_LOW, lo);
337 } else {
338 u16 v0 = (tsf & 0x000000000000FFFFULL);
339 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
340 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
341 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
342
343 bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, 0);
344 mmiowb();
345 bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_3, v3);
346 mmiowb();
347 bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_2, v2);
348 mmiowb();
349 bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_1, v1);
350 mmiowb();
351 bcm43xx_write16(bcm, BCM43xx_MMIO_TSF_0, v0);
352 }
353
354 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
355 status &= ~BCM43xx_SBF_TIME_UPDATE;
356 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
357}
358
359static
360void bcm43xx_macfilter_set(struct bcm43xx_private *bcm,
361 u16 offset,
362 const u8 *mac)
363{
364 u16 data;
365
366 offset |= 0x0020;
367 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_CONTROL, offset);
368
369 data = mac[0];
370 data |= mac[1] << 8;
371 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data);
372 data = mac[2];
373 data |= mac[3] << 8;
374 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data);
375 data = mac[4];
376 data |= mac[5] << 8;
377 bcm43xx_write16(bcm, BCM43xx_MMIO_MACFILTER_DATA, data);
378}
379
380static void bcm43xx_macfilter_clear(struct bcm43xx_private *bcm,
381 u16 offset)
382{
383 const u8 zero_addr[ETH_ALEN] = { 0 };
384
385 bcm43xx_macfilter_set(bcm, offset, zero_addr);
386}
387
388static void bcm43xx_write_mac_bssid_templates(struct bcm43xx_private *bcm)
389{
390 const u8 *mac = (const u8 *)(bcm->net_dev->dev_addr);
391 const u8 *bssid = (const u8 *)(bcm->ieee->bssid);
392 u8 mac_bssid[ETH_ALEN * 2];
393 int i;
394
395 memcpy(mac_bssid, mac, ETH_ALEN);
396 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
397
398 /* Write our MAC address and BSSID to template ram */
399 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32))
400 bcm43xx_ram_write(bcm, 0x20 + i, *((u32 *)(mac_bssid + i)));
401 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32))
402 bcm43xx_ram_write(bcm, 0x78 + i, *((u32 *)(mac_bssid + i)));
403 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32))
404 bcm43xx_ram_write(bcm, 0x478 + i, *((u32 *)(mac_bssid + i)));
405}
406
407//FIXME: Well, we should probably call them from somewhere.
408#if 0
409static void bcm43xx_set_slot_time(struct bcm43xx_private *bcm, u16 slot_time)
410{
411 /* slot_time is in usec. */
412 if (bcm43xx_current_phy(bcm)->type != BCM43xx_PHYTYPE_G)
413 return;
414 bcm43xx_write16(bcm, 0x684, 510 + slot_time);
415 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0010, slot_time);
416}
417
418static void bcm43xx_short_slot_timing_enable(struct bcm43xx_private *bcm)
419{
420 bcm43xx_set_slot_time(bcm, 9);
421}
422
423static void bcm43xx_short_slot_timing_disable(struct bcm43xx_private *bcm)
424{
425 bcm43xx_set_slot_time(bcm, 20);
426}
427#endif
428
429/* FIXME: To get the MAC-filter working, we need to implement the
430 * following functions (and rename them :)
431 */
432#if 0
433static void bcm43xx_disassociate(struct bcm43xx_private *bcm)
434{
435 bcm43xx_mac_suspend(bcm);
436 bcm43xx_macfilter_clear(bcm, BCM43xx_MACFILTER_ASSOC);
437
438 bcm43xx_ram_write(bcm, 0x0026, 0x0000);
439 bcm43xx_ram_write(bcm, 0x0028, 0x0000);
440 bcm43xx_ram_write(bcm, 0x007E, 0x0000);
441 bcm43xx_ram_write(bcm, 0x0080, 0x0000);
442 bcm43xx_ram_write(bcm, 0x047E, 0x0000);
443 bcm43xx_ram_write(bcm, 0x0480, 0x0000);
444
445 if (bcm->current_core->rev < 3) {
446 bcm43xx_write16(bcm, 0x0610, 0x8000);
447 bcm43xx_write16(bcm, 0x060E, 0x0000);
448 } else
449 bcm43xx_write32(bcm, 0x0188, 0x80000000);
450
451 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0004, 0x000003ff);
452
453 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_G &&
454 ieee80211_is_ofdm_rate(bcm->softmac->txrates.default_rate))
455 bcm43xx_short_slot_timing_enable(bcm);
456
457 bcm43xx_mac_enable(bcm);
458}
459
460static void bcm43xx_associate(struct bcm43xx_private *bcm,
461 const u8 *mac)
462{
463 memcpy(bcm->ieee->bssid, mac, ETH_ALEN);
464
465 bcm43xx_mac_suspend(bcm);
466 bcm43xx_macfilter_set(bcm, BCM43xx_MACFILTER_ASSOC, mac);
467 bcm43xx_write_mac_bssid_templates(bcm);
468 bcm43xx_mac_enable(bcm);
469}
470#endif
471
472/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
473 * Returns the _previously_ enabled IRQ mask.
474 */
475static inline u32 bcm43xx_interrupt_enable(struct bcm43xx_private *bcm, u32 mask)
476{
477 u32 old_mask;
478
479 old_mask = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK);
480 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK, old_mask | mask);
481
482 return old_mask;
483}
484
485/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
486 * Returns the _previously_ enabled IRQ mask.
487 */
488static inline u32 bcm43xx_interrupt_disable(struct bcm43xx_private *bcm, u32 mask)
489{
490 u32 old_mask;
491
492 old_mask = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK);
493 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
494
495 return old_mask;
496}
497
498/* Make sure we don't receive more data from the device. */
499static int bcm43xx_disable_interrupts_sync(struct bcm43xx_private *bcm, u32 *oldstate)
500{
501 u32 old;
502 unsigned long flags;
503
504 bcm43xx_lock_mmio(bcm, flags);
505 if (bcm43xx_is_initializing(bcm) || bcm->shutting_down) {
506 bcm43xx_unlock_mmio(bcm, flags);
507 return -EBUSY;
508 }
509 old = bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
510 tasklet_disable(&bcm->isr_tasklet);
511 bcm43xx_unlock_mmio(bcm, flags);
512 if (oldstate)
513 *oldstate = old;
514
515 return 0;
516}
517
518static int bcm43xx_read_radioinfo(struct bcm43xx_private *bcm)
519{
520 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
521 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
522 u32 radio_id;
523 u16 manufact;
524 u16 version;
525 u8 revision;
526 s8 i;
527
528 if (bcm->chip_id == 0x4317) {
529 if (bcm->chip_rev == 0x00)
530 radio_id = 0x3205017F;
531 else if (bcm->chip_rev == 0x01)
532 radio_id = 0x4205017F;
533 else
534 radio_id = 0x5205017F;
535 } else {
536 bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, BCM43xx_RADIOCTL_ID);
537 radio_id = bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_HIGH);
538 radio_id <<= 16;
539 bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, BCM43xx_RADIOCTL_ID);
540 radio_id |= bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW);
541 }
542
543 manufact = (radio_id & 0x00000FFF);
544 version = (radio_id & 0x0FFFF000) >> 12;
545 revision = (radio_id & 0xF0000000) >> 28;
546
547 dprintk(KERN_INFO PFX "Detected Radio: ID: %x (Manuf: %x Ver: %x Rev: %x)\n",
548 radio_id, manufact, version, revision);
549
550 switch (phy->type) {
551 case BCM43xx_PHYTYPE_A:
552 if ((version != 0x2060) || (revision != 1) || (manufact != 0x17f))
553 goto err_unsupported_radio;
554 break;
555 case BCM43xx_PHYTYPE_B:
556 if ((version & 0xFFF0) != 0x2050)
557 goto err_unsupported_radio;
558 break;
559 case BCM43xx_PHYTYPE_G:
560 if (version != 0x2050)
561 goto err_unsupported_radio;
562 break;
563 }
564
565 radio->manufact = manufact;
566 radio->version = version;
567 radio->revision = revision;
568
569 /* Set default attenuation values. */
570 radio->baseband_atten = bcm43xx_default_baseband_attenuation(bcm);
571 radio->radio_atten = bcm43xx_default_radio_attenuation(bcm);
572 radio->txctl1 = bcm43xx_default_txctl1(bcm);
573 radio->txctl2 = 0xFFFF;
574 if (phy->type == BCM43xx_PHYTYPE_A)
575 radio->txpower_desired = bcm->sprom.maxpower_aphy;
576 else
577 radio->txpower_desired = bcm->sprom.maxpower_bgphy;
578
579 /* Initialize the in-memory nrssi Lookup Table. */
580 for (i = 0; i < 64; i++)
581 radio->nrssi_lt[i] = i;
582
583 return 0;
584
585err_unsupported_radio:
586 printk(KERN_ERR PFX "Unsupported Radio connected to the PHY!\n");
587 return -ENODEV;
588}
589
590static const char * bcm43xx_locale_iso(u8 locale)
591{
592 /* ISO 3166-1 country codes.
593 * Note that there aren't ISO 3166-1 codes for
594 * all or locales. (Not all locales are countries)
595 */
596 switch (locale) {
597 case BCM43xx_LOCALE_WORLD:
598 case BCM43xx_LOCALE_ALL:
599 return "XX";
600 case BCM43xx_LOCALE_THAILAND:
601 return "TH";
602 case BCM43xx_LOCALE_ISRAEL:
603 return "IL";
604 case BCM43xx_LOCALE_JORDAN:
605 return "JO";
606 case BCM43xx_LOCALE_CHINA:
607 return "CN";
608 case BCM43xx_LOCALE_JAPAN:
609 case BCM43xx_LOCALE_JAPAN_HIGH:
610 return "JP";
611 case BCM43xx_LOCALE_USA_CANADA_ANZ:
612 case BCM43xx_LOCALE_USA_LOW:
613 return "US";
614 case BCM43xx_LOCALE_EUROPE:
615 return "EU";
616 case BCM43xx_LOCALE_NONE:
617 return " ";
618 }
619 assert(0);
620 return " ";
621}
622
623static const char * bcm43xx_locale_string(u8 locale)
624{
625 switch (locale) {
626 case BCM43xx_LOCALE_WORLD:
627 return "World";
628 case BCM43xx_LOCALE_THAILAND:
629 return "Thailand";
630 case BCM43xx_LOCALE_ISRAEL:
631 return "Israel";
632 case BCM43xx_LOCALE_JORDAN:
633 return "Jordan";
634 case BCM43xx_LOCALE_CHINA:
635 return "China";
636 case BCM43xx_LOCALE_JAPAN:
637 return "Japan";
638 case BCM43xx_LOCALE_USA_CANADA_ANZ:
639 return "USA/Canada/ANZ";
640 case BCM43xx_LOCALE_EUROPE:
641 return "Europe";
642 case BCM43xx_LOCALE_USA_LOW:
643 return "USAlow";
644 case BCM43xx_LOCALE_JAPAN_HIGH:
645 return "JapanHigh";
646 case BCM43xx_LOCALE_ALL:
647 return "All";
648 case BCM43xx_LOCALE_NONE:
649 return "None";
650 }
651 assert(0);
652 return "";
653}
654
655static inline u8 bcm43xx_crc8(u8 crc, u8 data)
656{
657 static const u8 t[] = {
658 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B,
659 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21,
660 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF,
661 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5,
662 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14,
663 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E,
664 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80,
665 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA,
666 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95,
667 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF,
668 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01,
669 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B,
670 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA,
671 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0,
672 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E,
673 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34,
674 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0,
675 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A,
676 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54,
677 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E,
678 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF,
679 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5,
680 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B,
681 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61,
682 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E,
683 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74,
684 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA,
685 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0,
686 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41,
687 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B,
688 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5,
689 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F,
690 };
691 return t[crc ^ data];
692}
693
694static u8 bcm43xx_sprom_crc(const u16 *sprom)
695{
696 int word;
697 u8 crc = 0xFF;
698
699 for (word = 0; word < BCM43xx_SPROM_SIZE - 1; word++) {
700 crc = bcm43xx_crc8(crc, sprom[word] & 0x00FF);
701 crc = bcm43xx_crc8(crc, (sprom[word] & 0xFF00) >> 8);
702 }
703 crc = bcm43xx_crc8(crc, sprom[BCM43xx_SPROM_VERSION] & 0x00FF);
704 crc ^= 0xFF;
705
706 return crc;
707}
708
709int bcm43xx_sprom_read(struct bcm43xx_private *bcm, u16 *sprom)
710{
711 int i;
712 u8 crc, expected_crc;
713
714 for (i = 0; i < BCM43xx_SPROM_SIZE; i++)
715 sprom[i] = bcm43xx_read16(bcm, BCM43xx_SPROM_BASE + (i * 2));
716 /* CRC-8 check. */
717 crc = bcm43xx_sprom_crc(sprom);
718 expected_crc = (sprom[BCM43xx_SPROM_VERSION] & 0xFF00) >> 8;
719 if (crc != expected_crc) {
720 printk(KERN_WARNING PFX "WARNING: Invalid SPROM checksum "
721 "(0x%02X, expected: 0x%02X)\n",
722 crc, expected_crc);
723 return -EINVAL;
724 }
725
726 return 0;
727}
728
729int bcm43xx_sprom_write(struct bcm43xx_private *bcm, const u16 *sprom)
730{
731 int i, err;
732 u8 crc, expected_crc;
733 u32 spromctl;
734
735 /* CRC-8 validation of the input data. */
736 crc = bcm43xx_sprom_crc(sprom);
737 expected_crc = (sprom[BCM43xx_SPROM_VERSION] & 0xFF00) >> 8;
738 if (crc != expected_crc) {
739 printk(KERN_ERR PFX "SPROM input data: Invalid CRC\n");
740 return -EINVAL;
741 }
742
743 printk(KERN_INFO PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
744 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCICFG_SPROMCTL, &spromctl);
745 if (err)
746 goto err_ctlreg;
747 spromctl |= 0x10; /* SPROM WRITE enable. */
748 bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl);
749 if (err)
750 goto err_ctlreg;
751 /* We must burn lots of CPU cycles here, but that does not
752 * really matter as one does not write the SPROM every other minute...
753 */
754 printk(KERN_INFO PFX "[ 0%%");
755 mdelay(500);
756 for (i = 0; i < BCM43xx_SPROM_SIZE; i++) {
757 if (i == 16)
758 printk("25%%");
759 else if (i == 32)
760 printk("50%%");
761 else if (i == 48)
762 printk("75%%");
763 else if (i % 2)
764 printk(".");
765 bcm43xx_write16(bcm, BCM43xx_SPROM_BASE + (i * 2), sprom[i]);
766 mmiowb();
767 mdelay(20);
768 }
769 spromctl &= ~0x10; /* SPROM WRITE enable. */
770 bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl);
771 if (err)
772 goto err_ctlreg;
773 mdelay(500);
774 printk("100%% ]\n");
775 printk(KERN_INFO PFX "SPROM written.\n");
776 bcm43xx_controller_restart(bcm, "SPROM update");
777
778 return 0;
779err_ctlreg:
780 printk(KERN_ERR PFX "Could not access SPROM control register.\n");
781 return -ENODEV;
782}
783
784static int bcm43xx_sprom_extract(struct bcm43xx_private *bcm)
785{
786 u16 value;
787 u16 *sprom;
788#ifdef CONFIG_BCM947XX
789 char *c;
790#endif
791
792 sprom = kzalloc(BCM43xx_SPROM_SIZE * sizeof(u16),
793 GFP_KERNEL);
794 if (!sprom) {
795 printk(KERN_ERR PFX "sprom_extract OOM\n");
796 return -ENOMEM;
797 }
798#ifdef CONFIG_BCM947XX
799 sprom[BCM43xx_SPROM_BOARDFLAGS2] = atoi(nvram_get("boardflags2"));
800 sprom[BCM43xx_SPROM_BOARDFLAGS] = atoi(nvram_get("boardflags"));
801
802 if ((c = nvram_get("il0macaddr")) != NULL)
803 e_aton(c, (char *) &(sprom[BCM43xx_SPROM_IL0MACADDR]));
804
805 if ((c = nvram_get("et1macaddr")) != NULL)
806 e_aton(c, (char *) &(sprom[BCM43xx_SPROM_ET1MACADDR]));
807
808 sprom[BCM43xx_SPROM_PA0B0] = atoi(nvram_get("pa0b0"));
809 sprom[BCM43xx_SPROM_PA0B1] = atoi(nvram_get("pa0b1"));
810 sprom[BCM43xx_SPROM_PA0B2] = atoi(nvram_get("pa0b2"));
811
812 sprom[BCM43xx_SPROM_PA1B0] = atoi(nvram_get("pa1b0"));
813 sprom[BCM43xx_SPROM_PA1B1] = atoi(nvram_get("pa1b1"));
814 sprom[BCM43xx_SPROM_PA1B2] = atoi(nvram_get("pa1b2"));
815
816 sprom[BCM43xx_SPROM_BOARDREV] = atoi(nvram_get("boardrev"));
817#else
818 bcm43xx_sprom_read(bcm, sprom);
819#endif
820
821 /* boardflags2 */
822 value = sprom[BCM43xx_SPROM_BOARDFLAGS2];
823 bcm->sprom.boardflags2 = value;
824
825 /* il0macaddr */
826 value = sprom[BCM43xx_SPROM_IL0MACADDR + 0];
827 *(((u16 *)bcm->sprom.il0macaddr) + 0) = cpu_to_be16(value);
828 value = sprom[BCM43xx_SPROM_IL0MACADDR + 1];
829 *(((u16 *)bcm->sprom.il0macaddr) + 1) = cpu_to_be16(value);
830 value = sprom[BCM43xx_SPROM_IL0MACADDR + 2];
831 *(((u16 *)bcm->sprom.il0macaddr) + 2) = cpu_to_be16(value);
832
833 /* et0macaddr */
834 value = sprom[BCM43xx_SPROM_ET0MACADDR + 0];
835 *(((u16 *)bcm->sprom.et0macaddr) + 0) = cpu_to_be16(value);
836 value = sprom[BCM43xx_SPROM_ET0MACADDR + 1];
837 *(((u16 *)bcm->sprom.et0macaddr) + 1) = cpu_to_be16(value);
838 value = sprom[BCM43xx_SPROM_ET0MACADDR + 2];
839 *(((u16 *)bcm->sprom.et0macaddr) + 2) = cpu_to_be16(value);
840
841 /* et1macaddr */
842 value = sprom[BCM43xx_SPROM_ET1MACADDR + 0];
843 *(((u16 *)bcm->sprom.et1macaddr) + 0) = cpu_to_be16(value);
844 value = sprom[BCM43xx_SPROM_ET1MACADDR + 1];
845 *(((u16 *)bcm->sprom.et1macaddr) + 1) = cpu_to_be16(value);
846 value = sprom[BCM43xx_SPROM_ET1MACADDR + 2];
847 *(((u16 *)bcm->sprom.et1macaddr) + 2) = cpu_to_be16(value);
848
849 /* ethernet phy settings */
850 value = sprom[BCM43xx_SPROM_ETHPHY];
851 bcm->sprom.et0phyaddr = (value & 0x001F);
852 bcm->sprom.et1phyaddr = (value & 0x03E0) >> 5;
853 bcm->sprom.et0mdcport = (value & (1 << 14)) >> 14;
854 bcm->sprom.et1mdcport = (value & (1 << 15)) >> 15;
855
856 /* boardrev, antennas, locale */
857 value = sprom[BCM43xx_SPROM_BOARDREV];
858 bcm->sprom.boardrev = (value & 0x00FF);
859 bcm->sprom.locale = (value & 0x0F00) >> 8;
860 bcm->sprom.antennas_aphy = (value & 0x3000) >> 12;
861 bcm->sprom.antennas_bgphy = (value & 0xC000) >> 14;
862 if (modparam_locale != -1) {
863 if (modparam_locale >= 0 && modparam_locale <= 11) {
864 bcm->sprom.locale = modparam_locale;
865 printk(KERN_WARNING PFX "Operating with modified "
866 "LocaleCode %u (%s)\n",
867 bcm->sprom.locale,
868 bcm43xx_locale_string(bcm->sprom.locale));
869 } else {
870 printk(KERN_WARNING PFX "Module parameter \"locale\" "
871 "invalid value. (0 - 11)\n");
872 }
873 }
874
875 /* pa0b* */
876 value = sprom[BCM43xx_SPROM_PA0B0];
877 bcm->sprom.pa0b0 = value;
878 value = sprom[BCM43xx_SPROM_PA0B1];
879 bcm->sprom.pa0b1 = value;
880 value = sprom[BCM43xx_SPROM_PA0B2];
881 bcm->sprom.pa0b2 = value;
882
883 /* wl0gpio* */
884 value = sprom[BCM43xx_SPROM_WL0GPIO0];
885 if (value == 0x0000)
886 value = 0xFFFF;
887 bcm->sprom.wl0gpio0 = value & 0x00FF;
888 bcm->sprom.wl0gpio1 = (value & 0xFF00) >> 8;
889 value = sprom[BCM43xx_SPROM_WL0GPIO2];
890 if (value == 0x0000)
891 value = 0xFFFF;
892 bcm->sprom.wl0gpio2 = value & 0x00FF;
893 bcm->sprom.wl0gpio3 = (value & 0xFF00) >> 8;
894
895 /* maxpower */
896 value = sprom[BCM43xx_SPROM_MAXPWR];
897 bcm->sprom.maxpower_aphy = (value & 0xFF00) >> 8;
898 bcm->sprom.maxpower_bgphy = value & 0x00FF;
899
900 /* pa1b* */
901 value = sprom[BCM43xx_SPROM_PA1B0];
902 bcm->sprom.pa1b0 = value;
903 value = sprom[BCM43xx_SPROM_PA1B1];
904 bcm->sprom.pa1b1 = value;
905 value = sprom[BCM43xx_SPROM_PA1B2];
906 bcm->sprom.pa1b2 = value;
907
908 /* idle tssi target */
909 value = sprom[BCM43xx_SPROM_IDL_TSSI_TGT];
910 bcm->sprom.idle_tssi_tgt_aphy = value & 0x00FF;
911 bcm->sprom.idle_tssi_tgt_bgphy = (value & 0xFF00) >> 8;
912
913 /* boardflags */
914 value = sprom[BCM43xx_SPROM_BOARDFLAGS];
915 if (value == 0xFFFF)
916 value = 0x0000;
917 bcm->sprom.boardflags = value;
918 /* boardflags workarounds */
919 if (bcm->board_vendor == PCI_VENDOR_ID_DELL &&
920 bcm->chip_id == 0x4301 &&
921 bcm->board_revision == 0x74)
922 bcm->sprom.boardflags |= BCM43xx_BFL_BTCOEXIST;
923 if (bcm->board_vendor == PCI_VENDOR_ID_APPLE &&
924 bcm->board_type == 0x4E &&
925 bcm->board_revision > 0x40)
926 bcm->sprom.boardflags |= BCM43xx_BFL_PACTRL;
927
928 /* antenna gain */
929 value = sprom[BCM43xx_SPROM_ANTENNA_GAIN];
930 if (value == 0x0000 || value == 0xFFFF)
931 value = 0x0202;
932 /* convert values to Q5.2 */
933 bcm->sprom.antennagain_aphy = ((value & 0xFF00) >> 8) * 4;
934 bcm->sprom.antennagain_bgphy = (value & 0x00FF) * 4;
935
936 kfree(sprom);
937
938 return 0;
939}
940
941static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
942{
943 struct ieee80211_geo geo;
944 struct ieee80211_channel *chan;
945 int have_a = 0, have_bg = 0;
946 int i;
947 u8 channel;
948 struct bcm43xx_phyinfo *phy;
949 const char *iso_country;
950
951 memset(&geo, 0, sizeof(geo));
952 for (i = 0; i < bcm->nr_80211_available; i++) {
953 phy = &(bcm->core_80211_ext[i].phy);
954 switch (phy->type) {
955 case BCM43xx_PHYTYPE_B:
956 case BCM43xx_PHYTYPE_G:
957 have_bg = 1;
958 break;
959 case BCM43xx_PHYTYPE_A:
960 have_a = 1;
961 break;
962 default:
963 assert(0);
964 }
965 }
966 iso_country = bcm43xx_locale_iso(bcm->sprom.locale);
967
968 if (have_a) {
969 for (i = 0, channel = 0; channel < 201; channel++) {
970 chan = &geo.a[i++];
971 chan->freq = bcm43xx_channel_to_freq_a(channel);
972 chan->channel = channel;
973 }
974 geo.a_channels = i;
975 }
976 if (have_bg) {
977 for (i = 0, channel = 1; channel < 15; channel++) {
978 chan = &geo.bg[i++];
979 chan->freq = bcm43xx_channel_to_freq_bg(channel);
980 chan->channel = channel;
981 }
982 geo.bg_channels = i;
983 }
984 memcpy(geo.name, iso_country, 2);
985 if (0 /*TODO: Outdoor use only */)
986 geo.name[2] = 'O';
987 else if (0 /*TODO: Indoor use only */)
988 geo.name[2] = 'I';
989 else
990 geo.name[2] = ' ';
991 geo.name[3] = '\0';
992
993 ieee80211_set_geo(bcm->ieee, &geo);
994}
995
996/* DummyTransmission function, as documented on
997 * http://bcm-specs.sipsolutions.net/DummyTransmission
998 */
999void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm)
1000{
1001 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1002 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1003 unsigned int i, max_loop;
1004 u16 value = 0;
1005 u32 buffer[5] = {
1006 0x00000000,
1007 0x0000D400,
1008 0x00000000,
1009 0x00000001,
1010 0x00000000,
1011 };
1012
1013 switch (phy->type) {
1014 case BCM43xx_PHYTYPE_A:
1015 max_loop = 0x1E;
1016 buffer[0] = 0xCC010200;
1017 break;
1018 case BCM43xx_PHYTYPE_B:
1019 case BCM43xx_PHYTYPE_G:
1020 max_loop = 0xFA;
1021 buffer[0] = 0x6E840B00;
1022 break;
1023 default:
1024 assert(0);
1025 return;
1026 }
1027
1028 for (i = 0; i < 5; i++)
1029 bcm43xx_ram_write(bcm, i * 4, buffer[i]);
1030
1031 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* dummy read */
1032
1033 bcm43xx_write16(bcm, 0x0568, 0x0000);
1034 bcm43xx_write16(bcm, 0x07C0, 0x0000);
1035 bcm43xx_write16(bcm, 0x050C, ((phy->type == BCM43xx_PHYTYPE_A) ? 1 : 0));
1036 bcm43xx_write16(bcm, 0x0508, 0x0000);
1037 bcm43xx_write16(bcm, 0x050A, 0x0000);
1038 bcm43xx_write16(bcm, 0x054C, 0x0000);
1039 bcm43xx_write16(bcm, 0x056A, 0x0014);
1040 bcm43xx_write16(bcm, 0x0568, 0x0826);
1041 bcm43xx_write16(bcm, 0x0500, 0x0000);
1042 bcm43xx_write16(bcm, 0x0502, 0x0030);
1043
1044 if (radio->version == 0x2050 && radio->revision <= 0x5)
1045 bcm43xx_radio_write16(bcm, 0x0051, 0x0017);
1046 for (i = 0x00; i < max_loop; i++) {
1047 value = bcm43xx_read16(bcm, 0x050E);
1048 if (value & 0x0080)
1049 break;
1050 udelay(10);
1051 }
1052 for (i = 0x00; i < 0x0A; i++) {
1053 value = bcm43xx_read16(bcm, 0x050E);
1054 if (value & 0x0400)
1055 break;
1056 udelay(10);
1057 }
1058 for (i = 0x00; i < 0x0A; i++) {
1059 value = bcm43xx_read16(bcm, 0x0690);
1060 if (!(value & 0x0100))
1061 break;
1062 udelay(10);
1063 }
1064 if (radio->version == 0x2050 && radio->revision <= 0x5)
1065 bcm43xx_radio_write16(bcm, 0x0051, 0x0037);
1066}
1067
1068static void key_write(struct bcm43xx_private *bcm,
1069 u8 index, u8 algorithm, const u16 *key)
1070{
1071 unsigned int i, basic_wep = 0;
1072 u32 offset;
1073 u16 value;
1074
1075 /* Write associated key information */
1076 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x100 + (index * 2),
1077 ((index << 4) | (algorithm & 0x0F)));
1078
1079 /* The first 4 WEP keys need extra love */
1080 if (((algorithm == BCM43xx_SEC_ALGO_WEP) ||
1081 (algorithm == BCM43xx_SEC_ALGO_WEP104)) && (index < 4))
1082 basic_wep = 1;
1083
1084 /* Write key payload, 8 little endian words */
1085 offset = bcm->security_offset + (index * BCM43xx_SEC_KEYSIZE);
1086 for (i = 0; i < (BCM43xx_SEC_KEYSIZE / sizeof(u16)); i++) {
1087 value = cpu_to_le16(key[i]);
1088 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED,
1089 offset + (i * 2), value);
1090
1091 if (!basic_wep)
1092 continue;
1093
1094 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED,
1095 offset + (i * 2) + 4 * BCM43xx_SEC_KEYSIZE,
1096 value);
1097 }
1098}
1099
1100static void keymac_write(struct bcm43xx_private *bcm,
1101 u8 index, const u32 *addr)
1102{
1103 /* for keys 0-3 there is no associated mac address */
1104 if (index < 4)
1105 return;
1106
1107 index -= 4;
1108 if (bcm->current_core->rev >= 5) {
1109 bcm43xx_shm_write32(bcm,
1110 BCM43xx_SHM_HWMAC,
1111 index * 2,
1112 cpu_to_be32(*addr));
1113 bcm43xx_shm_write16(bcm,
1114 BCM43xx_SHM_HWMAC,
1115 (index * 2) + 1,
1116 cpu_to_be16(*((u16 *)(addr + 1))));
1117 } else {
1118 if (index < 8) {
1119 TODO(); /* Put them in the macaddress filter */
1120 } else {
1121 TODO();
1122 /* Put them BCM43xx_SHM_SHARED, stating index 0x0120.
1123 Keep in mind to update the count of keymacs in 0x003E as well! */
1124 }
1125 }
1126}
1127
1128static int bcm43xx_key_write(struct bcm43xx_private *bcm,
1129 u8 index, u8 algorithm,
1130 const u8 *_key, int key_len,
1131 const u8 *mac_addr)
1132{
1133 u8 key[BCM43xx_SEC_KEYSIZE] = { 0 };
1134
1135 if (index >= ARRAY_SIZE(bcm->key))
1136 return -EINVAL;
1137 if (key_len > ARRAY_SIZE(key))
1138 return -EINVAL;
1139 if (algorithm < 1 || algorithm > 5)
1140 return -EINVAL;
1141
1142 memcpy(key, _key, key_len);
1143 key_write(bcm, index, algorithm, (const u16 *)key);
1144 keymac_write(bcm, index, (const u32 *)mac_addr);
1145
1146 bcm->key[index].algorithm = algorithm;
1147
1148 return 0;
1149}
1150
1151static void bcm43xx_clear_keys(struct bcm43xx_private *bcm)
1152{
1153 static const u32 zero_mac[2] = { 0 };
1154 unsigned int i,j, nr_keys = 54;
1155 u16 offset;
1156
1157 if (bcm->current_core->rev < 5)
1158 nr_keys = 16;
1159 assert(nr_keys <= ARRAY_SIZE(bcm->key));
1160
1161 for (i = 0; i < nr_keys; i++) {
1162 bcm->key[i].enabled = 0;
1163 /* returns for i < 4 immediately */
1164 keymac_write(bcm, i, zero_mac);
1165 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED,
1166 0x100 + (i * 2), 0x0000);
1167 for (j = 0; j < 8; j++) {
1168 offset = bcm->security_offset + (j * 4) + (i * BCM43xx_SEC_KEYSIZE);
1169 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED,
1170 offset, 0x0000);
1171 }
1172 }
1173 dprintk(KERN_INFO PFX "Keys cleared\n");
1174}
1175
1176/* Lowlevel core-switch function. This is only to be used in
1177 * bcm43xx_switch_core() and bcm43xx_probe_cores()
1178 */
1179static int _switch_core(struct bcm43xx_private *bcm, int core)
1180{
1181 int err;
1182 int attempts = 0;
1183 u32 current_core;
1184
1185 assert(core >= 0);
1186 while (1) {
1187 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
1188 (core * 0x1000) + 0x18000000);
1189 if (unlikely(err))
1190 goto error;
1191 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCICFG_ACTIVE_CORE,
1192 &current_core);
1193 if (unlikely(err))
1194 goto error;
1195 current_core = (current_core - 0x18000000) / 0x1000;
1196 if (current_core == core)
1197 break;
1198
1199 if (unlikely(attempts++ > BCM43xx_SWITCH_CORE_MAX_RETRIES))
1200 goto error;
1201 udelay(10);
1202 }
1203#ifdef CONFIG_BCM947XX
1204 if (bcm->pci_dev->bus->number == 0)
1205 bcm->current_core_offset = 0x1000 * core;
1206 else
1207 bcm->current_core_offset = 0;
1208#endif
1209
1210 return 0;
1211error:
1212 printk(KERN_ERR PFX "Failed to switch to core %d\n", core);
1213 return -ENODEV;
1214}
1215
1216int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core)
1217{
1218 int err;
1219
1220 if (unlikely(!new_core))
1221 return 0;
1222 if (!new_core->available)
1223 return -ENODEV;
1224 if (bcm->current_core == new_core)
1225 return 0;
1226 err = _switch_core(bcm, new_core->index);
1227 if (unlikely(err))
1228 goto out;
1229
1230 bcm->current_core = new_core;
1231 bcm->current_80211_core_idx = -1;
1232 if (new_core->id == BCM43xx_COREID_80211)
1233 bcm->current_80211_core_idx = (int)(new_core - &(bcm->core_80211[0]));
1234
1235out:
1236 return err;
1237}
1238
1239static int bcm43xx_core_enabled(struct bcm43xx_private *bcm)
1240{
1241 u32 value;
1242
1243 value = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1244 value &= BCM43xx_SBTMSTATELOW_CLOCK | BCM43xx_SBTMSTATELOW_RESET
1245 | BCM43xx_SBTMSTATELOW_REJECT;
1246
1247 return (value == BCM43xx_SBTMSTATELOW_CLOCK);
1248}
1249
1250/* disable current core */
1251static int bcm43xx_core_disable(struct bcm43xx_private *bcm, u32 core_flags)
1252{
1253 u32 sbtmstatelow;
1254 u32 sbtmstatehigh;
1255 int i;
1256
1257 /* fetch sbtmstatelow from core information registers */
1258 sbtmstatelow = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1259
1260 /* core is already in reset */
1261 if (sbtmstatelow & BCM43xx_SBTMSTATELOW_RESET)
1262 goto out;
1263
1264 if (sbtmstatelow & BCM43xx_SBTMSTATELOW_CLOCK) {
1265 sbtmstatelow = BCM43xx_SBTMSTATELOW_CLOCK |
1266 BCM43xx_SBTMSTATELOW_REJECT;
1267 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1268
1269 for (i = 0; i < 1000; i++) {
1270 sbtmstatelow = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1271 if (sbtmstatelow & BCM43xx_SBTMSTATELOW_REJECT) {
1272 i = -1;
1273 break;
1274 }
1275 udelay(10);
1276 }
1277 if (i != -1) {
1278 printk(KERN_ERR PFX "Error: core_disable() REJECT timeout!\n");
1279 return -EBUSY;
1280 }
1281
1282 for (i = 0; i < 1000; i++) {
1283 sbtmstatehigh = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
1284 if (!(sbtmstatehigh & BCM43xx_SBTMSTATEHIGH_BUSY)) {
1285 i = -1;
1286 break;
1287 }
1288 udelay(10);
1289 }
1290 if (i != -1) {
1291 printk(KERN_ERR PFX "Error: core_disable() BUSY timeout!\n");
1292 return -EBUSY;
1293 }
1294
1295 sbtmstatelow = BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK |
1296 BCM43xx_SBTMSTATELOW_REJECT |
1297 BCM43xx_SBTMSTATELOW_RESET |
1298 BCM43xx_SBTMSTATELOW_CLOCK |
1299 core_flags;
1300 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1301 udelay(10);
1302 }
1303
1304 sbtmstatelow = BCM43xx_SBTMSTATELOW_RESET |
1305 BCM43xx_SBTMSTATELOW_REJECT |
1306 core_flags;
1307 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1308
1309out:
1310 bcm->current_core->enabled = 0;
1311
1312 return 0;
1313}
1314
1315/* enable (reset) current core */
1316static int bcm43xx_core_enable(struct bcm43xx_private *bcm, u32 core_flags)
1317{
1318 u32 sbtmstatelow;
1319 u32 sbtmstatehigh;
1320 u32 sbimstate;
1321 int err;
1322
1323 err = bcm43xx_core_disable(bcm, core_flags);
1324 if (err)
1325 goto out;
1326
1327 sbtmstatelow = BCM43xx_SBTMSTATELOW_CLOCK |
1328 BCM43xx_SBTMSTATELOW_RESET |
1329 BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK |
1330 core_flags;
1331 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1332 udelay(1);
1333
1334 sbtmstatehigh = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
1335 if (sbtmstatehigh & BCM43xx_SBTMSTATEHIGH_SERROR) {
1336 sbtmstatehigh = 0x00000000;
1337 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATEHIGH, sbtmstatehigh);
1338 }
1339
1340 sbimstate = bcm43xx_read32(bcm, BCM43xx_CIR_SBIMSTATE);
1341 if (sbimstate & (BCM43xx_SBIMSTATE_IB_ERROR | BCM43xx_SBIMSTATE_TIMEOUT)) {
1342 sbimstate &= ~(BCM43xx_SBIMSTATE_IB_ERROR | BCM43xx_SBIMSTATE_TIMEOUT);
1343 bcm43xx_write32(bcm, BCM43xx_CIR_SBIMSTATE, sbimstate);
1344 }
1345
1346 sbtmstatelow = BCM43xx_SBTMSTATELOW_CLOCK |
1347 BCM43xx_SBTMSTATELOW_FORCE_GATE_CLOCK |
1348 core_flags;
1349 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1350 udelay(1);
1351
1352 sbtmstatelow = BCM43xx_SBTMSTATELOW_CLOCK | core_flags;
1353 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1354 udelay(1);
1355
1356 bcm->current_core->enabled = 1;
1357 assert(err == 0);
1358out:
1359 return err;
1360}
1361
1362/* http://bcm-specs.sipsolutions.net/80211CoreReset */
1363void bcm43xx_wireless_core_reset(struct bcm43xx_private *bcm, int connect_phy)
1364{
1365 u32 flags = 0x00040000;
1366
1367 if ((bcm43xx_core_enabled(bcm)) &&
1368 !bcm43xx_using_pio(bcm)) {
1369//FIXME: Do we _really_ want #ifndef CONFIG_BCM947XX here?
1370#ifndef CONFIG_BCM947XX
1371 /* reset all used DMA controllers. */
1372 bcm43xx_dmacontroller_tx_reset(bcm, BCM43xx_MMIO_DMA1_BASE);
1373 bcm43xx_dmacontroller_tx_reset(bcm, BCM43xx_MMIO_DMA2_BASE);
1374 bcm43xx_dmacontroller_tx_reset(bcm, BCM43xx_MMIO_DMA3_BASE);
1375 bcm43xx_dmacontroller_tx_reset(bcm, BCM43xx_MMIO_DMA4_BASE);
1376 bcm43xx_dmacontroller_rx_reset(bcm, BCM43xx_MMIO_DMA1_BASE);
1377 if (bcm->current_core->rev < 5)
1378 bcm43xx_dmacontroller_rx_reset(bcm, BCM43xx_MMIO_DMA4_BASE);
1379#endif
1380 }
1381 if (bcm->shutting_down) {
1382 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
1383 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD)
1384 & ~(BCM43xx_SBF_MAC_ENABLED | 0x00000002));
1385 } else {
1386 if (connect_phy)
1387 flags |= 0x20000000;
1388 bcm43xx_phy_connect(bcm, connect_phy);
1389 bcm43xx_core_enable(bcm, flags);
1390 bcm43xx_write16(bcm, 0x03E6, 0x0000);
1391 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
1392 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD)
1393 | BCM43xx_SBF_400);
1394 }
1395}
1396
1397static void bcm43xx_wireless_core_disable(struct bcm43xx_private *bcm)
1398{
1399 bcm43xx_radio_turn_off(bcm);
1400 bcm43xx_write16(bcm, 0x03E6, 0x00F4);
1401 bcm43xx_core_disable(bcm, 0);
1402}
1403
1404/* Mark the current 80211 core inactive.
1405 * "active_80211_core" is the other 80211 core, which is used.
1406 */
1407static int bcm43xx_wireless_core_mark_inactive(struct bcm43xx_private *bcm,
1408 struct bcm43xx_coreinfo *active_80211_core)
1409{
1410 u32 sbtmstatelow;
1411 struct bcm43xx_coreinfo *old_core;
1412 int err = 0;
1413
1414 bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
1415 bcm43xx_radio_turn_off(bcm);
1416 sbtmstatelow = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1417 sbtmstatelow &= ~0x200a0000;
1418 sbtmstatelow |= 0xa0000;
1419 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1420 udelay(1);
1421 sbtmstatelow = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1422 sbtmstatelow &= ~0xa0000;
1423 sbtmstatelow |= 0x80000;
1424 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1425 udelay(1);
1426
1427 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_G) {
1428 old_core = bcm->current_core;
1429 err = bcm43xx_switch_core(bcm, active_80211_core);
1430 if (err)
1431 goto out;
1432 sbtmstatelow = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
1433 sbtmstatelow &= ~0x20000000;
1434 sbtmstatelow |= 0x20000000;
1435 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, sbtmstatelow);
1436 err = bcm43xx_switch_core(bcm, old_core);
1437 }
1438
1439out:
1440 return err;
1441}
1442
1443static void handle_irq_transmit_status(struct bcm43xx_private *bcm)
1444{
1445 u32 v0, v1;
1446 u16 tmp;
1447 struct bcm43xx_xmitstatus stat;
1448
1449 while (1) {
1450 v0 = bcm43xx_read32(bcm, BCM43xx_MMIO_XMITSTAT_0);
1451 if (!v0)
1452 break;
1453 v1 = bcm43xx_read32(bcm, BCM43xx_MMIO_XMITSTAT_1);
1454
1455 stat.cookie = (v0 >> 16) & 0x0000FFFF;
1456 tmp = (u16)((v0 & 0xFFF0) | ((v0 & 0xF) >> 1));
1457 stat.flags = tmp & 0xFF;
1458 stat.cnt1 = (tmp & 0x0F00) >> 8;
1459 stat.cnt2 = (tmp & 0xF000) >> 12;
1460 stat.seq = (u16)(v1 & 0xFFFF);
1461 stat.unknown = (u16)((v1 >> 16) & 0xFF);
1462
1463 bcm43xx_debugfs_log_txstat(bcm, &stat);
1464
1465 if (stat.flags & BCM43xx_TXSTAT_FLAG_IGNORE)
1466 continue;
1467 if (!(stat.flags & BCM43xx_TXSTAT_FLAG_ACK)) {
1468 //TODO: packet was not acked (was lost)
1469 }
1470 //TODO: There are more (unknown) flags to test. see bcm43xx_main.h
1471
1472 if (bcm43xx_using_pio(bcm))
1473 bcm43xx_pio_handle_xmitstatus(bcm, &stat);
1474 else
1475 bcm43xx_dma_handle_xmitstatus(bcm, &stat);
1476 }
1477}
1478
1479static void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm)
1480{
1481 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F);
1482 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x40A, 0x7F7F);
1483 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD,
1484 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD) | (1 << 4));
1485 assert(bcm->noisecalc.core_at_start == bcm->current_core);
1486 assert(bcm->noisecalc.channel_at_start == bcm43xx_current_radio(bcm)->channel);
1487}
1488
1489static void bcm43xx_calculate_link_quality(struct bcm43xx_private *bcm)
1490{
1491 /* Top half of Link Quality calculation. */
1492
1493 if (bcm->noisecalc.calculation_running)
1494 return;
1495 bcm->noisecalc.core_at_start = bcm->current_core;
1496 bcm->noisecalc.channel_at_start = bcm43xx_current_radio(bcm)->channel;
1497 bcm->noisecalc.calculation_running = 1;
1498 bcm->noisecalc.nr_samples = 0;
1499
1500 bcm43xx_generate_noise_sample(bcm);
1501}
1502
1503static void handle_irq_noise(struct bcm43xx_private *bcm)
1504{
1505 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1506 u16 tmp;
1507 u8 noise[4];
1508 u8 i, j;
1509 s32 average;
1510
1511 /* Bottom half of Link Quality calculation. */
1512
1513 assert(bcm->noisecalc.calculation_running);
1514 if (bcm->noisecalc.core_at_start != bcm->current_core ||
1515 bcm->noisecalc.channel_at_start != radio->channel)
1516 goto drop_calculation;
1517 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x408);
1518 noise[0] = (tmp & 0x00FF);
1519 noise[1] = (tmp & 0xFF00) >> 8;
1520 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x40A);
1521 noise[2] = (tmp & 0x00FF);
1522 noise[3] = (tmp & 0xFF00) >> 8;
1523 if (noise[0] == 0x7F || noise[1] == 0x7F ||
1524 noise[2] == 0x7F || noise[3] == 0x7F)
1525 goto generate_new;
1526
1527 /* Get the noise samples. */
1528 assert(bcm->noisecalc.nr_samples <= 8);
1529 i = bcm->noisecalc.nr_samples;
1530 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
1531 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
1532 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
1533 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
1534 bcm->noisecalc.samples[i][0] = radio->nrssi_lt[noise[0]];
1535 bcm->noisecalc.samples[i][1] = radio->nrssi_lt[noise[1]];
1536 bcm->noisecalc.samples[i][2] = radio->nrssi_lt[noise[2]];
1537 bcm->noisecalc.samples[i][3] = radio->nrssi_lt[noise[3]];
1538 bcm->noisecalc.nr_samples++;
1539 if (bcm->noisecalc.nr_samples == 8) {
1540 /* Calculate the Link Quality by the noise samples. */
1541 average = 0;
1542 for (i = 0; i < 8; i++) {
1543 for (j = 0; j < 4; j++)
1544 average += bcm->noisecalc.samples[i][j];
1545 }
1546 average /= (8 * 4);
1547 average *= 125;
1548 average += 64;
1549 average /= 128;
1550
1551 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x40C);
1552 tmp = (tmp / 128) & 0x1F;
1553 if (tmp >= 8)
1554 average += 2;
1555 else
1556 average -= 25;
1557 if (tmp == 8)
1558 average -= 72;
1559 else
1560 average -= 48;
1561
1562/* FIXME: This is wrong, but people want fancy stats. well... */
1563bcm->stats.noise = average;
1564 if (average > -65)
1565 bcm->stats.link_quality = 0;
1566 else if (average > -75)
1567 bcm->stats.link_quality = 1;
1568 else if (average > -85)
1569 bcm->stats.link_quality = 2;
1570 else
1571 bcm->stats.link_quality = 3;
1572// dprintk(KERN_INFO PFX "Link Quality: %u (avg was %d)\n", bcm->stats.link_quality, average);
1573drop_calculation:
1574 bcm->noisecalc.calculation_running = 0;
1575 return;
1576 }
1577generate_new:
1578 bcm43xx_generate_noise_sample(bcm);
1579}
1580
1581static void handle_irq_ps(struct bcm43xx_private *bcm)
1582{
1583 if (bcm->ieee->iw_mode == IW_MODE_MASTER) {
1584 ///TODO: PS TBTT
1585 } else {
1586 if (1/*FIXME: the last PSpoll frame was sent successfully */)
1587 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
1588 }
1589 if (bcm->ieee->iw_mode == IW_MODE_ADHOC)
1590 bcm->reg124_set_0x4 = 1;
1591 //FIXME else set to false?
1592}
1593
1594static void handle_irq_reg124(struct bcm43xx_private *bcm)
1595{
1596 if (!bcm->reg124_set_0x4)
1597 return;
1598 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD,
1599 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD)
1600 | 0x4);
1601 //FIXME: reset reg124_set_0x4 to false?
1602}
1603
1604static void handle_irq_pmq(struct bcm43xx_private *bcm)
1605{
1606 u32 tmp;
1607
1608 //TODO: AP mode.
1609
1610 while (1) {
1611 tmp = bcm43xx_read32(bcm, BCM43xx_MMIO_PS_STATUS);
1612 if (!(tmp & 0x00000008))
1613 break;
1614 }
1615 /* 16bit write is odd, but correct. */
1616 bcm43xx_write16(bcm, BCM43xx_MMIO_PS_STATUS, 0x0002);
1617}
1618
1619static void bcm43xx_generate_beacon_template(struct bcm43xx_private *bcm,
1620 u16 ram_offset, u16 shm_size_offset)
1621{
1622 u32 value;
1623 u16 size = 0;
1624
1625 /* Timestamp. */
1626 //FIXME: assumption: The chip sets the timestamp
1627 value = 0;
1628 bcm43xx_ram_write(bcm, ram_offset++, value);
1629 bcm43xx_ram_write(bcm, ram_offset++, value);
1630 size += 8;
1631
1632 /* Beacon Interval / Capability Information */
1633 value = 0x0000;//FIXME: Which interval?
1634 value |= (1 << 0) << 16; /* ESS */
1635 value |= (1 << 2) << 16; /* CF Pollable */ //FIXME?
1636 value |= (1 << 3) << 16; /* CF Poll Request */ //FIXME?
1637 if (!bcm->ieee->open_wep)
1638 value |= (1 << 4) << 16; /* Privacy */
1639 bcm43xx_ram_write(bcm, ram_offset++, value);
1640 size += 4;
1641
1642 /* SSID */
1643 //TODO
1644
1645 /* FH Parameter Set */
1646 //TODO
1647
1648 /* DS Parameter Set */
1649 //TODO
1650
1651 /* CF Parameter Set */
1652 //TODO
1653
1654 /* TIM */
1655 //TODO
1656
1657 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, shm_size_offset, size);
1658}
1659
1660static void handle_irq_beacon(struct bcm43xx_private *bcm)
1661{
1662 u32 status;
1663
1664 bcm->irq_savedstate &= ~BCM43xx_IRQ_BEACON;
1665 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD);
1666
1667 if ((status & 0x1) && (status & 0x2)) {
1668 /* ACK beacon IRQ. */
1669 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON,
1670 BCM43xx_IRQ_BEACON);
1671 bcm->irq_savedstate |= BCM43xx_IRQ_BEACON;
1672 return;
1673 }
1674 if (!(status & 0x1)) {
1675 bcm43xx_generate_beacon_template(bcm, 0x68, 0x18);
1676 status |= 0x1;
1677 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD, status);
1678 }
1679 if (!(status & 0x2)) {
1680 bcm43xx_generate_beacon_template(bcm, 0x468, 0x1A);
1681 status |= 0x2;
1682 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS2_BITFIELD, status);
1683 }
1684}
1685
1686/* Interrupt handler bottom-half */
1687static void bcm43xx_interrupt_tasklet(struct bcm43xx_private *bcm)
1688{
1689 u32 reason;
1690 u32 dma_reason[4];
1691 int activity = 0;
1692 unsigned long flags;
1693
1694#ifdef CONFIG_BCM43XX_DEBUG
1695 u32 _handled = 0x00000000;
1696# define bcmirq_handled(irq) do { _handled |= (irq); } while (0)
1697#else
1698# define bcmirq_handled(irq) do { /* nothing */ } while (0)
1699#endif /* CONFIG_BCM43XX_DEBUG*/
1700
1701 bcm43xx_lock_mmio(bcm, flags);
1702 reason = bcm->irq_reason;
1703 dma_reason[0] = bcm->dma_reason[0];
1704 dma_reason[1] = bcm->dma_reason[1];
1705 dma_reason[2] = bcm->dma_reason[2];
1706 dma_reason[3] = bcm->dma_reason[3];
1707
1708 if (unlikely(reason & BCM43xx_IRQ_XMIT_ERROR)) {
1709 /* TX error. We get this when Template Ram is written in wrong endianess
1710 * in dummy_tx(). We also get this if something is wrong with the TX header
1711 * on DMA or PIO queues.
1712 * Maybe we get this in other error conditions, too.
1713 */
1714 printkl(KERN_ERR PFX "FATAL ERROR: BCM43xx_IRQ_XMIT_ERROR\n");
1715 bcmirq_handled(BCM43xx_IRQ_XMIT_ERROR);
1716 }
1717 if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_FATALMASK) |
1718 (dma_reason[1] & BCM43xx_DMAIRQ_FATALMASK) |
1719 (dma_reason[2] & BCM43xx_DMAIRQ_FATALMASK) |
1720 (dma_reason[3] & BCM43xx_DMAIRQ_FATALMASK))) {
1721 printkl(KERN_ERR PFX "FATAL ERROR: Fatal DMA error: "
1722 "0x%08X, 0x%08X, 0x%08X, 0x%08X\n",
1723 dma_reason[0], dma_reason[1],
1724 dma_reason[2], dma_reason[3]);
1725 bcm43xx_controller_restart(bcm, "DMA error");
1726 bcm43xx_unlock_mmio(bcm, flags);
1727 return;
1728 }
1729 if (unlikely((dma_reason[0] & BCM43xx_DMAIRQ_NONFATALMASK) |
1730 (dma_reason[1] & BCM43xx_DMAIRQ_NONFATALMASK) |
1731 (dma_reason[2] & BCM43xx_DMAIRQ_NONFATALMASK) |
1732 (dma_reason[3] & BCM43xx_DMAIRQ_NONFATALMASK))) {
1733 printkl(KERN_ERR PFX "DMA error: "
1734 "0x%08X, 0x%08X, 0x%08X, 0x%08X\n",
1735 dma_reason[0], dma_reason[1],
1736 dma_reason[2], dma_reason[3]);
1737 }
1738
1739 if (reason & BCM43xx_IRQ_PS) {
1740 handle_irq_ps(bcm);
1741 bcmirq_handled(BCM43xx_IRQ_PS);
1742 }
1743
1744 if (reason & BCM43xx_IRQ_REG124) {
1745 handle_irq_reg124(bcm);
1746 bcmirq_handled(BCM43xx_IRQ_REG124);
1747 }
1748
1749 if (reason & BCM43xx_IRQ_BEACON) {
1750 if (bcm->ieee->iw_mode == IW_MODE_MASTER)
1751 handle_irq_beacon(bcm);
1752 bcmirq_handled(BCM43xx_IRQ_BEACON);
1753 }
1754
1755 if (reason & BCM43xx_IRQ_PMQ) {
1756 handle_irq_pmq(bcm);
1757 bcmirq_handled(BCM43xx_IRQ_PMQ);
1758 }
1759
1760 if (reason & BCM43xx_IRQ_SCAN) {
1761 /*TODO*/
1762 //bcmirq_handled(BCM43xx_IRQ_SCAN);
1763 }
1764
1765 if (reason & BCM43xx_IRQ_NOISE) {
1766 handle_irq_noise(bcm);
1767 bcmirq_handled(BCM43xx_IRQ_NOISE);
1768 }
1769
1770 /* Check the DMA reason registers for received data. */
1771 assert(!(dma_reason[1] & BCM43xx_DMAIRQ_RX_DONE));
1772 assert(!(dma_reason[2] & BCM43xx_DMAIRQ_RX_DONE));
1773 if (dma_reason[0] & BCM43xx_DMAIRQ_RX_DONE) {
1774 if (bcm43xx_using_pio(bcm))
1775 bcm43xx_pio_rx(bcm43xx_current_pio(bcm)->queue0);
1776 else
1777 bcm43xx_dma_rx(bcm43xx_current_dma(bcm)->rx_ring0);
1778 /* We intentionally don't set "activity" to 1, here. */
1779 }
1780 if (dma_reason[3] & BCM43xx_DMAIRQ_RX_DONE) {
1781 if (bcm43xx_using_pio(bcm))
1782 bcm43xx_pio_rx(bcm43xx_current_pio(bcm)->queue3);
1783 else
1784 bcm43xx_dma_rx(bcm43xx_current_dma(bcm)->rx_ring1);
1785 activity = 1;
1786 }
1787 bcmirq_handled(BCM43xx_IRQ_RX);
1788
1789 if (reason & BCM43xx_IRQ_XMIT_STATUS) {
1790 handle_irq_transmit_status(bcm);
1791 activity = 1;
1792 //TODO: In AP mode, this also causes sending of powersave responses.
1793 bcmirq_handled(BCM43xx_IRQ_XMIT_STATUS);
1794 }
1795
1796 /* IRQ_PIO_WORKAROUND is handled in the top-half. */
1797 bcmirq_handled(BCM43xx_IRQ_PIO_WORKAROUND);
1798#ifdef CONFIG_BCM43XX_DEBUG
1799 if (unlikely(reason & ~_handled)) {
1800 printkl(KERN_WARNING PFX
1801 "Unhandled IRQ! Reason: 0x%08x, Unhandled: 0x%08x, "
1802 "DMA: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
1803 reason, (reason & ~_handled),
1804 dma_reason[0], dma_reason[1],
1805 dma_reason[2], dma_reason[3]);
1806 }
1807#endif
1808#undef bcmirq_handled
1809
1810 if (!modparam_noleds)
1811 bcm43xx_leds_update(bcm, activity);
1812 bcm43xx_interrupt_enable(bcm, bcm->irq_savedstate);
1813 bcm43xx_unlock_mmio(bcm, flags);
1814}
1815
1816static void pio_irq_workaround(struct bcm43xx_private *bcm,
1817 u16 base, int queueidx)
1818{
1819 u16 rxctl;
1820
1821 rxctl = bcm43xx_read16(bcm, base + BCM43xx_PIO_RXCTL);
1822 if (rxctl & BCM43xx_PIO_RXCTL_DATAAVAILABLE)
1823 bcm->dma_reason[queueidx] |= BCM43xx_DMAIRQ_RX_DONE;
1824 else
1825 bcm->dma_reason[queueidx] &= ~BCM43xx_DMAIRQ_RX_DONE;
1826}
1827
1828static void bcm43xx_interrupt_ack(struct bcm43xx_private *bcm, u32 reason)
1829{
1830 if (bcm43xx_using_pio(bcm) &&
1831 (bcm->current_core->rev < 3) &&
1832 (!(reason & BCM43xx_IRQ_PIO_WORKAROUND))) {
1833 /* Apply a PIO specific workaround to the dma_reasons */
1834 pio_irq_workaround(bcm, BCM43xx_MMIO_PIO1_BASE, 0);
1835 pio_irq_workaround(bcm, BCM43xx_MMIO_PIO2_BASE, 1);
1836 pio_irq_workaround(bcm, BCM43xx_MMIO_PIO3_BASE, 2);
1837 pio_irq_workaround(bcm, BCM43xx_MMIO_PIO4_BASE, 3);
1838 }
1839
1840 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, reason);
1841
1842 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA1_REASON,
1843 bcm->dma_reason[0]);
1844 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA2_REASON,
1845 bcm->dma_reason[1]);
1846 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA3_REASON,
1847 bcm->dma_reason[2]);
1848 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA4_REASON,
1849 bcm->dma_reason[3]);
1850}
1851
1852/* Interrupt handler top-half */
1853static irqreturn_t bcm43xx_interrupt_handler(int irq, void *dev_id, struct pt_regs *regs)
1854{
1855 irqreturn_t ret = IRQ_HANDLED;
1856 struct bcm43xx_private *bcm = dev_id;
1857 u32 reason;
1858
1859 if (!bcm)
1860 return IRQ_NONE;
1861
1862 spin_lock(&bcm->_lock);
1863
1864 reason = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
1865 if (reason == 0xffffffff) {
1866 /* irq not for us (shared irq) */
1867 ret = IRQ_NONE;
1868 goto out;
1869 }
1870 reason &= bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_MASK);
1871 if (!reason)
1872 goto out;
1873
1874 bcm->dma_reason[0] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA1_REASON)
1875 & 0x0001dc00;
1876 bcm->dma_reason[1] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA2_REASON)
1877 & 0x0000dc00;
1878 bcm->dma_reason[2] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA3_REASON)
1879 & 0x0000dc00;
1880 bcm->dma_reason[3] = bcm43xx_read32(bcm, BCM43xx_MMIO_DMA4_REASON)
1881 & 0x0001dc00;
1882
1883 bcm43xx_interrupt_ack(bcm, reason);
1884
1885 /* Only accept IRQs, if we are initialized properly.
1886 * This avoids an RX race while initializing.
1887 * We should probably not enable IRQs before we are initialized
1888 * completely, but some careful work is needed to fix this. I think it
1889 * is best to stay with this cheap workaround for now... .
1890 */
1891 if (likely(bcm->initialized)) {
1892 /* disable all IRQs. They are enabled again in the bottom half. */
1893 bcm->irq_savedstate = bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
1894 /* save the reason code and call our bottom half. */
1895 bcm->irq_reason = reason;
1896 tasklet_schedule(&bcm->isr_tasklet);
1897 }
1898
1899out:
1900 mmiowb();
1901 spin_unlock(&bcm->_lock);
1902
1903 return ret;
1904}
1905
1906static void bcm43xx_release_firmware(struct bcm43xx_private *bcm, int force)
1907{
1908 if (bcm->firmware_norelease && !force)
1909 return; /* Suspending or controller reset. */
1910 release_firmware(bcm->ucode);
1911 bcm->ucode = NULL;
1912 release_firmware(bcm->pcm);
1913 bcm->pcm = NULL;
1914 release_firmware(bcm->initvals0);
1915 bcm->initvals0 = NULL;
1916 release_firmware(bcm->initvals1);
1917 bcm->initvals1 = NULL;
1918}
1919
1920static int bcm43xx_request_firmware(struct bcm43xx_private *bcm)
1921{
1922 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1923 u8 rev = bcm->current_core->rev;
1924 int err = 0;
1925 int nr;
1926 char buf[22 + sizeof(modparam_fwpostfix) - 1] = { 0 };
1927
1928 if (!bcm->ucode) {
1929 snprintf(buf, ARRAY_SIZE(buf), "bcm43xx_microcode%d%s.fw",
1930 (rev >= 5 ? 5 : rev),
1931 modparam_fwpostfix);
1932 err = request_firmware(&bcm->ucode, buf, &bcm->pci_dev->dev);
1933 if (err) {
1934 printk(KERN_ERR PFX
1935 "Error: Microcode \"%s\" not available or load failed.\n",
1936 buf);
1937 goto error;
1938 }
1939 }
1940
1941 if (!bcm->pcm) {
1942 snprintf(buf, ARRAY_SIZE(buf),
1943 "bcm43xx_pcm%d%s.fw",
1944 (rev < 5 ? 4 : 5),
1945 modparam_fwpostfix);
1946 err = request_firmware(&bcm->pcm, buf, &bcm->pci_dev->dev);
1947 if (err) {
1948 printk(KERN_ERR PFX
1949 "Error: PCM \"%s\" not available or load failed.\n",
1950 buf);
1951 goto error;
1952 }
1953 }
1954
1955 if (!bcm->initvals0) {
1956 if (rev == 2 || rev == 4) {
1957 switch (phy->type) {
1958 case BCM43xx_PHYTYPE_A:
1959 nr = 3;
1960 break;
1961 case BCM43xx_PHYTYPE_B:
1962 case BCM43xx_PHYTYPE_G:
1963 nr = 1;
1964 break;
1965 default:
1966 goto err_noinitval;
1967 }
1968
1969 } else if (rev >= 5) {
1970 switch (phy->type) {
1971 case BCM43xx_PHYTYPE_A:
1972 nr = 7;
1973 break;
1974 case BCM43xx_PHYTYPE_B:
1975 case BCM43xx_PHYTYPE_G:
1976 nr = 5;
1977 break;
1978 default:
1979 goto err_noinitval;
1980 }
1981 } else
1982 goto err_noinitval;
1983 snprintf(buf, ARRAY_SIZE(buf), "bcm43xx_initval%02d%s.fw",
1984 nr, modparam_fwpostfix);
1985
1986 err = request_firmware(&bcm->initvals0, buf, &bcm->pci_dev->dev);
1987 if (err) {
1988 printk(KERN_ERR PFX
1989 "Error: InitVals \"%s\" not available or load failed.\n",
1990 buf);
1991 goto error;
1992 }
1993 if (bcm->initvals0->size % sizeof(struct bcm43xx_initval)) {
1994 printk(KERN_ERR PFX "InitVals fileformat error.\n");
1995 goto error;
1996 }
1997 }
1998
1999 if (!bcm->initvals1) {
2000 if (rev >= 5) {
2001 u32 sbtmstatehigh;
2002
2003 switch (phy->type) {
2004 case BCM43xx_PHYTYPE_A:
2005 sbtmstatehigh = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
2006 if (sbtmstatehigh & 0x00010000)
2007 nr = 9;
2008 else
2009 nr = 10;
2010 break;
2011 case BCM43xx_PHYTYPE_B:
2012 case BCM43xx_PHYTYPE_G:
2013 nr = 6;
2014 break;
2015 default:
2016 goto err_noinitval;
2017 }
2018 snprintf(buf, ARRAY_SIZE(buf), "bcm43xx_initval%02d%s.fw",
2019 nr, modparam_fwpostfix);
2020
2021 err = request_firmware(&bcm->initvals1, buf, &bcm->pci_dev->dev);
2022 if (err) {
2023 printk(KERN_ERR PFX
2024 "Error: InitVals \"%s\" not available or load failed.\n",
2025 buf);
2026 goto error;
2027 }
2028 if (bcm->initvals1->size % sizeof(struct bcm43xx_initval)) {
2029 printk(KERN_ERR PFX "InitVals fileformat error.\n");
2030 goto error;
2031 }
2032 }
2033 }
2034
2035out:
2036 return err;
2037error:
2038 bcm43xx_release_firmware(bcm, 1);
2039 goto out;
2040err_noinitval:
2041 printk(KERN_ERR PFX "Error: No InitVals available!\n");
2042 err = -ENOENT;
2043 goto error;
2044}
2045
2046static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm)
2047{
2048 const u32 *data;
2049 unsigned int i, len;
2050
2051 /* Upload Microcode. */
2052 data = (u32 *)(bcm->ucode->data);
2053 len = bcm->ucode->size / sizeof(u32);
2054 bcm43xx_shm_control_word(bcm, BCM43xx_SHM_UCODE, 0x0000);
2055 for (i = 0; i < len; i++) {
2056 bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA,
2057 be32_to_cpu(data[i]));
2058 udelay(10);
2059 }
2060
2061 /* Upload PCM data. */
2062 data = (u32 *)(bcm->pcm->data);
2063 len = bcm->pcm->size / sizeof(u32);
2064 bcm43xx_shm_control_word(bcm, BCM43xx_SHM_PCM, 0x01ea);
2065 bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA, 0x00004000);
2066 bcm43xx_shm_control_word(bcm, BCM43xx_SHM_PCM, 0x01eb);
2067 for (i = 0; i < len; i++) {
2068 bcm43xx_write32(bcm, BCM43xx_MMIO_SHM_DATA,
2069 be32_to_cpu(data[i]));
2070 udelay(10);
2071 }
2072}
2073
2074static int bcm43xx_write_initvals(struct bcm43xx_private *bcm,
2075 const struct bcm43xx_initval *data,
2076 const unsigned int len)
2077{
2078 u16 offset, size;
2079 u32 value;
2080 unsigned int i;
2081
2082 for (i = 0; i < len; i++) {
2083 offset = be16_to_cpu(data[i].offset);
2084 size = be16_to_cpu(data[i].size);
2085 value = be32_to_cpu(data[i].value);
2086
2087 if (unlikely(offset >= 0x1000))
2088 goto err_format;
2089 if (size == 2) {
2090 if (unlikely(value & 0xFFFF0000))
2091 goto err_format;
2092 bcm43xx_write16(bcm, offset, (u16)value);
2093 } else if (size == 4) {
2094 bcm43xx_write32(bcm, offset, value);
2095 } else
2096 goto err_format;
2097 }
2098
2099 return 0;
2100
2101err_format:
2102 printk(KERN_ERR PFX "InitVals (bcm43xx_initvalXX.fw) file-format error. "
2103 "Please fix your bcm43xx firmware files.\n");
2104 return -EPROTO;
2105}
2106
2107static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm)
2108{
2109 int err;
2110
2111 err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals0->data,
2112 bcm->initvals0->size / sizeof(struct bcm43xx_initval));
2113 if (err)
2114 goto out;
2115 if (bcm->initvals1) {
2116 err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals1->data,
2117 bcm->initvals1->size / sizeof(struct bcm43xx_initval));
2118 if (err)
2119 goto out;
2120 }
2121out:
2122 return err;
2123}
2124
2125static int bcm43xx_initialize_irq(struct bcm43xx_private *bcm)
2126{
2127 int res;
2128 unsigned int i;
2129 u32 data;
2130
2131 bcm->irq = bcm->pci_dev->irq;
2132#ifdef CONFIG_BCM947XX
2133 if (bcm->pci_dev->bus->number == 0) {
2134 struct pci_dev *d = NULL;
2135 /* FIXME: we will probably need more device IDs here... */
2136 d = pci_find_device(PCI_VENDOR_ID_BROADCOM, 0x4324, NULL);
2137 if (d != NULL) {
2138 bcm->irq = d->irq;
2139 }
2140 }
2141#endif
2142 res = request_irq(bcm->irq, bcm43xx_interrupt_handler,
2143 SA_SHIRQ, KBUILD_MODNAME, bcm);
2144 if (res) {
2145 printk(KERN_ERR PFX "Cannot register IRQ%d\n", bcm->irq);
2146 return -ENODEV;
2147 }
2148 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, 0xffffffff);
2149 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, 0x00020402);
2150 i = 0;
2151 while (1) {
2152 data = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
2153 if (data == BCM43xx_IRQ_READY)
2154 break;
2155 i++;
2156 if (i >= BCM43xx_IRQWAIT_MAX_RETRIES) {
2157 printk(KERN_ERR PFX "Card IRQ register not responding. "
2158 "Giving up.\n");
2159 free_irq(bcm->irq, bcm);
2160 return -ENODEV;
2161 }
2162 udelay(10);
2163 }
2164 // dummy read
2165 bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
2166
2167 return 0;
2168}
2169
2170/* Switch to the core used to write the GPIO register.
2171 * This is either the ChipCommon, or the PCI core.
2172 */
2173static int switch_to_gpio_core(struct bcm43xx_private *bcm)
2174{
2175 int err;
2176
2177 /* Where to find the GPIO register depends on the chipset.
2178 * If it has a ChipCommon, its register at offset 0x6c is the GPIO
2179 * control register. Otherwise the register at offset 0x6c in the
2180 * PCI core is the GPIO control register.
2181 */
2182 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
2183 if (err == -ENODEV) {
2184 err = bcm43xx_switch_core(bcm, &bcm->core_pci);
2185 if (unlikely(err == -ENODEV)) {
2186 printk(KERN_ERR PFX "gpio error: "
2187 "Neither ChipCommon nor PCI core available!\n");
2188 }
2189 }
2190
2191 return err;
2192}
2193
2194/* Initialize the GPIOs
2195 * http://bcm-specs.sipsolutions.net/GPIO
2196 */
2197static int bcm43xx_gpio_init(struct bcm43xx_private *bcm)
2198{
2199 struct bcm43xx_coreinfo *old_core;
2200 int err;
2201 u32 mask, set;
2202
2203 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
2204 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD)
2205 & 0xFFFF3FFF);
2206
2207 bcm43xx_leds_switch_all(bcm, 0);
2208 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_MASK,
2209 bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_MASK) | 0x000F);
2210
2211 mask = 0x0000001F;
2212 set = 0x0000000F;
2213 if (bcm->chip_id == 0x4301) {
2214 mask |= 0x0060;
2215 set |= 0x0060;
2216 }
2217 if (0 /* FIXME: conditional unknown */) {
2218 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_MASK,
2219 bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_MASK)
2220 | 0x0100);
2221 mask |= 0x0180;
2222 set |= 0x0180;
2223 }
2224 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2225 bcm43xx_write16(bcm, BCM43xx_MMIO_GPIO_MASK,
2226 bcm43xx_read16(bcm, BCM43xx_MMIO_GPIO_MASK)
2227 | 0x0200);
2228 mask |= 0x0200;
2229 set |= 0x0200;
2230 }
2231 if (bcm->current_core->rev >= 2)
2232 mask |= 0x0010; /* FIXME: This is redundant. */
2233
2234 old_core = bcm->current_core;
2235 err = switch_to_gpio_core(bcm);
2236 if (err)
2237 goto out;
2238 bcm43xx_write32(bcm, BCM43xx_GPIO_CONTROL,
2239 (bcm43xx_read32(bcm, BCM43xx_GPIO_CONTROL) & mask) | set);
2240 err = bcm43xx_switch_core(bcm, old_core);
2241out:
2242 return err;
2243}
2244
2245/* Turn off all GPIO stuff. Call this on module unload, for example. */
2246static int bcm43xx_gpio_cleanup(struct bcm43xx_private *bcm)
2247{
2248 struct bcm43xx_coreinfo *old_core;
2249 int err;
2250
2251 old_core = bcm->current_core;
2252 err = switch_to_gpio_core(bcm);
2253 if (err)
2254 return err;
2255 bcm43xx_write32(bcm, BCM43xx_GPIO_CONTROL, 0x00000000);
2256 err = bcm43xx_switch_core(bcm, old_core);
2257 assert(err == 0);
2258
2259 return 0;
2260}
2261
2262/* http://bcm-specs.sipsolutions.net/EnableMac */
2263void bcm43xx_mac_enable(struct bcm43xx_private *bcm)
2264{
2265 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
2266 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD)
2267 | BCM43xx_SBF_MAC_ENABLED);
2268 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, BCM43xx_IRQ_READY);
2269 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* dummy read */
2270 bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON); /* dummy read */
2271 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
2272}
2273
2274/* http://bcm-specs.sipsolutions.net/SuspendMAC */
2275void bcm43xx_mac_suspend(struct bcm43xx_private *bcm)
2276{
2277 int i;
2278 u32 tmp;
2279
2280 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
2281 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
2282 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD)
2283 & ~BCM43xx_SBF_MAC_ENABLED);
2284 bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON); /* dummy read */
2285 for (i = 100000; i; i--) {
2286 tmp = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
2287 if (tmp & BCM43xx_IRQ_READY)
2288 return;
2289 udelay(10);
2290 }
2291 printkl(KERN_ERR PFX "MAC suspend failed\n");
2292}
2293
2294void bcm43xx_set_iwmode(struct bcm43xx_private *bcm,
2295 int iw_mode)
2296{
2297 unsigned long flags;
2298 struct net_device *net_dev = bcm->net_dev;
2299 u32 status;
2300 u16 value;
2301
2302 spin_lock_irqsave(&bcm->ieee->lock, flags);
2303 bcm->ieee->iw_mode = iw_mode;
2304 spin_unlock_irqrestore(&bcm->ieee->lock, flags);
2305 if (iw_mode == IW_MODE_MONITOR)
2306 net_dev->type = ARPHRD_IEEE80211;
2307 else
2308 net_dev->type = ARPHRD_ETHER;
2309
2310 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2311 /* Reset status to infrastructured mode */
2312 status &= ~(BCM43xx_SBF_MODE_AP | BCM43xx_SBF_MODE_MONITOR);
2313 status &= ~BCM43xx_SBF_MODE_PROMISC;
2314 status |= BCM43xx_SBF_MODE_NOTADHOC;
2315
2316/* FIXME: Always enable promisc mode, until we get the MAC filters working correctly. */
2317status |= BCM43xx_SBF_MODE_PROMISC;
2318
2319 switch (iw_mode) {
2320 case IW_MODE_MONITOR:
2321 status |= BCM43xx_SBF_MODE_MONITOR;
2322 status |= BCM43xx_SBF_MODE_PROMISC;
2323 break;
2324 case IW_MODE_ADHOC:
2325 status &= ~BCM43xx_SBF_MODE_NOTADHOC;
2326 break;
2327 case IW_MODE_MASTER:
2328 status |= BCM43xx_SBF_MODE_AP;
2329 break;
2330 case IW_MODE_SECOND:
2331 case IW_MODE_REPEAT:
2332 TODO(); /* TODO */
2333 break;
2334 case IW_MODE_INFRA:
2335 /* nothing to be done here... */
2336 break;
2337 default:
2338 dprintk(KERN_ERR PFX "Unknown mode in set_iwmode: %d\n", iw_mode);
2339 }
2340 if (net_dev->flags & IFF_PROMISC)
2341 status |= BCM43xx_SBF_MODE_PROMISC;
2342 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
2343
2344 value = 0x0002;
2345 if (iw_mode != IW_MODE_ADHOC && iw_mode != IW_MODE_MASTER) {
2346 if (bcm->chip_id == 0x4306 && bcm->chip_rev == 3)
2347 value = 0x0064;
2348 else
2349 value = 0x0032;
2350 }
2351 bcm43xx_write16(bcm, 0x0612, value);
2352}
2353
2354/* This is the opposite of bcm43xx_chip_init() */
2355static void bcm43xx_chip_cleanup(struct bcm43xx_private *bcm)
2356{
2357 bcm43xx_radio_turn_off(bcm);
2358 if (!modparam_noleds)
2359 bcm43xx_leds_exit(bcm);
2360 bcm43xx_gpio_cleanup(bcm);
2361 free_irq(bcm->irq, bcm);
2362 bcm43xx_release_firmware(bcm, 0);
2363}
2364
2365/* Initialize the chip
2366 * http://bcm-specs.sipsolutions.net/ChipInit
2367 */
2368static int bcm43xx_chip_init(struct bcm43xx_private *bcm)
2369{
2370 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2371 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2372 int err;
2373 int tmp;
2374 u32 value32;
2375 u16 value16;
2376
2377 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD,
2378 BCM43xx_SBF_CORE_READY
2379 | BCM43xx_SBF_400);
2380
2381 err = bcm43xx_request_firmware(bcm);
2382 if (err)
2383 goto out;
2384 bcm43xx_upload_microcode(bcm);
2385
2386 err = bcm43xx_initialize_irq(bcm);
2387 if (err)
2388 goto err_release_fw;
2389
2390 err = bcm43xx_gpio_init(bcm);
2391 if (err)
2392 goto err_free_irq;
2393
2394 err = bcm43xx_upload_initvals(bcm);
2395 if (err)
2396 goto err_gpio_cleanup;
2397 bcm43xx_radio_turn_on(bcm);
2398
2399 bcm43xx_write16(bcm, 0x03E6, 0x0000);
2400 err = bcm43xx_phy_init(bcm);
2401 if (err)
2402 goto err_radio_off;
2403
2404 /* Select initial Interference Mitigation. */
2405 tmp = radio->interfmode;
2406 radio->interfmode = BCM43xx_RADIO_INTERFMODE_NONE;
2407 bcm43xx_radio_set_interference_mitigation(bcm, tmp);
2408
2409 bcm43xx_phy_set_antenna_diversity(bcm);
2410 bcm43xx_radio_set_txantenna(bcm, BCM43xx_RADIO_TXANTENNA_DEFAULT);
2411 if (phy->type == BCM43xx_PHYTYPE_B) {
2412 value16 = bcm43xx_read16(bcm, 0x005E);
2413 value16 |= 0x0004;
2414 bcm43xx_write16(bcm, 0x005E, value16);
2415 }
2416 bcm43xx_write32(bcm, 0x0100, 0x01000000);
2417 if (bcm->current_core->rev < 5)
2418 bcm43xx_write32(bcm, 0x010C, 0x01000000);
2419
2420 value32 = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2421 value32 &= ~ BCM43xx_SBF_MODE_NOTADHOC;
2422 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value32);
2423 value32 = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2424 value32 |= BCM43xx_SBF_MODE_NOTADHOC;
2425 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value32);
2426
2427 value32 = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2428 value32 |= 0x100000;
2429 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value32);
2430
2431 if (bcm43xx_using_pio(bcm)) {
2432 bcm43xx_write32(bcm, 0x0210, 0x00000100);
2433 bcm43xx_write32(bcm, 0x0230, 0x00000100);
2434 bcm43xx_write32(bcm, 0x0250, 0x00000100);
2435 bcm43xx_write32(bcm, 0x0270, 0x00000100);
2436 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0034, 0x0000);
2437 }
2438
2439 /* Probe Response Timeout value */
2440 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2441 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0074, 0x0000);
2442
2443 /* Initially set the wireless operation mode. */
2444 bcm43xx_set_iwmode(bcm, bcm->ieee->iw_mode);
2445
2446 if (bcm->current_core->rev < 3) {
2447 bcm43xx_write16(bcm, 0x060E, 0x0000);
2448 bcm43xx_write16(bcm, 0x0610, 0x8000);
2449 bcm43xx_write16(bcm, 0x0604, 0x0000);
2450 bcm43xx_write16(bcm, 0x0606, 0x0200);
2451 } else {
2452 bcm43xx_write32(bcm, 0x0188, 0x80000000);
2453 bcm43xx_write32(bcm, 0x018C, 0x02000000);
2454 }
2455 bcm43xx_write32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON, 0x00004000);
2456 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA1_IRQ_MASK, 0x0001DC00);
2457 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2458 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA3_IRQ_MASK, 0x0000DC00);
2459 bcm43xx_write32(bcm, BCM43xx_MMIO_DMA4_IRQ_MASK, 0x0001DC00);
2460
2461 value32 = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
2462 value32 |= 0x00100000;
2463 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, value32);
2464
2465 bcm43xx_write16(bcm, BCM43xx_MMIO_POWERUP_DELAY, bcm43xx_pctl_powerup_delay(bcm));
2466
2467 assert(err == 0);
2468 dprintk(KERN_INFO PFX "Chip initialized\n");
2469out:
2470 return err;
2471
2472err_radio_off:
2473 bcm43xx_radio_turn_off(bcm);
2474err_gpio_cleanup:
2475 bcm43xx_gpio_cleanup(bcm);
2476err_free_irq:
2477 free_irq(bcm->irq, bcm);
2478err_release_fw:
2479 bcm43xx_release_firmware(bcm, 1);
2480 goto out;
2481}
2482
2483/* Validate chip access
2484 * http://bcm-specs.sipsolutions.net/ValidateChipAccess */
2485static int bcm43xx_validate_chip(struct bcm43xx_private *bcm)
2486{
2487 u32 value;
2488 u32 shm_backup;
2489
2490 shm_backup = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000);
2491 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0xAA5555AA);
2492 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0xAA5555AA)
2493 goto error;
2494 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, 0x55AAAA55);
2495 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0000) != 0x55AAAA55)
2496 goto error;
2497 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED, 0x0000, shm_backup);
2498
2499 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
2500 if ((value | 0x80000000) != 0x80000400)
2501 goto error;
2502
2503 value = bcm43xx_read32(bcm, BCM43xx_MMIO_GEN_IRQ_REASON);
2504 if (value != 0x00000000)
2505 goto error;
2506
2507 return 0;
2508error:
2509 printk(KERN_ERR PFX "Failed to validate the chipaccess\n");
2510 return -ENODEV;
2511}
2512
2513static void bcm43xx_init_struct_phyinfo(struct bcm43xx_phyinfo *phy)
2514{
2515 /* Initialize a "phyinfo" structure. The structure is already
2516 * zeroed out.
2517 */
2518 phy->antenna_diversity = 0xFFFF;
2519 phy->savedpctlreg = 0xFFFF;
2520 phy->minlowsig[0] = 0xFFFF;
2521 phy->minlowsig[1] = 0xFFFF;
2522 spin_lock_init(&phy->lock);
2523}
2524
2525static void bcm43xx_init_struct_radioinfo(struct bcm43xx_radioinfo *radio)
2526{
2527 /* Initialize a "radioinfo" structure. The structure is already
2528 * zeroed out.
2529 */
2530 radio->interfmode = BCM43xx_RADIO_INTERFMODE_NONE;
2531 radio->channel = 0xFF;
2532 radio->initial_channel = 0xFF;
2533 radio->lofcal = 0xFFFF;
2534 radio->initval = 0xFFFF;
2535 radio->nrssi[0] = -1000;
2536 radio->nrssi[1] = -1000;
2537}
2538
2539static int bcm43xx_probe_cores(struct bcm43xx_private *bcm)
2540{
2541 int err, i;
2542 int current_core;
2543 u32 core_vendor, core_id, core_rev;
2544 u32 sb_id_hi, chip_id_32 = 0;
2545 u16 pci_device, chip_id_16;
2546 u8 core_count;
2547
2548 memset(&bcm->core_chipcommon, 0, sizeof(struct bcm43xx_coreinfo));
2549 memset(&bcm->core_pci, 0, sizeof(struct bcm43xx_coreinfo));
2550 memset(&bcm->core_80211, 0, sizeof(struct bcm43xx_coreinfo)
2551 * BCM43xx_MAX_80211_CORES);
2552 memset(&bcm->core_80211_ext, 0, sizeof(struct bcm43xx_coreinfo_80211)
2553 * BCM43xx_MAX_80211_CORES);
2554 bcm->current_80211_core_idx = -1;
2555 bcm->nr_80211_available = 0;
2556 bcm->current_core = NULL;
2557 bcm->active_80211_core = NULL;
2558
2559 /* map core 0 */
2560 err = _switch_core(bcm, 0);
2561 if (err)
2562 goto out;
2563
2564 /* fetch sb_id_hi from core information registers */
2565 sb_id_hi = bcm43xx_read32(bcm, BCM43xx_CIR_SB_ID_HI);
2566
2567 core_id = (sb_id_hi & 0xFFF0) >> 4;
2568 core_rev = (sb_id_hi & 0xF);
2569 core_vendor = (sb_id_hi & 0xFFFF0000) >> 16;
2570
2571 /* if present, chipcommon is always core 0; read the chipid from it */
2572 if (core_id == BCM43xx_COREID_CHIPCOMMON) {
2573 chip_id_32 = bcm43xx_read32(bcm, 0);
2574 chip_id_16 = chip_id_32 & 0xFFFF;
2575 bcm->core_chipcommon.available = 1;
2576 bcm->core_chipcommon.id = core_id;
2577 bcm->core_chipcommon.rev = core_rev;
2578 bcm->core_chipcommon.index = 0;
2579 /* While we are at it, also read the capabilities. */
2580 bcm->chipcommon_capabilities = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_CAPABILITIES);
2581 } else {
2582 /* without a chipCommon, use a hard coded table. */
2583 pci_device = bcm->pci_dev->device;
2584 if (pci_device == 0x4301)
2585 chip_id_16 = 0x4301;
2586 else if ((pci_device >= 0x4305) && (pci_device <= 0x4307))
2587 chip_id_16 = 0x4307;
2588 else if ((pci_device >= 0x4402) && (pci_device <= 0x4403))
2589 chip_id_16 = 0x4402;
2590 else if ((pci_device >= 0x4610) && (pci_device <= 0x4615))
2591 chip_id_16 = 0x4610;
2592 else if ((pci_device >= 0x4710) && (pci_device <= 0x4715))
2593 chip_id_16 = 0x4710;
2594#ifdef CONFIG_BCM947XX
2595 else if ((pci_device >= 0x4320) && (pci_device <= 0x4325))
2596 chip_id_16 = 0x4309;
2597#endif
2598 else {
2599 printk(KERN_ERR PFX "Could not determine Chip ID\n");
2600 return -ENODEV;
2601 }
2602 }
2603
2604 /* ChipCommon with Core Rev >=4 encodes number of cores,
2605 * otherwise consult hardcoded table */
2606 if ((core_id == BCM43xx_COREID_CHIPCOMMON) && (core_rev >= 4)) {
2607 core_count = (chip_id_32 & 0x0F000000) >> 24;
2608 } else {
2609 switch (chip_id_16) {
2610 case 0x4610:
2611 case 0x4704:
2612 case 0x4710:
2613 core_count = 9;
2614 break;
2615 case 0x4310:
2616 core_count = 8;
2617 break;
2618 case 0x5365:
2619 core_count = 7;
2620 break;
2621 case 0x4306:
2622 core_count = 6;
2623 break;
2624 case 0x4301:
2625 case 0x4307:
2626 core_count = 5;
2627 break;
2628 case 0x4402:
2629 core_count = 3;
2630 break;
2631 default:
2632 /* SOL if we get here */
2633 assert(0);
2634 core_count = 1;
2635 }
2636 }
2637
2638 bcm->chip_id = chip_id_16;
2639 bcm->chip_rev = (chip_id_32 & 0x000F0000) >> 16;
2640 bcm->chip_package = (chip_id_32 & 0x00F00000) >> 20;
2641
2642 dprintk(KERN_INFO PFX "Chip ID 0x%x, rev 0x%x\n",
2643 bcm->chip_id, bcm->chip_rev);
2644 dprintk(KERN_INFO PFX "Number of cores: %d\n", core_count);
2645 if (bcm->core_chipcommon.available) {
2646 dprintk(KERN_INFO PFX "Core 0: ID 0x%x, rev 0x%x, vendor 0x%x, %s\n",
2647 core_id, core_rev, core_vendor,
2648 bcm43xx_core_enabled(bcm) ? "enabled" : "disabled");
2649 }
2650
2651 if (bcm->core_chipcommon.available)
2652 current_core = 1;
2653 else
2654 current_core = 0;
2655 for ( ; current_core < core_count; current_core++) {
2656 struct bcm43xx_coreinfo *core;
2657 struct bcm43xx_coreinfo_80211 *ext_80211;
2658
2659 err = _switch_core(bcm, current_core);
2660 if (err)
2661 goto out;
2662 /* Gather information */
2663 /* fetch sb_id_hi from core information registers */
2664 sb_id_hi = bcm43xx_read32(bcm, BCM43xx_CIR_SB_ID_HI);
2665
2666 /* extract core_id, core_rev, core_vendor */
2667 core_id = (sb_id_hi & 0xFFF0) >> 4;
2668 core_rev = (sb_id_hi & 0xF);
2669 core_vendor = (sb_id_hi & 0xFFFF0000) >> 16;
2670
2671 dprintk(KERN_INFO PFX "Core %d: ID 0x%x, rev 0x%x, vendor 0x%x, %s\n",
2672 current_core, core_id, core_rev, core_vendor,
2673 bcm43xx_core_enabled(bcm) ? "enabled" : "disabled" );
2674
2675 core = NULL;
2676 switch (core_id) {
2677 case BCM43xx_COREID_PCI:
2678 core = &bcm->core_pci;
2679 if (core->available) {
2680 printk(KERN_WARNING PFX "Multiple PCI cores found.\n");
2681 continue;
2682 }
2683 break;
2684 case BCM43xx_COREID_80211:
2685 for (i = 0; i < BCM43xx_MAX_80211_CORES; i++) {
2686 core = &(bcm->core_80211[i]);
2687 ext_80211 = &(bcm->core_80211_ext[i]);
2688 if (!core->available)
2689 break;
2690 core = NULL;
2691 }
2692 if (!core) {
2693 printk(KERN_WARNING PFX "More than %d cores of type 802.11 found.\n",
2694 BCM43xx_MAX_80211_CORES);
2695 continue;
2696 }
2697 if (i != 0) {
2698 /* More than one 80211 core is only supported
2699 * by special chips.
2700 * There are chips with two 80211 cores, but with
2701 * dangling pins on the second core. Be careful
2702 * and ignore these cores here.
2703 */
2704 if (bcm->pci_dev->device != 0x4324) {
2705 dprintk(KERN_INFO PFX "Ignoring additional 802.11 core.\n");
2706 continue;
2707 }
2708 }
2709 switch (core_rev) {
2710 case 2:
2711 case 4:
2712 case 5:
2713 case 6:
2714 case 7:
2715 case 9:
2716 break;
2717 default:
2718 printk(KERN_ERR PFX "Error: Unsupported 80211 core revision %u\n",
2719 core_rev);
2720 err = -ENODEV;
2721 goto out;
2722 }
2723 bcm->nr_80211_available++;
2724 bcm43xx_init_struct_phyinfo(&ext_80211->phy);
2725 bcm43xx_init_struct_radioinfo(&ext_80211->radio);
2726 break;
2727 case BCM43xx_COREID_CHIPCOMMON:
2728 printk(KERN_WARNING PFX "Multiple CHIPCOMMON cores found.\n");
2729 break;
2730 }
2731 if (core) {
2732 core->available = 1;
2733 core->id = core_id;
2734 core->rev = core_rev;
2735 core->index = current_core;
2736 }
2737 }
2738
2739 if (!bcm->core_80211[0].available) {
2740 printk(KERN_ERR PFX "Error: No 80211 core found!\n");
2741 err = -ENODEV;
2742 goto out;
2743 }
2744
2745 err = bcm43xx_switch_core(bcm, &bcm->core_80211[0]);
2746
2747 assert(err == 0);
2748out:
2749 return err;
2750}
2751
2752static void bcm43xx_gen_bssid(struct bcm43xx_private *bcm)
2753{
2754 const u8 *mac = (const u8*)(bcm->net_dev->dev_addr);
2755 u8 *bssid = bcm->ieee->bssid;
2756
2757 switch (bcm->ieee->iw_mode) {
2758 case IW_MODE_ADHOC:
2759 random_ether_addr(bssid);
2760 break;
2761 case IW_MODE_MASTER:
2762 case IW_MODE_INFRA:
2763 case IW_MODE_REPEAT:
2764 case IW_MODE_SECOND:
2765 case IW_MODE_MONITOR:
2766 memcpy(bssid, mac, ETH_ALEN);
2767 break;
2768 default:
2769 assert(0);
2770 }
2771}
2772
2773static void bcm43xx_rate_memory_write(struct bcm43xx_private *bcm,
2774 u16 rate,
2775 int is_ofdm)
2776{
2777 u16 offset;
2778
2779 if (is_ofdm) {
2780 offset = 0x480;
2781 offset += (bcm43xx_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2782 }
2783 else {
2784 offset = 0x4C0;
2785 offset += (bcm43xx_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2786 }
2787 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, offset + 0x20,
2788 bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, offset));
2789}
2790
2791static void bcm43xx_rate_memory_init(struct bcm43xx_private *bcm)
2792{
2793 switch (bcm43xx_current_phy(bcm)->type) {
2794 case BCM43xx_PHYTYPE_A:
2795 case BCM43xx_PHYTYPE_G:
2796 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_6MB, 1);
2797 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_12MB, 1);
2798 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_18MB, 1);
2799 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_24MB, 1);
2800 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_36MB, 1);
2801 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_48MB, 1);
2802 bcm43xx_rate_memory_write(bcm, IEEE80211_OFDM_RATE_54MB, 1);
2803 case BCM43xx_PHYTYPE_B:
2804 bcm43xx_rate_memory_write(bcm, IEEE80211_CCK_RATE_1MB, 0);
2805 bcm43xx_rate_memory_write(bcm, IEEE80211_CCK_RATE_2MB, 0);
2806 bcm43xx_rate_memory_write(bcm, IEEE80211_CCK_RATE_5MB, 0);
2807 bcm43xx_rate_memory_write(bcm, IEEE80211_CCK_RATE_11MB, 0);
2808 break;
2809 default:
2810 assert(0);
2811 }
2812}
2813
2814static void bcm43xx_wireless_core_cleanup(struct bcm43xx_private *bcm)
2815{
2816 bcm43xx_chip_cleanup(bcm);
2817 bcm43xx_pio_free(bcm);
2818 bcm43xx_dma_free(bcm);
2819
2820 bcm->current_core->initialized = 0;
2821}
2822
2823/* http://bcm-specs.sipsolutions.net/80211Init */
2824static int bcm43xx_wireless_core_init(struct bcm43xx_private *bcm)
2825{
2826 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2827 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2828 u32 ucodeflags;
2829 int err;
2830 u32 sbimconfiglow;
2831 u8 limit;
2832
2833 if (bcm->chip_rev < 5) {
2834 sbimconfiglow = bcm43xx_read32(bcm, BCM43xx_CIR_SBIMCONFIGLOW);
2835 sbimconfiglow &= ~ BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_MASK;
2836 sbimconfiglow &= ~ BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_MASK;
2837 if (bcm->bustype == BCM43xx_BUSTYPE_PCI)
2838 sbimconfiglow |= 0x32;
2839 else if (bcm->bustype == BCM43xx_BUSTYPE_SB)
2840 sbimconfiglow |= 0x53;
2841 else
2842 assert(0);
2843 bcm43xx_write32(bcm, BCM43xx_CIR_SBIMCONFIGLOW, sbimconfiglow);
2844 }
2845
2846 bcm43xx_phy_calibrate(bcm);
2847 err = bcm43xx_chip_init(bcm);
2848 if (err)
2849 goto out;
2850
2851 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0016, bcm->current_core->rev);
2852 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, BCM43xx_UCODEFLAGS_OFFSET);
2853
2854 if (0 /*FIXME: which condition has to be used here? */)
2855 ucodeflags |= 0x00000010;
2856
2857 /* HW decryption needs to be set now */
2858 ucodeflags |= 0x40000000;
2859
2860 if (phy->type == BCM43xx_PHYTYPE_G) {
2861 ucodeflags |= BCM43xx_UCODEFLAG_UNKBGPHY;
2862 if (phy->rev == 1)
2863 ucodeflags |= BCM43xx_UCODEFLAG_UNKGPHY;
2864 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
2865 ucodeflags |= BCM43xx_UCODEFLAG_UNKPACTRL;
2866 } else if (phy->type == BCM43xx_PHYTYPE_B) {
2867 ucodeflags |= BCM43xx_UCODEFLAG_UNKBGPHY;
2868 if (phy->rev >= 2 && radio->version == 0x2050)
2869 ucodeflags &= ~BCM43xx_UCODEFLAG_UNKGPHY;
2870 }
2871
2872 if (ucodeflags != bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2873 BCM43xx_UCODEFLAGS_OFFSET)) {
2874 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2875 BCM43xx_UCODEFLAGS_OFFSET, ucodeflags);
2876 }
2877
2878 /* Short/Long Retry Limit.
2879 * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
2880 * the chip-internal counter.
2881 */
2882 limit = limit_value(modparam_short_retry, 0, 0xF);
2883 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0006, limit);
2884 limit = limit_value(modparam_long_retry, 0, 0xF);
2885 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0007, limit);
2886
2887 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0044, 3);
2888 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0046, 2);
2889
2890 bcm43xx_rate_memory_init(bcm);
2891
2892 /* Minimum Contention Window */
2893 if (phy->type == BCM43xx_PHYTYPE_B)
2894 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0003, 0x0000001f);
2895 else
2896 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0003, 0x0000000f);
2897 /* Maximum Contention Window */
2898 bcm43xx_shm_write32(bcm, BCM43xx_SHM_WIRELESS, 0x0004, 0x000003ff);
2899
2900 bcm43xx_gen_bssid(bcm);
2901 bcm43xx_write_mac_bssid_templates(bcm);
2902
2903 if (bcm->current_core->rev >= 5)
2904 bcm43xx_write16(bcm, 0x043C, 0x000C);
2905
2906 if (bcm43xx_using_pio(bcm))
2907 err = bcm43xx_pio_init(bcm);
2908 else
2909 err = bcm43xx_dma_init(bcm);
2910 if (err)
2911 goto err_chip_cleanup;
2912 bcm43xx_write16(bcm, 0x0612, 0x0050);
2913 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0416, 0x0050);
2914 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0414, 0x01F4);
2915
2916 bcm43xx_mac_enable(bcm);
2917 bcm43xx_interrupt_enable(bcm, bcm->irq_savedstate);
2918
2919 bcm->current_core->initialized = 1;
2920out:
2921 return err;
2922
2923err_chip_cleanup:
2924 bcm43xx_chip_cleanup(bcm);
2925 goto out;
2926}
2927
2928static int bcm43xx_chipset_attach(struct bcm43xx_private *bcm)
2929{
2930 int err;
2931 u16 pci_status;
2932
2933 err = bcm43xx_pctl_set_crystal(bcm, 1);
2934 if (err)
2935 goto out;
2936 bcm43xx_pci_read_config16(bcm, PCI_STATUS, &pci_status);
2937 bcm43xx_pci_write_config16(bcm, PCI_STATUS, pci_status & ~PCI_STATUS_SIG_TARGET_ABORT);
2938
2939out:
2940 return err;
2941}
2942
2943static void bcm43xx_chipset_detach(struct bcm43xx_private *bcm)
2944{
2945 bcm43xx_pctl_set_clock(bcm, BCM43xx_PCTL_CLK_SLOW);
2946 bcm43xx_pctl_set_crystal(bcm, 0);
2947}
2948
2949static void bcm43xx_pcicore_broadcast_value(struct bcm43xx_private *bcm,
2950 u32 address,
2951 u32 data)
2952{
2953 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_ADDR, address);
2954 bcm43xx_write32(bcm, BCM43xx_PCICORE_BCAST_DATA, data);
2955}
2956
2957static int bcm43xx_pcicore_commit_settings(struct bcm43xx_private *bcm)
2958{
2959 int err;
2960 struct bcm43xx_coreinfo *old_core;
2961
2962 old_core = bcm->current_core;
2963 err = bcm43xx_switch_core(bcm, &bcm->core_pci);
2964 if (err)
2965 goto out;
2966
2967 bcm43xx_pcicore_broadcast_value(bcm, 0xfd8, 0x00000000);
2968
2969 bcm43xx_switch_core(bcm, old_core);
2970 assert(err == 0);
2971out:
2972 return err;
2973}
2974
2975/* Make an I/O Core usable. "core_mask" is the bitmask of the cores to enable.
2976 * To enable core 0, pass a core_mask of 1<<0
2977 */
2978static int bcm43xx_setup_backplane_pci_connection(struct bcm43xx_private *bcm,
2979 u32 core_mask)
2980{
2981 u32 backplane_flag_nr;
2982 u32 value;
2983 struct bcm43xx_coreinfo *old_core;
2984 int err = 0;
2985
2986 value = bcm43xx_read32(bcm, BCM43xx_CIR_SBTPSFLAG);
2987 backplane_flag_nr = value & BCM43xx_BACKPLANE_FLAG_NR_MASK;
2988
2989 old_core = bcm->current_core;
2990 err = bcm43xx_switch_core(bcm, &bcm->core_pci);
2991 if (err)
2992 goto out;
2993
2994 if (bcm->core_pci.rev < 6) {
2995 value = bcm43xx_read32(bcm, BCM43xx_CIR_SBINTVEC);
2996 value |= (1 << backplane_flag_nr);
2997 bcm43xx_write32(bcm, BCM43xx_CIR_SBINTVEC, value);
2998 } else {
2999 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCICFG_ICR, &value);
3000 if (err) {
3001 printk(KERN_ERR PFX "Error: ICR setup failure!\n");
3002 goto out_switch_back;
3003 }
3004 value |= core_mask << 8;
3005 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_ICR, value);
3006 if (err) {
3007 printk(KERN_ERR PFX "Error: ICR setup failure!\n");
3008 goto out_switch_back;
3009 }
3010 }
3011
3012 value = bcm43xx_read32(bcm, BCM43xx_PCICORE_SBTOPCI2);
3013 value |= BCM43xx_SBTOPCI2_PREFETCH | BCM43xx_SBTOPCI2_BURST;
3014 bcm43xx_write32(bcm, BCM43xx_PCICORE_SBTOPCI2, value);
3015
3016 if (bcm->core_pci.rev < 5) {
3017 value = bcm43xx_read32(bcm, BCM43xx_CIR_SBIMCONFIGLOW);
3018 value |= (2 << BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_SHIFT)
3019 & BCM43xx_SBIMCONFIGLOW_SERVICE_TOUT_MASK;
3020 value |= (3 << BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_SHIFT)
3021 & BCM43xx_SBIMCONFIGLOW_REQUEST_TOUT_MASK;
3022 bcm43xx_write32(bcm, BCM43xx_CIR_SBIMCONFIGLOW, value);
3023 err = bcm43xx_pcicore_commit_settings(bcm);
3024 assert(err == 0);
3025 }
3026
3027out_switch_back:
3028 err = bcm43xx_switch_core(bcm, old_core);
3029out:
3030 return err;
3031}
3032
3033static void bcm43xx_softmac_init(struct bcm43xx_private *bcm)
3034{
3035 ieee80211softmac_start(bcm->net_dev);
3036}
3037
3038static void bcm43xx_periodic_every120sec(struct bcm43xx_private *bcm)
3039{
3040 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
3041
3042 if (phy->type != BCM43xx_PHYTYPE_G || phy->rev < 2)
3043 return;
3044
3045 bcm43xx_mac_suspend(bcm);
3046 bcm43xx_phy_lo_g_measure(bcm);
3047 bcm43xx_mac_enable(bcm);
3048}
3049
3050static void bcm43xx_periodic_every60sec(struct bcm43xx_private *bcm)
3051{
3052 bcm43xx_phy_lo_mark_all_unused(bcm);
3053 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
3054 bcm43xx_mac_suspend(bcm);
3055 bcm43xx_calc_nrssi_slope(bcm);
3056 bcm43xx_mac_enable(bcm);
3057 }
3058}
3059
3060static void bcm43xx_periodic_every30sec(struct bcm43xx_private *bcm)
3061{
3062 /* Update device statistics. */
3063 bcm43xx_calculate_link_quality(bcm);
3064}
3065
3066static void bcm43xx_periodic_every15sec(struct bcm43xx_private *bcm)
3067{
3068 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
3069 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
3070
3071 if (phy->type == BCM43xx_PHYTYPE_G) {
3072 //TODO: update_aci_moving_average
3073 if (radio->aci_enable && radio->aci_wlan_automatic) {
3074 bcm43xx_mac_suspend(bcm);
3075 if (!radio->aci_enable && 1 /*TODO: not scanning? */) {
3076 if (0 /*TODO: bunch of conditions*/) {
3077 bcm43xx_radio_set_interference_mitigation(bcm,
3078 BCM43xx_RADIO_INTERFMODE_MANUALWLAN);
3079 }
3080 } else if (1/*TODO*/) {
3081 /*
3082 if ((aci_average > 1000) && !(bcm43xx_radio_aci_scan(bcm))) {
3083 bcm43xx_radio_set_interference_mitigation(bcm,
3084 BCM43xx_RADIO_INTERFMODE_NONE);
3085 }
3086 */
3087 }
3088 bcm43xx_mac_enable(bcm);
3089 } else if (radio->interfmode == BCM43xx_RADIO_INTERFMODE_NONWLAN &&
3090 phy->rev == 1) {
3091 //TODO: implement rev1 workaround
3092 }
3093 }
3094 bcm43xx_phy_xmitpower(bcm); //FIXME: unless scanning?
3095 //TODO for APHY (temperature?)
3096}
3097
3098static void bcm43xx_periodic_task_handler(unsigned long d)
3099{
3100 struct bcm43xx_private *bcm = (struct bcm43xx_private *)d;
3101 unsigned long flags;
3102 unsigned int state;
3103
3104 bcm43xx_lock_mmio(bcm, flags);
3105
3106 assert(bcm->initialized);
3107 state = bcm->periodic_state;
3108 if (state % 8 == 0)
3109 bcm43xx_periodic_every120sec(bcm);
3110 if (state % 4 == 0)
3111 bcm43xx_periodic_every60sec(bcm);
3112 if (state % 2 == 0)
3113 bcm43xx_periodic_every30sec(bcm);
3114 bcm43xx_periodic_every15sec(bcm);
3115 bcm->periodic_state = state + 1;
3116
3117 mod_timer(&bcm->periodic_tasks, jiffies + (HZ * 15));
3118
3119 bcm43xx_unlock_mmio(bcm, flags);
3120}
3121
3122static void bcm43xx_periodic_tasks_delete(struct bcm43xx_private *bcm)
3123{
3124 del_timer_sync(&bcm->periodic_tasks);
3125}
3126
3127static void bcm43xx_periodic_tasks_setup(struct bcm43xx_private *bcm)
3128{
3129 struct timer_list *timer = &(bcm->periodic_tasks);
3130
3131 assert(bcm->initialized);
3132 setup_timer(timer,
3133 bcm43xx_periodic_task_handler,
3134 (unsigned long)bcm);
3135 timer->expires = jiffies;
3136 add_timer(timer);
3137}
3138
3139static void bcm43xx_security_init(struct bcm43xx_private *bcm)
3140{
3141 bcm->security_offset = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED,
3142 0x0056) * 2;
3143 bcm43xx_clear_keys(bcm);
3144}
3145
3146/* This is the opposite of bcm43xx_init_board() */
3147static void bcm43xx_free_board(struct bcm43xx_private *bcm)
3148{
3149 int i, err;
3150 unsigned long flags;
3151
3152 bcm43xx_sysfs_unregister(bcm);
3153
3154 bcm43xx_periodic_tasks_delete(bcm);
3155
3156 bcm43xx_lock(bcm, flags);
3157 bcm->initialized = 0;
3158 bcm->shutting_down = 1;
3159 bcm43xx_unlock(bcm, flags);
3160
3161 for (i = 0; i < BCM43xx_MAX_80211_CORES; i++) {
3162 if (!bcm->core_80211[i].available)
3163 continue;
3164 if (!bcm->core_80211[i].initialized)
3165 continue;
3166
3167 err = bcm43xx_switch_core(bcm, &bcm->core_80211[i]);
3168 assert(err == 0);
3169 bcm43xx_wireless_core_cleanup(bcm);
3170 }
3171
3172 bcm43xx_pctl_set_crystal(bcm, 0);
3173
3174 bcm43xx_lock(bcm, flags);
3175 bcm->shutting_down = 0;
3176 bcm43xx_unlock(bcm, flags);
3177}
3178
3179static int bcm43xx_init_board(struct bcm43xx_private *bcm)
3180{
3181 int i, err;
3182 int connect_phy;
3183 unsigned long flags;
3184
3185 might_sleep();
3186
3187 bcm43xx_lock(bcm, flags);
3188 bcm->initialized = 0;
3189 bcm->shutting_down = 0;
3190 bcm43xx_unlock(bcm, flags);
3191
3192 err = bcm43xx_pctl_set_crystal(bcm, 1);
3193 if (err)
3194 goto out;
3195 err = bcm43xx_pctl_init(bcm);
3196 if (err)
3197 goto err_crystal_off;
3198 err = bcm43xx_pctl_set_clock(bcm, BCM43xx_PCTL_CLK_FAST);
3199 if (err)
3200 goto err_crystal_off;
3201
3202 tasklet_enable(&bcm->isr_tasklet);
3203 for (i = 0; i < bcm->nr_80211_available; i++) {
3204 err = bcm43xx_switch_core(bcm, &bcm->core_80211[i]);
3205 assert(err != -ENODEV);
3206 if (err)
3207 goto err_80211_unwind;
3208
3209 /* Enable the selected wireless core.
3210 * Connect PHY only on the first core.
3211 */
3212 if (!bcm43xx_core_enabled(bcm)) {
3213 if (bcm->nr_80211_available == 1) {
3214 connect_phy = bcm43xx_current_phy(bcm)->connected;
3215 } else {
3216 if (i == 0)
3217 connect_phy = 1;
3218 else
3219 connect_phy = 0;
3220 }
3221 bcm43xx_wireless_core_reset(bcm, connect_phy);
3222 }
3223
3224 if (i != 0)
3225 bcm43xx_wireless_core_mark_inactive(bcm, &bcm->core_80211[0]);
3226
3227 err = bcm43xx_wireless_core_init(bcm);
3228 if (err)
3229 goto err_80211_unwind;
3230
3231 if (i != 0) {
3232 bcm43xx_mac_suspend(bcm);
3233 bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
3234 bcm43xx_radio_turn_off(bcm);
3235 }
3236 }
3237 bcm->active_80211_core = &bcm->core_80211[0];
3238 if (bcm->nr_80211_available >= 2) {
3239 bcm43xx_switch_core(bcm, &bcm->core_80211[0]);
3240 bcm43xx_mac_enable(bcm);
3241 }
3242 bcm43xx_macfilter_clear(bcm, BCM43xx_MACFILTER_ASSOC);
3243 bcm43xx_macfilter_set(bcm, BCM43xx_MACFILTER_SELF, (u8 *)(bcm->net_dev->dev_addr));
3244 dprintk(KERN_INFO PFX "80211 cores initialized\n");
3245 bcm43xx_security_init(bcm);
3246 bcm43xx_softmac_init(bcm);
3247
3248 bcm43xx_pctl_set_clock(bcm, BCM43xx_PCTL_CLK_DYNAMIC);
3249
3250 if (bcm43xx_current_radio(bcm)->initial_channel != 0xFF) {
3251 bcm43xx_mac_suspend(bcm);
3252 bcm43xx_radio_selectchannel(bcm, bcm43xx_current_radio(bcm)->initial_channel, 0);
3253 bcm43xx_mac_enable(bcm);
3254 }
3255
3256 /* Initialization of the board is done. Flag it as such. */
3257 bcm43xx_lock(bcm, flags);
3258 bcm->initialized = 1;
3259 bcm43xx_unlock(bcm, flags);
3260
3261 bcm43xx_periodic_tasks_setup(bcm);
3262 bcm43xx_sysfs_register(bcm);
3263 //FIXME: check for bcm43xx_sysfs_register failure. This function is a bit messy regarding unwinding, though...
3264
3265 assert(err == 0);
3266out:
3267 return err;
3268
3269err_80211_unwind:
3270 tasklet_disable(&bcm->isr_tasklet);
3271 /* unwind all 80211 initialization */
3272 for (i = 0; i < bcm->nr_80211_available; i++) {
3273 if (!bcm->core_80211[i].initialized)
3274 continue;
3275 bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
3276 bcm43xx_wireless_core_cleanup(bcm);
3277 }
3278err_crystal_off:
3279 bcm43xx_pctl_set_crystal(bcm, 0);
3280 goto out;
3281}
3282
3283static void bcm43xx_detach_board(struct bcm43xx_private *bcm)
3284{
3285 struct pci_dev *pci_dev = bcm->pci_dev;
3286 int i;
3287
3288 bcm43xx_chipset_detach(bcm);
3289 /* Do _not_ access the chip, after it is detached. */
3290 iounmap(bcm->mmio_addr);
3291
3292 pci_release_regions(pci_dev);
3293 pci_disable_device(pci_dev);
3294
3295 /* Free allocated structures/fields */
3296 for (i = 0; i < BCM43xx_MAX_80211_CORES; i++) {
3297 kfree(bcm->core_80211_ext[i].phy._lo_pairs);
3298 if (bcm->core_80211_ext[i].phy.dyn_tssi_tbl)
3299 kfree(bcm->core_80211_ext[i].phy.tssi2dbm);
3300 }
3301}
3302
3303static int bcm43xx_read_phyinfo(struct bcm43xx_private *bcm)
3304{
3305 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
3306 u16 value;
3307 u8 phy_version;
3308 u8 phy_type;
3309 u8 phy_rev;
3310 int phy_rev_ok = 1;
3311 void *p;
3312
3313 value = bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_VER);
3314
3315 phy_version = (value & 0xF000) >> 12;
3316 phy_type = (value & 0x0F00) >> 8;
3317 phy_rev = (value & 0x000F);
3318
3319 dprintk(KERN_INFO PFX "Detected PHY: Version: %x, Type %x, Revision %x\n",
3320 phy_version, phy_type, phy_rev);
3321
3322 switch (phy_type) {
3323 case BCM43xx_PHYTYPE_A:
3324 if (phy_rev >= 4)
3325 phy_rev_ok = 0;
3326 /*FIXME: We need to switch the ieee->modulation, etc.. flags,
3327 * if we switch 80211 cores after init is done.
3328 * As we do not implement on the fly switching between
3329 * wireless cores, I will leave this as a future task.
3330 */
3331 bcm->ieee->modulation = IEEE80211_OFDM_MODULATION;
3332 bcm->ieee->mode = IEEE_A;
3333 bcm->ieee->freq_band = IEEE80211_52GHZ_BAND |
3334 IEEE80211_24GHZ_BAND;
3335 break;
3336 case BCM43xx_PHYTYPE_B:
3337 if (phy_rev != 2 && phy_rev != 4 && phy_rev != 6 && phy_rev != 7)
3338 phy_rev_ok = 0;
3339 bcm->ieee->modulation = IEEE80211_CCK_MODULATION;
3340 bcm->ieee->mode = IEEE_B;
3341 bcm->ieee->freq_band = IEEE80211_24GHZ_BAND;
3342 break;
3343 case BCM43xx_PHYTYPE_G:
3344 if (phy_rev > 7)
3345 phy_rev_ok = 0;
3346 bcm->ieee->modulation = IEEE80211_OFDM_MODULATION |
3347 IEEE80211_CCK_MODULATION;
3348 bcm->ieee->mode = IEEE_G;
3349 bcm->ieee->freq_band = IEEE80211_24GHZ_BAND;
3350 break;
3351 default:
3352 printk(KERN_ERR PFX "Error: Unknown PHY Type %x\n",
3353 phy_type);
3354 return -ENODEV;
3355 };
3356 if (!phy_rev_ok) {
3357 printk(KERN_WARNING PFX "Invalid PHY Revision %x\n",
3358 phy_rev);
3359 }
3360
3361 phy->version = phy_version;
3362 phy->type = phy_type;
3363 phy->rev = phy_rev;
3364 if ((phy_type == BCM43xx_PHYTYPE_B) || (phy_type == BCM43xx_PHYTYPE_G)) {
3365 p = kzalloc(sizeof(struct bcm43xx_lopair) * BCM43xx_LO_COUNT,
3366 GFP_KERNEL);
3367 if (!p)
3368 return -ENOMEM;
3369 phy->_lo_pairs = p;
3370 }
3371
3372 return 0;
3373}
3374
3375static int bcm43xx_attach_board(struct bcm43xx_private *bcm)
3376{
3377 struct pci_dev *pci_dev = bcm->pci_dev;
3378 struct net_device *net_dev = bcm->net_dev;
3379 int err;
3380 int i;
3381 unsigned long mmio_start, mmio_flags, mmio_len;
3382 u32 coremask;
3383
3384 err = pci_enable_device(pci_dev);
3385 if (err) {
3386 printk(KERN_ERR PFX "unable to wake up pci device (%i)\n", err);
3387 goto out;
3388 }
3389 mmio_start = pci_resource_start(pci_dev, 0);
3390 mmio_flags = pci_resource_flags(pci_dev, 0);
3391 mmio_len = pci_resource_len(pci_dev, 0);
3392 if (!(mmio_flags & IORESOURCE_MEM)) {
3393 printk(KERN_ERR PFX
3394 "%s, region #0 not an MMIO resource, aborting\n",
3395 pci_name(pci_dev));
3396 err = -ENODEV;
3397 goto err_pci_disable;
3398 }
3399 err = pci_request_regions(pci_dev, KBUILD_MODNAME);
3400 if (err) {
3401 printk(KERN_ERR PFX
3402 "could not access PCI resources (%i)\n", err);
3403 goto err_pci_disable;
3404 }
3405 /* enable PCI bus-mastering */
3406 pci_set_master(pci_dev);
3407 bcm->mmio_addr = ioremap(mmio_start, mmio_len);
3408 if (!bcm->mmio_addr) {
3409 printk(KERN_ERR PFX "%s: cannot remap MMIO, aborting\n",
3410 pci_name(pci_dev));
3411 err = -EIO;
3412 goto err_pci_release;
3413 }
3414 bcm->mmio_len = mmio_len;
3415 net_dev->base_addr = (unsigned long)bcm->mmio_addr;
3416
3417 bcm43xx_pci_read_config16(bcm, PCI_SUBSYSTEM_VENDOR_ID,
3418 &bcm->board_vendor);
3419 bcm43xx_pci_read_config16(bcm, PCI_SUBSYSTEM_ID,
3420 &bcm->board_type);
3421 bcm43xx_pci_read_config16(bcm, PCI_REVISION_ID,
3422 &bcm->board_revision);
3423
3424 err = bcm43xx_chipset_attach(bcm);
3425 if (err)
3426 goto err_iounmap;
3427 err = bcm43xx_pctl_init(bcm);
3428 if (err)
3429 goto err_chipset_detach;
3430 err = bcm43xx_probe_cores(bcm);
3431 if (err)
3432 goto err_chipset_detach;
3433
3434 /* Attach all IO cores to the backplane. */
3435 coremask = 0;
3436 for (i = 0; i < bcm->nr_80211_available; i++)
3437 coremask |= (1 << bcm->core_80211[i].index);
3438 //FIXME: Also attach some non80211 cores?
3439 err = bcm43xx_setup_backplane_pci_connection(bcm, coremask);
3440 if (err) {
3441 printk(KERN_ERR PFX "Backplane->PCI connection failed!\n");
3442 goto err_chipset_detach;
3443 }
3444
3445 err = bcm43xx_sprom_extract(bcm);
3446 if (err)
3447 goto err_chipset_detach;
3448 err = bcm43xx_leds_init(bcm);
3449 if (err)
3450 goto err_chipset_detach;
3451
3452 for (i = 0; i < bcm->nr_80211_available; i++) {
3453 err = bcm43xx_switch_core(bcm, &bcm->core_80211[i]);
3454 assert(err != -ENODEV);
3455 if (err)
3456 goto err_80211_unwind;
3457
3458 /* Enable the selected wireless core.
3459 * Connect PHY only on the first core.
3460 */
3461 bcm43xx_wireless_core_reset(bcm, (i == 0));
3462
3463 err = bcm43xx_read_phyinfo(bcm);
3464 if (err && (i == 0))
3465 goto err_80211_unwind;
3466
3467 err = bcm43xx_read_radioinfo(bcm);
3468 if (err && (i == 0))
3469 goto err_80211_unwind;
3470
3471 err = bcm43xx_validate_chip(bcm);
3472 if (err && (i == 0))
3473 goto err_80211_unwind;
3474
3475 bcm43xx_radio_turn_off(bcm);
3476 err = bcm43xx_phy_init_tssi2dbm_table(bcm);
3477 if (err)
3478 goto err_80211_unwind;
3479 bcm43xx_wireless_core_disable(bcm);
3480 }
3481 bcm43xx_pctl_set_crystal(bcm, 0);
3482
3483 /* Set the MAC address in the networking subsystem */
3484 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A)
3485 memcpy(bcm->net_dev->dev_addr, bcm->sprom.et1macaddr, 6);
3486 else
3487 memcpy(bcm->net_dev->dev_addr, bcm->sprom.il0macaddr, 6);
3488
3489 bcm43xx_geo_init(bcm);
3490
3491 snprintf(bcm->nick, IW_ESSID_MAX_SIZE,
3492 "Broadcom %04X", bcm->chip_id);
3493
3494 assert(err == 0);
3495out:
3496 return err;
3497
3498err_80211_unwind:
3499 for (i = 0; i < BCM43xx_MAX_80211_CORES; i++) {
3500 kfree(bcm->core_80211_ext[i].phy._lo_pairs);
3501 if (bcm->core_80211_ext[i].phy.dyn_tssi_tbl)
3502 kfree(bcm->core_80211_ext[i].phy.tssi2dbm);
3503 }
3504err_chipset_detach:
3505 bcm43xx_chipset_detach(bcm);
3506err_iounmap:
3507 iounmap(bcm->mmio_addr);
3508err_pci_release:
3509 pci_release_regions(pci_dev);
3510err_pci_disable:
3511 pci_disable_device(pci_dev);
3512 goto out;
3513}
3514
3515/* Do the Hardware IO operations to send the txb */
3516static inline int bcm43xx_tx(struct bcm43xx_private *bcm,
3517 struct ieee80211_txb *txb)
3518{
3519 int err = -ENODEV;
3520
3521 if (bcm43xx_using_pio(bcm))
3522 err = bcm43xx_pio_tx(bcm, txb);
3523 else
3524 err = bcm43xx_dma_tx(bcm, txb);
3525
3526 return err;
3527}
3528
3529static void bcm43xx_ieee80211_set_chan(struct net_device *net_dev,
3530 u8 channel)
3531{
3532 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3533 struct bcm43xx_radioinfo *radio;
3534 unsigned long flags;
3535
3536 bcm43xx_lock_mmio(bcm, flags);
3537 if (bcm->initialized) {
3538 bcm43xx_mac_suspend(bcm);
3539 bcm43xx_radio_selectchannel(bcm, channel, 0);
3540 bcm43xx_mac_enable(bcm);
3541 } else {
3542 radio = bcm43xx_current_radio(bcm);
3543 radio->initial_channel = channel;
3544 }
3545 bcm43xx_unlock_mmio(bcm, flags);
3546}
3547
3548/* set_security() callback in struct ieee80211_device */
3549static void bcm43xx_ieee80211_set_security(struct net_device *net_dev,
3550 struct ieee80211_security *sec)
3551{
3552 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3553 struct ieee80211_security *secinfo = &bcm->ieee->sec;
3554 unsigned long flags;
3555 int keyidx;
3556
3557 dprintk(KERN_INFO PFX "set security called\n");
3558
3559 bcm43xx_lock_mmio(bcm, flags);
3560
3561 for (keyidx = 0; keyidx<WEP_KEYS; keyidx++)
3562 if (sec->flags & (1<<keyidx)) {
3563 secinfo->encode_alg[keyidx] = sec->encode_alg[keyidx];
3564 secinfo->key_sizes[keyidx] = sec->key_sizes[keyidx];
3565 memcpy(secinfo->keys[keyidx], sec->keys[keyidx], SCM_KEY_LEN);
3566 }
3567
3568 if (sec->flags & SEC_ACTIVE_KEY) {
3569 secinfo->active_key = sec->active_key;
3570 dprintk(KERN_INFO PFX " .active_key = %d\n", sec->active_key);
3571 }
3572 if (sec->flags & SEC_UNICAST_GROUP) {
3573 secinfo->unicast_uses_group = sec->unicast_uses_group;
3574 dprintk(KERN_INFO PFX " .unicast_uses_group = %d\n", sec->unicast_uses_group);
3575 }
3576 if (sec->flags & SEC_LEVEL) {
3577 secinfo->level = sec->level;
3578 dprintk(KERN_INFO PFX " .level = %d\n", sec->level);
3579 }
3580 if (sec->flags & SEC_ENABLED) {
3581 secinfo->enabled = sec->enabled;
3582 dprintk(KERN_INFO PFX " .enabled = %d\n", sec->enabled);
3583 }
3584 if (sec->flags & SEC_ENCRYPT) {
3585 secinfo->encrypt = sec->encrypt;
3586 dprintk(KERN_INFO PFX " .encrypt = %d\n", sec->encrypt);
3587 }
3588 if (bcm->initialized && !bcm->ieee->host_encrypt) {
3589 if (secinfo->enabled) {
3590 /* upload WEP keys to hardware */
3591 char null_address[6] = { 0 };
3592 u8 algorithm = 0;
3593 for (keyidx = 0; keyidx<WEP_KEYS; keyidx++) {
3594 if (!(sec->flags & (1<<keyidx)))
3595 continue;
3596 switch (sec->encode_alg[keyidx]) {
3597 case SEC_ALG_NONE: algorithm = BCM43xx_SEC_ALGO_NONE; break;
3598 case SEC_ALG_WEP:
3599 algorithm = BCM43xx_SEC_ALGO_WEP;
3600 if (secinfo->key_sizes[keyidx] == 13)
3601 algorithm = BCM43xx_SEC_ALGO_WEP104;
3602 break;
3603 case SEC_ALG_TKIP:
3604 FIXME();
3605 algorithm = BCM43xx_SEC_ALGO_TKIP;
3606 break;
3607 case SEC_ALG_CCMP:
3608 FIXME();
3609 algorithm = BCM43xx_SEC_ALGO_AES;
3610 break;
3611 default:
3612 assert(0);
3613 break;
3614 }
3615 bcm43xx_key_write(bcm, keyidx, algorithm, sec->keys[keyidx], secinfo->key_sizes[keyidx], &null_address[0]);
3616 bcm->key[keyidx].enabled = 1;
3617 bcm->key[keyidx].algorithm = algorithm;
3618 }
3619 } else
3620 bcm43xx_clear_keys(bcm);
3621 }
3622 bcm43xx_unlock_mmio(bcm, flags);
3623}
3624
3625/* hard_start_xmit() callback in struct ieee80211_device */
3626static int bcm43xx_ieee80211_hard_start_xmit(struct ieee80211_txb *txb,
3627 struct net_device *net_dev,
3628 int pri)
3629{
3630 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3631 int err = -ENODEV;
3632 unsigned long flags;
3633
3634 bcm43xx_lock_mmio(bcm, flags);
3635 if (likely(bcm->initialized))
3636 err = bcm43xx_tx(bcm, txb);
3637 bcm43xx_unlock_mmio(bcm, flags);
3638
3639 return err;
3640}
3641
3642static struct net_device_stats * bcm43xx_net_get_stats(struct net_device *net_dev)
3643{
3644 return &(bcm43xx_priv(net_dev)->ieee->stats);
3645}
3646
3647static void bcm43xx_net_tx_timeout(struct net_device *net_dev)
3648{
3649 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3650 unsigned long flags;
3651
3652 bcm43xx_lock_mmio(bcm, flags);
3653 bcm43xx_controller_restart(bcm, "TX timeout");
3654 bcm43xx_unlock_mmio(bcm, flags);
3655}
3656
3657#ifdef CONFIG_NET_POLL_CONTROLLER
3658static void bcm43xx_net_poll_controller(struct net_device *net_dev)
3659{
3660 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3661 unsigned long flags;
3662
3663 local_irq_save(flags);
3664 bcm43xx_interrupt_handler(bcm->irq, bcm, NULL);
3665 local_irq_restore(flags);
3666}
3667#endif /* CONFIG_NET_POLL_CONTROLLER */
3668
3669static int bcm43xx_net_open(struct net_device *net_dev)
3670{
3671 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3672
3673 return bcm43xx_init_board(bcm);
3674}
3675
3676static int bcm43xx_net_stop(struct net_device *net_dev)
3677{
3678 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3679
3680 ieee80211softmac_stop(net_dev);
3681 bcm43xx_disable_interrupts_sync(bcm, NULL);
3682 bcm43xx_free_board(bcm);
3683
3684 return 0;
3685}
3686
3687static int bcm43xx_init_private(struct bcm43xx_private *bcm,
3688 struct net_device *net_dev,
3689 struct pci_dev *pci_dev)
3690{
3691 int err;
3692
3693 bcm->ieee = netdev_priv(net_dev);
3694 bcm->softmac = ieee80211_priv(net_dev);
3695 bcm->softmac->set_channel = bcm43xx_ieee80211_set_chan;
3696
3697 bcm->irq_savedstate = BCM43xx_IRQ_INITIAL;
3698 bcm->pci_dev = pci_dev;
3699 bcm->net_dev = net_dev;
3700 bcm->bad_frames_preempt = modparam_bad_frames_preempt;
3701 spin_lock_init(&bcm->_lock);
3702 tasklet_init(&bcm->isr_tasklet,
3703 (void (*)(unsigned long))bcm43xx_interrupt_tasklet,
3704 (unsigned long)bcm);
3705 tasklet_disable_nosync(&bcm->isr_tasklet);
3706 if (modparam_pio) {
3707 bcm->__using_pio = 1;
3708 } else {
3709 err = pci_set_dma_mask(pci_dev, DMA_30BIT_MASK);
3710 err |= pci_set_consistent_dma_mask(pci_dev, DMA_30BIT_MASK);
3711 if (err) {
3712#ifdef CONFIG_BCM43XX_PIO
3713 printk(KERN_WARNING PFX "DMA not supported. Falling back to PIO.\n");
3714 bcm->__using_pio = 1;
3715#else
3716 printk(KERN_ERR PFX "FATAL: DMA not supported and PIO not configured. "
3717 "Recompile the driver with PIO support, please.\n");
3718 return -ENODEV;
3719#endif /* CONFIG_BCM43XX_PIO */
3720 }
3721 }
3722 bcm->rts_threshold = BCM43xx_DEFAULT_RTS_THRESHOLD;
3723
3724 /* default to sw encryption for now */
3725 bcm->ieee->host_build_iv = 0;
3726 bcm->ieee->host_encrypt = 1;
3727 bcm->ieee->host_decrypt = 1;
3728
3729 bcm->ieee->iw_mode = BCM43xx_INITIAL_IWMODE;
3730 bcm->ieee->tx_headroom = sizeof(struct bcm43xx_txhdr);
3731 bcm->ieee->set_security = bcm43xx_ieee80211_set_security;
3732 bcm->ieee->hard_start_xmit = bcm43xx_ieee80211_hard_start_xmit;
3733
3734 return 0;
3735}
3736
3737static int __devinit bcm43xx_init_one(struct pci_dev *pdev,
3738 const struct pci_device_id *ent)
3739{
3740 struct net_device *net_dev;
3741 struct bcm43xx_private *bcm;
3742 int err;
3743
3744#ifdef CONFIG_BCM947XX
3745 if ((pdev->bus->number == 0) && (pdev->device != 0x0800))
3746 return -ENODEV;
3747#endif
3748
3749#ifdef DEBUG_SINGLE_DEVICE_ONLY
3750 if (strcmp(pci_name(pdev), DEBUG_SINGLE_DEVICE_ONLY))
3751 return -ENODEV;
3752#endif
3753
3754 net_dev = alloc_ieee80211softmac(sizeof(*bcm));
3755 if (!net_dev) {
3756 printk(KERN_ERR PFX
3757 "could not allocate ieee80211 device %s\n",
3758 pci_name(pdev));
3759 err = -ENOMEM;
3760 goto out;
3761 }
3762 /* initialize the net_device struct */
3763 SET_MODULE_OWNER(net_dev);
3764 SET_NETDEV_DEV(net_dev, &pdev->dev);
3765
3766 net_dev->open = bcm43xx_net_open;
3767 net_dev->stop = bcm43xx_net_stop;
3768 net_dev->get_stats = bcm43xx_net_get_stats;
3769 net_dev->tx_timeout = bcm43xx_net_tx_timeout;
3770#ifdef CONFIG_NET_POLL_CONTROLLER
3771 net_dev->poll_controller = bcm43xx_net_poll_controller;
3772#endif
3773 net_dev->wireless_handlers = &bcm43xx_wx_handlers_def;
3774 net_dev->irq = pdev->irq;
3775 SET_ETHTOOL_OPS(net_dev, &bcm43xx_ethtool_ops);
3776
3777 /* initialize the bcm43xx_private struct */
3778 bcm = bcm43xx_priv(net_dev);
3779 memset(bcm, 0, sizeof(*bcm));
3780 err = bcm43xx_init_private(bcm, net_dev, pdev);
3781 if (err)
3782 goto err_free_netdev;
3783
3784 pci_set_drvdata(pdev, net_dev);
3785
3786 err = bcm43xx_attach_board(bcm);
3787 if (err)
3788 goto err_free_netdev;
3789
3790 err = register_netdev(net_dev);
3791 if (err) {
3792 printk(KERN_ERR PFX "Cannot register net device, "
3793 "aborting.\n");
3794 err = -ENOMEM;
3795 goto err_detach_board;
3796 }
3797
3798 bcm43xx_debugfs_add_device(bcm);
3799
3800 assert(err == 0);
3801out:
3802 return err;
3803
3804err_detach_board:
3805 bcm43xx_detach_board(bcm);
3806err_free_netdev:
3807 free_ieee80211softmac(net_dev);
3808 goto out;
3809}
3810
3811static void __devexit bcm43xx_remove_one(struct pci_dev *pdev)
3812{
3813 struct net_device *net_dev = pci_get_drvdata(pdev);
3814 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3815
3816 bcm43xx_debugfs_remove_device(bcm);
3817 unregister_netdev(net_dev);
3818 bcm43xx_detach_board(bcm);
3819 assert(bcm->ucode == NULL);
3820 free_ieee80211softmac(net_dev);
3821}
3822
3823/* Hard-reset the chip. Do not call this directly.
3824 * Use bcm43xx_controller_restart()
3825 */
3826static void bcm43xx_chip_reset(void *_bcm)
3827{
3828 struct bcm43xx_private *bcm = _bcm;
3829 struct net_device *net_dev = bcm->net_dev;
3830 struct pci_dev *pci_dev = bcm->pci_dev;
3831 int err;
3832 int was_initialized = bcm->initialized;
3833
3834 netif_stop_queue(bcm->net_dev);
3835 tasklet_disable(&bcm->isr_tasklet);
3836
3837 bcm->firmware_norelease = 1;
3838 if (was_initialized)
3839 bcm43xx_free_board(bcm);
3840 bcm->firmware_norelease = 0;
3841 bcm43xx_detach_board(bcm);
3842 err = bcm43xx_init_private(bcm, net_dev, pci_dev);
3843 if (err)
3844 goto failure;
3845 err = bcm43xx_attach_board(bcm);
3846 if (err)
3847 goto failure;
3848 if (was_initialized) {
3849 err = bcm43xx_init_board(bcm);
3850 if (err)
3851 goto failure;
3852 }
3853 netif_wake_queue(bcm->net_dev);
3854 printk(KERN_INFO PFX "Controller restarted\n");
3855
3856 return;
3857failure:
3858 printk(KERN_ERR PFX "Controller restart failed\n");
3859}
3860
3861/* Hard-reset the chip.
3862 * This can be called from interrupt or process context.
3863 * Make sure to _not_ re-enable device interrupts after this has been called.
3864*/
3865void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason)
3866{
3867 bcm43xx_interrupt_disable(bcm, BCM43xx_IRQ_ALL);
3868 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* dummy read */
3869 printk(KERN_ERR PFX "Controller RESET (%s) ...\n", reason);
3870 INIT_WORK(&bcm->restart_work, bcm43xx_chip_reset, bcm);
3871 schedule_work(&bcm->restart_work);
3872}
3873
3874#ifdef CONFIG_PM
3875
3876static int bcm43xx_suspend(struct pci_dev *pdev, pm_message_t state)
3877{
3878 struct net_device *net_dev = pci_get_drvdata(pdev);
3879 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3880 unsigned long flags;
3881 int try_to_shutdown = 0, err;
3882
3883 dprintk(KERN_INFO PFX "Suspending...\n");
3884
3885 bcm43xx_lock(bcm, flags);
3886 bcm->was_initialized = bcm->initialized;
3887 if (bcm->initialized)
3888 try_to_shutdown = 1;
3889 bcm43xx_unlock(bcm, flags);
3890
3891 netif_device_detach(net_dev);
3892 if (try_to_shutdown) {
3893 ieee80211softmac_stop(net_dev);
3894 err = bcm43xx_disable_interrupts_sync(bcm, &bcm->irq_savedstate);
3895 if (unlikely(err)) {
3896 dprintk(KERN_ERR PFX "Suspend failed.\n");
3897 return -EAGAIN;
3898 }
3899 bcm->firmware_norelease = 1;
3900 bcm43xx_free_board(bcm);
3901 bcm->firmware_norelease = 0;
3902 }
3903 bcm43xx_chipset_detach(bcm);
3904
3905 pci_save_state(pdev);
3906 pci_disable_device(pdev);
3907 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3908
3909 dprintk(KERN_INFO PFX "Device suspended.\n");
3910
3911 return 0;
3912}
3913
3914static int bcm43xx_resume(struct pci_dev *pdev)
3915{
3916 struct net_device *net_dev = pci_get_drvdata(pdev);
3917 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
3918 int err = 0;
3919
3920 dprintk(KERN_INFO PFX "Resuming...\n");
3921
3922 pci_set_power_state(pdev, 0);
3923 pci_enable_device(pdev);
3924 pci_restore_state(pdev);
3925
3926 bcm43xx_chipset_attach(bcm);
3927 if (bcm->was_initialized) {
3928 bcm->irq_savedstate = BCM43xx_IRQ_INITIAL;
3929 err = bcm43xx_init_board(bcm);
3930 }
3931 if (err) {
3932 printk(KERN_ERR PFX "Resume failed!\n");
3933 return err;
3934 }
3935
3936 netif_device_attach(net_dev);
3937
3938 /*FIXME: This should be handled by softmac instead. */
3939 schedule_work(&bcm->softmac->associnfo.work);
3940
3941 dprintk(KERN_INFO PFX "Device resumed.\n");
3942
3943 return 0;
3944}
3945
3946#endif /* CONFIG_PM */
3947
3948static struct pci_driver bcm43xx_pci_driver = {
3949 .name = KBUILD_MODNAME,
3950 .id_table = bcm43xx_pci_tbl,
3951 .probe = bcm43xx_init_one,
3952 .remove = __devexit_p(bcm43xx_remove_one),
3953#ifdef CONFIG_PM
3954 .suspend = bcm43xx_suspend,
3955 .resume = bcm43xx_resume,
3956#endif /* CONFIG_PM */
3957};
3958
3959static int __init bcm43xx_init(void)
3960{
3961 printk(KERN_INFO KBUILD_MODNAME " driver\n");
3962 bcm43xx_debugfs_init();
3963 return pci_register_driver(&bcm43xx_pci_driver);
3964}
3965
3966static void __exit bcm43xx_exit(void)
3967{
3968 pci_unregister_driver(&bcm43xx_pci_driver);
3969 bcm43xx_debugfs_exit();
3970}
3971
3972module_init(bcm43xx_init)
3973module_exit(bcm43xx_exit)
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.h b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
new file mode 100644
index 0000000000..eca79a3859
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
@@ -0,0 +1,168 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#ifndef BCM43xx_MAIN_H_
32#define BCM43xx_MAIN_H_
33
34#include "bcm43xx.h"
35
36#ifdef CONFIG_BCM947XX
37#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
38
39static inline void e_aton(char *str, char *dest)
40{
41 int i = 0;
42 u16 *d = (u16 *) dest;
43
44 for (;;) {
45 dest[i++] = (char) simple_strtoul(str, NULL, 16);
46 str += 2;
47 if (!*str++ || i == 6)
48 break;
49 }
50 for (i = 0; i < 3; i++)
51 d[i] = cpu_to_be16(d[i]);
52}
53#endif
54
55#define P4D_BYT3S(magic, nr_bytes) u8 __p4dding##magic[nr_bytes]
56#define P4D_BYTES(line, nr_bytes) P4D_BYT3S(line, nr_bytes)
57/* Magic helper macro to pad structures. Ignore those above. It's magic. */
58#define PAD_BYTES(nr_bytes) P4D_BYTES( __LINE__ , (nr_bytes))
59
60
61/* Lightweight function to convert a frequency (in Mhz) to a channel number. */
62static inline
63u8 bcm43xx_freq_to_channel_a(int freq)
64{
65 return ((freq - 5000) / 5);
66}
67static inline
68u8 bcm43xx_freq_to_channel_bg(int freq)
69{
70 u8 channel;
71
72 if (freq == 2484)
73 channel = 14;
74 else
75 channel = (freq - 2407) / 5;
76
77 return channel;
78}
79static inline
80u8 bcm43xx_freq_to_channel(struct bcm43xx_private *bcm,
81 int freq)
82{
83 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A)
84 return bcm43xx_freq_to_channel_a(freq);
85 return bcm43xx_freq_to_channel_bg(freq);
86}
87
88/* Lightweight function to convert a channel number to a frequency (in Mhz). */
89static inline
90int bcm43xx_channel_to_freq_a(u8 channel)
91{
92 return (5000 + (5 * channel));
93}
94static inline
95int bcm43xx_channel_to_freq_bg(u8 channel)
96{
97 int freq;
98
99 if (channel == 14)
100 freq = 2484;
101 else
102 freq = 2407 + (5 * channel);
103
104 return freq;
105}
106static inline
107int bcm43xx_channel_to_freq(struct bcm43xx_private *bcm,
108 u8 channel)
109{
110 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A)
111 return bcm43xx_channel_to_freq_a(channel);
112 return bcm43xx_channel_to_freq_bg(channel);
113}
114
115/* Lightweight function to check if a channel number is valid.
116 * Note that this does _NOT_ check for geographical restrictions!
117 */
118static inline
119int bcm43xx_is_valid_channel_a(u8 channel)
120{
121 return (channel <= 200);
122}
123static inline
124int bcm43xx_is_valid_channel_bg(u8 channel)
125{
126 return (channel >= 1 && channel <= 14);
127}
128static inline
129int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm,
130 u8 channel)
131{
132 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A)
133 return bcm43xx_is_valid_channel_a(channel);
134 return bcm43xx_is_valid_channel_bg(channel);
135}
136
137void bcm43xx_tsf_read(struct bcm43xx_private *bcm, u64 *tsf);
138void bcm43xx_tsf_write(struct bcm43xx_private *bcm, u64 tsf);
139
140void bcm43xx_set_iwmode(struct bcm43xx_private *bcm,
141 int iw_mode);
142
143u32 bcm43xx_shm_read32(struct bcm43xx_private *bcm,
144 u16 routing, u16 offset);
145u16 bcm43xx_shm_read16(struct bcm43xx_private *bcm,
146 u16 routing, u16 offset);
147void bcm43xx_shm_write32(struct bcm43xx_private *bcm,
148 u16 routing, u16 offset,
149 u32 value);
150void bcm43xx_shm_write16(struct bcm43xx_private *bcm,
151 u16 routing, u16 offset,
152 u16 value);
153
154void bcm43xx_dummy_transmission(struct bcm43xx_private *bcm);
155
156int bcm43xx_switch_core(struct bcm43xx_private *bcm, struct bcm43xx_coreinfo *new_core);
157
158void bcm43xx_wireless_core_reset(struct bcm43xx_private *bcm, int connect_phy);
159
160void bcm43xx_mac_suspend(struct bcm43xx_private *bcm);
161void bcm43xx_mac_enable(struct bcm43xx_private *bcm);
162
163void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason);
164
165int bcm43xx_sprom_read(struct bcm43xx_private *bcm, u16 *sprom);
166int bcm43xx_sprom_write(struct bcm43xx_private *bcm, const u16 *sprom);
167
168#endif /* BCM43xx_MAIN_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
new file mode 100644
index 0000000000..0a66f43ca0
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
@@ -0,0 +1,2345 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/types.h>
34
35#include "bcm43xx.h"
36#include "bcm43xx_phy.h"
37#include "bcm43xx_main.h"
38#include "bcm43xx_radio.h"
39#include "bcm43xx_ilt.h"
40#include "bcm43xx_power.h"
41
42
43static const s8 bcm43xx_tssi2dbm_b_table[] = {
44 0x4D, 0x4C, 0x4B, 0x4A,
45 0x4A, 0x49, 0x48, 0x47,
46 0x47, 0x46, 0x45, 0x45,
47 0x44, 0x43, 0x42, 0x42,
48 0x41, 0x40, 0x3F, 0x3E,
49 0x3D, 0x3C, 0x3B, 0x3A,
50 0x39, 0x38, 0x37, 0x36,
51 0x35, 0x34, 0x32, 0x31,
52 0x30, 0x2F, 0x2D, 0x2C,
53 0x2B, 0x29, 0x28, 0x26,
54 0x25, 0x23, 0x21, 0x1F,
55 0x1D, 0x1A, 0x17, 0x14,
56 0x10, 0x0C, 0x06, 0x00,
57 -7, -7, -7, -7,
58 -7, -7, -7, -7,
59 -7, -7, -7, -7,
60};
61
62static const s8 bcm43xx_tssi2dbm_g_table[] = {
63 77, 77, 77, 76,
64 76, 76, 75, 75,
65 74, 74, 73, 73,
66 73, 72, 72, 71,
67 71, 70, 70, 69,
68 68, 68, 67, 67,
69 66, 65, 65, 64,
70 63, 63, 62, 61,
71 60, 59, 58, 57,
72 56, 55, 54, 53,
73 52, 50, 49, 47,
74 45, 43, 40, 37,
75 33, 28, 22, 14,
76 5, -7, -20, -20,
77 -20, -20, -20, -20,
78 -20, -20, -20, -20,
79};
80
81static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
82
83
84void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
85{
86 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
87
88 assert(irqs_disabled());
89 if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
90 phy->is_locked = 0;
91 return;
92 }
93 if (bcm->current_core->rev < 3) {
94 bcm43xx_mac_suspend(bcm);
95 spin_lock(&phy->lock);
96 } else {
97 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
98 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
99 }
100 phy->is_locked = 1;
101}
102
103void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
104{
105 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
106
107 assert(irqs_disabled());
108 if (bcm->current_core->rev < 3) {
109 if (phy->is_locked) {
110 spin_unlock(&phy->lock);
111 bcm43xx_mac_enable(bcm);
112 }
113 } else {
114 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
115 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
116 }
117 phy->is_locked = 0;
118}
119
120u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
121{
122 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
123 return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
124}
125
126void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
127{
128 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
129 mmiowb();
130 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
131}
132
133void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
134{
135 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
136 unsigned long flags;
137
138 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
139 if (phy->calibrated)
140 return;
141 if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
142 /* We do not want to be preempted while calibrating
143 * the hardware.
144 */
145 local_irq_save(flags);
146
147 bcm43xx_wireless_core_reset(bcm, 0);
148 bcm43xx_phy_initg(bcm);
149 bcm43xx_wireless_core_reset(bcm, 1);
150
151 local_irq_restore(flags);
152 }
153 phy->calibrated = 1;
154}
155
156/* Connect the PHY
157 * http://bcm-specs.sipsolutions.net/SetPHY
158 */
159int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
160{
161 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
162 u32 flags;
163
164 if (bcm->current_core->rev < 5)
165 goto out;
166
167 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
168 if (connect) {
169 if (!(flags & 0x00010000))
170 return -ENODEV;
171 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
172 flags |= (0x800 << 18);
173 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
174 } else {
175 if (!(flags & 0x00020000))
176 return -ENODEV;
177 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
178 flags &= ~(0x800 << 18);
179 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
180 }
181out:
182 phy->connected = connect;
183 if (connect)
184 dprintk(KERN_INFO PFX "PHY connected\n");
185 else
186 dprintk(KERN_INFO PFX "PHY disconnected\n");
187
188 return 0;
189}
190
191/* intialize B PHY power control
192 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
193 */
194static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
195{
196 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
197 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
198 u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
199 int must_reset_txpower = 0;
200
201 assert(phy->type != BCM43xx_PHYTYPE_A);
202 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
203 (bcm->board_type == 0x0416))
204 return;
205
206 bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
207 bcm43xx_phy_write(bcm, 0x0028, 0x8018);
208
209 if (phy->type == BCM43xx_PHYTYPE_G) {
210 if (!phy->connected)
211 return;
212 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
213 }
214 if (phy->savedpctlreg != 0xFFFF)
215 return;
216
217 if (phy->type == BCM43xx_PHYTYPE_B &&
218 phy->rev >= 2 &&
219 radio->version == 0x2050) {
220 bcm43xx_radio_write16(bcm, 0x0076,
221 bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
222 } else {
223 saved_batt = radio->baseband_atten;
224 saved_ratt = radio->radio_atten;
225 saved_txctl1 = radio->txctl1;
226 if ((radio->revision >= 6) && (radio->revision <= 8)
227 && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
228 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
229 else
230 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
231 must_reset_txpower = 1;
232 }
233 bcm43xx_dummy_transmission(bcm);
234
235 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
236
237 if (must_reset_txpower)
238 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
239 else
240 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
241 bcm43xx_radio_clear_tssi(bcm);
242}
243
244static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
245{
246 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
247 u16 offset = 0x0000;
248
249 if (phy->rev == 1)
250 offset = 0x4C00;
251
252 bcm43xx_ilt_write(bcm, offset, 0x00FE);
253 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
254 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
255 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
256
257 if (phy->rev == 1) {
258 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
259 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
260 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
261 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
262 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
263 }
264
265 bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
266 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
267 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
268 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
269
270 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
271
272 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
273 bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
274 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
275 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
276
277 if (phy->rev == 1)
278 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
279
280 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
281 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
282 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
283 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
284 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
285 bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
286 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
287 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
288 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
289
290 if (phy->rev == 1) {
291 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
292 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
293 } else {
294 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
295 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
296 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
297 }
298
299 if (phy->rev > 2) {
300 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
301 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
302 }
303
304 bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
305 bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
306
307 if (phy->rev == 1) {
308 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
309 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
310 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
311 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
312 }
313
314 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
315 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
316 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
317 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
318}
319
320static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
321{
322 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
323 u16 i;
324
325 assert(phy->type == BCM43xx_PHYTYPE_G);
326 if (phy->rev == 1) {
327 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
328 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
329 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
330 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
331 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
332
333 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
334 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
335 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
336 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
337 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
338 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
339 } else {
340 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
341 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
342
343 if (phy->rev == 2) {
344 bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
345 bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
346 } else if (phy->rev > 2) {
347 bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
348 bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
349 bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
350 }
351 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
352
353 for (i = 0; i < 64; i++)
354 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
355 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
356 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
357 }
358
359 if (phy->rev <= 2)
360 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
361 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
362 else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
363 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
364 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
365 else
366 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
367 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
368
369 if (phy->rev == 2)
370 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
371 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
372 else if ((phy->rev > 2) && (phy->rev <= 7))
373 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
374 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
375
376 if (phy->rev == 1) {
377 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
378 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
379 for (i = 0; i < 4; i++) {
380 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
381 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
382 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
383 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
384 }
385 bcm43xx_phy_agcsetup(bcm);
386
387 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
388 (bcm->board_type == 0x0416) &&
389 (bcm->board_revision == 0x0017))
390 return;
391
392 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
393 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
394 } else {
395 for (i = 0; i <= 0x2F; i++)
396 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
397 bcm43xx_phy_agcsetup(bcm);
398 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
399 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
400 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
401 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
402
403 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
404 (bcm->board_type == 0x0416) &&
405 (bcm->board_revision == 0x0017))
406 return;
407
408 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
409 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
410 }
411}
412
413/* Initialize the noisescaletable for APHY */
414static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
415{
416 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
417 int i;
418
419 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
420 for (i = 0; i < 12; i++) {
421 if (phy->rev == 2)
422 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
423 else
424 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
425 }
426 if (phy->rev == 2)
427 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
428 else
429 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
430 for (i = 0; i < 11; i++) {
431 if (phy->rev == 2)
432 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
433 else
434 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
435 }
436 if (phy->rev == 2)
437 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
438 else
439 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
440}
441
442static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
443{
444 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
445 u16 i;
446
447 assert(phy->type == BCM43xx_PHYTYPE_A);
448 switch (phy->rev) {
449 case 2:
450 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
451 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
452 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
453
454 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
455
456 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
457 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
458 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
459 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
460
461 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
462 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
463 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
464 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
465
466 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
467 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
468 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
469
470 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
471 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
472 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
473 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
474 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
475
476 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
477 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
478 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
479 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
480 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
481 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
482 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
483
484 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
485 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
486 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
487
488 for (i = 0; i < 16; i++)
489 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
490
491 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
492 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
493 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
494 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
495
496 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
497 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
498 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
499 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
500 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
501 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
502 bcm43xx_phy_init_noisescaletbl(bcm);
503 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
504 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
505 break;
506 case 3:
507 for (i = 0; i < 64; i++)
508 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
509
510 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
511
512 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
513 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
514 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
515
516 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
517 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
518 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
519 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
520 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
521
522 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
523 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
524 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
525 bcm43xx_phy_init_noisescaletbl(bcm);
526 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
527 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
528
529 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
530
531 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
532 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
533 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
534 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
535 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
536
537 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
538 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
539 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
540 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
541 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
542 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
543 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
544
545 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
546 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
547 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
548
549 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
550 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
551 break;
552 default:
553 assert(0);
554 }
555}
556
557/* Initialize APHY. This is also called for the GPHY in some cases. */
558static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
559{
560 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
561 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
562 u16 tval;
563
564 if (phy->type == BCM43xx_PHYTYPE_A) {
565 bcm43xx_phy_setupa(bcm);
566 } else {
567 bcm43xx_phy_setupg(bcm);
568 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
569 bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
570 return;
571 }
572
573 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
574 (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
575 bcm43xx_phy_write(bcm, 0x0034, 0x0001);
576
577 TODO();//TODO: RSSI AGC
578 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
579 bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
580 bcm43xx_radio_init2060(bcm);
581
582 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
583 && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
584 if (radio->lofcal == 0xFFFF) {
585 TODO();//TODO: LOF Cal
586 bcm43xx_radio_set_tx_iq(bcm);
587 } else
588 bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
589 }
590
591 bcm43xx_phy_write(bcm, 0x007A, 0xF111);
592
593 if (phy->savedpctlreg == 0xFFFF) {
594 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
595 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
596
597 tval = bcm43xx_ilt_read(bcm, 0x3001);
598 if (phy->rev == 1) {
599 bcm43xx_ilt_write(bcm, 0x3001,
600 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
601 | 0x0058);
602 } else {
603 bcm43xx_ilt_write(bcm, 0x3001,
604 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
605 | 0x002C);
606 }
607 bcm43xx_dummy_transmission(bcm);
608 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
609 bcm43xx_ilt_write(bcm, 0x3001, tval);
610
611 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
612 }
613 bcm43xx_radio_clear_tssi(bcm);
614}
615
616static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
617{
618 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
619 u16 offset, val;
620
621 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
622 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
623 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
624 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
625 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
626 val = 0x3C3D;
627 for (offset = 0x0089; offset < 0x00A7; offset++) {
628 bcm43xx_phy_write(bcm, offset, val);
629 val -= 0x0202;
630 }
631 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
632 if (radio->channel == 0xFF)
633 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
634 else
635 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
636 if (radio->version != 0x2050) {
637 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
638 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
639 }
640 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
641 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
642 if (radio->version == 0x2050) {
643 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
644 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
645 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
646 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
647 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
648 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
649 bcm43xx_radio_init2050(bcm);
650 }
651 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
652 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
653 bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
654 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
655 bcm43xx_phy_lo_b_measure(bcm);
656 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
657 if (radio->version != 0x2050)
658 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
659 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
660 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
661 if (radio->version != 0x2050)
662 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
663 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
664 bcm43xx_phy_init_pctl(bcm);
665}
666
667static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
668{
669 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
670 u16 offset, val;
671
672 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
673 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
674 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
675 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
676 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
677 val = 0x3C3D;
678 for (offset = 0x0089; offset < 0x00A7; offset++) {
679 bcm43xx_phy_write(bcm, offset, val);
680 val -= 0x0202;
681 }
682 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
683 if (radio->channel == 0xFF)
684 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
685 else
686 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
687 if (radio->version != 0x2050) {
688 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
689 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
690 }
691 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
692 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
693 if (radio->version == 0x2050) {
694 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
695 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
696 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
697 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
698 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
699 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
700 bcm43xx_radio_init2050(bcm);
701 }
702 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
703 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
704 if (radio->version == 0x2050)
705 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
706 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
707
708 bcm43xx_phy_lo_b_measure(bcm);
709
710 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
711 if (radio->version == 0x2050)
712 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
713 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
714 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
715 if (radio->version == 0x2050)
716 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
717 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
718 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
719 bcm43xx_calc_nrssi_slope(bcm);
720 bcm43xx_calc_nrssi_threshold(bcm);
721 }
722 bcm43xx_phy_init_pctl(bcm);
723}
724
725static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
726{
727 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
728 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
729 u16 offset;
730
731 if (phy->version == 1 &&
732 radio->version == 0x2050) {
733 bcm43xx_radio_write16(bcm, 0x007A,
734 bcm43xx_radio_read16(bcm, 0x007A)
735 | 0x0050);
736 }
737 if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
738 (bcm->board_type != 0x0416)) {
739 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
740 bcm43xx_phy_write(bcm, offset,
741 (bcm43xx_phy_read(bcm, offset) + 0x2020)
742 & 0x3F3F);
743 }
744 }
745 bcm43xx_phy_write(bcm, 0x0035,
746 (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
747 | 0x0700);
748 if (radio->version == 0x2050)
749 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
750
751 if (phy->connected) {
752 if (radio->version == 0x2050) {
753 bcm43xx_radio_write16(bcm, 0x007A,
754 bcm43xx_radio_read16(bcm, 0x007A)
755 | 0x0020);
756 bcm43xx_radio_write16(bcm, 0x0051,
757 bcm43xx_radio_read16(bcm, 0x0051)
758 | 0x0004);
759 }
760 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
761
762 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
763 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
764
765 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
766
767 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
768 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
769 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
770 }
771
772 if (bcm->bad_frames_preempt) {
773 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
774 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
775 }
776
777 if (phy->version == 1 && radio->version == 0x2050) {
778 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
779 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
780 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
781 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
782 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
783 } else
784 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
785 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
786 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
787
788 if (phy->version == 1 && radio->version == 0x2050)
789 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
790 else
791 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
792
793 if (phy->version == 0)
794 bcm43xx_write16(bcm, 0x03E4, 0x3000);
795
796 /* Force to channel 7, even if not supported. */
797 bcm43xx_radio_selectchannel(bcm, 7, 0);
798
799 if (radio->version != 0x2050) {
800 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
801 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
802 }
803
804 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
805 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
806
807 if (radio->version == 0x2050) {
808 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
809 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
810 }
811
812 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
813 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
814
815 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
816
817 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
818
819 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
820 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
821 bcm43xx_phy_write(bcm, 0x88A3, 0x002A);
822
823 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
824
825 if (radio->version == 0x2050)
826 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
827
828 bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
829}
830
831static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
832{
833 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
834 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
835 u16 offset, val;
836
837 bcm43xx_phy_write(bcm, 0x003E, 0x817A);
838 bcm43xx_radio_write16(bcm, 0x007A,
839 (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
840 if ((radio->manufact == 0x17F) &&
841 (radio->version == 0x2050) &&
842 (radio->revision == 3 ||
843 radio->revision == 4 ||
844 radio->revision == 5)) {
845 bcm43xx_radio_write16(bcm, 0x0051, 0x001F);
846 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
847 bcm43xx_radio_write16(bcm, 0x0053, 0x005B);
848 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
849 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
850 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
851 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
852 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
853 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
854 }
855 if ((radio->manufact == 0x17F) &&
856 (radio->version == 0x2050) &&
857 (radio->revision == 6)) {
858 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
859 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
860 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
861 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
862 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
863 bcm43xx_radio_write16(bcm, 0x005B, 0x008B);
864 bcm43xx_radio_write16(bcm, 0x005C, 0x00B5);
865 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
866 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
867 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
868 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
869 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
870 }
871 if ((radio->manufact == 0x17F) &&
872 (radio->version == 0x2050) &&
873 (radio->revision == 7)) {
874 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
875 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
876 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
877 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
878 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
879 bcm43xx_radio_write16(bcm, 0x005B, 0x00A8);
880 bcm43xx_radio_write16(bcm, 0x005C, 0x0075);
881 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
882 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
883 bcm43xx_radio_write16(bcm, 0x007D, 0x00E8);
884 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
885 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
886 bcm43xx_radio_write16(bcm, 0x007B, 0x0000);
887 }
888 if ((radio->manufact == 0x17F) &&
889 (radio->version == 0x2050) &&
890 (radio->revision == 8)) {
891 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
892 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
893 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
894 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
895 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
896 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
897 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
898 if (bcm->sprom.boardflags & 0x8000) {
899 bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
900 bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
901 } else {
902 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
903 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
904 }
905 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
906 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
907 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
908 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
909 }
910 val = 0x1E1F;
911 for (offset = 0x0088; offset < 0x0098; offset++) {
912 bcm43xx_phy_write(bcm, offset, val);
913 val -= 0x0202;
914 }
915 val = 0x3E3F;
916 for (offset = 0x0098; offset < 0x00A8; offset++) {
917 bcm43xx_phy_write(bcm, offset, val);
918 val -= 0x0202;
919 }
920 val = 0x2120;
921 for (offset = 0x00A8; offset < 0x00C8; offset++) {
922 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
923 val += 0x0202;
924 }
925 if (phy->type == BCM43xx_PHYTYPE_G) {
926 bcm43xx_radio_write16(bcm, 0x007A,
927 bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
928 bcm43xx_radio_write16(bcm, 0x0051,
929 bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
930 bcm43xx_phy_write(bcm, 0x0802,
931 bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
932 bcm43xx_phy_write(bcm, 0x042B,
933 bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
934 }
935
936 /* Force to channel 7, even if not supported. */
937 bcm43xx_radio_selectchannel(bcm, 7, 0);
938
939 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
940 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
941 udelay(40);
942 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C) | 0x0002));
943 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
944 if (radio->manufact == 0x17F &&
945 radio->version == 0x2050 &&
946 radio->revision <= 2) {
947 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
948 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
949 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
950 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
951 }
952 bcm43xx_radio_write16(bcm, 0x007A,
953 (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
954
955 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
956
957 bcm43xx_phy_write(bcm, 0x0014, 0x0200);
958 if (radio->version == 0x2050){
959 if (radio->revision == 3 ||
960 radio->revision == 4 ||
961 radio->revision == 5)
962 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
963 else
964 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
965 }
966 bcm43xx_phy_write(bcm, 0x0038, 0x0668);
967 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
968 if (radio->version == 0x2050) {
969 if (radio->revision == 3 ||
970 radio->revision == 4 ||
971 radio->revision == 5)
972 bcm43xx_phy_write(bcm, 0x005D, bcm43xx_phy_read(bcm, 0x005D) | 0x0003);
973 else if (radio->revision <= 2)
974 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
975 }
976
977 if (phy->rev == 4)
978 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
979 else
980 bcm43xx_write16(bcm, 0x03E4, 0x0009);
981 if (phy->type == BCM43xx_PHYTYPE_B) {
982 bcm43xx_write16(bcm, 0x03E6, 0x8140);
983 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
984 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
985 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
986 (void) bcm43xx_radio_calibrationvalue(bcm);
987 bcm43xx_phy_lo_b_measure(bcm);
988 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
989 bcm43xx_calc_nrssi_slope(bcm);
990 bcm43xx_calc_nrssi_threshold(bcm);
991 }
992 bcm43xx_phy_init_pctl(bcm);
993 } else
994 bcm43xx_write16(bcm, 0x03E6, 0x0);
995}
996
997static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm)
998{
999 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1000 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1001 u16 backup_phy[15];
1002 u16 backup_radio[3];
1003 u16 backup_bband;
1004 u16 i;
1005 u16 loop1_cnt, loop1_done, loop1_omitted;
1006 u16 loop2_done;
1007
1008 backup_phy[0] = bcm43xx_phy_read(bcm, 0x0429);
1009 backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001);
1010 backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811);
1011 backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812);
1012 backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814);
1013 backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815);
1014 backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A);
1015 backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059);
1016 backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058);
1017 backup_phy[9] = bcm43xx_phy_read(bcm, 0x000A);
1018 backup_phy[10] = bcm43xx_phy_read(bcm, 0x0003);
1019 backup_phy[11] = bcm43xx_phy_read(bcm, 0x080F);
1020 backup_phy[12] = bcm43xx_phy_read(bcm, 0x0810);
1021 backup_phy[13] = bcm43xx_phy_read(bcm, 0x002B);
1022 backup_phy[14] = bcm43xx_phy_read(bcm, 0x0015);
1023 bcm43xx_phy_read(bcm, 0x002D); /* dummy read */
1024 backup_bband = radio->baseband_atten;
1025 backup_radio[0] = bcm43xx_radio_read16(bcm, 0x0052);
1026 backup_radio[1] = bcm43xx_radio_read16(bcm, 0x0043);
1027 backup_radio[2] = bcm43xx_radio_read16(bcm, 0x007A);
1028
1029 bcm43xx_phy_write(bcm, 0x0429,
1030 bcm43xx_phy_read(bcm, 0x0429) & 0x3FFF);
1031 bcm43xx_phy_write(bcm, 0x0001,
1032 bcm43xx_phy_read(bcm, 0x0001) & 0x8000);
1033 bcm43xx_phy_write(bcm, 0x0811,
1034 bcm43xx_phy_read(bcm, 0x0811) | 0x0002);
1035 bcm43xx_phy_write(bcm, 0x0812,
1036 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFD);
1037 bcm43xx_phy_write(bcm, 0x0811,
1038 bcm43xx_phy_read(bcm, 0x0811) | 0x0001);
1039 bcm43xx_phy_write(bcm, 0x0812,
1040 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE);
1041 bcm43xx_phy_write(bcm, 0x0814,
1042 bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
1043 bcm43xx_phy_write(bcm, 0x0815,
1044 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
1045 bcm43xx_phy_write(bcm, 0x0814,
1046 bcm43xx_phy_read(bcm, 0x0814) | 0x0002);
1047 bcm43xx_phy_write(bcm, 0x0815,
1048 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD);
1049 bcm43xx_phy_write(bcm, 0x0811,
1050 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
1051 bcm43xx_phy_write(bcm, 0x0812,
1052 bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
1053
1054 bcm43xx_phy_write(bcm, 0x0811,
1055 (bcm43xx_phy_read(bcm, 0x0811)
1056 & 0xFFCF) | 0x0030);
1057 bcm43xx_phy_write(bcm, 0x0812,
1058 (bcm43xx_phy_read(bcm, 0x0812)
1059 & 0xFFCF) | 0x0010);
1060
1061 bcm43xx_phy_write(bcm, 0x005A, 0x0780);
1062 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1063 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1064 if (phy->version == 0) {
1065 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
1066 } else {
1067 bcm43xx_phy_write(bcm, 0x000A,
1068 bcm43xx_phy_read(bcm, 0x000A)
1069 | 0x2000);
1070 }
1071 bcm43xx_phy_write(bcm, 0x0814,
1072 bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
1073 bcm43xx_phy_write(bcm, 0x0815,
1074 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
1075 bcm43xx_phy_write(bcm, 0x0003,
1076 (bcm43xx_phy_read(bcm, 0x0003)
1077 & 0xFF9F) | 0x0040);
1078 if (radio->version == 0x2050 && radio->revision == 2) {
1079 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1080 bcm43xx_radio_write16(bcm, 0x0043,
1081 (bcm43xx_radio_read16(bcm, 0x0043)
1082 & 0xFFF0) | 0x0009);
1083 loop1_cnt = 9;
1084 } else if (radio->revision == 8) {
1085 bcm43xx_radio_write16(bcm, 0x0043, 0x000F);
1086 loop1_cnt = 15;
1087 } else
1088 loop1_cnt = 0;
1089
1090 bcm43xx_phy_set_baseband_attenuation(bcm, 11);
1091
1092 if (phy->rev >= 3)
1093 bcm43xx_phy_write(bcm, 0x080F, 0xC020);
1094 else
1095 bcm43xx_phy_write(bcm, 0x080F, 0x8020);
1096 bcm43xx_phy_write(bcm, 0x0810, 0x0000);
1097
1098 bcm43xx_phy_write(bcm, 0x002B,
1099 (bcm43xx_phy_read(bcm, 0x002B)
1100 & 0xFFC0) | 0x0001);
1101 bcm43xx_phy_write(bcm, 0x002B,
1102 (bcm43xx_phy_read(bcm, 0x002B)
1103 & 0xC0FF) | 0x0800);
1104 bcm43xx_phy_write(bcm, 0x0811,
1105 bcm43xx_phy_read(bcm, 0x0811) | 0x0100);
1106 bcm43xx_phy_write(bcm, 0x0812,
1107 bcm43xx_phy_read(bcm, 0x0812) & 0xCFFF);
1108 if (bcm->sprom.boardflags & BCM43xx_BFL_EXTLNA) {
1109 if (phy->rev >= 7) {
1110 bcm43xx_phy_write(bcm, 0x0811,
1111 bcm43xx_phy_read(bcm, 0x0811)
1112 | 0x0800);
1113 bcm43xx_phy_write(bcm, 0x0812,
1114 bcm43xx_phy_read(bcm, 0x0812)
1115 | 0x8000);
1116 }
1117 }
1118 bcm43xx_radio_write16(bcm, 0x007A,
1119 bcm43xx_radio_read16(bcm, 0x007A)
1120 & 0x00F7);
1121
1122 for (i = 0; i < loop1_cnt; i++) {
1123 bcm43xx_radio_write16(bcm, 0x0043, loop1_cnt);
1124 bcm43xx_phy_write(bcm, 0x0812,
1125 (bcm43xx_phy_read(bcm, 0x0812)
1126 & 0xF0FF) | (i << 8));
1127 bcm43xx_phy_write(bcm, 0x0015,
1128 (bcm43xx_phy_read(bcm, 0x0015)
1129 & 0x0FFF) | 0xA000);
1130 bcm43xx_phy_write(bcm, 0x0015,
1131 (bcm43xx_phy_read(bcm, 0x0015)
1132 & 0x0FFF) | 0xF000);
1133 udelay(20);
1134 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1135 break;
1136 }
1137 loop1_done = i;
1138 loop1_omitted = loop1_cnt - loop1_done;
1139
1140 loop2_done = 0;
1141 if (loop1_done >= 8) {
1142 bcm43xx_phy_write(bcm, 0x0812,
1143 bcm43xx_phy_read(bcm, 0x0812)
1144 | 0x0030);
1145 for (i = loop1_done - 8; i < 16; i++) {
1146 bcm43xx_phy_write(bcm, 0x0812,
1147 (bcm43xx_phy_read(bcm, 0x0812)
1148 & 0xF0FF) | (i << 8));
1149 bcm43xx_phy_write(bcm, 0x0015,
1150 (bcm43xx_phy_read(bcm, 0x0015)
1151 & 0x0FFF) | 0xA000);
1152 bcm43xx_phy_write(bcm, 0x0015,
1153 (bcm43xx_phy_read(bcm, 0x0015)
1154 & 0x0FFF) | 0xF000);
1155 udelay(20);
1156 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1157 break;
1158 }
1159 }
1160
1161 bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]);
1162 bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]);
1163 bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]);
1164 bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]);
1165 bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]);
1166 bcm43xx_phy_write(bcm, 0x000A, backup_phy[9]);
1167 bcm43xx_phy_write(bcm, 0x0003, backup_phy[10]);
1168 bcm43xx_phy_write(bcm, 0x080F, backup_phy[11]);
1169 bcm43xx_phy_write(bcm, 0x0810, backup_phy[12]);
1170 bcm43xx_phy_write(bcm, 0x002B, backup_phy[13]);
1171 bcm43xx_phy_write(bcm, 0x0015, backup_phy[14]);
1172
1173 bcm43xx_phy_set_baseband_attenuation(bcm, backup_bband);
1174
1175 bcm43xx_radio_write16(bcm, 0x0052, backup_radio[0]);
1176 bcm43xx_radio_write16(bcm, 0x0043, backup_radio[1]);
1177 bcm43xx_radio_write16(bcm, 0x007A, backup_radio[2]);
1178
1179 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2] | 0x0003);
1180 udelay(10);
1181 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2]);
1182 bcm43xx_phy_write(bcm, 0x0812, backup_phy[3]);
1183 bcm43xx_phy_write(bcm, 0x0429, backup_phy[0]);
1184 bcm43xx_phy_write(bcm, 0x0001, backup_phy[1]);
1185
1186 phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
1187 phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
1188}
1189
1190static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1191{
1192 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1193 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1194 u16 tmp;
1195
1196 if (phy->rev == 1)
1197 bcm43xx_phy_initb5(bcm);
1198 else if (phy->rev >= 2 && phy->rev <= 7)
1199 bcm43xx_phy_initb6(bcm);
1200 if (phy->rev >= 2 || phy->connected)
1201 bcm43xx_phy_inita(bcm);
1202
1203 if (phy->rev >= 2) {
1204 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1205 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1206 if (phy->rev == 2)
1207 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1208 else if (phy->rev >= 3)
1209 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1210 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1211 if (phy->connected) {
1212 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1213 if (tmp < 6) {
1214 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1215 bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1216 if (tmp != 3) {
1217 bcm43xx_phy_write(bcm, 0x04CC,
1218 (bcm43xx_phy_read(bcm, 0x04CC)
1219 & 0x00FF) | 0x1F00);
1220 }
1221 }
1222 }
1223 }
1224 if (phy->rev < 3 && phy->connected)
1225 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1226 if (phy->rev >= 6 && phy->rev <= 8) {
1227 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1228 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1229 }
1230 if (phy->rev >= 2 && phy->connected)
1231 bcm43xx_calc_loopback_gain(bcm);
1232 if (radio->revision != 8) {
1233 if (radio->initval == 0xFFFF)
1234 radio->initval = bcm43xx_radio_init2050(bcm);
1235 else
1236 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1237 }
1238 if (radio->txctl2 == 0xFFFF) {
1239 bcm43xx_phy_lo_g_measure(bcm);
1240 } else {
1241 if (radio->version == 0x2050 && radio->revision == 8) {
1242 //FIXME
1243 } else {
1244 bcm43xx_radio_write16(bcm, 0x0052,
1245 (bcm43xx_radio_read16(bcm, 0x0052)
1246 & 0xFFF0) | radio->txctl1);
1247 }
1248 if (phy->rev >= 6) {
1249 /*
1250 bcm43xx_phy_write(bcm, 0x0036,
1251 (bcm43xx_phy_read(bcm, 0x0036)
1252 & 0xF000) | (FIXME << 12));
1253 */
1254 }
1255 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1256 bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1257 else
1258 bcm43xx_phy_write(bcm, 0x003E, 0x807F);
1259 if (phy->rev < 2)
1260 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1261 else
1262 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1263 }
1264 if (phy->connected) {
1265 bcm43xx_phy_lo_adjust(bcm, 0);
1266 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1267 }
1268
1269 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
1270 /* The specs state to update the NRSSI LT with
1271 * the value 0x7FFFFFFF here. I think that is some weird
1272 * compiler optimization in the original driver.
1273 * Essentially, what we do here is resetting all NRSSI LT
1274 * entries to -32 (see the limit_value() in nrssi_hw_update())
1275 */
1276 bcm43xx_nrssi_hw_update(bcm, 0xFFFF);
1277 bcm43xx_calc_nrssi_threshold(bcm);
1278 } else if (phy->connected) {
1279 if (radio->nrssi[0] == -1000) {
1280 assert(radio->nrssi[1] == -1000);
1281 bcm43xx_calc_nrssi_slope(bcm);
1282 } else {
1283 assert(radio->nrssi[1] != -1000);
1284 bcm43xx_calc_nrssi_threshold(bcm);
1285 }
1286 }
1287 if (radio->revision == 8)
1288 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
1289 bcm43xx_phy_init_pctl(bcm);
1290 if (bcm->chip_id == 0x4306 && bcm->chip_package != 2) {
1291 bcm43xx_phy_write(bcm, 0x0429,
1292 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1293 bcm43xx_phy_write(bcm, 0x04C3,
1294 bcm43xx_phy_read(bcm, 0x04C3) & 0x7FFF);
1295 }
1296}
1297
1298static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1299{
1300 int i;
1301 u16 ret = 0;
1302
1303 for (i = 0; i < 10; i++){
1304 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1305 udelay(1);
1306 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1307 udelay(10);
1308 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1309 udelay(40);
1310 ret += bcm43xx_phy_read(bcm, 0x002C);
1311 }
1312
1313 return ret;
1314}
1315
1316void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1317{
1318 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1319 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1320 u16 regstack[12] = { 0 };
1321 u16 mls;
1322 u16 fval;
1323 int i, j;
1324
1325 regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1326 regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1327
1328 if (radio->version == 0x2053) {
1329 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1330 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1331 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1332 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1333 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1334 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1335
1336 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1337 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1338 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1339 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1340
1341 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1342 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1343 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1344 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1345 }
1346 bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1347 bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1348
1349 if (radio->version == 0x2053) {
1350 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1351 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1352 }
1353
1354 phy->minlowsig[0] = 0xFFFF;
1355
1356 for (i = 0; i < 4; i++) {
1357 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1358 bcm43xx_phy_lo_b_r15_loop(bcm);
1359 }
1360 for (i = 0; i < 10; i++) {
1361 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1362 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1363 if (mls < phy->minlowsig[0]) {
1364 phy->minlowsig[0] = mls;
1365 phy->minlowsigpos[0] = i;
1366 }
1367 }
1368 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1369
1370 phy->minlowsig[1] = 0xFFFF;
1371
1372 for (i = -4; i < 5; i += 2) {
1373 for (j = -4; j < 5; j += 2) {
1374 if (j < 0)
1375 fval = (0x0100 * i) + j + 0x0100;
1376 else
1377 fval = (0x0100 * i) + j;
1378 bcm43xx_phy_write(bcm, 0x002F, fval);
1379 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1380 if (mls < phy->minlowsig[1]) {
1381 phy->minlowsig[1] = mls;
1382 phy->minlowsigpos[1] = fval;
1383 }
1384 }
1385 }
1386 phy->minlowsigpos[1] += 0x0101;
1387
1388 bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1389 if (radio->version == 0x2053) {
1390 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1391 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1392 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1393 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1394 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1395 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1396
1397 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1398 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1399
1400 bcm43xx_radio_write16(bcm, 0x0052,
1401 (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1402 | regstack[11]);
1403
1404 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1405 }
1406 bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1407}
1408
1409static inline
1410u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1411{
1412 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1413
1414 if (phy->connected) {
1415 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1416 control <<= 8;
1417 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1418 udelay(5);
1419 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1420 udelay(2);
1421 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1422 udelay(4);
1423 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1424 udelay(8);
1425 } else {
1426 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1427 udelay(2);
1428 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1429 udelay(4);
1430 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1431 udelay(8);
1432 }
1433
1434 return bcm43xx_phy_read(bcm, 0x002D);
1435}
1436
1437static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1438{
1439 int i;
1440 u32 ret = 0;
1441
1442 for (i = 0; i < 8; i++)
1443 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1444
1445 return ret;
1446}
1447
1448/* Write the LocalOscillator CONTROL */
1449static inline
1450void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1451 struct bcm43xx_lopair *pair)
1452{
1453 u16 value;
1454
1455 value = (u8)(pair->low);
1456 value |= ((u8)(pair->high)) << 8;
1457
1458#ifdef CONFIG_BCM43XX_DEBUG
1459 /* Sanity check. */
1460 if (pair->low < -8 || pair->low > 8 ||
1461 pair->high < -8 || pair->high > 8) {
1462 printk(KERN_WARNING PFX
1463 "WARNING: Writing invalid LOpair "
1464 "(low: %d, high: %d, index: %lu)\n",
1465 pair->low, pair->high,
1466 (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1467 dump_stack();
1468 }
1469#endif
1470
1471 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1472}
1473
1474static inline
1475struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1476 u16 baseband_attenuation,
1477 u16 radio_attenuation,
1478 u16 tx)
1479{
1480 static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1481 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1482
1483 if (baseband_attenuation > 6)
1484 baseband_attenuation = 6;
1485 assert(radio_attenuation < 10);
1486
1487 if (tx == 3) {
1488 return bcm43xx_get_lopair(phy,
1489 radio_attenuation,
1490 baseband_attenuation);
1491 }
1492 return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1493}
1494
1495static inline
1496struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1497{
1498 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1499
1500 return bcm43xx_find_lopair(bcm,
1501 radio->baseband_atten,
1502 radio->radio_atten,
1503 radio->txctl1);
1504}
1505
1506/* Adjust B/G LO */
1507void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1508{
1509 struct bcm43xx_lopair *pair;
1510
1511 if (fixed) {
1512 /* Use fixed values. Only for initialization. */
1513 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1514 } else
1515 pair = bcm43xx_current_lopair(bcm);
1516 bcm43xx_lo_write(bcm, pair);
1517}
1518
1519static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1520{
1521 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1522 u16 txctl2 = 0, i;
1523 u32 smallest, tmp;
1524
1525 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1526 udelay(10);
1527 smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1528 for (i = 0; i < 16; i++) {
1529 bcm43xx_radio_write16(bcm, 0x0052, i);
1530 udelay(10);
1531 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1532 if (tmp < smallest) {
1533 smallest = tmp;
1534 txctl2 = i;
1535 }
1536 }
1537 radio->txctl2 = txctl2;
1538}
1539
1540static
1541void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1542 const struct bcm43xx_lopair *in_pair,
1543 struct bcm43xx_lopair *out_pair,
1544 u16 r27)
1545{
1546 static const struct bcm43xx_lopair transitions[8] = {
1547 { .high = 1, .low = 1, },
1548 { .high = 1, .low = 0, },
1549 { .high = 1, .low = -1, },
1550 { .high = 0, .low = -1, },
1551 { .high = -1, .low = -1, },
1552 { .high = -1, .low = 0, },
1553 { .high = -1, .low = 1, },
1554 { .high = 0, .low = 1, },
1555 };
1556 struct bcm43xx_lopair lowest_transition = {
1557 .high = in_pair->high,
1558 .low = in_pair->low,
1559 };
1560 struct bcm43xx_lopair tmp_pair;
1561 struct bcm43xx_lopair transition;
1562 int i = 12;
1563 int state = 0;
1564 int found_lower;
1565 int j, begin, end;
1566 u32 lowest_deviation;
1567 u32 tmp;
1568
1569 /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1570
1571 bcm43xx_lo_write(bcm, &lowest_transition);
1572 lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1573 do {
1574 found_lower = 0;
1575 assert(state >= 0 && state <= 8);
1576 if (state == 0) {
1577 begin = 1;
1578 end = 8;
1579 } else if (state % 2 == 0) {
1580 begin = state - 1;
1581 end = state + 1;
1582 } else {
1583 begin = state - 2;
1584 end = state + 2;
1585 }
1586 if (begin < 1)
1587 begin += 8;
1588 if (end > 8)
1589 end -= 8;
1590
1591 j = begin;
1592 tmp_pair.high = lowest_transition.high;
1593 tmp_pair.low = lowest_transition.low;
1594 while (1) {
1595 assert(j >= 1 && j <= 8);
1596 transition.high = tmp_pair.high + transitions[j - 1].high;
1597 transition.low = tmp_pair.low + transitions[j - 1].low;
1598 if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1599 bcm43xx_lo_write(bcm, &transition);
1600 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1601 if (tmp < lowest_deviation) {
1602 lowest_deviation = tmp;
1603 state = j;
1604 found_lower = 1;
1605
1606 lowest_transition.high = transition.high;
1607 lowest_transition.low = transition.low;
1608 }
1609 }
1610 if (j == end)
1611 break;
1612 if (j == 8)
1613 j = 1;
1614 else
1615 j++;
1616 }
1617 } while (i-- && found_lower);
1618
1619 out_pair->high = lowest_transition.high;
1620 out_pair->low = lowest_transition.low;
1621}
1622
1623/* Set the baseband attenuation value on chip. */
1624void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1625 u16 baseband_attenuation)
1626{
1627 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1628 u16 value;
1629
1630 if (phy->version == 0) {
1631 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1632 value |= (baseband_attenuation & 0x000F);
1633 bcm43xx_write16(bcm, 0x03E6, value);
1634 return;
1635 }
1636
1637 if (phy->version > 1) {
1638 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1639 value |= (baseband_attenuation << 2) & 0x003C;
1640 } else {
1641 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1642 value |= (baseband_attenuation << 3) & 0x0078;
1643 }
1644 bcm43xx_phy_write(bcm, 0x0060, value);
1645}
1646
1647/* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1648void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1649{
1650 static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1651 const int is_initializing = bcm43xx_is_initializing(bcm);
1652 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1653 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1654 u16 h, i, oldi = 0, j;
1655 struct bcm43xx_lopair control;
1656 struct bcm43xx_lopair *tmp_control;
1657 u16 tmp;
1658 u16 regstack[16] = { 0 };
1659 u8 oldchannel;
1660
1661 //XXX: What are these?
1662 u8 r27 = 0, r31;
1663
1664 oldchannel = radio->channel;
1665 /* Setup */
1666 if (phy->connected) {
1667 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1668 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1669 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1670 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1671 }
1672 regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1673 bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1674 regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1675 regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1676 regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1677 regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1678 regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1679 regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1680 regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1681 regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1682 if (phy->connected) {
1683 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1684 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1685 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1686 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1687 }
1688 bcm43xx_radio_selectchannel(bcm, 6, 0);
1689 if (phy->connected) {
1690 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1691 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1692 bcm43xx_dummy_transmission(bcm);
1693 }
1694 bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1695
1696 bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1697
1698 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1699 bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1700 bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1701 bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1702 bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1703 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1704 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1705 if (phy->connected) {
1706 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1707 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1708 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1709 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1710 }
1711 if (is_initializing)
1712 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1713 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1714
1715 /* Measure */
1716 control.low = 0;
1717 control.high = 0;
1718 for (h = 0; h < 10; h++) {
1719 /* Loop over each possible RadioAttenuation (0-9) */
1720 i = pairorder[h];
1721 if (is_initializing) {
1722 if (i == 3) {
1723 control.low = 0;
1724 control.high = 0;
1725 } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1726 ((i % 2 == 0) && (oldi % 2 == 0))) {
1727 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1728 memcpy(&control, tmp_control, sizeof(control));
1729 } else {
1730 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1731 memcpy(&control, tmp_control, sizeof(control));
1732 }
1733 }
1734 /* Loop over each possible BasebandAttenuation/2 */
1735 for (j = 0; j < 4; j++) {
1736 if (is_initializing) {
1737 tmp = i * 2 + j;
1738 r27 = 0;
1739 r31 = 0;
1740 if (tmp > 14) {
1741 r31 = 1;
1742 if (tmp > 17)
1743 r27 = 1;
1744 if (tmp > 19)
1745 r27 = 2;
1746 }
1747 } else {
1748 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1749 if (!tmp_control->used)
1750 continue;
1751 memcpy(&control, tmp_control, sizeof(control));
1752 r27 = 3;
1753 r31 = 0;
1754 }
1755 bcm43xx_radio_write16(bcm, 0x43, i);
1756 bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
1757 udelay(10);
1758
1759 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1760
1761 tmp = (regstack[10] & 0xFFF0);
1762 if (r31)
1763 tmp |= 0x0008;
1764 bcm43xx_radio_write16(bcm, 0x007A, tmp);
1765
1766 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1767 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1768 }
1769 oldi = i;
1770 }
1771 /* Loop over each possible RadioAttenuation (10-13) */
1772 for (i = 10; i < 14; i++) {
1773 /* Loop over each possible BasebandAttenuation/2 */
1774 for (j = 0; j < 4; j++) {
1775 if (is_initializing) {
1776 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1777 memcpy(&control, tmp_control, sizeof(control));
1778 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1779 r27 = 0;
1780 r31 = 0;
1781 if (tmp > 14) {
1782 r31 = 1;
1783 if (tmp > 17)
1784 r27 = 1;
1785 if (tmp > 19)
1786 r27 = 2;
1787 }
1788 } else {
1789 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1790 if (!tmp_control->used)
1791 continue;
1792 memcpy(&control, tmp_control, sizeof(control));
1793 r27 = 3;
1794 r31 = 0;
1795 }
1796 bcm43xx_radio_write16(bcm, 0x43, i - 9);
1797 bcm43xx_radio_write16(bcm, 0x52,
1798 radio->txctl2
1799 | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1800 udelay(10);
1801
1802 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1803
1804 tmp = (regstack[10] & 0xFFF0);
1805 if (r31)
1806 tmp |= 0x0008;
1807 bcm43xx_radio_write16(bcm, 0x7A, tmp);
1808
1809 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1810 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1811 }
1812 }
1813
1814 /* Restoration */
1815 if (phy->connected) {
1816 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1817 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1818 udelay(5);
1819 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1820 udelay(2);
1821 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1822 } else
1823 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1824 bcm43xx_phy_lo_adjust(bcm, is_initializing);
1825 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1826 if (phy->connected)
1827 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1828 else
1829 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1830 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1831 bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1832 bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1833 bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1834 bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1835 bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1836 bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1837 regstack[11] &= 0x00F0;
1838 regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1839 bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1840 bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1841 if (phy->connected) {
1842 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1843 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1844 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1845 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1846 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1847 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1848 }
1849 bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1850
1851#ifdef CONFIG_BCM43XX_DEBUG
1852 {
1853 /* Sanity check for all lopairs. */
1854 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1855 tmp_control = phy->_lo_pairs + i;
1856 if (tmp_control->low < -8 || tmp_control->low > 8 ||
1857 tmp_control->high < -8 || tmp_control->high > 8) {
1858 printk(KERN_WARNING PFX
1859 "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1860 tmp_control->low, tmp_control->high, i);
1861 }
1862 }
1863 }
1864#endif /* CONFIG_BCM43XX_DEBUG */
1865}
1866
1867static
1868void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1869{
1870 struct bcm43xx_lopair *pair;
1871
1872 pair = bcm43xx_current_lopair(bcm);
1873 pair->used = 1;
1874}
1875
1876void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1877{
1878 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1879 struct bcm43xx_lopair *pair;
1880 int i;
1881
1882 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1883 pair = phy->_lo_pairs + i;
1884 pair->used = 0;
1885 }
1886}
1887
1888/* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1889 * This function converts a TSSI value to dBm in Q5.2
1890 */
1891static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1892{
1893 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1894 s8 dbm = 0;
1895 s32 tmp;
1896
1897 tmp = phy->idle_tssi;
1898 tmp += tssi;
1899 tmp -= phy->savedpctlreg;
1900
1901 switch (phy->type) {
1902 case BCM43xx_PHYTYPE_A:
1903 tmp += 0x80;
1904 tmp = limit_value(tmp, 0x00, 0xFF);
1905 dbm = phy->tssi2dbm[tmp];
1906 TODO(); //TODO: There's a FIXME on the specs
1907 break;
1908 case BCM43xx_PHYTYPE_B:
1909 case BCM43xx_PHYTYPE_G:
1910 tmp = limit_value(tmp, 0x00, 0x3F);
1911 dbm = phy->tssi2dbm[tmp];
1912 break;
1913 default:
1914 assert(0);
1915 }
1916
1917 return dbm;
1918}
1919
1920/* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1921void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1922{
1923 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1924 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1925
1926 if (phy->savedpctlreg == 0xFFFF)
1927 return;
1928 if ((bcm->board_type == 0x0416) &&
1929 (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1930 return;
1931
1932 switch (phy->type) {
1933 case BCM43xx_PHYTYPE_A: {
1934
1935 TODO(); //TODO: Nothing for A PHYs yet :-/
1936
1937 break;
1938 }
1939 case BCM43xx_PHYTYPE_B:
1940 case BCM43xx_PHYTYPE_G: {
1941 u16 tmp;
1942 u16 txpower;
1943 s8 v0, v1, v2, v3;
1944 s8 average;
1945 u8 max_pwr;
1946 s16 desired_pwr, estimated_pwr, pwr_adjust;
1947 s16 radio_att_delta, baseband_att_delta;
1948 s16 radio_attenuation, baseband_attenuation;
1949 unsigned long phylock_flags;
1950
1951 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1952 v0 = (s8)(tmp & 0x00FF);
1953 v1 = (s8)((tmp & 0xFF00) >> 8);
1954 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1955 v2 = (s8)(tmp & 0x00FF);
1956 v3 = (s8)((tmp & 0xFF00) >> 8);
1957 tmp = 0;
1958
1959 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1960 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1961 v0 = (s8)(tmp & 0x00FF);
1962 v1 = (s8)((tmp & 0xFF00) >> 8);
1963 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1964 v2 = (s8)(tmp & 0x00FF);
1965 v3 = (s8)((tmp & 0xFF00) >> 8);
1966 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1967 return;
1968 v0 = (v0 + 0x20) & 0x3F;
1969 v1 = (v1 + 0x20) & 0x3F;
1970 v2 = (v2 + 0x20) & 0x3F;
1971 v3 = (v3 + 0x20) & 0x3F;
1972 tmp = 1;
1973 }
1974 bcm43xx_radio_clear_tssi(bcm);
1975
1976 average = (v0 + v1 + v2 + v3 + 2) / 4;
1977
1978 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1979 average -= 13;
1980
1981 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1982
1983 max_pwr = bcm->sprom.maxpower_bgphy;
1984
1985 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1986 (phy->type == BCM43xx_PHYTYPE_G))
1987 max_pwr -= 0x3;
1988
1989 /*TODO:
1990 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1991 where REG is the max power as per the regulatory domain
1992 */
1993
1994 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
1995 /* Check if we need to adjust the current power. */
1996 pwr_adjust = desired_pwr - estimated_pwr;
1997 radio_att_delta = -(pwr_adjust + 7) >> 3;
1998 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
1999 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
2000 bcm43xx_phy_lo_mark_current_used(bcm);
2001 return;
2002 }
2003
2004 /* Calculate the new attenuation values. */
2005 baseband_attenuation = radio->baseband_atten;
2006 baseband_attenuation += baseband_att_delta;
2007 radio_attenuation = radio->radio_atten;
2008 radio_attenuation += radio_att_delta;
2009
2010 /* Get baseband and radio attenuation values into their permitted ranges.
2011 * baseband 0-11, radio 0-9.
2012 * Radio attenuation affects power level 4 times as much as baseband.
2013 */
2014 if (radio_attenuation < 0) {
2015 baseband_attenuation -= (4 * -radio_attenuation);
2016 radio_attenuation = 0;
2017 } else if (radio_attenuation > 9) {
2018 baseband_attenuation += (4 * (radio_attenuation - 9));
2019 radio_attenuation = 9;
2020 } else {
2021 while (baseband_attenuation < 0 && radio_attenuation > 0) {
2022 baseband_attenuation += 4;
2023 radio_attenuation--;
2024 }
2025 while (baseband_attenuation > 11 && radio_attenuation < 9) {
2026 baseband_attenuation -= 4;
2027 radio_attenuation++;
2028 }
2029 }
2030 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2031
2032 txpower = radio->txctl1;
2033 if ((radio->version == 0x2050) && (radio->revision == 2)) {
2034 if (radio_attenuation <= 1) {
2035 if (txpower == 0) {
2036 txpower = 3;
2037 radio_attenuation += 2;
2038 baseband_attenuation += 2;
2039 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2040 baseband_attenuation += 4 * (radio_attenuation - 2);
2041 radio_attenuation = 2;
2042 }
2043 } else if (radio_attenuation > 4 && txpower != 0) {
2044 txpower = 0;
2045 if (baseband_attenuation < 3) {
2046 radio_attenuation -= 3;
2047 baseband_attenuation += 2;
2048 } else {
2049 radio_attenuation -= 2;
2050 baseband_attenuation -= 2;
2051 }
2052 }
2053 }
2054 radio->txctl1 = txpower;
2055 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2056 radio_attenuation = limit_value(radio_attenuation, 0, 9);
2057
2058 bcm43xx_phy_lock(bcm, phylock_flags);
2059 bcm43xx_radio_lock(bcm);
2060 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
2061 radio_attenuation, txpower);
2062 bcm43xx_phy_lo_mark_current_used(bcm);
2063 bcm43xx_radio_unlock(bcm);
2064 bcm43xx_phy_unlock(bcm, phylock_flags);
2065 break;
2066 }
2067 default:
2068 assert(0);
2069 }
2070}
2071
2072static inline
2073s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
2074{
2075 if (num < 0)
2076 return num/den;
2077 else
2078 return (num+den/2)/den;
2079}
2080
2081static inline
2082s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
2083{
2084 s32 m1, m2, f = 256, q, delta;
2085 s8 i = 0;
2086
2087 m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
2088 m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
2089 do {
2090 if (i > 15)
2091 return -EINVAL;
2092 q = bcm43xx_tssi2dbm_ad(f * 4096 -
2093 bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
2094 delta = abs(q - f);
2095 f = q;
2096 i++;
2097 } while (delta >= 2);
2098 entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
2099 return 0;
2100}
2101
2102/* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
2103int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
2104{
2105 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2106 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2107 s16 pab0, pab1, pab2;
2108 u8 idx;
2109 s8 *dyn_tssi2dbm;
2110
2111 if (phy->type == BCM43xx_PHYTYPE_A) {
2112 pab0 = (s16)(bcm->sprom.pa1b0);
2113 pab1 = (s16)(bcm->sprom.pa1b1);
2114 pab2 = (s16)(bcm->sprom.pa1b2);
2115 } else {
2116 pab0 = (s16)(bcm->sprom.pa0b0);
2117 pab1 = (s16)(bcm->sprom.pa0b1);
2118 pab2 = (s16)(bcm->sprom.pa0b2);
2119 }
2120
2121 if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
2122 phy->idle_tssi = 0x34;
2123 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2124 return 0;
2125 }
2126
2127 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2128 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2129 /* The pabX values are set in SPROM. Use them. */
2130 if (phy->type == BCM43xx_PHYTYPE_A) {
2131 if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
2132 (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
2133 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
2134 else
2135 phy->idle_tssi = 62;
2136 } else {
2137 if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
2138 (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
2139 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
2140 else
2141 phy->idle_tssi = 62;
2142 }
2143 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2144 if (dyn_tssi2dbm == NULL) {
2145 printk(KERN_ERR PFX "Could not allocate memory"
2146 "for tssi2dbm table\n");
2147 return -ENOMEM;
2148 }
2149 for (idx = 0; idx < 64; idx++)
2150 if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
2151 phy->tssi2dbm = NULL;
2152 printk(KERN_ERR PFX "Could not generate "
2153 "tssi2dBm table\n");
2154 return -ENODEV;
2155 }
2156 phy->tssi2dbm = dyn_tssi2dbm;
2157 phy->dyn_tssi_tbl = 1;
2158 } else {
2159 /* pabX values not set in SPROM. */
2160 switch (phy->type) {
2161 case BCM43xx_PHYTYPE_A:
2162 /* APHY needs a generated table. */
2163 phy->tssi2dbm = NULL;
2164 printk(KERN_ERR PFX "Could not generate tssi2dBm "
2165 "table (wrong SPROM info)!\n");
2166 return -ENODEV;
2167 case BCM43xx_PHYTYPE_B:
2168 phy->idle_tssi = 0x34;
2169 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2170 break;
2171 case BCM43xx_PHYTYPE_G:
2172 phy->idle_tssi = 0x34;
2173 phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
2174 break;
2175 }
2176 }
2177
2178 return 0;
2179}
2180
2181int bcm43xx_phy_init(struct bcm43xx_private *bcm)
2182{
2183 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2184 int err = -ENODEV;
2185 unsigned long flags;
2186
2187 /* We do not want to be preempted while calibrating
2188 * the hardware.
2189 */
2190 local_irq_save(flags);
2191
2192 switch (phy->type) {
2193 case BCM43xx_PHYTYPE_A:
2194 if (phy->rev == 2 || phy->rev == 3) {
2195 bcm43xx_phy_inita(bcm);
2196 err = 0;
2197 }
2198 break;
2199 case BCM43xx_PHYTYPE_B:
2200 switch (phy->rev) {
2201 case 2:
2202 bcm43xx_phy_initb2(bcm);
2203 err = 0;
2204 break;
2205 case 4:
2206 bcm43xx_phy_initb4(bcm);
2207 err = 0;
2208 break;
2209 case 5:
2210 bcm43xx_phy_initb5(bcm);
2211 err = 0;
2212 break;
2213 case 6:
2214 bcm43xx_phy_initb6(bcm);
2215 err = 0;
2216 break;
2217 }
2218 break;
2219 case BCM43xx_PHYTYPE_G:
2220 bcm43xx_phy_initg(bcm);
2221 err = 0;
2222 break;
2223 }
2224 local_irq_restore(flags);
2225 if (err)
2226 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2227
2228 return err;
2229}
2230
2231void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2232{
2233 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2234 u16 antennadiv;
2235 u16 offset;
2236 u16 value;
2237 u32 ucodeflags;
2238
2239 antennadiv = phy->antenna_diversity;
2240
2241 if (antennadiv == 0xFFFF)
2242 antennadiv = 3;
2243 assert(antennadiv <= 3);
2244
2245 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2246 BCM43xx_UCODEFLAGS_OFFSET);
2247 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2248 BCM43xx_UCODEFLAGS_OFFSET,
2249 ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2250
2251 switch (phy->type) {
2252 case BCM43xx_PHYTYPE_A:
2253 case BCM43xx_PHYTYPE_G:
2254 if (phy->type == BCM43xx_PHYTYPE_A)
2255 offset = 0x0000;
2256 else
2257 offset = 0x0400;
2258
2259 if (antennadiv == 2)
2260 value = (3/*automatic*/ << 7);
2261 else
2262 value = (antennadiv << 7);
2263 bcm43xx_phy_write(bcm, offset + 1,
2264 (bcm43xx_phy_read(bcm, offset + 1)
2265 & 0x7E7F) | value);
2266
2267 if (antennadiv >= 2) {
2268 if (antennadiv == 2)
2269 value = (antennadiv << 7);
2270 else
2271 value = (0/*force0*/ << 7);
2272 bcm43xx_phy_write(bcm, offset + 0x2B,
2273 (bcm43xx_phy_read(bcm, offset + 0x2B)
2274 & 0xFEFF) | value);
2275 }
2276
2277 if (phy->type == BCM43xx_PHYTYPE_G) {
2278 if (antennadiv >= 2)
2279 bcm43xx_phy_write(bcm, 0x048C,
2280 bcm43xx_phy_read(bcm, 0x048C)
2281 | 0x2000);
2282 else
2283 bcm43xx_phy_write(bcm, 0x048C,
2284 bcm43xx_phy_read(bcm, 0x048C)
2285 & ~0x2000);
2286 if (phy->rev >= 2) {
2287 bcm43xx_phy_write(bcm, 0x0461,
2288 bcm43xx_phy_read(bcm, 0x0461)
2289 | 0x0010);
2290 bcm43xx_phy_write(bcm, 0x04AD,
2291 (bcm43xx_phy_read(bcm, 0x04AD)
2292 & 0x00FF) | 0x0015);
2293 if (phy->rev == 2)
2294 bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2295 else
2296 bcm43xx_phy_write(bcm, 0x0427,
2297 (bcm43xx_phy_read(bcm, 0x0427)
2298 & 0x00FF) | 0x0008);
2299 }
2300 else if (phy->rev >= 6)
2301 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2302 } else {
2303 if (phy->rev < 3)
2304 bcm43xx_phy_write(bcm, 0x002B,
2305 (bcm43xx_phy_read(bcm, 0x002B)
2306 & 0x00FF) | 0x0024);
2307 else {
2308 bcm43xx_phy_write(bcm, 0x0061,
2309 bcm43xx_phy_read(bcm, 0x0061)
2310 | 0x0010);
2311 if (phy->rev == 3) {
2312 bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2313 bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2314 } else {
2315 bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2316 bcm43xx_phy_write(bcm, 0x0027,
2317 (bcm43xx_phy_read(bcm, 0x0027)
2318 & 0x00FF) | 0x0008);
2319 }
2320 }
2321 }
2322 break;
2323 case BCM43xx_PHYTYPE_B:
2324 if (bcm->current_core->rev == 2)
2325 value = (3/*automatic*/ << 7);
2326 else
2327 value = (antennadiv << 7);
2328 bcm43xx_phy_write(bcm, 0x03E2,
2329 (bcm43xx_phy_read(bcm, 0x03E2)
2330 & 0xFE7F) | value);
2331 break;
2332 default:
2333 assert(0);
2334 }
2335
2336 if (antennadiv >= 2) {
2337 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2338 BCM43xx_UCODEFLAGS_OFFSET);
2339 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2340 BCM43xx_UCODEFLAGS_OFFSET,
2341 ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2342 }
2343
2344 phy->antenna_diversity = antennadiv;
2345}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.h b/drivers/net/wireless/bcm43xx/bcm43xx_phy.h
new file mode 100644
index 0000000000..1f321ef42b
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.h
@@ -0,0 +1,74 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#ifndef BCM43xx_PHY_H_
32#define BCM43xx_PHY_H_
33
34#include <linux/types.h>
35
36struct bcm43xx_private;
37
38void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm);
39#define bcm43xx_phy_lock(bcm, flags) \
40 do { \
41 local_irq_save(flags); \
42 bcm43xx_raw_phy_lock(bcm); \
43 } while (0)
44void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm);
45#define bcm43xx_phy_unlock(bcm, flags) \
46 do { \
47 bcm43xx_raw_phy_unlock(bcm); \
48 local_irq_restore(flags); \
49 } while (0)
50
51u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset);
52void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val);
53
54int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm);
55int bcm43xx_phy_init(struct bcm43xx_private *bcm);
56
57void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm);
58void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm);
59int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect);
60
61void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm);
62void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm);
63void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm);
64
65/* Adjust the LocalOscillator to the saved values.
66 * "fixed" is only set to 1 once in initialization. Set to 0 otherwise.
67 */
68void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed);
69void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm);
70
71void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
72 u16 baseband_attenuation);
73
74#endif /* BCM43xx_PHY_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_pio.c b/drivers/net/wireless/bcm43xx/bcm43xx_pio.c
new file mode 100644
index 0000000000..c59ddd4068
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_pio.c
@@ -0,0 +1,606 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 PIO Transmission
6
7 Copyright (c) 2005 Michael Buesch <mbuesch@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
23
24*/
25
26#include "bcm43xx.h"
27#include "bcm43xx_pio.h"
28#include "bcm43xx_main.h"
29#include "bcm43xx_xmit.h"
30
31#include <linux/delay.h>
32
33
34static void tx_start(struct bcm43xx_pioqueue *queue)
35{
36 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
37 BCM43xx_PIO_TXCTL_INIT);
38}
39
40static void tx_octet(struct bcm43xx_pioqueue *queue,
41 u8 octet)
42{
43 if (queue->need_workarounds) {
44 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA,
45 octet);
46 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
47 BCM43xx_PIO_TXCTL_WRITEHI);
48 } else {
49 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
50 BCM43xx_PIO_TXCTL_WRITEHI);
51 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA,
52 octet);
53 }
54}
55
56static u16 tx_get_next_word(struct bcm43xx_txhdr *txhdr,
57 const u8 *packet,
58 unsigned int *pos)
59{
60 const u8 *source;
61 unsigned int i = *pos;
62 u16 ret;
63
64 if (i < sizeof(*txhdr)) {
65 source = (const u8 *)txhdr;
66 } else {
67 source = packet;
68 i -= sizeof(*txhdr);
69 }
70 ret = le16_to_cpu( *((u16 *)(source + i)) );
71 *pos += 2;
72
73 return ret;
74}
75
76static void tx_data(struct bcm43xx_pioqueue *queue,
77 struct bcm43xx_txhdr *txhdr,
78 const u8 *packet,
79 unsigned int octets)
80{
81 u16 data;
82 unsigned int i = 0;
83
84 if (queue->need_workarounds) {
85 data = tx_get_next_word(txhdr, packet, &i);
86 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, data);
87 }
88 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
89 BCM43xx_PIO_TXCTL_WRITELO |
90 BCM43xx_PIO_TXCTL_WRITEHI);
91 while (i < octets - 1) {
92 data = tx_get_next_word(txhdr, packet, &i);
93 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, data);
94 }
95 if (octets % 2)
96 tx_octet(queue, packet[octets - sizeof(*txhdr) - 1]);
97}
98
99static void tx_complete(struct bcm43xx_pioqueue *queue,
100 struct sk_buff *skb)
101{
102 if (queue->need_workarounds) {
103 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA,
104 skb->data[skb->len - 1]);
105 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
106 BCM43xx_PIO_TXCTL_WRITEHI |
107 BCM43xx_PIO_TXCTL_COMPLETE);
108 } else {
109 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL,
110 BCM43xx_PIO_TXCTL_COMPLETE);
111 }
112}
113
114static u16 generate_cookie(struct bcm43xx_pioqueue *queue,
115 int packetindex)
116{
117 u16 cookie = 0x0000;
118
119 /* We use the upper 4 bits for the PIO
120 * controller ID and the lower 12 bits
121 * for the packet index (in the cache).
122 */
123 switch (queue->mmio_base) {
124 case BCM43xx_MMIO_PIO1_BASE:
125 break;
126 case BCM43xx_MMIO_PIO2_BASE:
127 cookie = 0x1000;
128 break;
129 case BCM43xx_MMIO_PIO3_BASE:
130 cookie = 0x2000;
131 break;
132 case BCM43xx_MMIO_PIO4_BASE:
133 cookie = 0x3000;
134 break;
135 default:
136 assert(0);
137 }
138 assert(((u16)packetindex & 0xF000) == 0x0000);
139 cookie |= (u16)packetindex;
140
141 return cookie;
142}
143
144static
145struct bcm43xx_pioqueue * parse_cookie(struct bcm43xx_private *bcm,
146 u16 cookie,
147 struct bcm43xx_pio_txpacket **packet)
148{
149 struct bcm43xx_pio *pio = bcm43xx_current_pio(bcm);
150 struct bcm43xx_pioqueue *queue = NULL;
151 int packetindex;
152
153 switch (cookie & 0xF000) {
154 case 0x0000:
155 queue = pio->queue0;
156 break;
157 case 0x1000:
158 queue = pio->queue1;
159 break;
160 case 0x2000:
161 queue = pio->queue2;
162 break;
163 case 0x3000:
164 queue = pio->queue3;
165 break;
166 default:
167 assert(0);
168 }
169 packetindex = (cookie & 0x0FFF);
170 assert(packetindex >= 0 && packetindex < BCM43xx_PIO_MAXTXPACKETS);
171 *packet = &(queue->tx_packets_cache[packetindex]);
172
173 return queue;
174}
175
176static void pio_tx_write_fragment(struct bcm43xx_pioqueue *queue,
177 struct sk_buff *skb,
178 struct bcm43xx_pio_txpacket *packet)
179{
180 struct bcm43xx_txhdr txhdr;
181 unsigned int octets;
182
183 assert(skb_shinfo(skb)->nr_frags == 0);
184 bcm43xx_generate_txhdr(queue->bcm,
185 &txhdr, skb->data, skb->len,
186 (packet->xmitted_frags == 0),
187 generate_cookie(queue, pio_txpacket_getindex(packet)));
188
189 tx_start(queue);
190 octets = skb->len + sizeof(txhdr);
191 if (queue->need_workarounds)
192 octets--;
193 tx_data(queue, &txhdr, (u8 *)skb->data, octets);
194 tx_complete(queue, skb);
195}
196
197static void free_txpacket(struct bcm43xx_pio_txpacket *packet,
198 int irq_context)
199{
200 struct bcm43xx_pioqueue *queue = packet->queue;
201
202 ieee80211_txb_free(packet->txb);
203 list_move(&packet->list, &queue->txfree);
204 queue->nr_txfree++;
205
206 assert(queue->tx_devq_used >= packet->xmitted_octets);
207 assert(queue->tx_devq_packets >= packet->xmitted_frags);
208 queue->tx_devq_used -= packet->xmitted_octets;
209 queue->tx_devq_packets -= packet->xmitted_frags;
210}
211
212static int pio_tx_packet(struct bcm43xx_pio_txpacket *packet)
213{
214 struct bcm43xx_pioqueue *queue = packet->queue;
215 struct ieee80211_txb *txb = packet->txb;
216 struct sk_buff *skb;
217 u16 octets;
218 int i;
219
220 for (i = packet->xmitted_frags; i < txb->nr_frags; i++) {
221 skb = txb->fragments[i];
222
223 octets = (u16)skb->len + sizeof(struct bcm43xx_txhdr);
224 assert(queue->tx_devq_size >= octets);
225 assert(queue->tx_devq_packets <= BCM43xx_PIO_MAXTXDEVQPACKETS);
226 assert(queue->tx_devq_used <= queue->tx_devq_size);
227 /* Check if there is sufficient free space on the device
228 * TX queue. If not, return and let the TX tasklet
229 * retry later.
230 */
231 if (queue->tx_devq_packets == BCM43xx_PIO_MAXTXDEVQPACKETS)
232 return -EBUSY;
233 if (queue->tx_devq_used + octets > queue->tx_devq_size)
234 return -EBUSY;
235 /* Now poke the device. */
236 pio_tx_write_fragment(queue, skb, packet);
237
238 /* Account for the packet size.
239 * (We must not overflow the device TX queue)
240 */
241 queue->tx_devq_packets++;
242 queue->tx_devq_used += octets;
243
244 assert(packet->xmitted_frags <= packet->txb->nr_frags);
245 packet->xmitted_frags++;
246 packet->xmitted_octets += octets;
247 }
248 list_move_tail(&packet->list, &queue->txrunning);
249
250 return 0;
251}
252
253static void tx_tasklet(unsigned long d)
254{
255 struct bcm43xx_pioqueue *queue = (struct bcm43xx_pioqueue *)d;
256 struct bcm43xx_private *bcm = queue->bcm;
257 unsigned long flags;
258 struct bcm43xx_pio_txpacket *packet, *tmp_packet;
259 int err;
260
261 bcm43xx_lock_mmio(bcm, flags);
262 list_for_each_entry_safe(packet, tmp_packet, &queue->txqueue, list) {
263 assert(packet->xmitted_frags < packet->txb->nr_frags);
264 if (packet->xmitted_frags == 0) {
265 int i;
266 struct sk_buff *skb;
267
268 /* Check if the device queue is big
269 * enough for every fragment. If not, drop the
270 * whole packet.
271 */
272 for (i = 0; i < packet->txb->nr_frags; i++) {
273 skb = packet->txb->fragments[i];
274 if (unlikely(skb->len > queue->tx_devq_size)) {
275 dprintkl(KERN_ERR PFX "PIO TX device queue too small. "
276 "Dropping packet.\n");
277 free_txpacket(packet, 1);
278 goto next_packet;
279 }
280 }
281 }
282 /* Try to transmit the packet.
283 * This may not completely succeed.
284 */
285 err = pio_tx_packet(packet);
286 if (err)
287 break;
288 next_packet:
289 continue;
290 }
291 bcm43xx_unlock_mmio(bcm, flags);
292}
293
294static void setup_txqueues(struct bcm43xx_pioqueue *queue)
295{
296 struct bcm43xx_pio_txpacket *packet;
297 int i;
298
299 queue->nr_txfree = BCM43xx_PIO_MAXTXPACKETS;
300 for (i = 0; i < BCM43xx_PIO_MAXTXPACKETS; i++) {
301 packet = &(queue->tx_packets_cache[i]);
302
303 packet->queue = queue;
304 INIT_LIST_HEAD(&packet->list);
305
306 list_add(&packet->list, &queue->txfree);
307 }
308}
309
310static
311struct bcm43xx_pioqueue * bcm43xx_setup_pioqueue(struct bcm43xx_private *bcm,
312 u16 pio_mmio_base)
313{
314 struct bcm43xx_pioqueue *queue;
315 u32 value;
316 u16 qsize;
317
318 queue = kzalloc(sizeof(*queue), GFP_KERNEL);
319 if (!queue)
320 goto out;
321
322 queue->bcm = bcm;
323 queue->mmio_base = pio_mmio_base;
324 queue->need_workarounds = (bcm->current_core->rev < 3);
325
326 INIT_LIST_HEAD(&queue->txfree);
327 INIT_LIST_HEAD(&queue->txqueue);
328 INIT_LIST_HEAD(&queue->txrunning);
329 tasklet_init(&queue->txtask, tx_tasklet,
330 (unsigned long)queue);
331
332 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
333 value |= BCM43xx_SBF_XFER_REG_BYTESWAP;
334 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value);
335
336 qsize = bcm43xx_read16(bcm, queue->mmio_base + BCM43xx_PIO_TXQBUFSIZE);
337 if (qsize <= BCM43xx_PIO_TXQADJUST) {
338 printk(KERN_ERR PFX "PIO tx device-queue too small (%u)\n", qsize);
339 goto err_freequeue;
340 }
341 qsize -= BCM43xx_PIO_TXQADJUST;
342 queue->tx_devq_size = qsize;
343
344 setup_txqueues(queue);
345
346out:
347 return queue;
348
349err_freequeue:
350 kfree(queue);
351 queue = NULL;
352 goto out;
353}
354
355static void cancel_transfers(struct bcm43xx_pioqueue *queue)
356{
357 struct bcm43xx_pio_txpacket *packet, *tmp_packet;
358
359 netif_tx_disable(queue->bcm->net_dev);
360 assert(queue->bcm->shutting_down);
361 tasklet_disable(&queue->txtask);
362
363 list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list)
364 free_txpacket(packet, 0);
365 list_for_each_entry_safe(packet, tmp_packet, &queue->txqueue, list)
366 free_txpacket(packet, 0);
367}
368
369static void bcm43xx_destroy_pioqueue(struct bcm43xx_pioqueue *queue)
370{
371 if (!queue)
372 return;
373
374 cancel_transfers(queue);
375 kfree(queue);
376}
377
378void bcm43xx_pio_free(struct bcm43xx_private *bcm)
379{
380 struct bcm43xx_pio *pio;
381
382 if (!bcm43xx_using_pio(bcm))
383 return;
384 pio = bcm43xx_current_pio(bcm);
385
386 bcm43xx_destroy_pioqueue(pio->queue3);
387 pio->queue3 = NULL;
388 bcm43xx_destroy_pioqueue(pio->queue2);
389 pio->queue2 = NULL;
390 bcm43xx_destroy_pioqueue(pio->queue1);
391 pio->queue1 = NULL;
392 bcm43xx_destroy_pioqueue(pio->queue0);
393 pio->queue0 = NULL;
394}
395
396int bcm43xx_pio_init(struct bcm43xx_private *bcm)
397{
398 struct bcm43xx_pio *pio = bcm43xx_current_pio(bcm);
399 struct bcm43xx_pioqueue *queue;
400 int err = -ENOMEM;
401
402 queue = bcm43xx_setup_pioqueue(bcm, BCM43xx_MMIO_PIO1_BASE);
403 if (!queue)
404 goto out;
405 pio->queue0 = queue;
406
407 queue = bcm43xx_setup_pioqueue(bcm, BCM43xx_MMIO_PIO2_BASE);
408 if (!queue)
409 goto err_destroy0;
410 pio->queue1 = queue;
411
412 queue = bcm43xx_setup_pioqueue(bcm, BCM43xx_MMIO_PIO3_BASE);
413 if (!queue)
414 goto err_destroy1;
415 pio->queue2 = queue;
416
417 queue = bcm43xx_setup_pioqueue(bcm, BCM43xx_MMIO_PIO4_BASE);
418 if (!queue)
419 goto err_destroy2;
420 pio->queue3 = queue;
421
422 if (bcm->current_core->rev < 3)
423 bcm->irq_savedstate |= BCM43xx_IRQ_PIO_WORKAROUND;
424
425 dprintk(KERN_INFO PFX "PIO initialized\n");
426 err = 0;
427out:
428 return err;
429
430err_destroy2:
431 bcm43xx_destroy_pioqueue(pio->queue2);
432 pio->queue2 = NULL;
433err_destroy1:
434 bcm43xx_destroy_pioqueue(pio->queue1);
435 pio->queue1 = NULL;
436err_destroy0:
437 bcm43xx_destroy_pioqueue(pio->queue0);
438 pio->queue0 = NULL;
439 goto out;
440}
441
442int bcm43xx_pio_tx(struct bcm43xx_private *bcm,
443 struct ieee80211_txb *txb)
444{
445 struct bcm43xx_pioqueue *queue = bcm43xx_current_pio(bcm)->queue1;
446 struct bcm43xx_pio_txpacket *packet;
447 u16 tmp;
448
449 assert(!queue->tx_suspended);
450 assert(!list_empty(&queue->txfree));
451
452 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_TXCTL);
453 if (tmp & BCM43xx_PIO_TXCTL_SUSPEND)
454 return -EBUSY;
455
456 packet = list_entry(queue->txfree.next, struct bcm43xx_pio_txpacket, list);
457 packet->txb = txb;
458 packet->xmitted_frags = 0;
459 packet->xmitted_octets = 0;
460 list_move_tail(&packet->list, &queue->txqueue);
461 queue->nr_txfree--;
462 assert(queue->nr_txfree < BCM43xx_PIO_MAXTXPACKETS);
463
464 /* Suspend TX, if we are out of packets in the "free" queue. */
465 if (unlikely(list_empty(&queue->txfree))) {
466 netif_stop_queue(queue->bcm->net_dev);
467 queue->tx_suspended = 1;
468 }
469
470 tasklet_schedule(&queue->txtask);
471
472 return 0;
473}
474
475void bcm43xx_pio_handle_xmitstatus(struct bcm43xx_private *bcm,
476 struct bcm43xx_xmitstatus *status)
477{
478 struct bcm43xx_pioqueue *queue;
479 struct bcm43xx_pio_txpacket *packet;
480
481 queue = parse_cookie(bcm, status->cookie, &packet);
482 assert(queue);
483//TODO
484if (!queue)
485return;
486 free_txpacket(packet, 1);
487 if (unlikely(queue->tx_suspended)) {
488 queue->tx_suspended = 0;
489 netif_wake_queue(queue->bcm->net_dev);
490 }
491 /* If there are packets on the txqueue, poke the tasklet. */
492 if (!list_empty(&queue->txqueue))
493 tasklet_schedule(&queue->txtask);
494}
495
496static void pio_rx_error(struct bcm43xx_pioqueue *queue,
497 int clear_buffers,
498 const char *error)
499{
500 int i;
501
502 printkl("PIO RX error: %s\n", error);
503 bcm43xx_pio_write(queue, BCM43xx_PIO_RXCTL,
504 BCM43xx_PIO_RXCTL_READY);
505 if (clear_buffers) {
506 assert(queue->mmio_base == BCM43xx_MMIO_PIO1_BASE);
507 for (i = 0; i < 15; i++) {
508 /* Dummy read. */
509 bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA);
510 }
511 }
512}
513
514void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue)
515{
516 u16 preamble[21] = { 0 };
517 struct bcm43xx_rxhdr *rxhdr;
518 u16 tmp, len, rxflags2;
519 int i, preamble_readwords;
520 struct sk_buff *skb;
521
522return;
523 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXCTL);
524 if (!(tmp & BCM43xx_PIO_RXCTL_DATAAVAILABLE)) {
525 dprintkl(KERN_ERR PFX "PIO RX: No data available\n");//TODO: remove this printk.
526 return;
527 }
528 bcm43xx_pio_write(queue, BCM43xx_PIO_RXCTL,
529 BCM43xx_PIO_RXCTL_DATAAVAILABLE);
530
531 for (i = 0; i < 10; i++) {
532 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXCTL);
533 if (tmp & BCM43xx_PIO_RXCTL_READY)
534 goto data_ready;
535 udelay(10);
536 }
537 dprintkl(KERN_ERR PFX "PIO RX timed out\n");
538 return;
539data_ready:
540
541//FIXME: endianess in this function.
542 len = le16_to_cpu(bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA));
543 if (unlikely(len > 0x700)) {
544 pio_rx_error(queue, 0, "len > 0x700");
545 return;
546 }
547 if (unlikely(len == 0 && queue->mmio_base != BCM43xx_MMIO_PIO4_BASE)) {
548 pio_rx_error(queue, 0, "len == 0");
549 return;
550 }
551 preamble[0] = cpu_to_le16(len);
552 if (queue->mmio_base == BCM43xx_MMIO_PIO4_BASE)
553 preamble_readwords = 14 / sizeof(u16);
554 else
555 preamble_readwords = 18 / sizeof(u16);
556 for (i = 0; i < preamble_readwords; i++) {
557 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA);
558 preamble[i + 1] = cpu_to_be16(tmp);//FIXME?
559 }
560 rxhdr = (struct bcm43xx_rxhdr *)preamble;
561 rxflags2 = le16_to_cpu(rxhdr->flags2);
562 if (unlikely(rxflags2 & BCM43xx_RXHDR_FLAGS2_INVALIDFRAME)) {
563 pio_rx_error(queue,
564 (queue->mmio_base == BCM43xx_MMIO_PIO1_BASE),
565 "invalid frame");
566 return;
567 }
568 if (queue->mmio_base == BCM43xx_MMIO_PIO4_BASE) {
569 /* We received an xmit status. */
570 struct bcm43xx_hwxmitstatus *hw;
571 struct bcm43xx_xmitstatus stat;
572
573 hw = (struct bcm43xx_hwxmitstatus *)(preamble + 1);
574 stat.cookie = le16_to_cpu(hw->cookie);
575 stat.flags = hw->flags;
576 stat.cnt1 = hw->cnt1;
577 stat.cnt2 = hw->cnt2;
578 stat.seq = le16_to_cpu(hw->seq);
579 stat.unknown = le16_to_cpu(hw->unknown);
580
581 bcm43xx_debugfs_log_txstat(queue->bcm, &stat);
582 bcm43xx_pio_handle_xmitstatus(queue->bcm, &stat);
583
584 return;
585 }
586
587 skb = dev_alloc_skb(len);
588 if (unlikely(!skb)) {
589 pio_rx_error(queue, 1, "OOM");
590 return;
591 }
592 skb_put(skb, len);
593 for (i = 0; i < len - 1; i += 2) {
594 tmp = cpu_to_be16(bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA));
595 *((u16 *)(skb->data + i)) = tmp;
596 }
597 if (len % 2) {
598 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA);
599 skb->data[len - 1] = (tmp & 0x00FF);
600 if (rxflags2 & BCM43xx_RXHDR_FLAGS2_TYPE2FRAME)
601 skb->data[0x20] = (tmp & 0xFF00) >> 8;
602 else
603 skb->data[0x1E] = (tmp & 0xFF00) >> 8;
604 }
605 bcm43xx_rx(queue->bcm, skb, rxhdr);
606}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_pio.h b/drivers/net/wireless/bcm43xx/bcm43xx_pio.h
new file mode 100644
index 0000000000..970627bc17
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_pio.h
@@ -0,0 +1,138 @@
1#ifndef BCM43xx_PIO_H_
2#define BCM43xx_PIO_H_
3
4#include "bcm43xx.h"
5
6#include <linux/interrupt.h>
7#include <linux/list.h>
8#include <linux/skbuff.h>
9
10
11#define BCM43xx_PIO_TXCTL 0x00
12#define BCM43xx_PIO_TXDATA 0x02
13#define BCM43xx_PIO_TXQBUFSIZE 0x04
14#define BCM43xx_PIO_RXCTL 0x08
15#define BCM43xx_PIO_RXDATA 0x0A
16
17#define BCM43xx_PIO_TXCTL_WRITEHI (1 << 0)
18#define BCM43xx_PIO_TXCTL_WRITELO (1 << 1)
19#define BCM43xx_PIO_TXCTL_COMPLETE (1 << 2)
20#define BCM43xx_PIO_TXCTL_INIT (1 << 3)
21#define BCM43xx_PIO_TXCTL_SUSPEND (1 << 7)
22
23#define BCM43xx_PIO_RXCTL_DATAAVAILABLE (1 << 0)
24#define BCM43xx_PIO_RXCTL_READY (1 << 1)
25
26/* PIO constants */
27#define BCM43xx_PIO_MAXTXDEVQPACKETS 31
28#define BCM43xx_PIO_TXQADJUST 80
29
30/* PIO tuning knobs */
31#define BCM43xx_PIO_MAXTXPACKETS 256
32
33
34
35#ifdef CONFIG_BCM43XX_PIO
36
37
38struct bcm43xx_pioqueue;
39struct bcm43xx_xmitstatus;
40
41struct bcm43xx_pio_txpacket {
42 struct bcm43xx_pioqueue *queue;
43 struct ieee80211_txb *txb;
44 struct list_head list;
45
46 u8 xmitted_frags;
47 u16 xmitted_octets;
48};
49
50#define pio_txpacket_getindex(packet) ((int)((packet) - (packet)->queue->tx_packets_cache))
51
52struct bcm43xx_pioqueue {
53 struct bcm43xx_private *bcm;
54 u16 mmio_base;
55
56 u8 tx_suspended:1,
57 need_workarounds:1; /* Workarounds needed for core.rev < 3 */
58
59 /* Adjusted size of the device internal TX buffer. */
60 u16 tx_devq_size;
61 /* Used octets of the device internal TX buffer. */
62 u16 tx_devq_used;
63 /* Used packet slots in the device internal TX buffer. */
64 u8 tx_devq_packets;
65 /* Packets from the txfree list can
66 * be taken on incoming TX requests.
67 */
68 struct list_head txfree;
69 unsigned int nr_txfree;
70 /* Packets on the txqueue are queued,
71 * but not completely written to the chip, yet.
72 */
73 struct list_head txqueue;
74 /* Packets on the txrunning queue are completely
75 * posted to the device. We are waiting for the txstatus.
76 */
77 struct list_head txrunning;
78 /* Total number or packets sent.
79 * (This counter can obviously wrap).
80 */
81 unsigned int nr_tx_packets;
82 struct tasklet_struct txtask;
83 struct bcm43xx_pio_txpacket tx_packets_cache[BCM43xx_PIO_MAXTXPACKETS];
84};
85
86static inline
87u16 bcm43xx_pio_read(struct bcm43xx_pioqueue *queue,
88 u16 offset)
89{
90 return bcm43xx_read16(queue->bcm, queue->mmio_base + offset);
91}
92
93static inline
94void bcm43xx_pio_write(struct bcm43xx_pioqueue *queue,
95 u16 offset, u16 value)
96{
97 bcm43xx_write16(queue->bcm, queue->mmio_base + offset, value);
98}
99
100
101int bcm43xx_pio_init(struct bcm43xx_private *bcm);
102void bcm43xx_pio_free(struct bcm43xx_private *bcm);
103
104int bcm43xx_pio_tx(struct bcm43xx_private *bcm,
105 struct ieee80211_txb *txb);
106void bcm43xx_pio_handle_xmitstatus(struct bcm43xx_private *bcm,
107 struct bcm43xx_xmitstatus *status);
108void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue);
109
110#else /* CONFIG_BCM43XX_PIO */
111
112static inline
113int bcm43xx_pio_init(struct bcm43xx_private *bcm)
114{
115 return 0;
116}
117static inline
118void bcm43xx_pio_free(struct bcm43xx_private *bcm)
119{
120}
121static inline
122int bcm43xx_pio_tx(struct bcm43xx_private *bcm,
123 struct ieee80211_txb *txb)
124{
125 return 0;
126}
127static inline
128void bcm43xx_pio_handle_xmitstatus(struct bcm43xx_private *bcm,
129 struct bcm43xx_xmitstatus *status)
130{
131}
132static inline
133void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue)
134{
135}
136
137#endif /* CONFIG_BCM43XX_PIO */
138#endif /* BCM43xx_PIO_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_power.c b/drivers/net/wireless/bcm43xx/bcm43xx_power.c
new file mode 100644
index 0000000000..3c92b62807
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_power.c
@@ -0,0 +1,358 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/delay.h>
32
33#include "bcm43xx.h"
34#include "bcm43xx_power.h"
35#include "bcm43xx_main.h"
36
37
38/* Get max/min slowclock frequency
39 * as described in http://bcm-specs.sipsolutions.net/PowerControl
40 */
41static int bcm43xx_pctl_clockfreqlimit(struct bcm43xx_private *bcm,
42 int get_max)
43{
44 int limit = 0;
45 int divisor;
46 int selection;
47 int err;
48 u32 tmp;
49 struct bcm43xx_coreinfo *old_core;
50
51 if (!(bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL))
52 goto out;
53 old_core = bcm->current_core;
54 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
55 if (err)
56 goto out;
57
58 if (bcm->current_core->rev < 6) {
59 if ((bcm->bustype == BCM43xx_BUSTYPE_PCMCIA) ||
60 (bcm->bustype == BCM43xx_BUSTYPE_SB)) {
61 selection = 1;
62 divisor = 32;
63 } else {
64 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCTL_OUT, &tmp);
65 if (err) {
66 printk(KERN_ERR PFX "clockfreqlimit pcicfg read failure\n");
67 goto out_switchback;
68 }
69 if (tmp & 0x10) {
70 /* PCI */
71 selection = 2;
72 divisor = 64;
73 } else {
74 /* XTAL */
75 selection = 1;
76 divisor = 32;
77 }
78 }
79 } else if (bcm->current_core->rev < 10) {
80 selection = (tmp & 0x07);
81 if (selection) {
82 tmp = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL);
83 divisor = 4 * (1 + ((tmp & 0xFFFF0000) >> 16));
84 } else
85 divisor = 1;
86 } else {
87 tmp = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SYSCLKCTL);
88 divisor = 4 * (1 + ((tmp & 0xFFFF0000) >> 16));
89 selection = 1;
90 }
91
92 switch (selection) {
93 case 0:
94 /* LPO */
95 if (get_max)
96 limit = 43000;
97 else
98 limit = 25000;
99 break;
100 case 1:
101 /* XTAL */
102 if (get_max)
103 limit = 20200000;
104 else
105 limit = 19800000;
106 break;
107 case 2:
108 /* PCI */
109 if (get_max)
110 limit = 34000000;
111 else
112 limit = 25000000;
113 break;
114 default:
115 assert(0);
116 }
117 limit /= divisor;
118
119out_switchback:
120 err = bcm43xx_switch_core(bcm, old_core);
121 assert(err == 0);
122
123out:
124 return limit;
125}
126
127/* init power control
128 * as described in http://bcm-specs.sipsolutions.net/PowerControl
129 */
130int bcm43xx_pctl_init(struct bcm43xx_private *bcm)
131{
132 int err, maxfreq;
133 struct bcm43xx_coreinfo *old_core;
134
135 if (!(bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL))
136 return 0;
137 old_core = bcm->current_core;
138 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
139 if (err == -ENODEV)
140 return 0;
141 if (err)
142 goto out;
143
144 maxfreq = bcm43xx_pctl_clockfreqlimit(bcm, 1);
145 bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_PLLONDELAY,
146 (maxfreq * 150 + 999999) / 1000000);
147 bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_FREFSELDELAY,
148 (maxfreq * 15 + 999999) / 1000000);
149
150 err = bcm43xx_switch_core(bcm, old_core);
151 assert(err == 0);
152
153out:
154 return err;
155}
156
157u16 bcm43xx_pctl_powerup_delay(struct bcm43xx_private *bcm)
158{
159 u16 delay = 0;
160 int err;
161 u32 pll_on_delay;
162 struct bcm43xx_coreinfo *old_core;
163 int minfreq;
164
165 if (bcm->bustype != BCM43xx_BUSTYPE_PCI)
166 goto out;
167 if (!(bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL))
168 goto out;
169 old_core = bcm->current_core;
170 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
171 if (err == -ENODEV)
172 goto out;
173
174 minfreq = bcm43xx_pctl_clockfreqlimit(bcm, 0);
175 pll_on_delay = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_PLLONDELAY);
176 delay = (((pll_on_delay + 2) * 1000000) + (minfreq - 1)) / minfreq;
177
178 err = bcm43xx_switch_core(bcm, old_core);
179 assert(err == 0);
180
181out:
182 return delay;
183}
184
185/* set the powercontrol clock
186 * as described in http://bcm-specs.sipsolutions.net/PowerControl
187 */
188int bcm43xx_pctl_set_clock(struct bcm43xx_private *bcm, u16 mode)
189{
190 int err;
191 struct bcm43xx_coreinfo *old_core;
192 u32 tmp;
193
194 old_core = bcm->current_core;
195 err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
196 if (err == -ENODEV)
197 return 0;
198 if (err)
199 goto out;
200
201 if (bcm->core_chipcommon.rev < 6) {
202 if (mode == BCM43xx_PCTL_CLK_FAST) {
203 err = bcm43xx_pctl_set_crystal(bcm, 1);
204 if (err)
205 goto out;
206 }
207 } else {
208 if ((bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL) &&
209 (bcm->core_chipcommon.rev < 10)) {
210 switch (mode) {
211 case BCM43xx_PCTL_CLK_FAST:
212 tmp = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL);
213 tmp = (tmp & ~BCM43xx_PCTL_FORCE_SLOW) | BCM43xx_PCTL_FORCE_PLL;
214 bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL, tmp);
215 break;
216 case BCM43xx_PCTL_CLK_SLOW:
217 tmp = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL);
218 tmp |= BCM43xx_PCTL_FORCE_SLOW;
219 bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL, tmp);
220 break;
221 case BCM43xx_PCTL_CLK_DYNAMIC:
222 tmp = bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL);
223 tmp &= ~BCM43xx_PCTL_FORCE_SLOW;
224 tmp |= BCM43xx_PCTL_FORCE_PLL;
225 tmp &= ~BCM43xx_PCTL_DYN_XTAL;
226 bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_SLOWCLKCTL, tmp);
227 }
228 }
229 }
230
231 err = bcm43xx_switch_core(bcm, old_core);
232 assert(err == 0);
233
234out:
235 return err;
236}
237
238int bcm43xx_pctl_set_crystal(struct bcm43xx_private *bcm, int on)
239{
240 int err;
241 u32 in, out, outenable;
242
243 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCTL_IN, &in);
244 if (err)
245 goto err_pci;
246 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCTL_OUT, &out);
247 if (err)
248 goto err_pci;
249 err = bcm43xx_pci_read_config32(bcm, BCM43xx_PCTL_OUTENABLE, &outenable);
250 if (err)
251 goto err_pci;
252
253 outenable |= (BCM43xx_PCTL_XTAL_POWERUP | BCM43xx_PCTL_PLL_POWERDOWN);
254
255 if (on) {
256 if (in & 0x40)
257 return 0;
258
259 out |= (BCM43xx_PCTL_XTAL_POWERUP | BCM43xx_PCTL_PLL_POWERDOWN);
260
261 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCTL_OUT, out);
262 if (err)
263 goto err_pci;
264 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCTL_OUTENABLE, outenable);
265 if (err)
266 goto err_pci;
267 udelay(1000);
268
269 out &= ~BCM43xx_PCTL_PLL_POWERDOWN;
270 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCTL_OUT, out);
271 if (err)
272 goto err_pci;
273 udelay(5000);
274 } else {
275 if (bcm->current_core->rev < 5)
276 return 0;
277 if (bcm->sprom.boardflags & BCM43xx_BFL_XTAL_NOSLOW)
278 return 0;
279
280/* XXX: Why BCM43xx_MMIO_RADIO_HWENABLED_xx can't be read at this time?
281 * err = bcm43xx_switch_core(bcm, bcm->active_80211_core);
282 * if (err)
283 * return err;
284 * if (((bcm->current_core->rev >= 3) &&
285 * (bcm43xx_read32(bcm, BCM43xx_MMIO_RADIO_HWENABLED_HI) & (1 << 16))) ||
286 * ((bcm->current_core->rev < 3) &&
287 * !(bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_HWENABLED_LO) & (1 << 4))))
288 * return 0;
289 * err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon);
290 * if (err)
291 * return err;
292 */
293
294 err = bcm43xx_pctl_set_clock(bcm, BCM43xx_PCTL_CLK_SLOW);
295 if (err)
296 goto out;
297 out &= ~BCM43xx_PCTL_XTAL_POWERUP;
298 out |= BCM43xx_PCTL_PLL_POWERDOWN;
299 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCTL_OUT, out);
300 if (err)
301 goto err_pci;
302 err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCTL_OUTENABLE, outenable);
303 if (err)
304 goto err_pci;
305 }
306
307out:
308 return err;
309
310err_pci:
311 printk(KERN_ERR PFX "Error: pctl_set_clock() could not access PCI config space!\n");
312 err = -EBUSY;
313 goto out;
314}
315
316/* Set the PowerSavingControlBits.
317 * Bitvalues:
318 * 0 => unset the bit
319 * 1 => set the bit
320 * -1 => calculate the bit
321 */
322void bcm43xx_power_saving_ctl_bits(struct bcm43xx_private *bcm,
323 int bit25, int bit26)
324{
325 int i;
326 u32 status;
327
328//FIXME: Force 25 to off and 26 to on for now:
329bit25 = 0;
330bit26 = 1;
331
332 if (bit25 == -1) {
333 //TODO: If powersave is not off and FIXME is not set and we are not in adhoc
334 // and thus is not an AP and we are associated, set bit 25
335 }
336 if (bit26 == -1) {
337 //TODO: If the device is awake or this is an AP, or we are scanning, or FIXME,
338 // or we are associated, or FIXME, or the latest PS-Poll packet sent was
339 // successful, set bit26
340 }
341 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
342 if (bit25)
343 status |= BCM43xx_SBF_PS1;
344 else
345 status &= ~BCM43xx_SBF_PS1;
346 if (bit26)
347 status |= BCM43xx_SBF_PS2;
348 else
349 status &= ~BCM43xx_SBF_PS2;
350 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
351 if (bit26 && bcm->current_core->rev >= 5) {
352 for (i = 0; i < 100; i++) {
353 if (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED, 0x0040) != 4)
354 break;
355 udelay(10);
356 }
357 }
358}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_power.h b/drivers/net/wireless/bcm43xx/bcm43xx_power.h
new file mode 100644
index 0000000000..5f63640810
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_power.h
@@ -0,0 +1,47 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#ifndef BCM43xx_POWER_H_
32#define BCM43xx_POWER_H_
33
34#include <linux/types.h>
35
36
37struct bcm43xx_private;
38
39int bcm43xx_pctl_init(struct bcm43xx_private *bcm);
40int bcm43xx_pctl_set_clock(struct bcm43xx_private *bcm, u16 mode);
41int bcm43xx_pctl_set_crystal(struct bcm43xx_private *bcm, int on);
42u16 bcm43xx_pctl_powerup_delay(struct bcm43xx_private *bcm);
43
44void bcm43xx_power_saving_ctl_bits(struct bcm43xx_private *bcm,
45 int bit25, int bit26);
46
47#endif /* BCM43xx_POWER_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_radio.c b/drivers/net/wireless/bcm43xx/bcm43xx_radio.c
new file mode 100644
index 0000000000..af5c0bff16
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_radio.c
@@ -0,0 +1,2026 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/delay.h>
32
33#include "bcm43xx.h"
34#include "bcm43xx_main.h"
35#include "bcm43xx_phy.h"
36#include "bcm43xx_radio.h"
37#include "bcm43xx_ilt.h"
38
39
40/* Table for bcm43xx_radio_calibrationvalue() */
41static const u16 rcc_table[16] = {
42 0x0002, 0x0003, 0x0001, 0x000F,
43 0x0006, 0x0007, 0x0005, 0x000F,
44 0x000A, 0x000B, 0x0009, 0x000F,
45 0x000E, 0x000F, 0x000D, 0x000F,
46};
47
48/* Reverse the bits of a 4bit value.
49 * Example: 1101 is flipped 1011
50 */
51static u16 flip_4bit(u16 value)
52{
53 u16 flipped = 0x0000;
54
55 assert((value & ~0x000F) == 0x0000);
56
57 flipped |= (value & 0x0001) << 3;
58 flipped |= (value & 0x0002) << 1;
59 flipped |= (value & 0x0004) >> 1;
60 flipped |= (value & 0x0008) >> 3;
61
62 return flipped;
63}
64
65/* Get the freq, as it has to be written to the device. */
66static inline
67u16 channel2freq_bg(u8 channel)
68{
69 /* Frequencies are given as frequencies_bg[index] + 2.4GHz
70 * Starting with channel 1
71 */
72 static const u16 frequencies_bg[14] = {
73 12, 17, 22, 27,
74 32, 37, 42, 47,
75 52, 57, 62, 67,
76 72, 84,
77 };
78
79 assert(channel >= 1 && channel <= 14);
80
81 return frequencies_bg[channel - 1];
82}
83
84/* Get the freq, as it has to be written to the device. */
85static inline
86u16 channel2freq_a(u8 channel)
87{
88 assert(channel <= 200);
89
90 return (5000 + 5 * channel);
91}
92
93void bcm43xx_radio_lock(struct bcm43xx_private *bcm)
94{
95 u32 status;
96
97 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
98 status |= BCM43xx_SBF_RADIOREG_LOCK;
99 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
100 mmiowb();
101 udelay(10);
102}
103
104void bcm43xx_radio_unlock(struct bcm43xx_private *bcm)
105{
106 u32 status;
107
108 bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_VER); /* dummy read */
109 status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
110 status &= ~BCM43xx_SBF_RADIOREG_LOCK;
111 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
112 mmiowb();
113}
114
115u16 bcm43xx_radio_read16(struct bcm43xx_private *bcm, u16 offset)
116{
117 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
118 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
119
120 switch (phy->type) {
121 case BCM43xx_PHYTYPE_A:
122 offset |= 0x0040;
123 break;
124 case BCM43xx_PHYTYPE_B:
125 if (radio->version == 0x2053) {
126 if (offset < 0x70)
127 offset += 0x80;
128 else if (offset < 0x80)
129 offset += 0x70;
130 } else if (radio->version == 0x2050) {
131 offset |= 0x80;
132 } else
133 assert(0);
134 break;
135 case BCM43xx_PHYTYPE_G:
136 offset |= 0x80;
137 break;
138 }
139
140 bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
141 return bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW);
142}
143
144void bcm43xx_radio_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)
145{
146 bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
147 mmiowb();
148 bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW, val);
149}
150
151static void bcm43xx_set_all_gains(struct bcm43xx_private *bcm,
152 s16 first, s16 second, s16 third)
153{
154 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
155 u16 i;
156 u16 start = 0x08, end = 0x18;
157 u16 offset = 0x0400;
158 u16 tmp;
159
160 if (phy->rev <= 1) {
161 offset = 0x5000;
162 start = 0x10;
163 end = 0x20;
164 }
165
166 for (i = 0; i < 4; i++)
167 bcm43xx_ilt_write(bcm, offset + i, first);
168
169 for (i = start; i < end; i++)
170 bcm43xx_ilt_write(bcm, offset + i, second);
171
172 if (third != -1) {
173 tmp = ((u16)third << 14) | ((u16)third << 6);
174 bcm43xx_phy_write(bcm, 0x04A0,
175 (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | tmp);
176 bcm43xx_phy_write(bcm, 0x04A1,
177 (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | tmp);
178 bcm43xx_phy_write(bcm, 0x04A2,
179 (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | tmp);
180 }
181 bcm43xx_dummy_transmission(bcm);
182}
183
184static void bcm43xx_set_original_gains(struct bcm43xx_private *bcm)
185{
186 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
187 u16 i, tmp;
188 u16 offset = 0x0400;
189 u16 start = 0x0008, end = 0x0018;
190
191 if (phy->rev <= 1) {
192 offset = 0x5000;
193 start = 0x0010;
194 end = 0x0020;
195 }
196
197 for (i = 0; i < 4; i++) {
198 tmp = (i & 0xFFFC);
199 tmp |= (i & 0x0001) << 1;
200 tmp |= (i & 0x0002) >> 1;
201
202 bcm43xx_ilt_write(bcm, offset + i, tmp);
203 }
204
205 for (i = start; i < end; i++)
206 bcm43xx_ilt_write(bcm, offset + i, i - start);
207
208 bcm43xx_phy_write(bcm, 0x04A0,
209 (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | 0x4040);
210 bcm43xx_phy_write(bcm, 0x04A1,
211 (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | 0x4040);
212 bcm43xx_phy_write(bcm, 0x04A2,
213 (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | 0x4000);
214 bcm43xx_dummy_transmission(bcm);
215}
216
217/* Synthetic PU workaround */
218static void bcm43xx_synth_pu_workaround(struct bcm43xx_private *bcm, u8 channel)
219{
220 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
221
222 if (radio->version != 0x2050 || radio->revision >= 6) {
223 /* We do not need the workaround. */
224 return;
225 }
226
227 if (channel <= 10) {
228 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
229 channel2freq_bg(channel + 4));
230 } else {
231 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
232 channel2freq_bg(1));
233 }
234 udelay(100);
235 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
236 channel2freq_bg(channel));
237}
238
239u8 bcm43xx_radio_aci_detect(struct bcm43xx_private *bcm, u8 channel)
240{
241 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
242 u8 ret = 0;
243 u16 saved, rssi, temp;
244 int i, j = 0;
245
246 saved = bcm43xx_phy_read(bcm, 0x0403);
247 bcm43xx_radio_selectchannel(bcm, channel, 0);
248 bcm43xx_phy_write(bcm, 0x0403, (saved & 0xFFF8) | 5);
249 if (radio->aci_hw_rssi)
250 rssi = bcm43xx_phy_read(bcm, 0x048A) & 0x3F;
251 else
252 rssi = saved & 0x3F;
253 /* clamp temp to signed 5bit */
254 if (rssi > 32)
255 rssi -= 64;
256 for (i = 0;i < 100; i++) {
257 temp = (bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x3F;
258 if (temp > 32)
259 temp -= 64;
260 if (temp < rssi)
261 j++;
262 if (j >= 20)
263 ret = 1;
264 }
265 bcm43xx_phy_write(bcm, 0x0403, saved);
266
267 return ret;
268}
269
270u8 bcm43xx_radio_aci_scan(struct bcm43xx_private *bcm)
271{
272 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
273 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
274 u8 ret[13];
275 unsigned int channel = radio->channel;
276 unsigned int i, j, start, end;
277 unsigned long phylock_flags;
278
279 if (!((phy->type == BCM43xx_PHYTYPE_G) && (phy->rev > 0)))
280 return 0;
281
282 bcm43xx_phy_lock(bcm, phylock_flags);
283 bcm43xx_radio_lock(bcm);
284 bcm43xx_phy_write(bcm, 0x0802,
285 bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
286 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
287 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
288 bcm43xx_set_all_gains(bcm, 3, 8, 1);
289
290 start = (channel - 5 > 0) ? channel - 5 : 1;
291 end = (channel + 5 < 14) ? channel + 5 : 13;
292
293 for (i = start; i <= end; i++) {
294 if (abs(channel - i) > 2)
295 ret[i-1] = bcm43xx_radio_aci_detect(bcm, i);
296 }
297 bcm43xx_radio_selectchannel(bcm, channel, 0);
298 bcm43xx_phy_write(bcm, 0x0802,
299 (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC) | 0x0003);
300 bcm43xx_phy_write(bcm, 0x0403,
301 bcm43xx_phy_read(bcm, 0x0403) & 0xFFF8);
302 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
303 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
304 bcm43xx_set_original_gains(bcm);
305 for (i = 0; i < 13; i++) {
306 if (!ret[i])
307 continue;
308 end = (i + 5 < 13) ? i + 5 : 13;
309 for (j = i; j < end; j++)
310 ret[j] = 1;
311 }
312 bcm43xx_radio_unlock(bcm);
313 bcm43xx_phy_unlock(bcm, phylock_flags);
314
315 return ret[channel - 1];
316}
317
318/* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
319void bcm43xx_nrssi_hw_write(struct bcm43xx_private *bcm, u16 offset, s16 val)
320{
321 bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
322 mmiowb();
323 bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_DATA, (u16)val);
324}
325
326/* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
327s16 bcm43xx_nrssi_hw_read(struct bcm43xx_private *bcm, u16 offset)
328{
329 u16 val;
330
331 bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
332 val = bcm43xx_phy_read(bcm, BCM43xx_PHY_NRSSILT_DATA);
333
334 return (s16)val;
335}
336
337/* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
338void bcm43xx_nrssi_hw_update(struct bcm43xx_private *bcm, u16 val)
339{
340 u16 i;
341 s16 tmp;
342
343 for (i = 0; i < 64; i++) {
344 tmp = bcm43xx_nrssi_hw_read(bcm, i);
345 tmp -= val;
346 tmp = limit_value(tmp, -32, 31);
347 bcm43xx_nrssi_hw_write(bcm, i, tmp);
348 }
349}
350
351/* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
352void bcm43xx_nrssi_mem_update(struct bcm43xx_private *bcm)
353{
354 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
355 s16 i, delta;
356 s32 tmp;
357
358 delta = 0x1F - radio->nrssi[0];
359 for (i = 0; i < 64; i++) {
360 tmp = (i - delta) * radio->nrssislope;
361 tmp /= 0x10000;
362 tmp += 0x3A;
363 tmp = limit_value(tmp, 0, 0x3F);
364 radio->nrssi_lt[i] = tmp;
365 }
366}
367
368static void bcm43xx_calc_nrssi_offset(struct bcm43xx_private *bcm)
369{
370 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
371 u16 backup[20] = { 0 };
372 s16 v47F;
373 u16 i;
374 u16 saved = 0xFFFF;
375
376 backup[0] = bcm43xx_phy_read(bcm, 0x0001);
377 backup[1] = bcm43xx_phy_read(bcm, 0x0811);
378 backup[2] = bcm43xx_phy_read(bcm, 0x0812);
379 backup[3] = bcm43xx_phy_read(bcm, 0x0814);
380 backup[4] = bcm43xx_phy_read(bcm, 0x0815);
381 backup[5] = bcm43xx_phy_read(bcm, 0x005A);
382 backup[6] = bcm43xx_phy_read(bcm, 0x0059);
383 backup[7] = bcm43xx_phy_read(bcm, 0x0058);
384 backup[8] = bcm43xx_phy_read(bcm, 0x000A);
385 backup[9] = bcm43xx_phy_read(bcm, 0x0003);
386 backup[10] = bcm43xx_radio_read16(bcm, 0x007A);
387 backup[11] = bcm43xx_radio_read16(bcm, 0x0043);
388
389 bcm43xx_phy_write(bcm, 0x0429,
390 bcm43xx_phy_read(bcm, 0x0429) & 0x7FFF);
391 bcm43xx_phy_write(bcm, 0x0001,
392 (bcm43xx_phy_read(bcm, 0x0001) & 0x3FFF) | 0x4000);
393 bcm43xx_phy_write(bcm, 0x0811,
394 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
395 bcm43xx_phy_write(bcm, 0x0812,
396 (bcm43xx_phy_read(bcm, 0x0812) & 0xFFF3) | 0x0004);
397 bcm43xx_phy_write(bcm, 0x0802,
398 bcm43xx_phy_read(bcm, 0x0802) & ~(0x1 | 0x2));
399 if (phy->rev >= 6) {
400 backup[12] = bcm43xx_phy_read(bcm, 0x002E);
401 backup[13] = bcm43xx_phy_read(bcm, 0x002F);
402 backup[14] = bcm43xx_phy_read(bcm, 0x080F);
403 backup[15] = bcm43xx_phy_read(bcm, 0x0810);
404 backup[16] = bcm43xx_phy_read(bcm, 0x0801);
405 backup[17] = bcm43xx_phy_read(bcm, 0x0060);
406 backup[18] = bcm43xx_phy_read(bcm, 0x0014);
407 backup[19] = bcm43xx_phy_read(bcm, 0x0478);
408
409 bcm43xx_phy_write(bcm, 0x002E, 0);
410 bcm43xx_phy_write(bcm, 0x002F, 0);
411 bcm43xx_phy_write(bcm, 0x080F, 0);
412 bcm43xx_phy_write(bcm, 0x0810, 0);
413 bcm43xx_phy_write(bcm, 0x0478,
414 bcm43xx_phy_read(bcm, 0x0478) | 0x0100);
415 bcm43xx_phy_write(bcm, 0x0801,
416 bcm43xx_phy_read(bcm, 0x0801) | 0x0040);
417 bcm43xx_phy_write(bcm, 0x0060,
418 bcm43xx_phy_read(bcm, 0x0060) | 0x0040);
419 bcm43xx_phy_write(bcm, 0x0014,
420 bcm43xx_phy_read(bcm, 0x0014) | 0x0200);
421 }
422 bcm43xx_radio_write16(bcm, 0x007A,
423 bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
424 bcm43xx_radio_write16(bcm, 0x007A,
425 bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
426 udelay(30);
427
428 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
429 if (v47F >= 0x20)
430 v47F -= 0x40;
431 if (v47F == 31) {
432 for (i = 7; i >= 4; i--) {
433 bcm43xx_radio_write16(bcm, 0x007B, i);
434 udelay(20);
435 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
436 if (v47F >= 0x20)
437 v47F -= 0x40;
438 if (v47F < 31 && saved == 0xFFFF)
439 saved = i;
440 }
441 if (saved == 0xFFFF)
442 saved = 4;
443 } else {
444 bcm43xx_radio_write16(bcm, 0x007A,
445 bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
446 bcm43xx_phy_write(bcm, 0x0814,
447 bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
448 bcm43xx_phy_write(bcm, 0x0815,
449 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
450 bcm43xx_phy_write(bcm, 0x0811,
451 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
452 bcm43xx_phy_write(bcm, 0x0812,
453 bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
454 bcm43xx_phy_write(bcm, 0x0811,
455 bcm43xx_phy_read(bcm, 0x0811) | 0x0030);
456 bcm43xx_phy_write(bcm, 0x0812,
457 bcm43xx_phy_read(bcm, 0x0812) | 0x0030);
458 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
459 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
460 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
461 if (phy->rev == 0) {
462 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
463 } else {
464 bcm43xx_phy_write(bcm, 0x000A,
465 bcm43xx_phy_read(bcm, 0x000A)
466 | 0x2000);
467 }
468 bcm43xx_phy_write(bcm, 0x0814,
469 bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
470 bcm43xx_phy_write(bcm, 0x0815,
471 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
472 bcm43xx_phy_write(bcm, 0x0003,
473 (bcm43xx_phy_read(bcm, 0x0003) & 0xFF9F)
474 | 0x0040);
475 bcm43xx_radio_write16(bcm, 0x007A,
476 bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
477 bcm43xx_set_all_gains(bcm, 3, 0, 1);
478 bcm43xx_radio_write16(bcm, 0x0043,
479 (bcm43xx_radio_read16(bcm, 0x0043)
480 & 0x00F0) | 0x000F);
481 udelay(30);
482 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
483 if (v47F >= 0x20)
484 v47F -= 0x40;
485 if (v47F == -32) {
486 for (i = 0; i < 4; i++) {
487 bcm43xx_radio_write16(bcm, 0x007B, i);
488 udelay(20);
489 v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
490 if (v47F >= 0x20)
491 v47F -= 0x40;
492 if (v47F > -31 && saved == 0xFFFF)
493 saved = i;
494 }
495 if (saved == 0xFFFF)
496 saved = 3;
497 } else
498 saved = 0;
499 }
500 bcm43xx_radio_write16(bcm, 0x007B, saved);
501
502 if (phy->rev >= 6) {
503 bcm43xx_phy_write(bcm, 0x002E, backup[12]);
504 bcm43xx_phy_write(bcm, 0x002F, backup[13]);
505 bcm43xx_phy_write(bcm, 0x080F, backup[14]);
506 bcm43xx_phy_write(bcm, 0x0810, backup[15]);
507 }
508 bcm43xx_phy_write(bcm, 0x0814, backup[3]);
509 bcm43xx_phy_write(bcm, 0x0815, backup[4]);
510 bcm43xx_phy_write(bcm, 0x005A, backup[5]);
511 bcm43xx_phy_write(bcm, 0x0059, backup[6]);
512 bcm43xx_phy_write(bcm, 0x0058, backup[7]);
513 bcm43xx_phy_write(bcm, 0x000A, backup[8]);
514 bcm43xx_phy_write(bcm, 0x0003, backup[9]);
515 bcm43xx_radio_write16(bcm, 0x0043, backup[11]);
516 bcm43xx_radio_write16(bcm, 0x007A, backup[10]);
517 bcm43xx_phy_write(bcm, 0x0802,
518 bcm43xx_phy_read(bcm, 0x0802) | 0x1 | 0x2);
519 bcm43xx_phy_write(bcm, 0x0429,
520 bcm43xx_phy_read(bcm, 0x0429) | 0x8000);
521 bcm43xx_set_original_gains(bcm);
522 if (phy->rev >= 6) {
523 bcm43xx_phy_write(bcm, 0x0801, backup[16]);
524 bcm43xx_phy_write(bcm, 0x0060, backup[17]);
525 bcm43xx_phy_write(bcm, 0x0014, backup[18]);
526 bcm43xx_phy_write(bcm, 0x0478, backup[19]);
527 }
528 bcm43xx_phy_write(bcm, 0x0001, backup[0]);
529 bcm43xx_phy_write(bcm, 0x0812, backup[2]);
530 bcm43xx_phy_write(bcm, 0x0811, backup[1]);
531}
532
533void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm)
534{
535 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
536 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
537 u16 backup[18] = { 0 };
538 u16 tmp;
539 s16 nrssi0, nrssi1;
540
541 switch (phy->type) {
542 case BCM43xx_PHYTYPE_B:
543 backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
544 backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
545 backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
546 backup[3] = bcm43xx_phy_read(bcm, 0x0030);
547 backup[4] = bcm43xx_phy_read(bcm, 0x0026);
548 backup[5] = bcm43xx_phy_read(bcm, 0x0015);
549 backup[6] = bcm43xx_phy_read(bcm, 0x002A);
550 backup[7] = bcm43xx_phy_read(bcm, 0x0020);
551 backup[8] = bcm43xx_phy_read(bcm, 0x005A);
552 backup[9] = bcm43xx_phy_read(bcm, 0x0059);
553 backup[10] = bcm43xx_phy_read(bcm, 0x0058);
554 backup[11] = bcm43xx_read16(bcm, 0x03E2);
555 backup[12] = bcm43xx_read16(bcm, 0x03E6);
556 backup[13] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
557
558 tmp = bcm43xx_radio_read16(bcm, 0x007A);
559 tmp &= (phy->rev >= 5) ? 0x007F : 0x000F;
560 bcm43xx_radio_write16(bcm, 0x007A, tmp);
561 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
562 bcm43xx_write16(bcm, 0x03EC, 0x7F7F);
563 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
564 bcm43xx_phy_write(bcm, 0x0015,
565 bcm43xx_phy_read(bcm, 0x0015) | 0x0020);
566 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
567 bcm43xx_radio_write16(bcm, 0x007A,
568 bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
569
570 nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027);
571 bcm43xx_radio_write16(bcm, 0x007A,
572 bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
573 if (phy->rev >= 2) {
574 bcm43xx_write16(bcm, 0x03E6, 0x0040);
575 } else if (phy->rev == 0) {
576 bcm43xx_write16(bcm, 0x03E6, 0x0122);
577 } else {
578 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
579 bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) & 0x2000);
580 }
581 bcm43xx_phy_write(bcm, 0x0020, 0x3F3F);
582 bcm43xx_phy_write(bcm, 0x0015, 0xF330);
583 bcm43xx_radio_write16(bcm, 0x005A, 0x0060);
584 bcm43xx_radio_write16(bcm, 0x0043,
585 bcm43xx_radio_read16(bcm, 0x0043) & 0x00F0);
586 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
587 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
588 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
589 udelay(20);
590
591 nrssi1 = (s16)bcm43xx_phy_read(bcm, 0x0027);
592 bcm43xx_phy_write(bcm, 0x0030, backup[3]);
593 bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
594 bcm43xx_write16(bcm, 0x03E2, backup[11]);
595 bcm43xx_phy_write(bcm, 0x0026, backup[4]);
596 bcm43xx_phy_write(bcm, 0x0015, backup[5]);
597 bcm43xx_phy_write(bcm, 0x002A, backup[6]);
598 bcm43xx_synth_pu_workaround(bcm, radio->channel);
599 if (phy->rev != 0)
600 bcm43xx_write16(bcm, 0x03F4, backup[13]);
601
602 bcm43xx_phy_write(bcm, 0x0020, backup[7]);
603 bcm43xx_phy_write(bcm, 0x005A, backup[8]);
604 bcm43xx_phy_write(bcm, 0x0059, backup[9]);
605 bcm43xx_phy_write(bcm, 0x0058, backup[10]);
606 bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
607 bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
608
609 if (nrssi0 == nrssi1)
610 radio->nrssislope = 0x00010000;
611 else
612 radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
613
614 if (nrssi0 <= -4) {
615 radio->nrssi[0] = nrssi0;
616 radio->nrssi[1] = nrssi1;
617 }
618 break;
619 case BCM43xx_PHYTYPE_G:
620 if (radio->revision >= 9)
621 return;
622 if (radio->revision == 8)
623 bcm43xx_calc_nrssi_offset(bcm);
624
625 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
626 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
627 bcm43xx_phy_write(bcm, 0x0802,
628 bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
629 backup[7] = bcm43xx_read16(bcm, 0x03E2);
630 bcm43xx_write16(bcm, 0x03E2,
631 bcm43xx_read16(bcm, 0x03E2) | 0x8000);
632 backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
633 backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
634 backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
635 backup[3] = bcm43xx_phy_read(bcm, 0x0015);
636 backup[4] = bcm43xx_phy_read(bcm, 0x005A);
637 backup[5] = bcm43xx_phy_read(bcm, 0x0059);
638 backup[6] = bcm43xx_phy_read(bcm, 0x0058);
639 backup[8] = bcm43xx_read16(bcm, 0x03E6);
640 backup[9] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
641 if (phy->rev >= 3) {
642 backup[10] = bcm43xx_phy_read(bcm, 0x002E);
643 backup[11] = bcm43xx_phy_read(bcm, 0x002F);
644 backup[12] = bcm43xx_phy_read(bcm, 0x080F);
645 backup[13] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_LO_CONTROL);
646 backup[14] = bcm43xx_phy_read(bcm, 0x0801);
647 backup[15] = bcm43xx_phy_read(bcm, 0x0060);
648 backup[16] = bcm43xx_phy_read(bcm, 0x0014);
649 backup[17] = bcm43xx_phy_read(bcm, 0x0478);
650 bcm43xx_phy_write(bcm, 0x002E, 0);
651 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, 0);
652 switch (phy->rev) {
653 case 4: case 6: case 7:
654 bcm43xx_phy_write(bcm, 0x0478,
655 bcm43xx_phy_read(bcm, 0x0478)
656 | 0x0100);
657 bcm43xx_phy_write(bcm, 0x0801,
658 bcm43xx_phy_read(bcm, 0x0801)
659 | 0x0040);
660 break;
661 case 3: case 5:
662 bcm43xx_phy_write(bcm, 0x0801,
663 bcm43xx_phy_read(bcm, 0x0801)
664 & 0xFFBF);
665 break;
666 }
667 bcm43xx_phy_write(bcm, 0x0060,
668 bcm43xx_phy_read(bcm, 0x0060)
669 | 0x0040);
670 bcm43xx_phy_write(bcm, 0x0014,
671 bcm43xx_phy_read(bcm, 0x0014)
672 | 0x0200);
673 }
674 bcm43xx_radio_write16(bcm, 0x007A,
675 bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
676 bcm43xx_set_all_gains(bcm, 0, 8, 0);
677 bcm43xx_radio_write16(bcm, 0x007A,
678 bcm43xx_radio_read16(bcm, 0x007A) & 0x00F7);
679 if (phy->rev >= 2) {
680 bcm43xx_phy_write(bcm, 0x0811,
681 (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0030);
682 bcm43xx_phy_write(bcm, 0x0812,
683 (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0010);
684 }
685 bcm43xx_radio_write16(bcm, 0x007A,
686 bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
687 udelay(20);
688
689 nrssi0 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
690 if (nrssi0 >= 0x0020)
691 nrssi0 -= 0x0040;
692
693 bcm43xx_radio_write16(bcm, 0x007A,
694 bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
695 if (phy->rev >= 2) {
696 bcm43xx_phy_write(bcm, 0x0003,
697 (bcm43xx_phy_read(bcm, 0x0003)
698 & 0xFF9F) | 0x0040);
699 }
700
701 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
702 bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
703 | 0x2000);
704 bcm43xx_radio_write16(bcm, 0x007A,
705 bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
706 bcm43xx_phy_write(bcm, 0x0015, 0xF330);
707 if (phy->rev >= 2) {
708 bcm43xx_phy_write(bcm, 0x0812,
709 (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0020);
710 bcm43xx_phy_write(bcm, 0x0811,
711 (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0020);
712 }
713
714 bcm43xx_set_all_gains(bcm, 3, 0, 1);
715 if (radio->revision == 8) {
716 bcm43xx_radio_write16(bcm, 0x0043, 0x001F);
717 } else {
718 tmp = bcm43xx_radio_read16(bcm, 0x0052) & 0xFF0F;
719 bcm43xx_radio_write16(bcm, 0x0052, tmp | 0x0060);
720 tmp = bcm43xx_radio_read16(bcm, 0x0043) & 0xFFF0;
721 bcm43xx_radio_write16(bcm, 0x0043, tmp | 0x0009);
722 }
723 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
724 bcm43xx_phy_write(bcm, 0x0059, 0x0810);
725 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
726 udelay(20);
727 nrssi1 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
728 if (nrssi1 >= 0x0020)
729 nrssi1 -= 0x0040;
730 if (nrssi0 == nrssi1)
731 radio->nrssislope = 0x00010000;
732 else
733 radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
734 if (nrssi0 >= -4) {
735 radio->nrssi[0] = nrssi1;
736 radio->nrssi[1] = nrssi0;
737 }
738 if (phy->rev >= 3) {
739 bcm43xx_phy_write(bcm, 0x002E, backup[10]);
740 bcm43xx_phy_write(bcm, 0x002F, backup[11]);
741 bcm43xx_phy_write(bcm, 0x080F, backup[12]);
742 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, backup[13]);
743 }
744 if (phy->rev >= 2) {
745 bcm43xx_phy_write(bcm, 0x0812,
746 bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF);
747 bcm43xx_phy_write(bcm, 0x0811,
748 bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF);
749 }
750
751 bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
752 bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
753 bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
754 bcm43xx_write16(bcm, 0x03E2, backup[7]);
755 bcm43xx_write16(bcm, 0x03E6, backup[8]);
756 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[9]);
757 bcm43xx_phy_write(bcm, 0x0015, backup[3]);
758 bcm43xx_phy_write(bcm, 0x005A, backup[4]);
759 bcm43xx_phy_write(bcm, 0x0059, backup[5]);
760 bcm43xx_phy_write(bcm, 0x0058, backup[6]);
761 bcm43xx_synth_pu_workaround(bcm, radio->channel);
762 bcm43xx_phy_write(bcm, 0x0802,
763 bcm43xx_phy_read(bcm, 0x0802) | (0x0001 | 0x0002));
764 bcm43xx_set_original_gains(bcm);
765 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
766 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
767 if (phy->rev >= 3) {
768 bcm43xx_phy_write(bcm, 0x0801, backup[14]);
769 bcm43xx_phy_write(bcm, 0x0060, backup[15]);
770 bcm43xx_phy_write(bcm, 0x0014, backup[16]);
771 bcm43xx_phy_write(bcm, 0x0478, backup[17]);
772 }
773 bcm43xx_nrssi_mem_update(bcm);
774 bcm43xx_calc_nrssi_threshold(bcm);
775 break;
776 default:
777 assert(0);
778 }
779}
780
781void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm)
782{
783 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
784 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
785 s32 threshold;
786 s32 a, b;
787 s16 tmp16;
788 u16 tmp_u16;
789
790 switch (phy->type) {
791 case BCM43xx_PHYTYPE_B: {
792 if (radio->version != 0x2050)
793 return;
794 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI))
795 return;
796
797 if (radio->revision >= 6) {
798 threshold = (radio->nrssi[1] - radio->nrssi[0]) * 32;
799 threshold += 20 * (radio->nrssi[0] + 1);
800 threshold /= 40;
801 } else
802 threshold = radio->nrssi[1] - 5;
803
804 threshold = limit_value(threshold, 0, 0x3E);
805 bcm43xx_phy_read(bcm, 0x0020); /* dummy read */
806 bcm43xx_phy_write(bcm, 0x0020, (((u16)threshold) << 8) | 0x001C);
807
808 if (radio->revision >= 6) {
809 bcm43xx_phy_write(bcm, 0x0087, 0x0E0D);
810 bcm43xx_phy_write(bcm, 0x0086, 0x0C0B);
811 bcm43xx_phy_write(bcm, 0x0085, 0x0A09);
812 bcm43xx_phy_write(bcm, 0x0084, 0x0808);
813 bcm43xx_phy_write(bcm, 0x0083, 0x0808);
814 bcm43xx_phy_write(bcm, 0x0082, 0x0604);
815 bcm43xx_phy_write(bcm, 0x0081, 0x0302);
816 bcm43xx_phy_write(bcm, 0x0080, 0x0100);
817 }
818 break;
819 }
820 case BCM43xx_PHYTYPE_G:
821 if (!phy->connected ||
822 !(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
823 tmp16 = bcm43xx_nrssi_hw_read(bcm, 0x20);
824 if (tmp16 >= 0x20)
825 tmp16 -= 0x40;
826 if (tmp16 < 3) {
827 bcm43xx_phy_write(bcm, 0x048A,
828 (bcm43xx_phy_read(bcm, 0x048A)
829 & 0xF000) | 0x09EB);
830 } else {
831 bcm43xx_phy_write(bcm, 0x048A,
832 (bcm43xx_phy_read(bcm, 0x048A)
833 & 0xF000) | 0x0AED);
834 }
835 } else {
836 if (radio->interfmode == BCM43xx_RADIO_INTERFMODE_NONWLAN) {
837 a = 0xE;
838 b = 0xA;
839 } else if (!radio->aci_wlan_automatic && radio->aci_enable) {
840 a = 0x13;
841 b = 0x12;
842 } else {
843 a = 0xE;
844 b = 0x11;
845 }
846
847 a = a * (radio->nrssi[1] - radio->nrssi[0]);
848 a += (radio->nrssi[0] << 6);
849 if (a < 32)
850 a += 31;
851 else
852 a += 32;
853 a = a >> 6;
854 a = limit_value(a, -31, 31);
855
856 b = b * (radio->nrssi[1] - radio->nrssi[0]);
857 b += (radio->nrssi[0] << 6);
858 if (b < 32)
859 b += 31;
860 else
861 b += 32;
862 b = b >> 6;
863 b = limit_value(b, -31, 31);
864
865 tmp_u16 = bcm43xx_phy_read(bcm, 0x048A) & 0xF000;
866 tmp_u16 |= ((u32)b & 0x0000003F);
867 tmp_u16 |= (((u32)a & 0x0000003F) << 6);
868 bcm43xx_phy_write(bcm, 0x048A, tmp_u16);
869 }
870 break;
871 default:
872 assert(0);
873 }
874}
875
876/* Stack implementation to save/restore values from the
877 * interference mitigation code.
878 * It is save to restore values in random order.
879 */
880static void _stack_save(u32 *_stackptr, size_t *stackidx,
881 u8 id, u16 offset, u16 value)
882{
883 u32 *stackptr = &(_stackptr[*stackidx]);
884
885 assert((offset & 0xF000) == 0x0000);
886 assert((id & 0xF0) == 0x00);
887 *stackptr = offset;
888 *stackptr |= ((u32)id) << 12;
889 *stackptr |= ((u32)value) << 16;
890 (*stackidx)++;
891 assert(*stackidx < BCM43xx_INTERFSTACK_SIZE);
892}
893
894static u16 _stack_restore(u32 *stackptr,
895 u8 id, u16 offset)
896{
897 size_t i;
898
899 assert((offset & 0xF000) == 0x0000);
900 assert((id & 0xF0) == 0x00);
901 for (i = 0; i < BCM43xx_INTERFSTACK_SIZE; i++, stackptr++) {
902 if ((*stackptr & 0x00000FFF) != offset)
903 continue;
904 if (((*stackptr & 0x0000F000) >> 12) != id)
905 continue;
906 return ((*stackptr & 0xFFFF0000) >> 16);
907 }
908 assert(0);
909
910 return 0;
911}
912
913#define phy_stacksave(offset) \
914 do { \
915 _stack_save(stack, &stackidx, 0x1, (offset), \
916 bcm43xx_phy_read(bcm, (offset))); \
917 } while (0)
918#define phy_stackrestore(offset) \
919 do { \
920 bcm43xx_phy_write(bcm, (offset), \
921 _stack_restore(stack, 0x1, \
922 (offset))); \
923 } while (0)
924#define radio_stacksave(offset) \
925 do { \
926 _stack_save(stack, &stackidx, 0x2, (offset), \
927 bcm43xx_radio_read16(bcm, (offset))); \
928 } while (0)
929#define radio_stackrestore(offset) \
930 do { \
931 bcm43xx_radio_write16(bcm, (offset), \
932 _stack_restore(stack, 0x2, \
933 (offset))); \
934 } while (0)
935#define ilt_stacksave(offset) \
936 do { \
937 _stack_save(stack, &stackidx, 0x3, (offset), \
938 bcm43xx_ilt_read(bcm, (offset))); \
939 } while (0)
940#define ilt_stackrestore(offset) \
941 do { \
942 bcm43xx_ilt_write(bcm, (offset), \
943 _stack_restore(stack, 0x3, \
944 (offset))); \
945 } while (0)
946
947static void
948bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
949 int mode)
950{
951 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
952 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
953 u16 tmp, flipped;
954 u32 tmp32;
955 size_t stackidx = 0;
956 u32 *stack = radio->interfstack;
957
958 switch (mode) {
959 case BCM43xx_RADIO_INTERFMODE_NONWLAN:
960 if (phy->rev != 1) {
961 bcm43xx_phy_write(bcm, 0x042B,
962 bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
963 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
964 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & ~0x4000);
965 break;
966 }
967 radio_stacksave(0x0078);
968 tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
969 flipped = flip_4bit(tmp);
970 if (flipped < 10 && flipped >= 8)
971 flipped = 7;
972 else if (flipped >= 10)
973 flipped -= 3;
974 flipped = flip_4bit(flipped);
975 flipped = (flipped << 1) | 0x0020;
976 bcm43xx_radio_write16(bcm, 0x0078, flipped);
977
978 bcm43xx_calc_nrssi_threshold(bcm);
979
980 phy_stacksave(0x0406);
981 bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
982
983 bcm43xx_phy_write(bcm, 0x042B,
984 bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
985 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
986 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | 0x1000);
987
988 phy_stacksave(0x04A0);
989 bcm43xx_phy_write(bcm, 0x04A0,
990 (bcm43xx_phy_read(bcm, 0x04A0) & 0xC0C0) | 0x0008);
991 phy_stacksave(0x04A1);
992 bcm43xx_phy_write(bcm, 0x04A1,
993 (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0C0) | 0x0605);
994 phy_stacksave(0x04A2);
995 bcm43xx_phy_write(bcm, 0x04A2,
996 (bcm43xx_phy_read(bcm, 0x04A2) & 0xC0C0) | 0x0204);
997 phy_stacksave(0x04A8);
998 bcm43xx_phy_write(bcm, 0x04A8,
999 (bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0803);
1000 phy_stacksave(0x04AB);
1001 bcm43xx_phy_write(bcm, 0x04AB,
1002 (bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0605);
1003
1004 phy_stacksave(0x04A7);
1005 bcm43xx_phy_write(bcm, 0x04A7, 0x0002);
1006 phy_stacksave(0x04A3);
1007 bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
1008 phy_stacksave(0x04A9);
1009 bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
1010 phy_stacksave(0x0493);
1011 bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
1012 phy_stacksave(0x04AA);
1013 bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
1014 phy_stacksave(0x04AC);
1015 bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
1016 break;
1017 case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
1018 if (bcm43xx_phy_read(bcm, 0x0033) & 0x0800)
1019 break;
1020
1021 radio->aci_enable = 1;
1022
1023 phy_stacksave(BCM43xx_PHY_RADIO_BITFIELD);
1024 phy_stacksave(BCM43xx_PHY_G_CRS);
1025 if (phy->rev < 2) {
1026 phy_stacksave(0x0406);
1027 } else {
1028 phy_stacksave(0x04C0);
1029 phy_stacksave(0x04C1);
1030 }
1031 phy_stacksave(0x0033);
1032 phy_stacksave(0x04A7);
1033 phy_stacksave(0x04A3);
1034 phy_stacksave(0x04A9);
1035 phy_stacksave(0x04AA);
1036 phy_stacksave(0x04AC);
1037 phy_stacksave(0x0493);
1038 phy_stacksave(0x04A1);
1039 phy_stacksave(0x04A0);
1040 phy_stacksave(0x04A2);
1041 phy_stacksave(0x048A);
1042 phy_stacksave(0x04A8);
1043 phy_stacksave(0x04AB);
1044 if (phy->rev == 2) {
1045 phy_stacksave(0x04AD);
1046 phy_stacksave(0x04AE);
1047 } else if (phy->rev >= 3) {
1048 phy_stacksave(0x04AD);
1049 phy_stacksave(0x0415);
1050 phy_stacksave(0x0416);
1051 phy_stacksave(0x0417);
1052 ilt_stacksave(0x1A00 + 0x2);
1053 ilt_stacksave(0x1A00 + 0x3);
1054 }
1055 phy_stacksave(0x042B);
1056 phy_stacksave(0x048C);
1057
1058 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
1059 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
1060 & ~0x1000);
1061 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1062 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS)
1063 & 0xFFFC) | 0x0002);
1064
1065 bcm43xx_phy_write(bcm, 0x0033, 0x0800);
1066 bcm43xx_phy_write(bcm, 0x04A3, 0x2027);
1067 bcm43xx_phy_write(bcm, 0x04A9, 0x1CA8);
1068 bcm43xx_phy_write(bcm, 0x0493, 0x287A);
1069 bcm43xx_phy_write(bcm, 0x04AA, 0x1CA8);
1070 bcm43xx_phy_write(bcm, 0x04AC, 0x287A);
1071
1072 bcm43xx_phy_write(bcm, 0x04A0,
1073 (bcm43xx_phy_read(bcm, 0x04A0)
1074 & 0xFFC0) | 0x001A);
1075 bcm43xx_phy_write(bcm, 0x04A7, 0x000D);
1076
1077 if (phy->rev < 2) {
1078 bcm43xx_phy_write(bcm, 0x0406, 0xFF0D);
1079 } else if (phy->rev == 2) {
1080 bcm43xx_phy_write(bcm, 0x04C0, 0xFFFF);
1081 bcm43xx_phy_write(bcm, 0x04C1, 0x00A9);
1082 } else {
1083 bcm43xx_phy_write(bcm, 0x04C0, 0x00C1);
1084 bcm43xx_phy_write(bcm, 0x04C1, 0x0059);
1085 }
1086
1087 bcm43xx_phy_write(bcm, 0x04A1,
1088 (bcm43xx_phy_read(bcm, 0x04A1)
1089 & 0xC0FF) | 0x1800);
1090 bcm43xx_phy_write(bcm, 0x04A1,
1091 (bcm43xx_phy_read(bcm, 0x04A1)
1092 & 0xFFC0) | 0x0015);
1093 bcm43xx_phy_write(bcm, 0x04A8,
1094 (bcm43xx_phy_read(bcm, 0x04A8)
1095 & 0xCFFF) | 0x1000);
1096 bcm43xx_phy_write(bcm, 0x04A8,
1097 (bcm43xx_phy_read(bcm, 0x04A8)
1098 & 0xF0FF) | 0x0A00);
1099 bcm43xx_phy_write(bcm, 0x04AB,
1100 (bcm43xx_phy_read(bcm, 0x04AB)
1101 & 0xCFFF) | 0x1000);
1102 bcm43xx_phy_write(bcm, 0x04AB,
1103 (bcm43xx_phy_read(bcm, 0x04AB)
1104 & 0xF0FF) | 0x0800);
1105 bcm43xx_phy_write(bcm, 0x04AB,
1106 (bcm43xx_phy_read(bcm, 0x04AB)
1107 & 0xFFCF) | 0x0010);
1108 bcm43xx_phy_write(bcm, 0x04AB,
1109 (bcm43xx_phy_read(bcm, 0x04AB)
1110 & 0xFFF0) | 0x0005);
1111 bcm43xx_phy_write(bcm, 0x04A8,
1112 (bcm43xx_phy_read(bcm, 0x04A8)
1113 & 0xFFCF) | 0x0010);
1114 bcm43xx_phy_write(bcm, 0x04A8,
1115 (bcm43xx_phy_read(bcm, 0x04A8)
1116 & 0xFFF0) | 0x0006);
1117 bcm43xx_phy_write(bcm, 0x04A2,
1118 (bcm43xx_phy_read(bcm, 0x04A2)
1119 & 0xF0FF) | 0x0800);
1120 bcm43xx_phy_write(bcm, 0x04A0,
1121 (bcm43xx_phy_read(bcm, 0x04A0)
1122 & 0xF0FF) | 0x0500);
1123 bcm43xx_phy_write(bcm, 0x04A2,
1124 (bcm43xx_phy_read(bcm, 0x04A2)
1125 & 0xFFF0) | 0x000B);
1126
1127 if (phy->rev >= 3) {
1128 bcm43xx_phy_write(bcm, 0x048A,
1129 bcm43xx_phy_read(bcm, 0x048A)
1130 & ~0x8000);
1131 bcm43xx_phy_write(bcm, 0x0415,
1132 (bcm43xx_phy_read(bcm, 0x0415)
1133 & 0x8000) | 0x36D8);
1134 bcm43xx_phy_write(bcm, 0x0416,
1135 (bcm43xx_phy_read(bcm, 0x0416)
1136 & 0x8000) | 0x36D8);
1137 bcm43xx_phy_write(bcm, 0x0417,
1138 (bcm43xx_phy_read(bcm, 0x0417)
1139 & 0xFE00) | 0x016D);
1140 } else {
1141 bcm43xx_phy_write(bcm, 0x048A,
1142 bcm43xx_phy_read(bcm, 0x048A)
1143 | 0x1000);
1144 bcm43xx_phy_write(bcm, 0x048A,
1145 (bcm43xx_phy_read(bcm, 0x048A)
1146 & 0x9FFF) | 0x2000);
1147 tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1148 BCM43xx_UCODEFLAGS_OFFSET);
1149 if (!(tmp32 & 0x800)) {
1150 tmp32 |= 0x800;
1151 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1152 BCM43xx_UCODEFLAGS_OFFSET,
1153 tmp32);
1154 }
1155 }
1156 if (phy->rev >= 2) {
1157 bcm43xx_phy_write(bcm, 0x042B,
1158 bcm43xx_phy_read(bcm, 0x042B)
1159 | 0x0800);
1160 }
1161 bcm43xx_phy_write(bcm, 0x048C,
1162 (bcm43xx_phy_read(bcm, 0x048C)
1163 & 0xF0FF) | 0x0200);
1164 if (phy->rev == 2) {
1165 bcm43xx_phy_write(bcm, 0x04AE,
1166 (bcm43xx_phy_read(bcm, 0x04AE)
1167 & 0xFF00) | 0x007F);
1168 bcm43xx_phy_write(bcm, 0x04AD,
1169 (bcm43xx_phy_read(bcm, 0x04AD)
1170 & 0x00FF) | 0x1300);
1171 } else if (phy->rev >= 6) {
1172 bcm43xx_ilt_write(bcm, 0x1A00 + 0x3, 0x007F);
1173 bcm43xx_ilt_write(bcm, 0x1A00 + 0x2, 0x007F);
1174 bcm43xx_phy_write(bcm, 0x04AD,
1175 bcm43xx_phy_read(bcm, 0x04AD)
1176 & 0x00FF);
1177 }
1178 bcm43xx_calc_nrssi_slope(bcm);
1179 break;
1180 default:
1181 assert(0);
1182 }
1183}
1184
1185static void
1186bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
1187 int mode)
1188{
1189 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1190 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1191 u32 tmp32;
1192 u32 *stack = radio->interfstack;
1193
1194 switch (mode) {
1195 case BCM43xx_RADIO_INTERFMODE_NONWLAN:
1196 if (phy->rev != 1) {
1197 bcm43xx_phy_write(bcm, 0x042B,
1198 bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
1199 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1200 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
1201 break;
1202 }
1203 phy_stackrestore(0x0078);
1204 bcm43xx_calc_nrssi_threshold(bcm);
1205 phy_stackrestore(0x0406);
1206 bcm43xx_phy_write(bcm, 0x042B,
1207 bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
1208 if (!bcm->bad_frames_preempt) {
1209 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
1210 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
1211 & ~(1 << 11));
1212 }
1213 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1214 bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
1215 phy_stackrestore(0x04A0);
1216 phy_stackrestore(0x04A1);
1217 phy_stackrestore(0x04A2);
1218 phy_stackrestore(0x04A8);
1219 phy_stackrestore(0x04AB);
1220 phy_stackrestore(0x04A7);
1221 phy_stackrestore(0x04A3);
1222 phy_stackrestore(0x04A9);
1223 phy_stackrestore(0x0493);
1224 phy_stackrestore(0x04AA);
1225 phy_stackrestore(0x04AC);
1226 break;
1227 case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
1228 if (!(bcm43xx_phy_read(bcm, 0x0033) & 0x0800))
1229 break;
1230
1231 radio->aci_enable = 0;
1232
1233 phy_stackrestore(BCM43xx_PHY_RADIO_BITFIELD);
1234 phy_stackrestore(BCM43xx_PHY_G_CRS);
1235 phy_stackrestore(0x0033);
1236 phy_stackrestore(0x04A3);
1237 phy_stackrestore(0x04A9);
1238 phy_stackrestore(0x0493);
1239 phy_stackrestore(0x04AA);
1240 phy_stackrestore(0x04AC);
1241 phy_stackrestore(0x04A0);
1242 phy_stackrestore(0x04A7);
1243 if (phy->rev >= 2) {
1244 phy_stackrestore(0x04C0);
1245 phy_stackrestore(0x04C1);
1246 } else
1247 phy_stackrestore(0x0406);
1248 phy_stackrestore(0x04A1);
1249 phy_stackrestore(0x04AB);
1250 phy_stackrestore(0x04A8);
1251 if (phy->rev == 2) {
1252 phy_stackrestore(0x04AD);
1253 phy_stackrestore(0x04AE);
1254 } else if (phy->rev >= 3) {
1255 phy_stackrestore(0x04AD);
1256 phy_stackrestore(0x0415);
1257 phy_stackrestore(0x0416);
1258 phy_stackrestore(0x0417);
1259 ilt_stackrestore(0x1A00 + 0x2);
1260 ilt_stackrestore(0x1A00 + 0x3);
1261 }
1262 phy_stackrestore(0x04A2);
1263 phy_stackrestore(0x04A8);
1264 phy_stackrestore(0x042B);
1265 phy_stackrestore(0x048C);
1266 tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1267 BCM43xx_UCODEFLAGS_OFFSET);
1268 if (tmp32 & 0x800) {
1269 tmp32 &= ~0x800;
1270 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1271 BCM43xx_UCODEFLAGS_OFFSET,
1272 tmp32);
1273 }
1274 bcm43xx_calc_nrssi_slope(bcm);
1275 break;
1276 default:
1277 assert(0);
1278 }
1279}
1280
1281#undef phy_stacksave
1282#undef phy_stackrestore
1283#undef radio_stacksave
1284#undef radio_stackrestore
1285#undef ilt_stacksave
1286#undef ilt_stackrestore
1287
1288int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm,
1289 int mode)
1290{
1291 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1292 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1293 int currentmode;
1294
1295 if ((phy->type != BCM43xx_PHYTYPE_G) ||
1296 (phy->rev == 0) ||
1297 (!phy->connected))
1298 return -ENODEV;
1299
1300 radio->aci_wlan_automatic = 0;
1301 switch (mode) {
1302 case BCM43xx_RADIO_INTERFMODE_AUTOWLAN:
1303 radio->aci_wlan_automatic = 1;
1304 if (radio->aci_enable)
1305 mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
1306 else
1307 mode = BCM43xx_RADIO_INTERFMODE_NONE;
1308 break;
1309 case BCM43xx_RADIO_INTERFMODE_NONE:
1310 case BCM43xx_RADIO_INTERFMODE_NONWLAN:
1311 case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
1312 break;
1313 default:
1314 return -EINVAL;
1315 }
1316
1317 currentmode = radio->interfmode;
1318 if (currentmode == mode)
1319 return 0;
1320 if (currentmode != BCM43xx_RADIO_INTERFMODE_NONE)
1321 bcm43xx_radio_interference_mitigation_disable(bcm, currentmode);
1322
1323 if (mode == BCM43xx_RADIO_INTERFMODE_NONE) {
1324 radio->aci_enable = 0;
1325 radio->aci_hw_rssi = 0;
1326 } else
1327 bcm43xx_radio_interference_mitigation_enable(bcm, mode);
1328 radio->interfmode = mode;
1329
1330 return 0;
1331}
1332
1333u16 bcm43xx_radio_calibrationvalue(struct bcm43xx_private *bcm)
1334{
1335 u16 reg, index, ret;
1336
1337 reg = bcm43xx_radio_read16(bcm, 0x0060);
1338 index = (reg & 0x001E) >> 1;
1339 ret = rcc_table[index] << 1;
1340 ret |= (reg & 0x0001);
1341 ret |= 0x0020;
1342
1343 return ret;
1344}
1345
1346u16 bcm43xx_radio_init2050(struct bcm43xx_private *bcm)
1347{
1348 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1349 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1350 u16 backup[19] = { 0 };
1351 u16 ret;
1352 u16 i, j;
1353 u32 tmp1 = 0, tmp2 = 0;
1354
1355 backup[0] = bcm43xx_radio_read16(bcm, 0x0043);
1356 backup[14] = bcm43xx_radio_read16(bcm, 0x0051);
1357 backup[15] = bcm43xx_radio_read16(bcm, 0x0052);
1358 backup[1] = bcm43xx_phy_read(bcm, 0x0015);
1359 backup[16] = bcm43xx_phy_read(bcm, 0x005A);
1360 backup[17] = bcm43xx_phy_read(bcm, 0x0059);
1361 backup[18] = bcm43xx_phy_read(bcm, 0x0058);
1362 if (phy->type == BCM43xx_PHYTYPE_B) {
1363 backup[2] = bcm43xx_phy_read(bcm, 0x0030);
1364 backup[3] = bcm43xx_read16(bcm, 0x03EC);
1365 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1366 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1367 } else {
1368 if (phy->connected) {
1369 backup[4] = bcm43xx_phy_read(bcm, 0x0811);
1370 backup[5] = bcm43xx_phy_read(bcm, 0x0812);
1371 backup[6] = bcm43xx_phy_read(bcm, 0x0814);
1372 backup[7] = bcm43xx_phy_read(bcm, 0x0815);
1373 backup[8] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1374 backup[9] = bcm43xx_phy_read(bcm, 0x0802);
1375 bcm43xx_phy_write(bcm, 0x0814,
1376 (bcm43xx_phy_read(bcm, 0x0814) | 0x0003));
1377 bcm43xx_phy_write(bcm, 0x0815,
1378 (bcm43xx_phy_read(bcm, 0x0815) & 0xFFFC));
1379 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
1380 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF));
1381 bcm43xx_phy_write(bcm, 0x0802,
1382 (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC));
1383 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1384 bcm43xx_phy_write(bcm, 0x0812, 0x0FB2);
1385 }
1386 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
1387 (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) | 0x8000));
1388 }
1389 backup[10] = bcm43xx_phy_read(bcm, 0x0035);
1390 bcm43xx_phy_write(bcm, 0x0035,
1391 (bcm43xx_phy_read(bcm, 0x0035) & 0xFF7F));
1392 backup[11] = bcm43xx_read16(bcm, 0x03E6);
1393 backup[12] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1394
1395 // Initialization
1396 if (phy->version == 0) {
1397 bcm43xx_write16(bcm, 0x03E6, 0x0122);
1398 } else {
1399 if (phy->version >= 2)
1400 bcm43xx_write16(bcm, 0x03E6, 0x0040);
1401 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1402 (bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) | 0x2000));
1403 }
1404
1405 ret = bcm43xx_radio_calibrationvalue(bcm);
1406
1407 if (phy->type == BCM43xx_PHYTYPE_B)
1408 bcm43xx_radio_write16(bcm, 0x0078, 0x0003);
1409
1410 bcm43xx_phy_write(bcm, 0x0015, 0xBFAF);
1411 bcm43xx_phy_write(bcm, 0x002B, 0x1403);
1412 if (phy->connected)
1413 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1414 bcm43xx_phy_write(bcm, 0x0015, 0xBFA0);
1415 bcm43xx_radio_write16(bcm, 0x0051,
1416 (bcm43xx_radio_read16(bcm, 0x0051) | 0x0004));
1417 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1418 bcm43xx_radio_write16(bcm, 0x0043,
1419 bcm43xx_radio_read16(bcm, 0x0043) | 0x0009);
1420 bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1421
1422 for (i = 0; i < 16; i++) {
1423 bcm43xx_phy_write(bcm, 0x005A, 0x0480);
1424 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1425 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1426 if (phy->connected)
1427 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1428 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1429 udelay(10);
1430 if (phy->connected)
1431 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1432 bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
1433 udelay(10);
1434 if (phy->connected)
1435 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1436 bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
1437 udelay(10);
1438 tmp1 += bcm43xx_phy_read(bcm, 0x002D);
1439 bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1440 if (phy->connected)
1441 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1442 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1443 }
1444
1445 tmp1++;
1446 tmp1 >>= 9;
1447 udelay(10);
1448 bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1449
1450 for (i = 0; i < 16; i++) {
1451 bcm43xx_radio_write16(bcm, 0x0078, (flip_4bit(i) << 1) | 0x0020);
1452 backup[13] = bcm43xx_radio_read16(bcm, 0x0078);
1453 udelay(10);
1454 for (j = 0; j < 16; j++) {
1455 bcm43xx_phy_write(bcm, 0x005A, 0x0D80);
1456 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1457 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1458 if (phy->connected)
1459 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1460 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1461 udelay(10);
1462 if (phy->connected)
1463 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1464 bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
1465 udelay(10);
1466 if (phy->connected)
1467 bcm43xx_phy_write(bcm, 0x0812, 0x30B3); /* 0x30B3 is not a typo */
1468 bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
1469 udelay(10);
1470 tmp2 += bcm43xx_phy_read(bcm, 0x002D);
1471 bcm43xx_phy_write(bcm, 0x0058, 0x0000);
1472 if (phy->connected)
1473 bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
1474 bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
1475 }
1476 tmp2++;
1477 tmp2 >>= 8;
1478 if (tmp1 < tmp2)
1479 break;
1480 }
1481
1482 /* Restore the registers */
1483 bcm43xx_phy_write(bcm, 0x0015, backup[1]);
1484 bcm43xx_radio_write16(bcm, 0x0051, backup[14]);
1485 bcm43xx_radio_write16(bcm, 0x0052, backup[15]);
1486 bcm43xx_radio_write16(bcm, 0x0043, backup[0]);
1487 bcm43xx_phy_write(bcm, 0x005A, backup[16]);
1488 bcm43xx_phy_write(bcm, 0x0059, backup[17]);
1489 bcm43xx_phy_write(bcm, 0x0058, backup[18]);
1490 bcm43xx_write16(bcm, 0x03E6, backup[11]);
1491 if (phy->version != 0)
1492 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[12]);
1493 bcm43xx_phy_write(bcm, 0x0035, backup[10]);
1494 bcm43xx_radio_selectchannel(bcm, radio->channel, 1);
1495 if (phy->type == BCM43xx_PHYTYPE_B) {
1496 bcm43xx_phy_write(bcm, 0x0030, backup[2]);
1497 bcm43xx_write16(bcm, 0x03EC, backup[3]);
1498 } else {
1499 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
1500 (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) & 0x7FFF));
1501 if (phy->connected) {
1502 bcm43xx_phy_write(bcm, 0x0811, backup[4]);
1503 bcm43xx_phy_write(bcm, 0x0812, backup[5]);
1504 bcm43xx_phy_write(bcm, 0x0814, backup[6]);
1505 bcm43xx_phy_write(bcm, 0x0815, backup[7]);
1506 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, backup[8]);
1507 bcm43xx_phy_write(bcm, 0x0802, backup[9]);
1508 }
1509 }
1510 if (i >= 15)
1511 ret = backup[13];
1512
1513 return ret;
1514}
1515
1516void bcm43xx_radio_init2060(struct bcm43xx_private *bcm)
1517{
1518 int err;
1519
1520 bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
1521 bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
1522 bcm43xx_radio_write16(bcm, 0x0009, 0x0040);
1523 bcm43xx_radio_write16(bcm, 0x0005, 0x00AA);
1524 bcm43xx_radio_write16(bcm, 0x0032, 0x008F);
1525 bcm43xx_radio_write16(bcm, 0x0006, 0x008F);
1526 bcm43xx_radio_write16(bcm, 0x0034, 0x008F);
1527 bcm43xx_radio_write16(bcm, 0x002C, 0x0007);
1528 bcm43xx_radio_write16(bcm, 0x0082, 0x0080);
1529 bcm43xx_radio_write16(bcm, 0x0080, 0x0000);
1530 bcm43xx_radio_write16(bcm, 0x003F, 0x00DA);
1531 bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
1532 bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0010);
1533 bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
1534 bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
1535 udelay(400);
1536
1537 bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020) | 0x0010);
1538 udelay(400);
1539
1540 bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008) | 0x0008);
1541 bcm43xx_radio_write16(bcm, 0x0085, bcm43xx_radio_read16(bcm, 0x0085) & ~0x0010);
1542 bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
1543 bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040);
1544 bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040) | 0x0040);
1545 bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0008) | 0x0008);
1546 bcm43xx_phy_write(bcm, 0x0063, 0xDDC6);
1547 bcm43xx_phy_write(bcm, 0x0069, 0x07BE);
1548 bcm43xx_phy_write(bcm, 0x006A, 0x0000);
1549
1550 err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_A, 0);
1551 assert(err == 0);
1552 udelay(1000);
1553}
1554
1555static inline
1556u16 freq_r3A_value(u16 frequency)
1557{
1558 u16 value;
1559
1560 if (frequency < 5091)
1561 value = 0x0040;
1562 else if (frequency < 5321)
1563 value = 0x0000;
1564 else if (frequency < 5806)
1565 value = 0x0080;
1566 else
1567 value = 0x0040;
1568
1569 return value;
1570}
1571
1572void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm)
1573{
1574 static const u8 data_high[5] = { 0x00, 0x40, 0x80, 0x90, 0xD0 };
1575 static const u8 data_low[5] = { 0x00, 0x01, 0x05, 0x06, 0x0A };
1576 u16 tmp = bcm43xx_radio_read16(bcm, 0x001E);
1577 int i, j;
1578
1579 for (i = 0; i < 5; i++) {
1580 for (j = 0; j < 5; j++) {
1581 if (tmp == (data_high[i] << 4 | data_low[j])) {
1582 bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0);
1583 return;
1584 }
1585 }
1586 }
1587}
1588
1589int bcm43xx_radio_selectchannel(struct bcm43xx_private *bcm,
1590 u8 channel,
1591 int synthetic_pu_workaround)
1592{
1593 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1594 u16 r8, tmp;
1595 u16 freq;
1596
1597 if ((radio->manufact == 0x17F) &&
1598 (radio->version == 0x2060) &&
1599 (radio->revision == 1)) {
1600 if (channel > 200)
1601 return -EINVAL;
1602 freq = channel2freq_a(channel);
1603
1604 r8 = bcm43xx_radio_read16(bcm, 0x0008);
1605 bcm43xx_write16(bcm, 0x03F0, freq);
1606 bcm43xx_radio_write16(bcm, 0x0008, r8);
1607
1608 TODO();//TODO: write max channel TX power? to Radio 0x2D
1609 tmp = bcm43xx_radio_read16(bcm, 0x002E);
1610 tmp &= 0x0080;
1611 TODO();//TODO: OR tmp with the Power out estimation for this channel?
1612 bcm43xx_radio_write16(bcm, 0x002E, tmp);
1613
1614 if (freq >= 4920 && freq <= 5500) {
1615 /*
1616 * r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
1617 * = (freq * 0.025862069
1618 */
1619 r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */
1620 }
1621 bcm43xx_radio_write16(bcm, 0x0007, (r8 << 4) | r8);
1622 bcm43xx_radio_write16(bcm, 0x0020, (r8 << 4) | r8);
1623 bcm43xx_radio_write16(bcm, 0x0021, (r8 << 4) | r8);
1624 bcm43xx_radio_write16(bcm, 0x0022,
1625 (bcm43xx_radio_read16(bcm, 0x0022)
1626 & 0x000F) | (r8 << 4));
1627 bcm43xx_radio_write16(bcm, 0x002A, (r8 << 4));
1628 bcm43xx_radio_write16(bcm, 0x002B, (r8 << 4));
1629 bcm43xx_radio_write16(bcm, 0x0008,
1630 (bcm43xx_radio_read16(bcm, 0x0008)
1631 & 0x00F0) | (r8 << 4));
1632 bcm43xx_radio_write16(bcm, 0x0029,
1633 (bcm43xx_radio_read16(bcm, 0x0029)
1634 & 0xFF0F) | 0x00B0);
1635 bcm43xx_radio_write16(bcm, 0x0035, 0x00AA);
1636 bcm43xx_radio_write16(bcm, 0x0036, 0x0085);
1637 bcm43xx_radio_write16(bcm, 0x003A,
1638 (bcm43xx_radio_read16(bcm, 0x003A)
1639 & 0xFF20) | freq_r3A_value(freq));
1640 bcm43xx_radio_write16(bcm, 0x003D,
1641 bcm43xx_radio_read16(bcm, 0x003D) & 0x00FF);
1642 bcm43xx_radio_write16(bcm, 0x0081,
1643 (bcm43xx_radio_read16(bcm, 0x0081)
1644 & 0xFF7F) | 0x0080);
1645 bcm43xx_radio_write16(bcm, 0x0035,
1646 bcm43xx_radio_read16(bcm, 0x0035) & 0xFFEF);
1647 bcm43xx_radio_write16(bcm, 0x0035,
1648 (bcm43xx_radio_read16(bcm, 0x0035)
1649 & 0xFFEF) | 0x0010);
1650 bcm43xx_radio_set_tx_iq(bcm);
1651 TODO(); //TODO: TSSI2dbm workaround
1652 bcm43xx_phy_xmitpower(bcm);//FIXME correct?
1653 } else {
1654 if ((channel < 1) || (channel > 14))
1655 return -EINVAL;
1656
1657 if (synthetic_pu_workaround)
1658 bcm43xx_synth_pu_workaround(bcm, channel);
1659
1660 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
1661 channel2freq_bg(channel));
1662
1663 if (channel == 14) {
1664 if (bcm->sprom.locale == BCM43xx_LOCALE_JAPAN) {
1665 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1666 BCM43xx_UCODEFLAGS_OFFSET,
1667 bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1668 BCM43xx_UCODEFLAGS_OFFSET)
1669 & ~(1 << 7));
1670 } else {
1671 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
1672 BCM43xx_UCODEFLAGS_OFFSET,
1673 bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
1674 BCM43xx_UCODEFLAGS_OFFSET)
1675 | (1 << 7));
1676 }
1677 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1678 bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
1679 | (1 << 11));
1680 } else {
1681 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
1682 bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
1683 & 0xF7BF);
1684 }
1685 }
1686
1687 radio->channel = channel;
1688 //XXX: Using the longer of 2 timeouts (8000 vs 2000 usecs). Specs states
1689 // that 2000 usecs might suffice.
1690 udelay(8000);
1691
1692 return 0;
1693}
1694
1695void bcm43xx_radio_set_txantenna(struct bcm43xx_private *bcm, u32 val)
1696{
1697 u16 tmp;
1698
1699 val <<= 8;
1700 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0022) & 0xFCFF;
1701 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0022, tmp | val);
1702 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x03A8) & 0xFCFF;
1703 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x03A8, tmp | val);
1704 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0054) & 0xFCFF;
1705 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0054, tmp | val);
1706}
1707
1708/* http://bcm-specs.sipsolutions.net/TX_Gain_Base_Band */
1709static u16 bcm43xx_get_txgain_base_band(u16 txpower)
1710{
1711 u16 ret;
1712
1713 assert(txpower <= 63);
1714
1715 if (txpower >= 54)
1716 ret = 2;
1717 else if (txpower >= 49)
1718 ret = 4;
1719 else if (txpower >= 44)
1720 ret = 5;
1721 else
1722 ret = 6;
1723
1724 return ret;
1725}
1726
1727/* http://bcm-specs.sipsolutions.net/TX_Gain_Radio_Frequency_Power_Amplifier */
1728static u16 bcm43xx_get_txgain_freq_power_amp(u16 txpower)
1729{
1730 u16 ret;
1731
1732 assert(txpower <= 63);
1733
1734 if (txpower >= 32)
1735 ret = 0;
1736 else if (txpower >= 25)
1737 ret = 1;
1738 else if (txpower >= 20)
1739 ret = 2;
1740 else if (txpower >= 12)
1741 ret = 3;
1742 else
1743 ret = 4;
1744
1745 return ret;
1746}
1747
1748/* http://bcm-specs.sipsolutions.net/TX_Gain_Digital_Analog_Converter */
1749static u16 bcm43xx_get_txgain_dac(u16 txpower)
1750{
1751 u16 ret;
1752
1753 assert(txpower <= 63);
1754
1755 if (txpower >= 54)
1756 ret = txpower - 53;
1757 else if (txpower >= 49)
1758 ret = txpower - 42;
1759 else if (txpower >= 44)
1760 ret = txpower - 37;
1761 else if (txpower >= 32)
1762 ret = txpower - 32;
1763 else if (txpower >= 25)
1764 ret = txpower - 20;
1765 else if (txpower >= 20)
1766 ret = txpower - 13;
1767 else if (txpower >= 12)
1768 ret = txpower - 8;
1769 else
1770 ret = txpower;
1771
1772 return ret;
1773}
1774
1775void bcm43xx_radio_set_txpower_a(struct bcm43xx_private *bcm, u16 txpower)
1776{
1777 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1778 u16 pamp, base, dac, ilt;
1779
1780 txpower = limit_value(txpower, 0, 63);
1781
1782 pamp = bcm43xx_get_txgain_freq_power_amp(txpower);
1783 pamp <<= 5;
1784 pamp &= 0x00E0;
1785 bcm43xx_phy_write(bcm, 0x0019, pamp);
1786
1787 base = bcm43xx_get_txgain_base_band(txpower);
1788 base &= 0x000F;
1789 bcm43xx_phy_write(bcm, 0x0017, base | 0x0020);
1790
1791 ilt = bcm43xx_ilt_read(bcm, 0x3001);
1792 ilt &= 0x0007;
1793
1794 dac = bcm43xx_get_txgain_dac(txpower);
1795 dac <<= 3;
1796 dac |= ilt;
1797
1798 bcm43xx_ilt_write(bcm, 0x3001, dac);
1799
1800 radio->txpwr_offset = txpower;
1801
1802 TODO();
1803 //TODO: FuncPlaceholder (Adjust BB loft cancel)
1804}
1805
1806void bcm43xx_radio_set_txpower_bg(struct bcm43xx_private *bcm,
1807 u16 baseband_attenuation, u16 radio_attenuation,
1808 u16 txpower)
1809{
1810 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1811 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1812
1813 if (baseband_attenuation == 0xFFFF)
1814 baseband_attenuation = radio->baseband_atten;
1815 if (radio_attenuation == 0xFFFF)
1816 radio_attenuation = radio->radio_atten;
1817 if (txpower == 0xFFFF)
1818 txpower = radio->txctl1;
1819 radio->baseband_atten = baseband_attenuation;
1820 radio->radio_atten = radio_attenuation;
1821 radio->txctl1 = txpower;
1822
1823 assert(/*baseband_attenuation >= 0 &&*/ baseband_attenuation <= 11);
1824 if (radio->revision < 6)
1825 assert(/*radio_attenuation >= 0 &&*/ radio_attenuation <= 9);
1826 else
1827 assert(/* radio_attenuation >= 0 &&*/ radio_attenuation <= 31);
1828 assert(/*txpower >= 0 &&*/ txpower <= 7);
1829
1830 bcm43xx_phy_set_baseband_attenuation(bcm, baseband_attenuation);
1831 bcm43xx_radio_write16(bcm, 0x0043, radio_attenuation);
1832 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0064, radio_attenuation);
1833 if (radio->version == 0x2050) {
1834 bcm43xx_radio_write16(bcm, 0x0052,
1835 (bcm43xx_radio_read16(bcm, 0x0052) & ~0x0070)
1836 | ((txpower << 4) & 0x0070));
1837 }
1838 //FIXME: The spec is very weird and unclear here.
1839 if (phy->type == BCM43xx_PHYTYPE_G)
1840 bcm43xx_phy_lo_adjust(bcm, 0);
1841}
1842
1843u16 bcm43xx_default_baseband_attenuation(struct bcm43xx_private *bcm)
1844{
1845 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1846
1847 if (radio->version == 0x2050 && radio->revision < 6)
1848 return 0;
1849 return 2;
1850}
1851
1852u16 bcm43xx_default_radio_attenuation(struct bcm43xx_private *bcm)
1853{
1854 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1855 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1856 u16 att = 0xFFFF;
1857
1858 if (phy->type == BCM43xx_PHYTYPE_A)
1859 return 0x60;
1860
1861 switch (radio->version) {
1862 case 0x2053:
1863 switch (radio->revision) {
1864 case 1:
1865 att = 6;
1866 break;
1867 }
1868 break;
1869 case 0x2050:
1870 switch (radio->revision) {
1871 case 0:
1872 att = 5;
1873 break;
1874 case 1:
1875 if (phy->type == BCM43xx_PHYTYPE_G) {
1876 if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1877 bcm->board_type == 0x421 &&
1878 bcm->board_revision >= 30)
1879 att = 3;
1880 else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1881 bcm->board_type == 0x416)
1882 att = 3;
1883 else
1884 att = 1;
1885 } else {
1886 if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1887 bcm->board_type == 0x421 &&
1888 bcm->board_revision >= 30)
1889 att = 7;
1890 else
1891 att = 6;
1892 }
1893 break;
1894 case 2:
1895 if (phy->type == BCM43xx_PHYTYPE_G) {
1896 if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1897 bcm->board_type == 0x421 &&
1898 bcm->board_revision >= 30)
1899 att = 3;
1900 else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1901 bcm->board_type == 0x416)
1902 att = 5;
1903 else if (bcm->chip_id == 0x4320)
1904 att = 4;
1905 else
1906 att = 3;
1907 } else
1908 att = 6;
1909 break;
1910 case 3:
1911 att = 5;
1912 break;
1913 case 4:
1914 case 5:
1915 att = 1;
1916 break;
1917 case 6:
1918 case 7:
1919 att = 5;
1920 break;
1921 case 8:
1922 att = 0x1A;
1923 break;
1924 case 9:
1925 default:
1926 att = 5;
1927 }
1928 }
1929 if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
1930 bcm->board_type == 0x421) {
1931 if (bcm->board_revision < 0x43)
1932 att = 2;
1933 else if (bcm->board_revision < 0x51)
1934 att = 3;
1935 }
1936 if (att == 0xFFFF)
1937 att = 5;
1938
1939 return att;
1940}
1941
1942u16 bcm43xx_default_txctl1(struct bcm43xx_private *bcm)
1943{
1944 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1945
1946 if (radio->version != 0x2050)
1947 return 0;
1948 if (radio->revision == 1)
1949 return 3;
1950 if (radio->revision < 6)
1951 return 2;
1952 if (radio->revision == 8)
1953 return 1;
1954 return 0;
1955}
1956
1957void bcm43xx_radio_turn_on(struct bcm43xx_private *bcm)
1958{
1959 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1960 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1961 int err;
1962
1963 if (radio->enabled)
1964 return;
1965
1966 switch (phy->type) {
1967 case BCM43xx_PHYTYPE_A:
1968 bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
1969 bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
1970 bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) & 0xFFF7);
1971 bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) & 0xFFF7);
1972 bcm43xx_radio_init2060(bcm);
1973 break;
1974 case BCM43xx_PHYTYPE_B:
1975 case BCM43xx_PHYTYPE_G:
1976 bcm43xx_phy_write(bcm, 0x0015, 0x8000);
1977 bcm43xx_phy_write(bcm, 0x0015, 0xCC00);
1978 bcm43xx_phy_write(bcm, 0x0015, (phy->connected ? 0x00C0 : 0x0000));
1979 err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 1);
1980 assert(err == 0);
1981 break;
1982 default:
1983 assert(0);
1984 }
1985 radio->enabled = 1;
1986 dprintk(KERN_INFO PFX "Radio turned on\n");
1987}
1988
1989void bcm43xx_radio_turn_off(struct bcm43xx_private *bcm)
1990{
1991 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1992 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1993
1994 if (phy->type == BCM43xx_PHYTYPE_A) {
1995 bcm43xx_radio_write16(bcm, 0x0004, 0x00FF);
1996 bcm43xx_radio_write16(bcm, 0x0005, 0x00FB);
1997 bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) | 0x0008);
1998 bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) | 0x0008);
1999 }
2000 if (phy->type == BCM43xx_PHYTYPE_G && bcm->current_core->rev >= 5) {
2001 bcm43xx_phy_write(bcm, 0x0811, bcm43xx_phy_read(bcm, 0x0811) | 0x008C);
2002 bcm43xx_phy_write(bcm, 0x0812, bcm43xx_phy_read(bcm, 0x0812) & 0xFF73);
2003 } else
2004 bcm43xx_phy_write(bcm, 0x0015, 0xAA00);
2005 radio->enabled = 0;
2006 dprintk(KERN_INFO PFX "Radio turned off\n");
2007}
2008
2009void bcm43xx_radio_clear_tssi(struct bcm43xx_private *bcm)
2010{
2011 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2012
2013 switch (phy->type) {
2014 case BCM43xx_PHYTYPE_A:
2015 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0068, 0x7F7F);
2016 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x006a, 0x7F7F);
2017 break;
2018 case BCM43xx_PHYTYPE_B:
2019 case BCM43xx_PHYTYPE_G:
2020 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0058, 0x7F7F);
2021 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x005a, 0x7F7F);
2022 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0070, 0x7F7F);
2023 bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0072, 0x7F7F);
2024 break;
2025 }
2026}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_radio.h b/drivers/net/wireless/bcm43xx/bcm43xx_radio.h
new file mode 100644
index 0000000000..9ed18039fa
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_radio.h
@@ -0,0 +1,99 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#ifndef BCM43xx_RADIO_H_
32#define BCM43xx_RADIO_H_
33
34#include "bcm43xx.h"
35
36
37#define BCM43xx_RADIO_DEFAULT_CHANNEL_A 36
38#define BCM43xx_RADIO_DEFAULT_CHANNEL_BG 6
39
40/* Force antenna 0. */
41#define BCM43xx_RADIO_TXANTENNA_0 0
42/* Force antenna 1. */
43#define BCM43xx_RADIO_TXANTENNA_1 1
44/* Use the RX antenna, that was selected for the most recently
45 * received good PLCP header.
46 */
47#define BCM43xx_RADIO_TXANTENNA_LASTPLCP 3
48#define BCM43xx_RADIO_TXANTENNA_DEFAULT BCM43xx_RADIO_TXANTENNA_LASTPLCP
49
50#define BCM43xx_RADIO_INTERFMODE_NONE 0
51#define BCM43xx_RADIO_INTERFMODE_NONWLAN 1
52#define BCM43xx_RADIO_INTERFMODE_MANUALWLAN 2
53#define BCM43xx_RADIO_INTERFMODE_AUTOWLAN 3
54
55
56void bcm43xx_radio_lock(struct bcm43xx_private *bcm);
57void bcm43xx_radio_unlock(struct bcm43xx_private *bcm);
58
59u16 bcm43xx_radio_read16(struct bcm43xx_private *bcm, u16 offset);
60void bcm43xx_radio_write16(struct bcm43xx_private *bcm, u16 offset, u16 val);
61
62u16 bcm43xx_radio_init2050(struct bcm43xx_private *bcm);
63void bcm43xx_radio_init2060(struct bcm43xx_private *bcm);
64
65void bcm43xx_radio_turn_on(struct bcm43xx_private *bcm);
66void bcm43xx_radio_turn_off(struct bcm43xx_private *bcm);
67
68int bcm43xx_radio_selectchannel(struct bcm43xx_private *bcm, u8 channel,
69 int synthetic_pu_workaround);
70
71void bcm43xx_radio_set_txpower_a(struct bcm43xx_private *bcm, u16 txpower);
72void bcm43xx_radio_set_txpower_bg(struct bcm43xx_private *bcm,
73 u16 baseband_attenuation, u16 attenuation,
74 u16 txpower);
75
76u16 bcm43xx_default_baseband_attenuation(struct bcm43xx_private *bcm);
77u16 bcm43xx_default_radio_attenuation(struct bcm43xx_private *bcm);
78u16 bcm43xx_default_txctl1(struct bcm43xx_private *bcm);
79
80void bcm43xx_radio_set_txantenna(struct bcm43xx_private *bcm, u32 val);
81
82void bcm43xx_radio_clear_tssi(struct bcm43xx_private *bcm);
83
84u8 bcm43xx_radio_aci_detect(struct bcm43xx_private *bcm, u8 channel);
85u8 bcm43xx_radio_aci_scan(struct bcm43xx_private *bcm);
86
87int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm, int mode);
88
89void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm);
90void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm);
91s16 bcm43xx_nrssi_hw_read(struct bcm43xx_private *bcm, u16 offset);
92void bcm43xx_nrssi_hw_write(struct bcm43xx_private *bcm, u16 offset, s16 val);
93void bcm43xx_nrssi_hw_update(struct bcm43xx_private *bcm, u16 val);
94void bcm43xx_nrssi_mem_update(struct bcm43xx_private *bcm);
95
96void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm);
97u16 bcm43xx_radio_calibrationvalue(struct bcm43xx_private *bcm);
98
99#endif /* BCM43xx_RADIO_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.c b/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.c
new file mode 100644
index 0000000000..c44d890b94
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.c
@@ -0,0 +1,322 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 SYSFS support routines
6
7 Copyright (c) 2006 Michael Buesch <mbuesch@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
23
24*/
25
26#include "bcm43xx_sysfs.h"
27#include "bcm43xx.h"
28#include "bcm43xx_main.h"
29#include "bcm43xx_radio.h"
30
31#include <linux/capability.h>
32
33
34#define GENERIC_FILESIZE 64
35
36
37static int get_integer(const char *buf, size_t count)
38{
39 char tmp[10 + 1] = { 0 };
40 int ret = -EINVAL;
41
42 if (count == 0)
43 goto out;
44 count = min(count, (size_t)10);
45 memcpy(tmp, buf, count);
46 ret = simple_strtol(tmp, NULL, 10);
47out:
48 return ret;
49}
50
51static int get_boolean(const char *buf, size_t count)
52{
53 if (count != 0) {
54 if (buf[0] == '1')
55 return 1;
56 if (buf[0] == '0')
57 return 0;
58 if (count >= 4 && memcmp(buf, "true", 4) == 0)
59 return 1;
60 if (count >= 5 && memcmp(buf, "false", 5) == 0)
61 return 0;
62 if (count >= 3 && memcmp(buf, "yes", 3) == 0)
63 return 1;
64 if (count >= 2 && memcmp(buf, "no", 2) == 0)
65 return 0;
66 if (count >= 2 && memcmp(buf, "on", 2) == 0)
67 return 1;
68 if (count >= 3 && memcmp(buf, "off", 3) == 0)
69 return 0;
70 }
71 return -EINVAL;
72}
73
74static ssize_t bcm43xx_attr_sprom_show(struct device *dev,
75 struct device_attribute *attr,
76 char *buf)
77{
78 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_sprom);
79 u16 *sprom;
80 unsigned long flags;
81 int i, err;
82
83 if (!capable(CAP_NET_ADMIN))
84 return -EPERM;
85
86 assert(BCM43xx_SPROM_SIZE * sizeof(u16) <= PAGE_SIZE);
87 sprom = kmalloc(BCM43xx_SPROM_SIZE * sizeof(*sprom),
88 GFP_KERNEL);
89 if (!sprom)
90 return -ENOMEM;
91 bcm43xx_lock_mmio(bcm, flags);
92 assert(bcm->initialized);
93 err = bcm43xx_sprom_read(bcm, sprom);
94 if (!err) {
95 for (i = 0; i < BCM43xx_SPROM_SIZE; i++) {
96 buf[i * 2] = sprom[i] & 0x00FF;
97 buf[i * 2 + 1] = (sprom[i] & 0xFF00) >> 8;
98 }
99 }
100 bcm43xx_unlock_mmio(bcm, flags);
101 kfree(sprom);
102
103 return err ? err : BCM43xx_SPROM_SIZE * sizeof(u16);
104}
105
106static ssize_t bcm43xx_attr_sprom_store(struct device *dev,
107 struct device_attribute *attr,
108 const char *buf, size_t count)
109{
110 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_sprom);
111 u16 *sprom;
112 unsigned long flags;
113 int i, err;
114
115 if (!capable(CAP_NET_ADMIN))
116 return -EPERM;
117
118 if (count != BCM43xx_SPROM_SIZE * sizeof(u16))
119 return -EINVAL;
120 sprom = kmalloc(BCM43xx_SPROM_SIZE * sizeof(*sprom),
121 GFP_KERNEL);
122 if (!sprom)
123 return -ENOMEM;
124 for (i = 0; i < BCM43xx_SPROM_SIZE; i++) {
125 sprom[i] = buf[i * 2] & 0xFF;
126 sprom[i] |= ((u16)(buf[i * 2 + 1] & 0xFF)) << 8;
127 }
128 bcm43xx_lock_mmio(bcm, flags);
129 assert(bcm->initialized);
130 err = bcm43xx_sprom_write(bcm, sprom);
131 bcm43xx_unlock_mmio(bcm, flags);
132 kfree(sprom);
133
134 return err ? err : count;
135
136}
137
138static ssize_t bcm43xx_attr_interfmode_show(struct device *dev,
139 struct device_attribute *attr,
140 char *buf)
141{
142 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_interfmode);
143 unsigned long flags;
144 int err;
145 ssize_t count = 0;
146
147 if (!capable(CAP_NET_ADMIN))
148 return -EPERM;
149
150 bcm43xx_lock(bcm, flags);
151 assert(bcm->initialized);
152
153 switch (bcm43xx_current_radio(bcm)->interfmode) {
154 case BCM43xx_RADIO_INTERFMODE_NONE:
155 count = snprintf(buf, PAGE_SIZE, "0 (No Interference Mitigation)\n");
156 break;
157 case BCM43xx_RADIO_INTERFMODE_NONWLAN:
158 count = snprintf(buf, PAGE_SIZE, "1 (Non-WLAN Interference Mitigation)\n");
159 break;
160 case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
161 count = snprintf(buf, PAGE_SIZE, "2 (WLAN Interference Mitigation)\n");
162 break;
163 default:
164 assert(0);
165 }
166 err = 0;
167
168 bcm43xx_unlock(bcm, flags);
169
170 return err ? err : count;
171
172}
173
174static ssize_t bcm43xx_attr_interfmode_store(struct device *dev,
175 struct device_attribute *attr,
176 const char *buf, size_t count)
177{
178 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_interfmode);
179 unsigned long flags;
180 int err;
181 int mode;
182
183 if (!capable(CAP_NET_ADMIN))
184 return -EPERM;
185
186 mode = get_integer(buf, count);
187 switch (mode) {
188 case 0:
189 mode = BCM43xx_RADIO_INTERFMODE_NONE;
190 break;
191 case 1:
192 mode = BCM43xx_RADIO_INTERFMODE_NONWLAN;
193 break;
194 case 2:
195 mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
196 break;
197 case 3:
198 mode = BCM43xx_RADIO_INTERFMODE_AUTOWLAN;
199 break;
200 default:
201 return -EINVAL;
202 }
203
204 bcm43xx_lock_mmio(bcm, flags);
205 assert(bcm->initialized);
206
207 err = bcm43xx_radio_set_interference_mitigation(bcm, mode);
208 if (err) {
209 printk(KERN_ERR PFX "Interference Mitigation not "
210 "supported by device\n");
211 }
212
213 bcm43xx_unlock_mmio(bcm, flags);
214
215 return err ? err : count;
216}
217
218static ssize_t bcm43xx_attr_preamble_show(struct device *dev,
219 struct device_attribute *attr,
220 char *buf)
221{
222 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_preamble);
223 unsigned long flags;
224 int err;
225 ssize_t count;
226
227 if (!capable(CAP_NET_ADMIN))
228 return -EPERM;
229
230 bcm43xx_lock(bcm, flags);
231 assert(bcm->initialized);
232
233 if (bcm->short_preamble)
234 count = snprintf(buf, PAGE_SIZE, "1 (Short Preamble enabled)\n");
235 else
236 count = snprintf(buf, PAGE_SIZE, "0 (Short Preamble disabled)\n");
237
238 err = 0;
239 bcm43xx_unlock(bcm, flags);
240
241 return err ? err : count;
242}
243
244static ssize_t bcm43xx_attr_preamble_store(struct device *dev,
245 struct device_attribute *attr,
246 const char *buf, size_t count)
247{
248 struct bcm43xx_private *bcm = devattr_to_bcm(attr, attr_preamble);
249 unsigned long flags;
250 int err;
251 int value;
252
253 if (!capable(CAP_NET_ADMIN))
254 return -EPERM;
255
256 value = get_boolean(buf, count);
257 if (value < 0)
258 return value;
259 bcm43xx_lock(bcm, flags);
260 assert(bcm->initialized);
261
262 bcm->short_preamble = !!value;
263
264 err = 0;
265 bcm43xx_unlock(bcm, flags);
266
267 return err ? err : count;
268}
269
270int bcm43xx_sysfs_register(struct bcm43xx_private *bcm)
271{
272 struct device *dev = &bcm->pci_dev->dev;
273 struct bcm43xx_sysfs *sysfs = &bcm->sysfs;
274 int err;
275
276 assert(bcm->initialized);
277
278 sysfs->attr_sprom.attr.name = "sprom";
279 sysfs->attr_sprom.attr.owner = THIS_MODULE;
280 sysfs->attr_sprom.attr.mode = 0600;
281 sysfs->attr_sprom.show = bcm43xx_attr_sprom_show;
282 sysfs->attr_sprom.store = bcm43xx_attr_sprom_store;
283 err = device_create_file(dev, &sysfs->attr_sprom);
284 if (err)
285 goto out;
286
287 sysfs->attr_interfmode.attr.name = "interference";
288 sysfs->attr_interfmode.attr.owner = THIS_MODULE;
289 sysfs->attr_interfmode.attr.mode = 0600;
290 sysfs->attr_interfmode.show = bcm43xx_attr_interfmode_show;
291 sysfs->attr_interfmode.store = bcm43xx_attr_interfmode_store;
292 err = device_create_file(dev, &sysfs->attr_interfmode);
293 if (err)
294 goto err_remove_sprom;
295
296 sysfs->attr_preamble.attr.name = "shortpreamble";
297 sysfs->attr_preamble.attr.owner = THIS_MODULE;
298 sysfs->attr_preamble.attr.mode = 0600;
299 sysfs->attr_preamble.show = bcm43xx_attr_preamble_show;
300 sysfs->attr_preamble.store = bcm43xx_attr_preamble_store;
301 err = device_create_file(dev, &sysfs->attr_preamble);
302 if (err)
303 goto err_remove_interfmode;
304
305out:
306 return err;
307err_remove_interfmode:
308 device_remove_file(dev, &sysfs->attr_interfmode);
309err_remove_sprom:
310 device_remove_file(dev, &sysfs->attr_sprom);
311 goto out;
312}
313
314void bcm43xx_sysfs_unregister(struct bcm43xx_private *bcm)
315{
316 struct device *dev = &bcm->pci_dev->dev;
317 struct bcm43xx_sysfs *sysfs = &bcm->sysfs;
318
319 device_remove_file(dev, &sysfs->attr_preamble);
320 device_remove_file(dev, &sysfs->attr_interfmode);
321 device_remove_file(dev, &sysfs->attr_sprom);
322}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.h b/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.h
new file mode 100644
index 0000000000..57f14514e3
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_sysfs.h
@@ -0,0 +1,25 @@
1#ifndef BCM43xx_SYSFS_H_
2#define BCM43xx_SYSFS_H_
3
4#include <linux/device.h>
5
6
7struct bcm43xx_sysfs {
8 struct device_attribute attr_sprom;
9 struct device_attribute attr_interfmode;
10 struct device_attribute attr_preamble;
11};
12
13#define devattr_to_bcm(attr, attr_name) ({ \
14 struct bcm43xx_sysfs *__s; struct bcm43xx_private *__p; \
15 __s = container_of((attr), struct bcm43xx_sysfs, attr_name); \
16 __p = container_of(__s, struct bcm43xx_private, sysfs); \
17 __p; \
18 })
19
20struct bcm43xx_private;
21
22int bcm43xx_sysfs_register(struct bcm43xx_private *bcm);
23void bcm43xx_sysfs_unregister(struct bcm43xx_private *bcm);
24
25#endif /* BCM43xx_SYSFS_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_wx.c b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c
new file mode 100644
index 0000000000..3daee828ef
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c
@@ -0,0 +1,1002 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/wireless.h>
32#include <net/iw_handler.h>
33#include <net/ieee80211softmac.h>
34#include <net/ieee80211softmac_wx.h>
35#include <linux/capability.h>
36#include <linux/sched.h> /* for capable() */
37#include <linux/delay.h>
38
39#include "bcm43xx.h"
40#include "bcm43xx_wx.h"
41#include "bcm43xx_main.h"
42#include "bcm43xx_radio.h"
43#include "bcm43xx_phy.h"
44
45
46/* The WIRELESS_EXT version, which is implemented by this driver. */
47#define BCM43xx_WX_VERSION 18
48
49#define MAX_WX_STRING 80
50
51
52static int bcm43xx_wx_get_name(struct net_device *net_dev,
53 struct iw_request_info *info,
54 union iwreq_data *data,
55 char *extra)
56{
57 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
58 unsigned long flags;
59 int i;
60 struct bcm43xx_phyinfo *phy;
61 char suffix[7] = { 0 };
62 int have_a = 0, have_b = 0, have_g = 0;
63
64 bcm43xx_lock(bcm, flags);
65 for (i = 0; i < bcm->nr_80211_available; i++) {
66 phy = &(bcm->core_80211_ext[i].phy);
67 switch (phy->type) {
68 case BCM43xx_PHYTYPE_A:
69 have_a = 1;
70 break;
71 case BCM43xx_PHYTYPE_G:
72 have_g = 1;
73 case BCM43xx_PHYTYPE_B:
74 have_b = 1;
75 break;
76 default:
77 assert(0);
78 }
79 }
80 bcm43xx_unlock(bcm, flags);
81
82 i = 0;
83 if (have_a) {
84 suffix[i++] = 'a';
85 suffix[i++] = '/';
86 }
87 if (have_b) {
88 suffix[i++] = 'b';
89 suffix[i++] = '/';
90 }
91 if (have_g) {
92 suffix[i++] = 'g';
93 suffix[i++] = '/';
94 }
95 if (i != 0)
96 suffix[i - 1] = '\0';
97
98 snprintf(data->name, IFNAMSIZ, "IEEE 802.11%s", suffix);
99
100 return 0;
101}
102
103static int bcm43xx_wx_set_channelfreq(struct net_device *net_dev,
104 struct iw_request_info *info,
105 union iwreq_data *data,
106 char *extra)
107{
108 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
109 unsigned long flags;
110 u8 channel;
111 int freq;
112 int err = -EINVAL;
113
114 bcm43xx_lock_mmio(bcm, flags);
115 if ((data->freq.m >= 0) && (data->freq.m <= 1000)) {
116 channel = data->freq.m;
117 freq = bcm43xx_channel_to_freq(bcm, channel);
118 } else {
119 channel = bcm43xx_freq_to_channel(bcm, data->freq.m);
120 freq = data->freq.m;
121 }
122 if (!bcm43xx_is_valid_channel(bcm, channel))
123 goto out_unlock;
124 if (bcm->initialized) {
125 //ieee80211softmac_disassoc(softmac, $REASON);
126 bcm43xx_mac_suspend(bcm);
127 err = bcm43xx_radio_selectchannel(bcm, channel, 0);
128 bcm43xx_mac_enable(bcm);
129 } else {
130 bcm43xx_current_radio(bcm)->initial_channel = channel;
131 err = 0;
132 }
133out_unlock:
134 bcm43xx_unlock_mmio(bcm, flags);
135
136 return err;
137}
138
139static int bcm43xx_wx_get_channelfreq(struct net_device *net_dev,
140 struct iw_request_info *info,
141 union iwreq_data *data,
142 char *extra)
143{
144 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
145 struct bcm43xx_radioinfo *radio;
146 unsigned long flags;
147 int err = -ENODEV;
148 u16 channel;
149
150 bcm43xx_lock(bcm, flags);
151 radio = bcm43xx_current_radio(bcm);
152 channel = radio->channel;
153 if (channel == 0xFF) {
154 assert(!bcm->initialized);
155 channel = radio->initial_channel;
156 if (channel == 0xFF)
157 goto out_unlock;
158 }
159 assert(channel > 0 && channel <= 1000);
160 data->freq.e = 1;
161 data->freq.m = bcm43xx_channel_to_freq(bcm, channel) * 100000;
162 data->freq.flags = 1;
163
164 err = 0;
165out_unlock:
166 bcm43xx_unlock(bcm, flags);
167
168 return err;
169}
170
171static int bcm43xx_wx_set_mode(struct net_device *net_dev,
172 struct iw_request_info *info,
173 union iwreq_data *data,
174 char *extra)
175{
176 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
177 unsigned long flags;
178 int mode;
179
180 mode = data->mode;
181 if (mode == IW_MODE_AUTO)
182 mode = BCM43xx_INITIAL_IWMODE;
183
184 bcm43xx_lock_mmio(bcm, flags);
185 if (bcm->ieee->iw_mode != mode)
186 bcm43xx_set_iwmode(bcm, mode);
187 bcm43xx_unlock_mmio(bcm, flags);
188
189 return 0;
190}
191
192static int bcm43xx_wx_get_mode(struct net_device *net_dev,
193 struct iw_request_info *info,
194 union iwreq_data *data,
195 char *extra)
196{
197 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
198 unsigned long flags;
199
200 bcm43xx_lock(bcm, flags);
201 data->mode = bcm->ieee->iw_mode;
202 bcm43xx_unlock(bcm, flags);
203
204 return 0;
205}
206
207static int bcm43xx_wx_get_rangeparams(struct net_device *net_dev,
208 struct iw_request_info *info,
209 union iwreq_data *data,
210 char *extra)
211{
212 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
213 struct iw_range *range = (struct iw_range *)extra;
214 const struct ieee80211_geo *geo;
215 unsigned long flags;
216 int i, j;
217 struct bcm43xx_phyinfo *phy;
218
219 data->data.length = sizeof(*range);
220 memset(range, 0, sizeof(*range));
221
222 //TODO: What about 802.11b?
223 /* 54Mb/s == ~27Mb/s payload throughput (802.11g) */
224 range->throughput = 27 * 1000 * 1000;
225
226 range->max_qual.qual = 100;
227 /* TODO: Real max RSSI */
228 range->max_qual.level = 3;
229 range->max_qual.noise = 100;
230 range->max_qual.updated = 7;
231
232 range->avg_qual.qual = 70;
233 range->avg_qual.level = 2;
234 range->avg_qual.noise = 40;
235 range->avg_qual.updated = 7;
236
237 range->min_rts = BCM43xx_MIN_RTS_THRESHOLD;
238 range->max_rts = BCM43xx_MAX_RTS_THRESHOLD;
239 range->min_frag = MIN_FRAG_THRESHOLD;
240 range->max_frag = MAX_FRAG_THRESHOLD;
241
242 range->encoding_size[0] = 5;
243 range->encoding_size[1] = 13;
244 range->num_encoding_sizes = 2;
245 range->max_encoding_tokens = WEP_KEYS;
246
247 range->we_version_compiled = WIRELESS_EXT;
248 range->we_version_source = BCM43xx_WX_VERSION;
249
250 range->enc_capa = IW_ENC_CAPA_WPA |
251 IW_ENC_CAPA_WPA2 |
252 IW_ENC_CAPA_CIPHER_TKIP |
253 IW_ENC_CAPA_CIPHER_CCMP;
254
255 bcm43xx_lock(bcm, flags);
256 phy = bcm43xx_current_phy(bcm);
257
258 range->num_bitrates = 0;
259 i = 0;
260 if (phy->type == BCM43xx_PHYTYPE_A ||
261 phy->type == BCM43xx_PHYTYPE_G) {
262 range->num_bitrates = 8;
263 range->bitrate[i++] = IEEE80211_OFDM_RATE_6MB;
264 range->bitrate[i++] = IEEE80211_OFDM_RATE_9MB;
265 range->bitrate[i++] = IEEE80211_OFDM_RATE_12MB;
266 range->bitrate[i++] = IEEE80211_OFDM_RATE_18MB;
267 range->bitrate[i++] = IEEE80211_OFDM_RATE_24MB;
268 range->bitrate[i++] = IEEE80211_OFDM_RATE_36MB;
269 range->bitrate[i++] = IEEE80211_OFDM_RATE_48MB;
270 range->bitrate[i++] = IEEE80211_OFDM_RATE_54MB;
271 }
272 if (phy->type == BCM43xx_PHYTYPE_B ||
273 phy->type == BCM43xx_PHYTYPE_G) {
274 range->num_bitrates += 4;
275 range->bitrate[i++] = IEEE80211_CCK_RATE_1MB;
276 range->bitrate[i++] = IEEE80211_CCK_RATE_2MB;
277 range->bitrate[i++] = IEEE80211_CCK_RATE_5MB;
278 range->bitrate[i++] = IEEE80211_CCK_RATE_11MB;
279 }
280
281 geo = ieee80211_get_geo(bcm->ieee);
282 range->num_channels = geo->a_channels + geo->bg_channels;
283 j = 0;
284 for (i = 0; i < geo->a_channels; i++) {
285 if (j == IW_MAX_FREQUENCIES)
286 break;
287 range->freq[j].i = j + 1;
288 range->freq[j].m = geo->a[i].freq;//FIXME?
289 range->freq[j].e = 1;
290 j++;
291 }
292 for (i = 0; i < geo->bg_channels; i++) {
293 if (j == IW_MAX_FREQUENCIES)
294 break;
295 range->freq[j].i = j + 1;
296 range->freq[j].m = geo->bg[i].freq;//FIXME?
297 range->freq[j].e = 1;
298 j++;
299 }
300 range->num_frequency = j;
301
302 bcm43xx_unlock(bcm, flags);
303
304 return 0;
305}
306
307static int bcm43xx_wx_set_nick(struct net_device *net_dev,
308 struct iw_request_info *info,
309 union iwreq_data *data,
310 char *extra)
311{
312 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
313 unsigned long flags;
314 size_t len;
315
316 bcm43xx_lock(bcm, flags);
317 len = min((size_t)data->data.length, (size_t)IW_ESSID_MAX_SIZE);
318 memcpy(bcm->nick, extra, len);
319 bcm->nick[len] = '\0';
320 bcm43xx_unlock(bcm, flags);
321
322 return 0;
323}
324
325static int bcm43xx_wx_get_nick(struct net_device *net_dev,
326 struct iw_request_info *info,
327 union iwreq_data *data,
328 char *extra)
329{
330 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
331 unsigned long flags;
332 size_t len;
333
334 bcm43xx_lock(bcm, flags);
335 len = strlen(bcm->nick) + 1;
336 memcpy(extra, bcm->nick, len);
337 data->data.length = (__u16)len;
338 data->data.flags = 1;
339 bcm43xx_unlock(bcm, flags);
340
341 return 0;
342}
343
344static int bcm43xx_wx_set_rts(struct net_device *net_dev,
345 struct iw_request_info *info,
346 union iwreq_data *data,
347 char *extra)
348{
349 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
350 unsigned long flags;
351 int err = -EINVAL;
352
353 bcm43xx_lock(bcm, flags);
354 if (data->rts.disabled) {
355 bcm->rts_threshold = BCM43xx_MAX_RTS_THRESHOLD;
356 err = 0;
357 } else {
358 if (data->rts.value >= BCM43xx_MIN_RTS_THRESHOLD &&
359 data->rts.value <= BCM43xx_MAX_RTS_THRESHOLD) {
360 bcm->rts_threshold = data->rts.value;
361 err = 0;
362 }
363 }
364 bcm43xx_unlock(bcm, flags);
365
366 return err;
367}
368
369static int bcm43xx_wx_get_rts(struct net_device *net_dev,
370 struct iw_request_info *info,
371 union iwreq_data *data,
372 char *extra)
373{
374 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
375 unsigned long flags;
376
377 bcm43xx_lock(bcm, flags);
378 data->rts.value = bcm->rts_threshold;
379 data->rts.fixed = 0;
380 data->rts.disabled = (bcm->rts_threshold == BCM43xx_MAX_RTS_THRESHOLD);
381 bcm43xx_unlock(bcm, flags);
382
383 return 0;
384}
385
386static int bcm43xx_wx_set_frag(struct net_device *net_dev,
387 struct iw_request_info *info,
388 union iwreq_data *data,
389 char *extra)
390{
391 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
392 unsigned long flags;
393 int err = -EINVAL;
394
395 bcm43xx_lock(bcm, flags);
396 if (data->frag.disabled) {
397 bcm->ieee->fts = MAX_FRAG_THRESHOLD;
398 err = 0;
399 } else {
400 if (data->frag.value >= MIN_FRAG_THRESHOLD &&
401 data->frag.value <= MAX_FRAG_THRESHOLD) {
402 bcm->ieee->fts = data->frag.value & ~0x1;
403 err = 0;
404 }
405 }
406 bcm43xx_unlock(bcm, flags);
407
408 return err;
409}
410
411static int bcm43xx_wx_get_frag(struct net_device *net_dev,
412 struct iw_request_info *info,
413 union iwreq_data *data,
414 char *extra)
415{
416 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
417 unsigned long flags;
418
419 bcm43xx_lock(bcm, flags);
420 data->frag.value = bcm->ieee->fts;
421 data->frag.fixed = 0;
422 data->frag.disabled = (bcm->ieee->fts == MAX_FRAG_THRESHOLD);
423 bcm43xx_unlock(bcm, flags);
424
425 return 0;
426}
427
428static int bcm43xx_wx_set_xmitpower(struct net_device *net_dev,
429 struct iw_request_info *info,
430 union iwreq_data *data,
431 char *extra)
432{
433 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
434 struct bcm43xx_radioinfo *radio;
435 struct bcm43xx_phyinfo *phy;
436 unsigned long flags;
437 int err = -ENODEV;
438 u16 maxpower;
439
440 if ((data->txpower.flags & IW_TXPOW_TYPE) != IW_TXPOW_DBM) {
441 printk(PFX KERN_ERR "TX power not in dBm.\n");
442 return -EOPNOTSUPP;
443 }
444
445 bcm43xx_lock_mmio(bcm, flags);
446 if (!bcm->initialized)
447 goto out_unlock;
448 radio = bcm43xx_current_radio(bcm);
449 phy = bcm43xx_current_phy(bcm);
450 if (data->txpower.disabled != (!(radio->enabled))) {
451 if (data->txpower.disabled)
452 bcm43xx_radio_turn_off(bcm);
453 else
454 bcm43xx_radio_turn_on(bcm);
455 }
456 if (data->txpower.value > 0) {
457 /* desired and maxpower dBm values are in Q5.2 */
458 if (phy->type == BCM43xx_PHYTYPE_A)
459 maxpower = bcm->sprom.maxpower_aphy;
460 else
461 maxpower = bcm->sprom.maxpower_bgphy;
462 radio->txpower_desired = limit_value(data->txpower.value << 2,
463 0, maxpower);
464 bcm43xx_phy_xmitpower(bcm);
465 }
466 err = 0;
467
468out_unlock:
469 bcm43xx_unlock_mmio(bcm, flags);
470
471 return err;
472}
473
474static int bcm43xx_wx_get_xmitpower(struct net_device *net_dev,
475 struct iw_request_info *info,
476 union iwreq_data *data,
477 char *extra)
478{
479 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
480 struct bcm43xx_radioinfo *radio;
481 unsigned long flags;
482 int err = -ENODEV;
483
484 bcm43xx_lock(bcm, flags);
485 if (!bcm->initialized)
486 goto out_unlock;
487 radio = bcm43xx_current_radio(bcm);
488 /* desired dBm value is in Q5.2 */
489 data->txpower.value = radio->txpower_desired >> 2;
490 data->txpower.fixed = 1;
491 data->txpower.flags = IW_TXPOW_DBM;
492 data->txpower.disabled = !(radio->enabled);
493
494 err = 0;
495out_unlock:
496 bcm43xx_unlock(bcm, flags);
497
498 return err;
499}
500
501static int bcm43xx_wx_set_encoding(struct net_device *net_dev,
502 struct iw_request_info *info,
503 union iwreq_data *data,
504 char *extra)
505{
506 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
507 int err;
508
509 err = ieee80211_wx_set_encode(bcm->ieee, info, data, extra);
510
511 return err;
512}
513
514static int bcm43xx_wx_set_encodingext(struct net_device *net_dev,
515 struct iw_request_info *info,
516 union iwreq_data *data,
517 char *extra)
518{
519 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
520 int err;
521
522 err = ieee80211_wx_set_encodeext(bcm->ieee, info, data, extra);
523
524 return err;
525}
526
527static int bcm43xx_wx_get_encoding(struct net_device *net_dev,
528 struct iw_request_info *info,
529 union iwreq_data *data,
530 char *extra)
531{
532 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
533 int err;
534
535 err = ieee80211_wx_get_encode(bcm->ieee, info, data, extra);
536
537 return err;
538}
539
540static int bcm43xx_wx_get_encodingext(struct net_device *net_dev,
541 struct iw_request_info *info,
542 union iwreq_data *data,
543 char *extra)
544{
545 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
546 int err;
547
548 err = ieee80211_wx_get_encodeext(bcm->ieee, info, data, extra);
549
550 return err;
551}
552
553static int bcm43xx_wx_set_interfmode(struct net_device *net_dev,
554 struct iw_request_info *info,
555 union iwreq_data *data,
556 char *extra)
557{
558 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
559 unsigned long flags;
560 int mode, err = 0;
561
562 mode = *((int *)extra);
563 switch (mode) {
564 case 0:
565 mode = BCM43xx_RADIO_INTERFMODE_NONE;
566 break;
567 case 1:
568 mode = BCM43xx_RADIO_INTERFMODE_NONWLAN;
569 break;
570 case 2:
571 mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
572 break;
573 case 3:
574 mode = BCM43xx_RADIO_INTERFMODE_AUTOWLAN;
575 break;
576 default:
577 printk(KERN_ERR PFX "set_interfmode allowed parameters are: "
578 "0 => None, 1 => Non-WLAN, 2 => WLAN, "
579 "3 => Auto-WLAN\n");
580 return -EINVAL;
581 }
582
583 bcm43xx_lock_mmio(bcm, flags);
584 if (bcm->initialized) {
585 err = bcm43xx_radio_set_interference_mitigation(bcm, mode);
586 if (err) {
587 printk(KERN_ERR PFX "Interference Mitigation not "
588 "supported by device\n");
589 }
590 } else {
591 if (mode == BCM43xx_RADIO_INTERFMODE_AUTOWLAN) {
592 printk(KERN_ERR PFX "Interference Mitigation mode Auto-WLAN "
593 "not supported while the interface is down.\n");
594 err = -ENODEV;
595 } else
596 bcm43xx_current_radio(bcm)->interfmode = mode;
597 }
598 bcm43xx_unlock_mmio(bcm, flags);
599
600 return err;
601}
602
603static int bcm43xx_wx_get_interfmode(struct net_device *net_dev,
604 struct iw_request_info *info,
605 union iwreq_data *data,
606 char *extra)
607{
608 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
609 unsigned long flags;
610 int mode;
611
612 bcm43xx_lock(bcm, flags);
613 mode = bcm43xx_current_radio(bcm)->interfmode;
614 bcm43xx_unlock(bcm, flags);
615
616 switch (mode) {
617 case BCM43xx_RADIO_INTERFMODE_NONE:
618 strncpy(extra, "0 (No Interference Mitigation)", MAX_WX_STRING);
619 break;
620 case BCM43xx_RADIO_INTERFMODE_NONWLAN:
621 strncpy(extra, "1 (Non-WLAN Interference Mitigation)", MAX_WX_STRING);
622 break;
623 case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
624 strncpy(extra, "2 (WLAN Interference Mitigation)", MAX_WX_STRING);
625 break;
626 default:
627 assert(0);
628 }
629 data->data.length = strlen(extra) + 1;
630
631 return 0;
632}
633
634static int bcm43xx_wx_set_shortpreamble(struct net_device *net_dev,
635 struct iw_request_info *info,
636 union iwreq_data *data,
637 char *extra)
638{
639 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
640 unsigned long flags;
641 int on;
642
643 on = *((int *)extra);
644 bcm43xx_lock(bcm, flags);
645 bcm->short_preamble = !!on;
646 bcm43xx_unlock(bcm, flags);
647
648 return 0;
649}
650
651static int bcm43xx_wx_get_shortpreamble(struct net_device *net_dev,
652 struct iw_request_info *info,
653 union iwreq_data *data,
654 char *extra)
655{
656 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
657 unsigned long flags;
658 int on;
659
660 bcm43xx_lock(bcm, flags);
661 on = bcm->short_preamble;
662 bcm43xx_unlock(bcm, flags);
663
664 if (on)
665 strncpy(extra, "1 (Short Preamble enabled)", MAX_WX_STRING);
666 else
667 strncpy(extra, "0 (Short Preamble disabled)", MAX_WX_STRING);
668 data->data.length = strlen(extra) + 1;
669
670 return 0;
671}
672
673static int bcm43xx_wx_set_swencryption(struct net_device *net_dev,
674 struct iw_request_info *info,
675 union iwreq_data *data,
676 char *extra)
677{
678 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
679 unsigned long flags;
680 int on;
681
682 on = *((int *)extra);
683
684 bcm43xx_lock(bcm, flags);
685 bcm->ieee->host_encrypt = !!on;
686 bcm->ieee->host_decrypt = !!on;
687 bcm->ieee->host_build_iv = !on;
688 bcm43xx_unlock(bcm, flags);
689
690 return 0;
691}
692
693static int bcm43xx_wx_get_swencryption(struct net_device *net_dev,
694 struct iw_request_info *info,
695 union iwreq_data *data,
696 char *extra)
697{
698 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
699 unsigned long flags;
700 int on;
701
702 bcm43xx_lock(bcm, flags);
703 on = bcm->ieee->host_encrypt;
704 bcm43xx_unlock(bcm, flags);
705
706 if (on)
707 strncpy(extra, "1 (SW encryption enabled) ", MAX_WX_STRING);
708 else
709 strncpy(extra, "0 (SW encryption disabled) ", MAX_WX_STRING);
710 data->data.length = strlen(extra + 1);
711
712 return 0;
713}
714
715/* Enough buffer to hold a hexdump of the sprom data. */
716#define SPROM_BUFFERSIZE 512
717
718static int sprom2hex(const u16 *sprom, char *dump)
719{
720 int i, pos = 0;
721
722 for (i = 0; i < BCM43xx_SPROM_SIZE; i++) {
723 pos += snprintf(dump + pos, SPROM_BUFFERSIZE - pos - 1,
724 "%04X", swab16(sprom[i]) & 0xFFFF);
725 }
726
727 return pos + 1;
728}
729
730static int hex2sprom(u16 *sprom, const char *dump, unsigned int len)
731{
732 char tmp[5] = { 0 };
733 int cnt = 0;
734 unsigned long parsed;
735
736 if (len < BCM43xx_SPROM_SIZE * sizeof(u16) * 2)
737 return -EINVAL;
738 while (cnt < BCM43xx_SPROM_SIZE) {
739 memcpy(tmp, dump, 4);
740 dump += 4;
741 parsed = simple_strtoul(tmp, NULL, 16);
742 sprom[cnt++] = swab16((u16)parsed);
743 }
744
745 return 0;
746}
747
748static int bcm43xx_wx_sprom_read(struct net_device *net_dev,
749 struct iw_request_info *info,
750 union iwreq_data *data,
751 char *extra)
752{
753 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
754 int err = -EPERM;
755 u16 *sprom;
756 unsigned long flags;
757
758 if (!capable(CAP_SYS_RAWIO))
759 goto out;
760
761 err = -ENOMEM;
762 sprom = kmalloc(BCM43xx_SPROM_SIZE * sizeof(*sprom),
763 GFP_KERNEL);
764 if (!sprom)
765 goto out;
766
767 bcm43xx_lock_mmio(bcm, flags);
768 err = -ENODEV;
769 if (bcm->initialized)
770 err = bcm43xx_sprom_read(bcm, sprom);
771 bcm43xx_unlock_mmio(bcm, flags);
772 if (!err)
773 data->data.length = sprom2hex(sprom, extra);
774 kfree(sprom);
775out:
776 return err;
777}
778
779static int bcm43xx_wx_sprom_write(struct net_device *net_dev,
780 struct iw_request_info *info,
781 union iwreq_data *data,
782 char *extra)
783{
784 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
785 int err = -EPERM;
786 u16 *sprom;
787 unsigned long flags;
788 char *input;
789 unsigned int len;
790
791 if (!capable(CAP_SYS_RAWIO))
792 goto out;
793
794 err = -ENOMEM;
795 sprom = kmalloc(BCM43xx_SPROM_SIZE * sizeof(*sprom),
796 GFP_KERNEL);
797 if (!sprom)
798 goto out;
799
800 len = data->data.length;
801 extra[len - 1] = '\0';
802 input = strchr(extra, ':');
803 if (input) {
804 input++;
805 len -= input - extra;
806 } else
807 input = extra;
808 err = hex2sprom(sprom, input, len);
809 if (err)
810 goto out_kfree;
811
812 bcm43xx_lock_mmio(bcm, flags);
813 err = -ENODEV;
814 if (bcm->initialized)
815 err = bcm43xx_sprom_write(bcm, sprom);
816 bcm43xx_unlock_mmio(bcm, flags);
817out_kfree:
818 kfree(sprom);
819out:
820 return err;
821}
822
823/* Get wireless statistics. Called by /proc/net/wireless and by SIOCGIWSTATS */
824
825static struct iw_statistics *bcm43xx_get_wireless_stats(struct net_device *net_dev)
826{
827 struct bcm43xx_private *bcm = bcm43xx_priv(net_dev);
828 struct ieee80211softmac_device *mac = ieee80211_priv(net_dev);
829 struct iw_statistics *wstats;
830
831 wstats = &bcm->stats.wstats;
832 if (!mac->associated) {
833 wstats->miss.beacon = 0;
834// bcm->ieee->ieee_stats.tx_retry_limit_exceeded = 0; // FIXME: should this be cleared here?
835 wstats->discard.retries = 0;
836// bcm->ieee->ieee_stats.tx_discards_wrong_sa = 0; // FIXME: same question
837 wstats->discard.nwid = 0;
838// bcm->ieee->ieee_stats.rx_discards_undecryptable = 0; // FIXME: ditto
839 wstats->discard.code = 0;
840// bcm->ieee->ieee_stats.rx_fragments = 0; // FIXME: same here
841 wstats->discard.fragment = 0;
842 wstats->discard.misc = 0;
843 wstats->qual.qual = 0;
844 wstats->qual.level = 0;
845 wstats->qual.noise = 0;
846 wstats->qual.updated = 7;
847 wstats->qual.updated |= IW_QUAL_NOISE_INVALID |
848 IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID;
849 return wstats;
850 }
851 /* fill in the real statistics when iface associated */
852 wstats->qual.qual = 100; // TODO: get the real signal quality
853 wstats->qual.level = 3 - bcm->stats.link_quality;
854 wstats->qual.noise = bcm->stats.noise;
855 wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED |
856 IW_QUAL_NOISE_UPDATED;
857 wstats->discard.code = bcm->ieee->ieee_stats.rx_discards_undecryptable;
858 wstats->discard.retries = bcm->ieee->ieee_stats.tx_retry_limit_exceeded;
859 wstats->discard.nwid = bcm->ieee->ieee_stats.tx_discards_wrong_sa;
860 wstats->discard.fragment = bcm->ieee->ieee_stats.rx_fragments;
861 wstats->discard.misc = 0; // FIXME
862 wstats->miss.beacon = 0; // FIXME
863 return wstats;
864}
865
866
867#ifdef WX
868# undef WX
869#endif
870#define WX(ioctl) [(ioctl) - SIOCSIWCOMMIT]
871static const iw_handler bcm43xx_wx_handlers[] = {
872 /* Wireless Identification */
873 WX(SIOCGIWNAME) = bcm43xx_wx_get_name,
874 /* Basic operations */
875 WX(SIOCSIWFREQ) = bcm43xx_wx_set_channelfreq,
876 WX(SIOCGIWFREQ) = bcm43xx_wx_get_channelfreq,
877 WX(SIOCSIWMODE) = bcm43xx_wx_set_mode,
878 WX(SIOCGIWMODE) = bcm43xx_wx_get_mode,
879 /* Informative stuff */
880 WX(SIOCGIWRANGE) = bcm43xx_wx_get_rangeparams,
881 /* Access Point manipulation */
882 WX(SIOCSIWAP) = ieee80211softmac_wx_set_wap,
883 WX(SIOCGIWAP) = ieee80211softmac_wx_get_wap,
884 WX(SIOCSIWSCAN) = ieee80211softmac_wx_trigger_scan,
885 WX(SIOCGIWSCAN) = ieee80211softmac_wx_get_scan_results,
886 /* 802.11 specific support */
887 WX(SIOCSIWESSID) = ieee80211softmac_wx_set_essid,
888 WX(SIOCGIWESSID) = ieee80211softmac_wx_get_essid,
889 WX(SIOCSIWNICKN) = bcm43xx_wx_set_nick,
890 WX(SIOCGIWNICKN) = bcm43xx_wx_get_nick,
891 /* Other parameters */
892 WX(SIOCSIWRATE) = ieee80211softmac_wx_set_rate,
893 WX(SIOCGIWRATE) = ieee80211softmac_wx_get_rate,
894 WX(SIOCSIWRTS) = bcm43xx_wx_set_rts,
895 WX(SIOCGIWRTS) = bcm43xx_wx_get_rts,
896 WX(SIOCSIWFRAG) = bcm43xx_wx_set_frag,
897 WX(SIOCGIWFRAG) = bcm43xx_wx_get_frag,
898 WX(SIOCSIWTXPOW) = bcm43xx_wx_set_xmitpower,
899 WX(SIOCGIWTXPOW) = bcm43xx_wx_get_xmitpower,
900//TODO WX(SIOCSIWRETRY) = bcm43xx_wx_set_retry,
901//TODO WX(SIOCGIWRETRY) = bcm43xx_wx_get_retry,
902 /* Encoding */
903 WX(SIOCSIWENCODE) = bcm43xx_wx_set_encoding,
904 WX(SIOCGIWENCODE) = bcm43xx_wx_get_encoding,
905 WX(SIOCSIWENCODEEXT) = bcm43xx_wx_set_encodingext,
906 WX(SIOCGIWENCODEEXT) = bcm43xx_wx_get_encodingext,
907 /* Power saving */
908//TODO WX(SIOCSIWPOWER) = bcm43xx_wx_set_power,
909//TODO WX(SIOCGIWPOWER) = bcm43xx_wx_get_power,
910 WX(SIOCSIWGENIE) = ieee80211softmac_wx_set_genie,
911 WX(SIOCGIWGENIE) = ieee80211softmac_wx_get_genie,
912 WX(SIOCSIWAUTH) = ieee80211_wx_set_auth,
913 WX(SIOCGIWAUTH) = ieee80211_wx_get_auth,
914};
915#undef WX
916
917static const iw_handler bcm43xx_priv_wx_handlers[] = {
918 /* Set Interference Mitigation Mode. */
919 bcm43xx_wx_set_interfmode,
920 /* Get Interference Mitigation Mode. */
921 bcm43xx_wx_get_interfmode,
922 /* Enable/Disable Short Preamble mode. */
923 bcm43xx_wx_set_shortpreamble,
924 /* Get Short Preamble mode. */
925 bcm43xx_wx_get_shortpreamble,
926 /* Enable/Disable Software Encryption mode */
927 bcm43xx_wx_set_swencryption,
928 /* Get Software Encryption mode */
929 bcm43xx_wx_get_swencryption,
930 /* Write SRPROM data. */
931 bcm43xx_wx_sprom_write,
932 /* Read SPROM data. */
933 bcm43xx_wx_sprom_read,
934};
935
936#define PRIV_WX_SET_INTERFMODE (SIOCIWFIRSTPRIV + 0)
937#define PRIV_WX_GET_INTERFMODE (SIOCIWFIRSTPRIV + 1)
938#define PRIV_WX_SET_SHORTPREAMBLE (SIOCIWFIRSTPRIV + 2)
939#define PRIV_WX_GET_SHORTPREAMBLE (SIOCIWFIRSTPRIV + 3)
940#define PRIV_WX_SET_SWENCRYPTION (SIOCIWFIRSTPRIV + 4)
941#define PRIV_WX_GET_SWENCRYPTION (SIOCIWFIRSTPRIV + 5)
942#define PRIV_WX_SPROM_WRITE (SIOCIWFIRSTPRIV + 6)
943#define PRIV_WX_SPROM_READ (SIOCIWFIRSTPRIV + 7)
944
945#define PRIV_WX_DUMMY(ioctl) \
946 { \
947 .cmd = (ioctl), \
948 .name = "__unused" \
949 }
950
951static const struct iw_priv_args bcm43xx_priv_wx_args[] = {
952 {
953 .cmd = PRIV_WX_SET_INTERFMODE,
954 .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
955 .name = "set_interfmode",
956 },
957 {
958 .cmd = PRIV_WX_GET_INTERFMODE,
959 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING,
960 .name = "get_interfmode",
961 },
962 {
963 .cmd = PRIV_WX_SET_SHORTPREAMBLE,
964 .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
965 .name = "set_shortpreambl",
966 },
967 {
968 .cmd = PRIV_WX_GET_SHORTPREAMBLE,
969 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING,
970 .name = "get_shortpreambl",
971 },
972 {
973 .cmd = PRIV_WX_SET_SWENCRYPTION,
974 .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
975 .name = "set_swencryption",
976 },
977 {
978 .cmd = PRIV_WX_GET_SWENCRYPTION,
979 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING,
980 .name = "get_swencryption",
981 },
982 {
983 .cmd = PRIV_WX_SPROM_WRITE,
984 .set_args = IW_PRIV_TYPE_CHAR | SPROM_BUFFERSIZE,
985 .name = "write_sprom",
986 },
987 {
988 .cmd = PRIV_WX_SPROM_READ,
989 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | SPROM_BUFFERSIZE,
990 .name = "read_sprom",
991 },
992};
993
994const struct iw_handler_def bcm43xx_wx_handlers_def = {
995 .standard = bcm43xx_wx_handlers,
996 .num_standard = ARRAY_SIZE(bcm43xx_wx_handlers),
997 .num_private = ARRAY_SIZE(bcm43xx_priv_wx_handlers),
998 .num_private_args = ARRAY_SIZE(bcm43xx_priv_wx_args),
999 .private = bcm43xx_priv_wx_handlers,
1000 .private_args = bcm43xx_priv_wx_args,
1001 .get_wireless_stats = bcm43xx_get_wireless_stats,
1002};
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_wx.h b/drivers/net/wireless/bcm43xx/bcm43xx_wx.h
new file mode 100644
index 0000000000..1f29ff3aa4
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_wx.h
@@ -0,0 +1,36 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#ifndef BCM43xx_WX_H_
32#define BCM43xx_WX_H_
33
34extern const struct iw_handler_def bcm43xx_wx_handlers_def;
35
36#endif /* BCM43xx_WX_H_ */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_xmit.c b/drivers/net/wireless/bcm43xx/bcm43xx_xmit.c
new file mode 100644
index 0000000000..d8ece28c07
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_xmit.c
@@ -0,0 +1,582 @@
1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Transmission (TX/RX) related functions.
6
7 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
8 Stefano Brivio <st3@riseup.net>
9 Michael Buesch <mbuesch@freenet.de>
10 Danny van Dyk <kugelfang@gentoo.org>
11 Andreas Jaggi <andreas.jaggi@waterwave.ch>
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
27
28*/
29
30#include "bcm43xx_xmit.h"
31
32#include <linux/etherdevice.h>
33
34
35/* Extract the bitrate out of a CCK PLCP header. */
36static u8 bcm43xx_plcp_get_bitrate_cck(struct bcm43xx_plcp_hdr4 *plcp)
37{
38 switch (plcp->raw[0]) {
39 case 0x0A:
40 return IEEE80211_CCK_RATE_1MB;
41 case 0x14:
42 return IEEE80211_CCK_RATE_2MB;
43 case 0x37:
44 return IEEE80211_CCK_RATE_5MB;
45 case 0x6E:
46 return IEEE80211_CCK_RATE_11MB;
47 }
48 assert(0);
49 return 0;
50}
51
52/* Extract the bitrate out of an OFDM PLCP header. */
53static u8 bcm43xx_plcp_get_bitrate_ofdm(struct bcm43xx_plcp_hdr4 *plcp)
54{
55 switch (plcp->raw[0] & 0xF) {
56 case 0xB:
57 return IEEE80211_OFDM_RATE_6MB;
58 case 0xF:
59 return IEEE80211_OFDM_RATE_9MB;
60 case 0xA:
61 return IEEE80211_OFDM_RATE_12MB;
62 case 0xE:
63 return IEEE80211_OFDM_RATE_18MB;
64 case 0x9:
65 return IEEE80211_OFDM_RATE_24MB;
66 case 0xD:
67 return IEEE80211_OFDM_RATE_36MB;
68 case 0x8:
69 return IEEE80211_OFDM_RATE_48MB;
70 case 0xC:
71 return IEEE80211_OFDM_RATE_54MB;
72 }
73 assert(0);
74 return 0;
75}
76
77u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate)
78{
79 switch (bitrate) {
80 case IEEE80211_CCK_RATE_1MB:
81 return 0x0A;
82 case IEEE80211_CCK_RATE_2MB:
83 return 0x14;
84 case IEEE80211_CCK_RATE_5MB:
85 return 0x37;
86 case IEEE80211_CCK_RATE_11MB:
87 return 0x6E;
88 }
89 assert(0);
90 return 0;
91}
92
93u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate)
94{
95 switch (bitrate) {
96 case IEEE80211_OFDM_RATE_6MB:
97 return 0xB;
98 case IEEE80211_OFDM_RATE_9MB:
99 return 0xF;
100 case IEEE80211_OFDM_RATE_12MB:
101 return 0xA;
102 case IEEE80211_OFDM_RATE_18MB:
103 return 0xE;
104 case IEEE80211_OFDM_RATE_24MB:
105 return 0x9;
106 case IEEE80211_OFDM_RATE_36MB:
107 return 0xD;
108 case IEEE80211_OFDM_RATE_48MB:
109 return 0x8;
110 case IEEE80211_OFDM_RATE_54MB:
111 return 0xC;
112 }
113 assert(0);
114 return 0;
115}
116
117static void bcm43xx_generate_plcp_hdr(struct bcm43xx_plcp_hdr4 *plcp,
118 const u16 octets, const u8 bitrate,
119 const int ofdm_modulation)
120{
121 __le32 *data = &(plcp->data);
122 __u8 *raw = plcp->raw;
123
124 if (ofdm_modulation) {
125 *data = bcm43xx_plcp_get_ratecode_ofdm(bitrate);
126 assert(!(octets & 0xF000));
127 *data |= (octets << 5);
128 *data = cpu_to_le32(*data);
129 } else {
130 u32 plen;
131
132 plen = octets * 16 / bitrate;
133 if ((octets * 16 % bitrate) > 0) {
134 plen++;
135 if ((bitrate == IEEE80211_CCK_RATE_11MB)
136 && ((octets * 8 % 11) < 4)) {
137 raw[1] = 0x84;
138 } else
139 raw[1] = 0x04;
140 } else
141 raw[1] = 0x04;
142 *data |= cpu_to_le32(plen << 16);
143 raw[0] = bcm43xx_plcp_get_ratecode_cck(bitrate);
144 }
145}
146
147static u8 bcm43xx_calc_fallback_rate(u8 bitrate)
148{
149 switch (bitrate) {
150 case IEEE80211_CCK_RATE_1MB:
151 return IEEE80211_CCK_RATE_1MB;
152 case IEEE80211_CCK_RATE_2MB:
153 return IEEE80211_CCK_RATE_1MB;
154 case IEEE80211_CCK_RATE_5MB:
155 return IEEE80211_CCK_RATE_2MB;
156 case IEEE80211_CCK_RATE_11MB:
157 return IEEE80211_CCK_RATE_5MB;
158 case IEEE80211_OFDM_RATE_6MB:
159 return IEEE80211_CCK_RATE_5MB;
160 case IEEE80211_OFDM_RATE_9MB:
161 return IEEE80211_OFDM_RATE_6MB;
162 case IEEE80211_OFDM_RATE_12MB:
163 return IEEE80211_OFDM_RATE_9MB;
164 case IEEE80211_OFDM_RATE_18MB:
165 return IEEE80211_OFDM_RATE_12MB;
166 case IEEE80211_OFDM_RATE_24MB:
167 return IEEE80211_OFDM_RATE_18MB;
168 case IEEE80211_OFDM_RATE_36MB:
169 return IEEE80211_OFDM_RATE_24MB;
170 case IEEE80211_OFDM_RATE_48MB:
171 return IEEE80211_OFDM_RATE_36MB;
172 case IEEE80211_OFDM_RATE_54MB:
173 return IEEE80211_OFDM_RATE_48MB;
174 }
175 assert(0);
176 return 0;
177}
178
179static
180__le16 bcm43xx_calc_duration_id(const struct ieee80211_hdr *wireless_header,
181 u8 bitrate)
182{
183 const u16 frame_ctl = le16_to_cpu(wireless_header->frame_ctl);
184 __le16 duration_id = wireless_header->duration_id;
185
186 switch (WLAN_FC_GET_TYPE(frame_ctl)) {
187 case IEEE80211_FTYPE_DATA:
188 case IEEE80211_FTYPE_MGMT:
189 //TODO: Steal the code from ieee80211, once it is completed there.
190 break;
191 case IEEE80211_FTYPE_CTL:
192 /* Use the original duration/id. */
193 break;
194 default:
195 assert(0);
196 }
197
198 return duration_id;
199}
200
201static inline
202u16 ceiling_div(u16 dividend, u16 divisor)
203{
204 return ((dividend + divisor - 1) / divisor);
205}
206
207static void bcm43xx_generate_rts(const struct bcm43xx_phyinfo *phy,
208 struct bcm43xx_txhdr *txhdr,
209 u16 *flags,
210 u8 bitrate,
211 const struct ieee80211_hdr_4addr *wlhdr)
212{
213 u16 fctl;
214 u16 dur;
215 u8 fallback_bitrate;
216 int ofdm_modulation;
217 int fallback_ofdm_modulation;
218// u8 *sa, *da;
219 u16 flen;
220
221//FIXME sa = ieee80211_get_SA((struct ieee80211_hdr *)wlhdr);
222//FIXME da = ieee80211_get_DA((struct ieee80211_hdr *)wlhdr);
223 fallback_bitrate = bcm43xx_calc_fallback_rate(bitrate);
224 ofdm_modulation = !(ieee80211_is_cck_rate(bitrate));
225 fallback_ofdm_modulation = !(ieee80211_is_cck_rate(fallback_bitrate));
226
227 flen = sizeof(u16) + sizeof(u16) + ETH_ALEN + ETH_ALEN + IEEE80211_FCS_LEN,
228 bcm43xx_generate_plcp_hdr((struct bcm43xx_plcp_hdr4 *)(&txhdr->rts_cts_plcp),
229 flen, bitrate,
230 !ieee80211_is_cck_rate(bitrate));
231 bcm43xx_generate_plcp_hdr((struct bcm43xx_plcp_hdr4 *)(&txhdr->rts_cts_fallback_plcp),
232 flen, fallback_bitrate,
233 !ieee80211_is_cck_rate(fallback_bitrate));
234 fctl = IEEE80211_FTYPE_CTL;
235 fctl |= IEEE80211_STYPE_RTS;
236 dur = le16_to_cpu(wlhdr->duration_id);
237/*FIXME: should we test for dur==0 here and let it unmodified in this case?
238 * The following assert checks for this case...
239 */
240assert(dur);
241/*FIXME: The duration calculation is not really correct.
242 * I am not 100% sure which bitrate to use. We use the RTS rate here,
243 * but this is likely to be wrong.
244 */
245 if (phy->type == BCM43xx_PHYTYPE_A) {
246 /* Three times SIFS */
247 dur += 16 * 3;
248 /* Add ACK duration. */
249 dur += ceiling_div((16 + 8 * (14 /*bytes*/) + 6) * 10,
250 bitrate * 4);
251 /* Add CTS duration. */
252 dur += ceiling_div((16 + 8 * (14 /*bytes*/) + 6) * 10,
253 bitrate * 4);
254 } else {
255 /* Three times SIFS */
256 dur += 10 * 3;
257 /* Add ACK duration. */
258 dur += ceiling_div(8 * (14 /*bytes*/) * 10,
259 bitrate);
260 /* Add CTS duration. */
261 dur += ceiling_div(8 * (14 /*bytes*/) * 10,
262 bitrate);
263 }
264
265 txhdr->rts_cts_frame_control = cpu_to_le16(fctl);
266 txhdr->rts_cts_dur = cpu_to_le16(dur);
267//printk(BCM43xx_MACFMT " " BCM43xx_MACFMT " " BCM43xx_MACFMT "\n", BCM43xx_MACARG(wlhdr->addr1), BCM43xx_MACARG(wlhdr->addr2), BCM43xx_MACARG(wlhdr->addr3));
268//printk(BCM43xx_MACFMT " " BCM43xx_MACFMT "\n", BCM43xx_MACARG(sa), BCM43xx_MACARG(da));
269 memcpy(txhdr->rts_cts_mac1, wlhdr->addr1, ETH_ALEN);//FIXME!
270// memcpy(txhdr->rts_cts_mac2, sa, ETH_ALEN);
271
272 *flags |= BCM43xx_TXHDRFLAG_RTSCTS;
273 *flags |= BCM43xx_TXHDRFLAG_RTS;
274 if (ofdm_modulation)
275 *flags |= BCM43xx_TXHDRFLAG_RTSCTS_OFDM;
276 if (fallback_ofdm_modulation)
277 *flags |= BCM43xx_TXHDRFLAG_RTSCTSFALLBACK_OFDM;
278}
279
280void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
281 struct bcm43xx_txhdr *txhdr,
282 const unsigned char *fragment_data,
283 const unsigned int fragment_len,
284 const int is_first_fragment,
285 const u16 cookie)
286{
287 const struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
288 const struct ieee80211_hdr_4addr *wireless_header = (const struct ieee80211_hdr_4addr *)fragment_data;
289 const struct ieee80211_security *secinfo = &bcm->ieee->sec;
290 u8 bitrate;
291 u8 fallback_bitrate;
292 int ofdm_modulation;
293 int fallback_ofdm_modulation;
294 u16 plcp_fragment_len = fragment_len;
295 u16 flags = 0;
296 u16 control = 0;
297 u16 wsec_rate = 0;
298 u16 encrypt_frame;
299
300 /* Now construct the TX header. */
301 memset(txhdr, 0, sizeof(*txhdr));
302
303 bitrate = bcm->softmac->txrates.default_rate;
304 ofdm_modulation = !(ieee80211_is_cck_rate(bitrate));
305 fallback_bitrate = bcm43xx_calc_fallback_rate(bitrate);
306 fallback_ofdm_modulation = !(ieee80211_is_cck_rate(fallback_bitrate));
307
308 /* Set Frame Control from 80211 header. */
309 txhdr->frame_control = wireless_header->frame_ctl;
310 /* Copy address1 from 80211 header. */
311 memcpy(txhdr->mac1, wireless_header->addr1, 6);
312 /* Set the fallback duration ID. */
313 txhdr->fallback_dur_id = bcm43xx_calc_duration_id((const struct ieee80211_hdr *)wireless_header,
314 fallback_bitrate);
315 /* Set the cookie (used as driver internal ID for the frame) */
316 txhdr->cookie = cpu_to_le16(cookie);
317
318 /* Hardware appends FCS. */
319 plcp_fragment_len += IEEE80211_FCS_LEN;
320
321 /* Hardware encryption. */
322 encrypt_frame = le16_to_cpup(&wireless_header->frame_ctl) & IEEE80211_FCTL_PROTECTED;
323 if (encrypt_frame && !bcm->ieee->host_encrypt) {
324 const struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr *)wireless_header;
325 memcpy(txhdr->wep_iv, hdr->payload, 4);
326 /* Hardware appends ICV. */
327 plcp_fragment_len += 4;
328
329 wsec_rate |= (bcm->key[secinfo->active_key].algorithm << BCM43xx_TXHDR_WSEC_ALGO_SHIFT)
330 & BCM43xx_TXHDR_WSEC_ALGO_MASK;
331 wsec_rate |= (secinfo->active_key << BCM43xx_TXHDR_WSEC_KEYINDEX_SHIFT)
332 & BCM43xx_TXHDR_WSEC_KEYINDEX_MASK;
333 }
334
335 /* Generate the PLCP header and the fallback PLCP header. */
336 bcm43xx_generate_plcp_hdr((struct bcm43xx_plcp_hdr4 *)(&txhdr->plcp),
337 plcp_fragment_len,
338 bitrate, ofdm_modulation);
339 bcm43xx_generate_plcp_hdr(&txhdr->fallback_plcp, plcp_fragment_len,
340 fallback_bitrate, fallback_ofdm_modulation);
341
342 /* Set the CONTROL field */
343 if (ofdm_modulation)
344 control |= BCM43xx_TXHDRCTL_OFDM;
345 if (bcm->short_preamble) //FIXME: could be the other way around, please test
346 control |= BCM43xx_TXHDRCTL_SHORT_PREAMBLE;
347 control |= (phy->antenna_diversity << BCM43xx_TXHDRCTL_ANTENNADIV_SHIFT)
348 & BCM43xx_TXHDRCTL_ANTENNADIV_MASK;
349
350 /* Set the FLAGS field */
351 if (!is_multicast_ether_addr(wireless_header->addr1) &&
352 !is_broadcast_ether_addr(wireless_header->addr1))
353 flags |= BCM43xx_TXHDRFLAG_EXPECTACK;
354 if (1 /* FIXME: PS poll?? */)
355 flags |= 0x10; // FIXME: unknown meaning.
356 if (fallback_ofdm_modulation)
357 flags |= BCM43xx_TXHDRFLAG_FALLBACKOFDM;
358 if (is_first_fragment)
359 flags |= BCM43xx_TXHDRFLAG_FIRSTFRAGMENT;
360
361 /* Set WSEC/RATE field */
362 wsec_rate |= (txhdr->plcp.raw[0] << BCM43xx_TXHDR_RATE_SHIFT)
363 & BCM43xx_TXHDR_RATE_MASK;
364
365 /* Generate the RTS/CTS packet, if required. */
366 /* FIXME: We should first try with CTS-to-self,
367 * if we are on 80211g. If we get too many
368 * failures (hidden nodes), we should switch back to RTS/CTS.
369 */
370 if (0/*FIXME txctl->use_rts_cts*/) {
371 bcm43xx_generate_rts(phy, txhdr, &flags,
372 0/*FIXME txctl->rts_cts_rate*/,
373 wireless_header);
374 }
375
376 txhdr->flags = cpu_to_le16(flags);
377 txhdr->control = cpu_to_le16(control);
378 txhdr->wsec_rate = cpu_to_le16(wsec_rate);
379}
380
381static s8 bcm43xx_rssi_postprocess(struct bcm43xx_private *bcm,
382 u8 in_rssi, int ofdm,
383 int adjust_2053, int adjust_2050)
384{
385 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
386 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
387 s32 tmp;
388
389 switch (radio->version) {
390 case 0x2050:
391 if (ofdm) {
392 tmp = in_rssi;
393 if (tmp > 127)
394 tmp -= 256;
395 tmp *= 73;
396 tmp /= 64;
397 if (adjust_2050)
398 tmp += 25;
399 else
400 tmp -= 3;
401 } else {
402 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
403 if (in_rssi > 63)
404 in_rssi = 63;
405 tmp = radio->nrssi_lt[in_rssi];
406 tmp = 31 - tmp;
407 tmp *= -131;
408 tmp /= 128;
409 tmp -= 57;
410 } else {
411 tmp = in_rssi;
412 tmp = 31 - tmp;
413 tmp *= -149;
414 tmp /= 128;
415 tmp -= 68;
416 }
417 if (phy->type == BCM43xx_PHYTYPE_G &&
418 adjust_2050)
419 tmp += 25;
420 }
421 break;
422 case 0x2060:
423 if (in_rssi > 127)
424 tmp = in_rssi - 256;
425 else
426 tmp = in_rssi;
427 break;
428 default:
429 tmp = in_rssi;
430 tmp -= 11;
431 tmp *= 103;
432 tmp /= 64;
433 if (adjust_2053)
434 tmp -= 109;
435 else
436 tmp -= 83;
437 }
438
439 return (s8)tmp;
440}
441
442//TODO
443#if 0
444static s8 bcm43xx_rssinoise_postprocess(struct bcm43xx_private *bcm,
445 u8 in_rssi)
446{
447 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
448 s8 ret;
449
450 if (phy->type == BCM43xx_PHYTYPE_A) {
451 //TODO: Incomplete specs.
452 ret = 0;
453 } else
454 ret = bcm43xx_rssi_postprocess(bcm, in_rssi, 0, 1, 1);
455
456 return ret;
457}
458#endif
459
460int bcm43xx_rx(struct bcm43xx_private *bcm,
461 struct sk_buff *skb,
462 struct bcm43xx_rxhdr *rxhdr)
463{
464 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
465 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
466 struct bcm43xx_plcp_hdr4 *plcp;
467 struct ieee80211_rx_stats stats;
468 struct ieee80211_hdr_4addr *wlhdr;
469 u16 frame_ctl;
470 int is_packet_for_us = 0;
471 int err = -EINVAL;
472 const u16 rxflags1 = le16_to_cpu(rxhdr->flags1);
473 const u16 rxflags2 = le16_to_cpu(rxhdr->flags2);
474 const u16 rxflags3 = le16_to_cpu(rxhdr->flags3);
475 const int is_ofdm = !!(rxflags1 & BCM43xx_RXHDR_FLAGS1_OFDM);
476
477 if (rxflags2 & BCM43xx_RXHDR_FLAGS2_TYPE2FRAME) {
478 plcp = (struct bcm43xx_plcp_hdr4 *)(skb->data + 2);
479 /* Skip two unknown bytes and the PLCP header. */
480 skb_pull(skb, 2 + sizeof(struct bcm43xx_plcp_hdr6));
481 } else {
482 plcp = (struct bcm43xx_plcp_hdr4 *)(skb->data);
483 /* Skip the PLCP header. */
484 skb_pull(skb, sizeof(struct bcm43xx_plcp_hdr6));
485 }
486 /* The SKB contains the PAYLOAD (wireless header + data)
487 * at this point. The FCS at the end is stripped.
488 */
489
490 memset(&stats, 0, sizeof(stats));
491 stats.mac_time = le16_to_cpu(rxhdr->mactime);
492 stats.rssi = bcm43xx_rssi_postprocess(bcm, rxhdr->rssi, is_ofdm,
493 !!(rxflags1 & BCM43xx_RXHDR_FLAGS1_2053RSSIADJ),
494 !!(rxflags3 & BCM43xx_RXHDR_FLAGS3_2050RSSIADJ));
495 stats.signal = rxhdr->signal_quality; //FIXME
496//TODO stats.noise =
497 if (is_ofdm)
498 stats.rate = bcm43xx_plcp_get_bitrate_ofdm(plcp);
499 else
500 stats.rate = bcm43xx_plcp_get_bitrate_cck(plcp);
501//printk("RX ofdm %d, rate == %u\n", is_ofdm, stats.rate);
502 stats.received_channel = radio->channel;
503//TODO stats.control =
504 stats.mask = IEEE80211_STATMASK_SIGNAL |
505//TODO IEEE80211_STATMASK_NOISE |
506 IEEE80211_STATMASK_RATE |
507 IEEE80211_STATMASK_RSSI;
508 if (phy->type == BCM43xx_PHYTYPE_A)
509 stats.freq = IEEE80211_52GHZ_BAND;
510 else
511 stats.freq = IEEE80211_24GHZ_BAND;
512 stats.len = skb->len;
513
514 bcm->stats.last_rx = jiffies;
515 if (bcm->ieee->iw_mode == IW_MODE_MONITOR) {
516 err = ieee80211_rx(bcm->ieee, skb, &stats);
517 return (err == 0) ? -EINVAL : 0;
518 }
519
520 wlhdr = (struct ieee80211_hdr_4addr *)(skb->data);
521
522 switch (bcm->ieee->iw_mode) {
523 case IW_MODE_ADHOC:
524 if (memcmp(wlhdr->addr1, bcm->net_dev->dev_addr, ETH_ALEN) == 0 ||
525 memcmp(wlhdr->addr3, bcm->ieee->bssid, ETH_ALEN) == 0 ||
526 is_broadcast_ether_addr(wlhdr->addr1) ||
527 is_multicast_ether_addr(wlhdr->addr1) ||
528 bcm->net_dev->flags & IFF_PROMISC)
529 is_packet_for_us = 1;
530 break;
531 case IW_MODE_INFRA:
532 default:
533 /* When receiving multicast or broadcast packets, filter out
534 the packets we send ourself; we shouldn't see those */
535 if (memcmp(wlhdr->addr3, bcm->ieee->bssid, ETH_ALEN) == 0 ||
536 memcmp(wlhdr->addr1, bcm->net_dev->dev_addr, ETH_ALEN) == 0 ||
537 (memcmp(wlhdr->addr3, bcm->net_dev->dev_addr, ETH_ALEN) &&
538 (is_broadcast_ether_addr(wlhdr->addr1) ||
539 is_multicast_ether_addr(wlhdr->addr1) ||
540 bcm->net_dev->flags & IFF_PROMISC)))
541 is_packet_for_us = 1;
542 break;
543 }
544
545 frame_ctl = le16_to_cpu(wlhdr->frame_ctl);
546 if ((frame_ctl & IEEE80211_FCTL_PROTECTED) && !bcm->ieee->host_decrypt) {
547 frame_ctl &= ~IEEE80211_FCTL_PROTECTED;
548 wlhdr->frame_ctl = cpu_to_le16(frame_ctl);
549 /* trim IV and ICV */
550 /* FIXME: this must be done only for WEP encrypted packets */
551 if (skb->len < 32) {
552 dprintkl(KERN_ERR PFX "RX packet dropped (PROTECTED flag "
553 "set and length < 32)\n");
554 return -EINVAL;
555 } else {
556 memmove(skb->data + 4, skb->data, 24);
557 skb_pull(skb, 4);
558 skb_trim(skb, skb->len - 4);
559 stats.len -= 8;
560 }
561 wlhdr = (struct ieee80211_hdr_4addr *)(skb->data);
562 }
563
564 switch (WLAN_FC_GET_TYPE(frame_ctl)) {
565 case IEEE80211_FTYPE_MGMT:
566 ieee80211_rx_mgt(bcm->ieee, wlhdr, &stats);
567 break;
568 case IEEE80211_FTYPE_DATA:
569 if (is_packet_for_us) {
570 err = ieee80211_rx(bcm->ieee, skb, &stats);
571 err = (err == 0) ? -EINVAL : 0;
572 }
573 break;
574 case IEEE80211_FTYPE_CTL:
575 break;
576 default:
577 assert(0);
578 return -EINVAL;
579 }
580
581 return err;
582}
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_xmit.h b/drivers/net/wireless/bcm43xx/bcm43xx_xmit.h
new file mode 100644
index 0000000000..2aed19e35c
--- /dev/null
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_xmit.h
@@ -0,0 +1,156 @@
1#ifndef BCM43xx_XMIT_H_
2#define BCM43xx_XMIT_H_
3
4#include "bcm43xx_main.h"
5
6
7#define _bcm43xx_declare_plcp_hdr(size) \
8 struct bcm43xx_plcp_hdr##size { \
9 union { \
10 __le32 data; \
11 __u8 raw[size]; \
12 } __attribute__((__packed__)); \
13 } __attribute__((__packed__))
14
15/* struct bcm43xx_plcp_hdr4 */
16_bcm43xx_declare_plcp_hdr(4);
17/* struct bcm43xx_plcp_hdr6 */
18_bcm43xx_declare_plcp_hdr(6);
19
20#undef _bcm43xx_declare_plcp_hdr
21
22/* Device specific TX header. To be prepended to TX frames. */
23struct bcm43xx_txhdr {
24 union {
25 struct {
26 __le16 flags;
27 __le16 wsec_rate;
28 __le16 frame_control;
29 u16 unknown_zeroed_0;
30 __le16 control;
31 u8 wep_iv[10];
32 u8 unknown_wsec_tkip_data[3]; //FIXME
33 PAD_BYTES(3);
34 u8 mac1[6];
35 u16 unknown_zeroed_1;
36 struct bcm43xx_plcp_hdr4 rts_cts_fallback_plcp;
37 __le16 rts_cts_dur_fallback;
38 struct bcm43xx_plcp_hdr4 fallback_plcp;
39 __le16 fallback_dur_id;
40 PAD_BYTES(2);
41 __le16 cookie;
42 __le16 unknown_scb_stuff; //FIXME
43 struct bcm43xx_plcp_hdr6 rts_cts_plcp;
44 __le16 rts_cts_frame_control;
45 __le16 rts_cts_dur;
46 u8 rts_cts_mac1[6];
47 u8 rts_cts_mac2[6];
48 PAD_BYTES(2);
49 struct bcm43xx_plcp_hdr6 plcp;
50 } __attribute__((__packed__));
51 u8 raw[82];
52 } __attribute__((__packed__));
53} __attribute__((__packed__));
54
55/* Values/Masks for the device TX header */
56#define BCM43xx_TXHDRFLAG_EXPECTACK 0x0001
57#define BCM43xx_TXHDRFLAG_RTSCTS 0x0002
58#define BCM43xx_TXHDRFLAG_RTS 0x0004
59#define BCM43xx_TXHDRFLAG_FIRSTFRAGMENT 0x0008
60#define BCM43xx_TXHDRFLAG_DESTPSMODE 0x0020
61#define BCM43xx_TXHDRFLAG_RTSCTS_OFDM 0x0080
62#define BCM43xx_TXHDRFLAG_FALLBACKOFDM 0x0100
63#define BCM43xx_TXHDRFLAG_RTSCTSFALLBACK_OFDM 0x0200
64#define BCM43xx_TXHDRFLAG_CTS 0x0400
65#define BCM43xx_TXHDRFLAG_FRAMEBURST 0x0800
66
67#define BCM43xx_TXHDRCTL_OFDM 0x0001
68#define BCM43xx_TXHDRCTL_SHORT_PREAMBLE 0x0010
69#define BCM43xx_TXHDRCTL_ANTENNADIV_MASK 0x0030
70#define BCM43xx_TXHDRCTL_ANTENNADIV_SHIFT 8
71
72#define BCM43xx_TXHDR_RATE_MASK 0x0F00
73#define BCM43xx_TXHDR_RATE_SHIFT 8
74#define BCM43xx_TXHDR_RTSRATE_MASK 0xF000
75#define BCM43xx_TXHDR_RTSRATE_SHIFT 12
76#define BCM43xx_TXHDR_WSEC_KEYINDEX_MASK 0x00F0
77#define BCM43xx_TXHDR_WSEC_KEYINDEX_SHIFT 4
78#define BCM43xx_TXHDR_WSEC_ALGO_MASK 0x0003
79#define BCM43xx_TXHDR_WSEC_ALGO_SHIFT 0
80
81void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
82 struct bcm43xx_txhdr *txhdr,
83 const unsigned char *fragment_data,
84 const unsigned int fragment_len,
85 const int is_first_fragment,
86 const u16 cookie);
87
88/* RX header as received from the hardware. */
89struct bcm43xx_rxhdr {
90 /* Frame Length. Must be generated explicitely in PIO mode. */
91 __le16 frame_length;
92 PAD_BYTES(2);
93 /* Flags field 1 */
94 __le16 flags1;
95 u8 rssi;
96 u8 signal_quality;
97 PAD_BYTES(2);
98 /* Flags field 3 */
99 __le16 flags3;
100 /* Flags field 2 */
101 __le16 flags2;
102 /* Lower 16bits of the TSF at the time the frame started. */
103 __le16 mactime;
104 PAD_BYTES(14);
105} __attribute__((__packed__));
106
107#define BCM43xx_RXHDR_FLAGS1_OFDM (1 << 0)
108/*#define BCM43xx_RXHDR_FLAGS1_SIGNAL??? (1 << 3) FIXME */
109#define BCM43xx_RXHDR_FLAGS1_SHORTPREAMBLE (1 << 7)
110#define BCM43xx_RXHDR_FLAGS1_2053RSSIADJ (1 << 14)
111
112#define BCM43xx_RXHDR_FLAGS2_INVALIDFRAME (1 << 0)
113#define BCM43xx_RXHDR_FLAGS2_TYPE2FRAME (1 << 2)
114/*FIXME: WEP related flags */
115
116#define BCM43xx_RXHDR_FLAGS3_2050RSSIADJ (1 << 10)
117
118/* Transmit Status as received from the hardware. */
119struct bcm43xx_hwxmitstatus {
120 PAD_BYTES(4);
121 __le16 cookie;
122 u8 flags;
123 u8 cnt1:4,
124 cnt2:4;
125 PAD_BYTES(2);
126 __le16 seq;
127 __le16 unknown; //FIXME
128} __attribute__((__packed__));
129
130/* Transmit Status in CPU byteorder. */
131struct bcm43xx_xmitstatus {
132 u16 cookie;
133 u8 flags;
134 u8 cnt1:4,
135 cnt2:4;
136 u16 seq;
137 u16 unknown; //FIXME
138};
139
140#define BCM43xx_TXSTAT_FLAG_ACK 0x01
141//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x02
142//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x04
143//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x08
144//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x10
145#define BCM43xx_TXSTAT_FLAG_IGNORE 0x20
146//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x40
147//TODO #define BCM43xx_TXSTAT_FLAG_??? 0x80
148
149u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate);
150u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate);
151
152int bcm43xx_rx(struct bcm43xx_private *bcm,
153 struct sk_buff *skb,
154 struct bcm43xx_rxhdr *rxhdr);
155
156#endif /* BCM43xx_XMIT_H_ */
diff --git a/drivers/net/wireless/hostap/hostap_80211.h b/drivers/net/wireless/hostap/hostap_80211.h
index 1fc72fe511..cc1ee7f4f5 100644
--- a/drivers/net/wireless/hostap/hostap_80211.h
+++ b/drivers/net/wireless/hostap/hostap_80211.h
@@ -92,8 +92,6 @@ void hostap_dump_rx_80211(const char *name, struct sk_buff *skb,
92void hostap_dump_tx_80211(const char *name, struct sk_buff *skb); 92void hostap_dump_tx_80211(const char *name, struct sk_buff *skb);
93int hostap_data_start_xmit(struct sk_buff *skb, struct net_device *dev); 93int hostap_data_start_xmit(struct sk_buff *skb, struct net_device *dev);
94int hostap_mgmt_start_xmit(struct sk_buff *skb, struct net_device *dev); 94int hostap_mgmt_start_xmit(struct sk_buff *skb, struct net_device *dev);
95struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb,
96 struct ieee80211_crypt_data *crypt);
97int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev); 95int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev);
98 96
99#endif /* HOSTAP_80211_H */ 97#endif /* HOSTAP_80211_H */
diff --git a/drivers/net/wireless/hostap/hostap_80211_tx.c b/drivers/net/wireless/hostap/hostap_80211_tx.c
index 4a85e63906..06a5214145 100644
--- a/drivers/net/wireless/hostap/hostap_80211_tx.c
+++ b/drivers/net/wireless/hostap/hostap_80211_tx.c
@@ -299,8 +299,8 @@ int hostap_mgmt_start_xmit(struct sk_buff *skb, struct net_device *dev)
299 299
300 300
301/* Called only from software IRQ */ 301/* Called only from software IRQ */
302struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb, 302static struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb,
303 struct ieee80211_crypt_data *crypt) 303 struct ieee80211_crypt_data *crypt)
304{ 304{
305 struct hostap_interface *iface; 305 struct hostap_interface *iface;
306 local_info_t *local; 306 local_info_t *local;
@@ -317,7 +317,7 @@ struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb,
317 } 317 }
318 318
319 if (local->tkip_countermeasures && 319 if (local->tkip_countermeasures &&
320 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) { 320 strcmp(crypt->ops->name, "TKIP") == 0) {
321 hdr = (struct ieee80211_hdr_4addr *) skb->data; 321 hdr = (struct ieee80211_hdr_4addr *) skb->data;
322 if (net_ratelimit()) { 322 if (net_ratelimit()) {
323 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " 323 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
@@ -469,7 +469,7 @@ int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev)
469 } 469 }
470 470
471 if (local->ieee_802_1x && meta->ethertype == ETH_P_PAE && tx.crypt && 471 if (local->ieee_802_1x && meta->ethertype == ETH_P_PAE && tx.crypt &&
472 !(fc & IEEE80211_FCTL_VERS)) { 472 !(fc & IEEE80211_FCTL_PROTECTED)) {
473 no_encrypt = 1; 473 no_encrypt = 1;
474 PDEBUG(DEBUG_EXTRA2, "%s: TX: IEEE 802.1X - passing " 474 PDEBUG(DEBUG_EXTRA2, "%s: TX: IEEE 802.1X - passing "
475 "unencrypted EAPOL frame\n", dev->name); 475 "unencrypted EAPOL frame\n", dev->name);
@@ -535,5 +535,4 @@ int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev)
535 535
536 536
537EXPORT_SYMBOL(hostap_dump_tx_80211); 537EXPORT_SYMBOL(hostap_dump_tx_80211);
538EXPORT_SYMBOL(hostap_tx_encrypt);
539EXPORT_SYMBOL(hostap_master_start_xmit); 538EXPORT_SYMBOL(hostap_master_start_xmit);
diff --git a/drivers/parisc/ccio-dma.c b/drivers/parisc/ccio-dma.c
index 93f8a8fa88..a5d826237b 100644
--- a/drivers/parisc/ccio-dma.c
+++ b/drivers/parisc/ccio-dma.c
@@ -1560,7 +1560,7 @@ static int ccio_probe(struct parisc_device *dev)
1560 *ioc_p = ioc; 1560 *ioc_p = ioc;
1561 1561
1562 ioc->hw_path = dev->hw_path; 1562 ioc->hw_path = dev->hw_path;
1563 ioc->ioc_regs = ioremap(dev->hpa.start, 4096); 1563 ioc->ioc_regs = ioremap_nocache(dev->hpa.start, 4096);
1564 ccio_ioc_init(ioc); 1564 ccio_ioc_init(ioc);
1565 ccio_init_resources(ioc); 1565 ccio_init_resources(ioc);
1566 hppa_dma_ops = &ccio_ops; 1566 hppa_dma_ops = &ccio_ops;
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 3d1a7f98c6..6e8ed0c81a 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -5,6 +5,7 @@
5** (c) Copyright 1999 SuSE GmbH 5** (c) Copyright 1999 SuSE GmbH
6** (c) Copyright 1999,2000 Hewlett-Packard Company 6** (c) Copyright 1999,2000 Hewlett-Packard Company
7** (c) Copyright 2000 Grant Grundler 7** (c) Copyright 2000 Grant Grundler
8** (c) Copyright 2006 Helge Deller
8** 9**
9** This program is free software; you can redistribute it and/or modify 10** This program is free software; you can redistribute it and/or modify
10** it under the terms of the GNU General Public License as published by 11** it under the terms of the GNU General Public License as published by
@@ -785,7 +786,7 @@ dino_bridge_init(struct dino_device *dino_dev, const char *name)
785 if((io_addr & (1 << i)) == 0) 786 if((io_addr & (1 << i)) == 0)
786 continue; 787 continue;
787 788
788 start = (unsigned long)(signed int)(0xf0000000 | (i << 23)); 789 start = F_EXTEND(0xf0000000UL) | (i << 23);
789 end = start + 8 * 1024 * 1024 - 1; 790 end = start + 8 * 1024 * 1024 - 1;
790 791
791 DBG("DINO RANGE %d is at 0x%lx-0x%lx\n", count, 792 DBG("DINO RANGE %d is at 0x%lx-0x%lx\n", count,
@@ -996,7 +997,7 @@ static int __init dino_probe(struct parisc_device *dev)
996 } 997 }
997 998
998 dino_dev->hba.dev = dev; 999 dino_dev->hba.dev = dev;
999 dino_dev->hba.base_addr = ioremap(hpa, 4096); 1000 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096);
1000 dino_dev->hba.lmmio_space_offset = 0; /* CPU addrs == bus addrs */ 1001 dino_dev->hba.lmmio_space_offset = 0; /* CPU addrs == bus addrs */
1001 spin_lock_init(&dino_dev->dinosaur_pen); 1002 spin_lock_init(&dino_dev->dinosaur_pen);
1002 dino_dev->hba.iommu = ccio_get_iommu(dev); 1003 dino_dev->hba.iommu = ccio_get_iommu(dev);
diff --git a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c
index 3d94d86c1c..9d3bd15bf5 100644
--- a/drivers/parisc/eisa.c
+++ b/drivers/parisc/eisa.c
@@ -366,7 +366,7 @@ static int __devinit eisa_probe(struct parisc_device *dev)
366 eisa_dev.eeprom_addr = MIRAGE_EEPROM_BASE_ADDR; 366 eisa_dev.eeprom_addr = MIRAGE_EEPROM_BASE_ADDR;
367 } 367 }
368 } 368 }
369 eisa_eeprom_addr = ioremap(eisa_dev.eeprom_addr, HPEE_MAX_LENGTH); 369 eisa_eeprom_addr = ioremap_nocache(eisa_dev.eeprom_addr, HPEE_MAX_LENGTH);
370 result = eisa_enumerator(eisa_dev.eeprom_addr, &eisa_dev.hba.io_space, 370 result = eisa_enumerator(eisa_dev.eeprom_addr, &eisa_dev.hba.io_space,
371 &eisa_dev.hba.lmmio_space); 371 &eisa_dev.hba.lmmio_space);
372 init_eisa_pic(); 372 init_eisa_pic();
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 8d7a36392e..7a458d5bc7 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -879,7 +879,7 @@ void *iosapic_register(unsigned long hpa)
879 return NULL; 879 return NULL;
880 } 880 }
881 881
882 isi->addr = ioremap(hpa, 4096); 882 isi->addr = ioremap_nocache(hpa, 4096);
883 isi->isi_hpa = hpa; 883 isi->isi_hpa = hpa;
884 isi->isi_version = iosapic_rd_version(isi); 884 isi->isi_version = iosapic_rd_version(isi);
885 isi->isi_num_vectors = IOSAPIC_IRDT_MAX_ENTRY(isi->isi_version) + 1; 885 isi->isi_num_vectors = IOSAPIC_IRDT_MAX_ENTRY(isi->isi_version) + 1;
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index e8a2a4a852..3fe4a77fa1 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -1213,7 +1213,7 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
1213 ** Postable I/O port space is per PCI host adapter. 1213 ** Postable I/O port space is per PCI host adapter.
1214 ** base of 64MB PIOP region 1214 ** base of 64MB PIOP region
1215 */ 1215 */
1216 lba_dev->iop_base = ioremap(p->start, 64 * 1024 * 1024); 1216 lba_dev->iop_base = ioremap_nocache(p->start, 64 * 1024 * 1024);
1217 1217
1218 sprintf(lba_dev->hba.io_name, "PCI%02lx Ports", 1218 sprintf(lba_dev->hba.io_name, "PCI%02lx Ports",
1219 lba_dev->hba.bus_num.start); 1219 lba_dev->hba.bus_num.start);
@@ -1525,7 +1525,7 @@ lba_driver_probe(struct parisc_device *dev)
1525 u32 func_class; 1525 u32 func_class;
1526 void *tmp_obj; 1526 void *tmp_obj;
1527 char *version; 1527 char *version;
1528 void __iomem *addr = ioremap(dev->hpa.start, 4096); 1528 void __iomem *addr = ioremap_nocache(dev->hpa.start, 4096);
1529 1529
1530 /* Read HW Rev First */ 1530 /* Read HW Rev First */
1531 func_class = READ_REG32(addr + LBA_FCLASS); 1531 func_class = READ_REG32(addr + LBA_FCLASS);
@@ -1619,7 +1619,7 @@ lba_driver_probe(struct parisc_device *dev)
1619 } else { 1619 } else {
1620 if (!astro_iop_base) { 1620 if (!astro_iop_base) {
1621 /* Sprockets PDC uses NPIOP region */ 1621 /* Sprockets PDC uses NPIOP region */
1622 astro_iop_base = ioremap(LBA_PORT_BASE, 64 * 1024); 1622 astro_iop_base = ioremap_nocache(LBA_PORT_BASE, 64 * 1024);
1623 pci_port = &lba_astro_port_ops; 1623 pci_port = &lba_astro_port_ops;
1624 } 1624 }
1625 1625
@@ -1700,7 +1700,7 @@ void __init lba_init(void)
1700*/ 1700*/
1701void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask) 1701void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
1702{ 1702{
1703 void __iomem * base_addr = ioremap(lba->hpa.start, 4096); 1703 void __iomem * base_addr = ioremap_nocache(lba->hpa.start, 4096);
1704 1704
1705 imask <<= 2; /* adjust for hints - 2 more bits */ 1705 imask <<= 2; /* adjust for hints - 2 more bits */
1706 1706
diff --git a/drivers/parisc/pdc_stable.c b/drivers/parisc/pdc_stable.c
index a28e17898f..4e53be9c03 100644
--- a/drivers/parisc/pdc_stable.c
+++ b/drivers/parisc/pdc_stable.c
@@ -4,9 +4,8 @@
4 * Copyright (C) 2005-2006 Thibaut VARENE <varenet@parisc-linux.org> 4 * Copyright (C) 2005-2006 Thibaut VARENE <varenet@parisc-linux.org>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License, version 2, as
8 * the Free Software Foundation; either version 2 of the License, or 8 * published by the Free Software Foundation.
9 * (at your option) any later version.
10 * 9 *
11 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index 0821747e44..42b32ff2fc 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -1642,9 +1642,9 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1642** 1642**
1643**************************************************************************/ 1643**************************************************************************/
1644 1644
1645static void __iomem *ioc_remap(struct sba_device *sba_dev, int offset) 1645static void __iomem *ioc_remap(struct sba_device *sba_dev, unsigned int offset)
1646{ 1646{
1647 return ioremap(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE); 1647 return ioremap_nocache(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE);
1648} 1648}
1649 1649
1650static void sba_hw_init(struct sba_device *sba_dev) 1650static void sba_hw_init(struct sba_device *sba_dev)
@@ -2040,7 +2040,7 @@ sba_driver_callback(struct parisc_device *dev)
2040 u32 func_class; 2040 u32 func_class;
2041 int i; 2041 int i;
2042 char *version; 2042 char *version;
2043 void __iomem *sba_addr = ioremap(dev->hpa.start, SBA_FUNC_SIZE); 2043 void __iomem *sba_addr = ioremap_nocache(dev->hpa.start, SBA_FUNC_SIZE);
2044 struct proc_dir_entry *info_entry, *bitmap_entry, *root; 2044 struct proc_dir_entry *info_entry, *bitmap_entry, *root;
2045 2045
2046 sba_dump_ranges(sba_addr); 2046 sba_dump_ranges(sba_addr);
diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c
index ad6d3b28a3..719b863bc2 100644
--- a/drivers/parisc/superio.c
+++ b/drivers/parisc/superio.c
@@ -12,6 +12,7 @@
12 * (C) Copyright 2001 John Marvin <jsm fc hp com> 12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org> 13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org> 14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
15 * (C) Copyright 2006 Helge Deller <deller@gmx.de>
15 * 16 *
16 * This program is free software; you can redistribute it and/or 17 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as 18 * modify it under the terms of the GNU General Public License as
@@ -388,43 +389,34 @@ int superio_fixup_irq(struct pci_dev *pcidev)
388 return local_irq; 389 return local_irq;
389} 390}
390 391
391static struct uart_port serial[] = {
392 {
393 .iotype = UPIO_PORT,
394 .line = 0,
395 .type = PORT_16550A,
396 .uartclk = 115200*16,
397 .fifosize = 16,
398 },
399 {
400 .iotype = UPIO_PORT,
401 .line = 1,
402 .type = PORT_16550A,
403 .uartclk = 115200*16,
404 .fifosize = 16,
405 }
406};
407
408static void __devinit superio_serial_init(void) 392static void __devinit superio_serial_init(void)
409{ 393{
410#ifdef CONFIG_SERIAL_8250 394#ifdef CONFIG_SERIAL_8250
411 int retval; 395 int retval;
412 396 struct uart_port serial_port;
413 serial[0].iobase = sio_dev.sp1_base; 397
414 serial[0].irq = SP1_IRQ; 398 memset(&serial_port, 0, sizeof(serial_port));
415 spin_lock_init(&serial[0].lock); 399 serial_port.iotype = UPIO_PORT;
416 400 serial_port.type = PORT_16550A;
417 retval = early_serial_setup(&serial[0]); 401 serial_port.uartclk = 115200*16;
402 serial_port.fifosize = 16;
403 spin_lock_init(&serial_port.lock);
404
405 /* serial port #1 */
406 serial_port.iobase = sio_dev.sp1_base;
407 serial_port.irq = SP1_IRQ;
408 serial_port.line = 0;
409 retval = early_serial_setup(&serial_port);
418 if (retval < 0) { 410 if (retval < 0) {
419 printk(KERN_WARNING PFX "Register Serial #0 failed.\n"); 411 printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
420 return; 412 return;
421 } 413 }
422 414
423 serial[1].iobase = sio_dev.sp2_base; 415 /* serial port #2 */
424 serial[1].irq = SP2_IRQ; 416 serial_port.iobase = sio_dev.sp2_base;
425 spin_lock_init(&serial[1].lock); 417 serial_port.irq = SP2_IRQ;
426 retval = early_serial_setup(&serial[1]); 418 serial_port.line = 1;
427 419 retval = early_serial_setup(&serial_port);
428 if (retval < 0) 420 if (retval < 0)
429 printk(KERN_WARNING PFX "Register Serial #1 failed.\n"); 421 printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
430#endif /* CONFIG_SERIAL_8250 */ 422#endif /* CONFIG_SERIAL_8250 */
diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c
index 0574efd782..459e6e1946 100644
--- a/drivers/pcmcia/vrc4171_card.c
+++ b/drivers/pcmcia/vrc4171_card.c
@@ -634,7 +634,7 @@ static void vrc4171_remove_sockets(void)
634static int __devinit vrc4171_card_setup(char *options) 634static int __devinit vrc4171_card_setup(char *options)
635{ 635{
636 if (options == NULL || *options == '\0') 636 if (options == NULL || *options == '\0')
637 return 0; 637 return 1;
638 638
639 if (strncmp(options, "irq:", 4) == 0) { 639 if (strncmp(options, "irq:", 4) == 0) {
640 int irq; 640 int irq;
@@ -644,7 +644,7 @@ static int __devinit vrc4171_card_setup(char *options)
644 vrc4171_irq = irq; 644 vrc4171_irq = irq;
645 645
646 if (*options != ',') 646 if (*options != ',')
647 return 0; 647 return 1;
648 options++; 648 options++;
649 } 649 }
650 650
@@ -663,10 +663,10 @@ static int __devinit vrc4171_card_setup(char *options)
663 } 663 }
664 664
665 if (*options != ',') 665 if (*options != ',')
666 return 0; 666 return 1;
667 options++; 667 options++;
668 } else 668 } else
669 return 0; 669 return 1;
670 670
671 } 671 }
672 672
@@ -688,7 +688,7 @@ static int __devinit vrc4171_card_setup(char *options)
688 } 688 }
689 689
690 if (*options != ',') 690 if (*options != ',')
691 return 0; 691 return 1;
692 options++; 692 options++;
693 693
694 if (strncmp(options, "memnoprobe", 10) == 0) 694 if (strncmp(options, "memnoprobe", 10) == 0)
@@ -700,7 +700,7 @@ static int __devinit vrc4171_card_setup(char *options)
700 } 700 }
701 } 701 }
702 702
703 return 0; 703 return 1;
704} 704}
705 705
706__setup("vrc4171_card=", vrc4171_card_setup); 706__setup("vrc4171_card=", vrc4171_card_setup);
diff --git a/drivers/pcmcia/vrc4173_cardu.c b/drivers/pcmcia/vrc4173_cardu.c
index 57f38dba0a..6004196f7c 100644
--- a/drivers/pcmcia/vrc4173_cardu.c
+++ b/drivers/pcmcia/vrc4173_cardu.c
@@ -516,7 +516,7 @@ static int __devinit vrc4173_cardu_probe(struct pci_dev *dev,
516static int __devinit vrc4173_cardu_setup(char *options) 516static int __devinit vrc4173_cardu_setup(char *options)
517{ 517{
518 if (options == NULL || *options == '\0') 518 if (options == NULL || *options == '\0')
519 return 0; 519 return 1;
520 520
521 if (strncmp(options, "cardu1:", 7) == 0) { 521 if (strncmp(options, "cardu1:", 7) == 0) {
522 options += 7; 522 options += 7;
@@ -527,9 +527,9 @@ static int __devinit vrc4173_cardu_setup(char *options)
527 } 527 }
528 528
529 if (*options != ',') 529 if (*options != ',')
530 return 0; 530 return 1;
531 } else 531 } else
532 return 0; 532 return 1;
533 } 533 }
534 534
535 if (strncmp(options, "cardu2:", 7) == 0) { 535 if (strncmp(options, "cardu2:", 7) == 0) {
@@ -538,7 +538,7 @@ static int __devinit vrc4173_cardu_setup(char *options)
538 cardu_sockets[CARDU2].noprobe = 1; 538 cardu_sockets[CARDU2].noprobe = 1;
539 } 539 }
540 540
541 return 0; 541 return 1;
542} 542}
543 543
544__setup("vrc4173_cardu=", vrc4173_cardu_setup); 544__setup("vrc4173_cardu=", vrc4173_cardu_setup);
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index ffba65656a..1bd82c4e52 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -293,6 +293,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
293 board_ahci }, /* JMicron JMB360 */ 293 board_ahci }, /* JMicron JMB360 */
294 { 0x197b, 0x2363, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 294 { 0x197b, 0x2363, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
295 board_ahci }, /* JMicron JMB363 */ 295 board_ahci }, /* JMicron JMB363 */
296 { PCI_VENDOR_ID_ATI, 0x4380, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
297 board_ahci }, /* ATI SB600 non-raid */
298 { PCI_VENDOR_ID_ATI, 0x4381, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
299 board_ahci }, /* ATI SB600 raid */
296 { } /* terminate list */ 300 { } /* terminate list */
297}; 301};
298 302
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
index 2d5be84d8b..24e71b5551 100644
--- a/drivers/scsi/ata_piix.c
+++ b/drivers/scsi/ata_piix.c
@@ -301,7 +301,7 @@ static struct piix_map_db ich6_map_db = {
301 .mask = 0x3, 301 .mask = 0x3,
302 .map = { 302 .map = {
303 /* PM PS SM SS MAP */ 303 /* PM PS SM SS MAP */
304 { P0, P1, P2, P3 }, /* 00b */ 304 { P0, P2, P1, P3 }, /* 00b */
305 { IDE, IDE, P1, P3 }, /* 01b */ 305 { IDE, IDE, P1, P3 }, /* 01b */
306 { P0, P2, IDE, IDE }, /* 10b */ 306 { P0, P2, IDE, IDE }, /* 10b */
307 { RV, RV, RV, RV }, 307 { RV, RV, RV, RV },
@@ -312,7 +312,7 @@ static struct piix_map_db ich6m_map_db = {
312 .mask = 0x3, 312 .mask = 0x3,
313 .map = { 313 .map = {
314 /* PM PS SM SS MAP */ 314 /* PM PS SM SS MAP */
315 { P0, P1, P2, P3 }, /* 00b */ 315 { P0, P2, RV, RV }, /* 00b */
316 { RV, RV, RV, RV }, 316 { RV, RV, RV, RV },
317 { P0, P2, IDE, IDE }, /* 10b */ 317 { P0, P2, IDE, IDE }, /* 10b */
318 { RV, RV, RV, RV }, 318 { RV, RV, RV, RV },
diff --git a/drivers/scsi/ibmmca.c b/drivers/scsi/ibmmca.c
index 3a8462e8d0..24eb59e143 100644
--- a/drivers/scsi/ibmmca.c
+++ b/drivers/scsi/ibmmca.c
@@ -2488,7 +2488,7 @@ static int option_setup(char *str)
2488 } 2488 }
2489 ints[0] = i - 1; 2489 ints[0] = i - 1;
2490 internal_ibmmca_scsi_setup(cur, ints); 2490 internal_ibmmca_scsi_setup(cur, ints);
2491 return 0; 2491 return 1;
2492} 2492}
2493 2493
2494__setup("ibmmcascsi=", option_setup); 2494__setup("ibmmcascsi=", option_setup);
diff --git a/drivers/scsi/lasi700.c b/drivers/scsi/lasi700.c
index 459a4daebe..eb7bd310cc 100644
--- a/drivers/scsi/lasi700.c
+++ b/drivers/scsi/lasi700.c
@@ -112,7 +112,7 @@ lasi700_probe(struct parisc_device *dev)
112 112
113 hostdata->dev = &dev->dev; 113 hostdata->dev = &dev->dev;
114 dma_set_mask(&dev->dev, DMA_32BIT_MASK); 114 dma_set_mask(&dev->dev, DMA_32BIT_MASK);
115 hostdata->base = ioremap(base, 0x100); 115 hostdata->base = ioremap_nocache(base, 0x100);
116 hostdata->differential = 0; 116 hostdata->differential = 0;
117 117
118 if (dev->id.sversion == LASI_700_SVERSION) { 118 if (dev->id.sversion == LASI_700_SVERSION) {
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index f18742e8d7..6fc25f60db 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -278,7 +278,7 @@ static void ata_unpack_xfermask(unsigned int xfer_mask,
278} 278}
279 279
280static const struct ata_xfer_ent { 280static const struct ata_xfer_ent {
281 unsigned int shift, bits; 281 int shift, bits;
282 u8 base; 282 u8 base;
283} ata_xfer_tbl[] = { 283} ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, 284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
@@ -397,9 +397,21 @@ static const char *ata_mode_string(unsigned int xfer_mask)
397 return "<n/a>"; 397 return "<n/a>";
398} 398}
399 399
400static const char *sata_spd_string(unsigned int spd)
401{
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410}
411
400static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev) 412static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
401{ 413{
402 if (ata_dev_present(dev)) { 414 if (ata_dev_enabled(dev)) {
403 printk(KERN_WARNING "ata%u: dev %u disabled\n", 415 printk(KERN_WARNING "ata%u: dev %u disabled\n",
404 ap->id, dev->devno); 416 ap->id, dev->devno);
405 dev->class++; 417 dev->class++;
@@ -989,9 +1001,7 @@ ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
989 qc->private_data = &wait; 1001 qc->private_data = &wait;
990 qc->complete_fn = ata_qc_complete_internal; 1002 qc->complete_fn = ata_qc_complete_internal;
991 1003
992 qc->err_mask = ata_qc_issue(qc); 1004 ata_qc_issue(qc);
993 if (qc->err_mask)
994 ata_qc_complete(qc);
995 1005
996 spin_unlock_irqrestore(&ap->host_set->lock, flags); 1006 spin_unlock_irqrestore(&ap->host_set->lock, flags);
997 1007
@@ -1212,7 +1222,7 @@ static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1212 unsigned int xfer_mask; 1222 unsigned int xfer_mask;
1213 int i, rc; 1223 int i, rc;
1214 1224
1215 if (!ata_dev_present(dev)) { 1225 if (!ata_dev_enabled(dev)) {
1216 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", 1226 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1217 ap->id, dev->devno); 1227 ap->id, dev->devno);
1218 return 0; 1228 return 0;
@@ -1365,13 +1375,13 @@ err_out_nosup:
1365 * PCI/etc. bus probe sem. 1375 * PCI/etc. bus probe sem.
1366 * 1376 *
1367 * RETURNS: 1377 * RETURNS:
1368 * Zero on success, non-zero on error. 1378 * Zero on success, negative errno otherwise.
1369 */ 1379 */
1370 1380
1371static int ata_bus_probe(struct ata_port *ap) 1381static int ata_bus_probe(struct ata_port *ap)
1372{ 1382{
1373 unsigned int classes[ATA_MAX_DEVICES]; 1383 unsigned int classes[ATA_MAX_DEVICES];
1374 unsigned int i, rc, found = 0; 1384 int i, rc, found = 0;
1375 1385
1376 ata_port_probe(ap); 1386 ata_port_probe(ap);
1377 1387
@@ -1405,7 +1415,7 @@ static int ata_bus_probe(struct ata_port *ap)
1405 1415
1406 dev->class = classes[i]; 1416 dev->class = classes[i];
1407 1417
1408 if (!ata_dev_present(dev)) 1418 if (!ata_dev_enabled(dev))
1409 continue; 1419 continue;
1410 1420
1411 WARN_ON(dev->id != NULL); 1421 WARN_ON(dev->id != NULL);
@@ -1437,7 +1447,7 @@ static int ata_bus_probe(struct ata_port *ap)
1437 1447
1438err_out_disable: 1448err_out_disable:
1439 ap->ops->port_disable(ap); 1449 ap->ops->port_disable(ap);
1440 return -1; 1450 return -ENODEV;
1441} 1451}
1442 1452
1443/** 1453/**
@@ -1468,7 +1478,6 @@ void ata_port_probe(struct ata_port *ap)
1468static void sata_print_link_status(struct ata_port *ap) 1478static void sata_print_link_status(struct ata_port *ap)
1469{ 1479{
1470 u32 sstatus, tmp; 1480 u32 sstatus, tmp;
1471 const char *speed;
1472 1481
1473 if (!ap->ops->scr_read) 1482 if (!ap->ops->scr_read)
1474 return; 1483 return;
@@ -1477,14 +1486,8 @@ static void sata_print_link_status(struct ata_port *ap)
1477 1486
1478 if (sata_dev_present(ap)) { 1487 if (sata_dev_present(ap)) {
1479 tmp = (sstatus >> 4) & 0xf; 1488 tmp = (sstatus >> 4) & 0xf;
1480 if (tmp & (1 << 0)) 1489 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1481 speed = "1.5"; 1490 ap->id, sata_spd_string(tmp), sstatus);
1482 else if (tmp & (1 << 1))
1483 speed = "3.0";
1484 else
1485 speed = "<unknown>";
1486 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1487 ap->id, speed, sstatus);
1488 } else { 1491 } else {
1489 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n", 1492 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1490 ap->id, sstatus); 1493 ap->id, sstatus);
@@ -1576,7 +1579,7 @@ void sata_phy_reset(struct ata_port *ap)
1576struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev) 1579struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1577{ 1580{
1578 struct ata_device *pair = &ap->device[1 - adev->devno]; 1581 struct ata_device *pair = &ap->device[1 - adev->devno];
1579 if (!ata_dev_present(pair)) 1582 if (!ata_dev_enabled(pair))
1580 return NULL; 1583 return NULL;
1581 return pair; 1584 return pair;
1582} 1585}
@@ -1782,47 +1785,6 @@ static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1782 return 0; 1785 return 0;
1783} 1786}
1784 1787
1785static int ata_host_set_pio(struct ata_port *ap)
1786{
1787 int i;
1788
1789 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1790 struct ata_device *dev = &ap->device[i];
1791
1792 if (!ata_dev_present(dev))
1793 continue;
1794
1795 if (!dev->pio_mode) {
1796 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
1797 return -1;
1798 }
1799
1800 dev->xfer_mode = dev->pio_mode;
1801 dev->xfer_shift = ATA_SHIFT_PIO;
1802 if (ap->ops->set_piomode)
1803 ap->ops->set_piomode(ap, dev);
1804 }
1805
1806 return 0;
1807}
1808
1809static void ata_host_set_dma(struct ata_port *ap)
1810{
1811 int i;
1812
1813 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1814 struct ata_device *dev = &ap->device[i];
1815
1816 if (!ata_dev_present(dev) || !dev->dma_mode)
1817 continue;
1818
1819 dev->xfer_mode = dev->dma_mode;
1820 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1821 if (ap->ops->set_dmamode)
1822 ap->ops->set_dmamode(ap, dev);
1823 }
1824}
1825
1826/** 1788/**
1827 * ata_set_mode - Program timings and issue SET FEATURES - XFER 1789 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1828 * @ap: port on which timings will be programmed 1790 * @ap: port on which timings will be programmed
@@ -1834,59 +1796,83 @@ static void ata_host_set_dma(struct ata_port *ap)
1834 */ 1796 */
1835static void ata_set_mode(struct ata_port *ap) 1797static void ata_set_mode(struct ata_port *ap)
1836{ 1798{
1837 int i, rc, used_dma = 0; 1799 struct ata_device *dev;
1800 int i, rc, used_dma = 0, found = 0;
1838 1801
1839 /* step 1: calculate xfer_mask */ 1802 /* step 1: calculate xfer_mask */
1840 for (i = 0; i < ATA_MAX_DEVICES; i++) { 1803 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1841 struct ata_device *dev = &ap->device[i];
1842 unsigned int pio_mask, dma_mask; 1804 unsigned int pio_mask, dma_mask;
1843 1805
1844 if (!ata_dev_present(dev)) 1806 dev = &ap->device[i];
1807
1808 if (!ata_dev_enabled(dev))
1845 continue; 1809 continue;
1846 1810
1847 ata_dev_xfermask(ap, dev); 1811 ata_dev_xfermask(ap, dev);
1848 1812
1849 /* TODO: let LLDD filter dev->*_mask here */
1850
1851 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 1813 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1852 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 1814 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1853 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 1815 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1854 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 1816 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
1855 1817
1818 found = 1;
1856 if (dev->dma_mode) 1819 if (dev->dma_mode)
1857 used_dma = 1; 1820 used_dma = 1;
1858 } 1821 }
1822 if (!found)
1823 return;
1859 1824
1860 /* step 2: always set host PIO timings */ 1825 /* step 2: always set host PIO timings */
1861 rc = ata_host_set_pio(ap); 1826 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1862 if (rc) 1827 dev = &ap->device[i];
1863 goto err_out; 1828 if (!ata_dev_enabled(dev))
1829 continue;
1830
1831 if (!dev->pio_mode) {
1832 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
1833 ap->id, dev->devno);
1834 rc = -EINVAL;
1835 goto err_out;
1836 }
1837
1838 dev->xfer_mode = dev->pio_mode;
1839 dev->xfer_shift = ATA_SHIFT_PIO;
1840 if (ap->ops->set_piomode)
1841 ap->ops->set_piomode(ap, dev);
1842 }
1864 1843
1865 /* step 3: set host DMA timings */ 1844 /* step 3: set host DMA timings */
1866 ata_host_set_dma(ap); 1845 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1846 dev = &ap->device[i];
1847
1848 if (!ata_dev_enabled(dev) || !dev->dma_mode)
1849 continue;
1850
1851 dev->xfer_mode = dev->dma_mode;
1852 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1853 if (ap->ops->set_dmamode)
1854 ap->ops->set_dmamode(ap, dev);
1855 }
1867 1856
1868 /* step 4: update devices' xfer mode */ 1857 /* step 4: update devices' xfer mode */
1869 for (i = 0; i < ATA_MAX_DEVICES; i++) { 1858 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1870 struct ata_device *dev = &ap->device[i]; 1859 dev = &ap->device[i];
1871 1860
1872 if (!ata_dev_present(dev)) 1861 if (!ata_dev_enabled(dev))
1873 continue; 1862 continue;
1874 1863
1875 if (ata_dev_set_mode(ap, dev)) 1864 rc = ata_dev_set_mode(ap, dev);
1865 if (rc)
1876 goto err_out; 1866 goto err_out;
1877 } 1867 }
1878 1868
1879 /* 1869 /* Record simplex status. If we selected DMA then the other
1880 * Record simplex status. If we selected DMA then the other 1870 * host channels are not permitted to do so.
1881 * host channels are not permitted to do so.
1882 */ 1871 */
1883
1884 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX)) 1872 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
1885 ap->host_set->simplex_claimed = 1; 1873 ap->host_set->simplex_claimed = 1;
1886 1874
1887 /* 1875 /* step5: chip specific finalisation */
1888 * Chip specific finalisation
1889 */
1890 if (ap->ops->post_set_mode) 1876 if (ap->ops->post_set_mode)
1891 ap->ops->post_set_mode(ap); 1877 ap->ops->post_set_mode(ap);
1892 1878
@@ -2381,16 +2367,16 @@ int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2381 ata_std_postreset, classes); 2367 ata_std_postreset, classes);
2382} 2368}
2383 2369
2384static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset, 2370static int ata_do_reset(struct ata_port *ap,
2385 ata_postreset_fn_t postreset, 2371 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2386 unsigned int *classes) 2372 int verbose, unsigned int *classes)
2387{ 2373{
2388 int i, rc; 2374 int i, rc;
2389 2375
2390 for (i = 0; i < ATA_MAX_DEVICES; i++) 2376 for (i = 0; i < ATA_MAX_DEVICES; i++)
2391 classes[i] = ATA_DEV_UNKNOWN; 2377 classes[i] = ATA_DEV_UNKNOWN;
2392 2378
2393 rc = reset(ap, 0, classes); 2379 rc = reset(ap, verbose, classes);
2394 if (rc) 2380 if (rc)
2395 return rc; 2381 return rc;
2396 2382
@@ -2410,7 +2396,7 @@ static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2410 if (postreset) 2396 if (postreset)
2411 postreset(ap, classes); 2397 postreset(ap, classes);
2412 2398
2413 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV; 2399 return 0;
2414} 2400}
2415 2401
2416/** 2402/**
@@ -2455,21 +2441,24 @@ int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2455 probeinit(ap); 2441 probeinit(ap);
2456 2442
2457 if (softreset) { 2443 if (softreset) {
2458 rc = do_probe_reset(ap, softreset, postreset, classes); 2444 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2459 if (rc == 0) 2445 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2460 return 0; 2446 goto done;
2461 } 2447 }
2462 2448
2463 if (!hardreset) 2449 if (!hardreset)
2464 return rc; 2450 goto done;
2465 2451
2466 rc = do_probe_reset(ap, hardreset, postreset, classes); 2452 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2467 if (rc == 0 || rc != -ENODEV) 2453 if (rc || classes[0] != ATA_DEV_UNKNOWN)
2468 return rc; 2454 goto done;
2469 2455
2470 if (softreset) 2456 if (softreset)
2471 rc = do_probe_reset(ap, softreset, postreset, classes); 2457 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2472 2458
2459 done:
2460 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2461 rc = -ENODEV;
2473 return rc; 2462 return rc;
2474} 2463}
2475 2464
@@ -2557,7 +2546,7 @@ int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2557 u16 *id; 2546 u16 *id;
2558 int rc; 2547 int rc;
2559 2548
2560 if (!ata_dev_present(dev)) 2549 if (!ata_dev_enabled(dev))
2561 return -ENODEV; 2550 return -ENODEV;
2562 2551
2563 class = dev->class; 2552 class = dev->class;
@@ -2686,7 +2675,7 @@ static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
2686 /* FIXME: Use port-wide xfermask for now */ 2675 /* FIXME: Use port-wide xfermask for now */
2687 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2676 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2688 struct ata_device *d = &ap->device[i]; 2677 struct ata_device *d = &ap->device[i];
2689 if (!ata_dev_present(d)) 2678 if (!ata_dev_enabled(d))
2690 continue; 2679 continue;
2691 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask, 2680 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2692 d->udma_mask); 2681 d->udma_mask);
@@ -4077,15 +4066,14 @@ static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4077 * 4066 *
4078 * LOCKING: 4067 * LOCKING:
4079 * spin_lock_irqsave(host_set lock) 4068 * spin_lock_irqsave(host_set lock)
4080 *
4081 * RETURNS:
4082 * Zero on success, AC_ERR_* mask on failure
4083 */ 4069 */
4084 4070void ata_qc_issue(struct ata_queued_cmd *qc)
4085unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
4086{ 4071{
4087 struct ata_port *ap = qc->ap; 4072 struct ata_port *ap = qc->ap;
4088 4073
4074 qc->ap->active_tag = qc->tag;
4075 qc->flags |= ATA_QCFLAG_ACTIVE;
4076
4089 if (ata_should_dma_map(qc)) { 4077 if (ata_should_dma_map(qc)) {
4090 if (qc->flags & ATA_QCFLAG_SG) { 4078 if (qc->flags & ATA_QCFLAG_SG) {
4091 if (ata_sg_setup(qc)) 4079 if (ata_sg_setup(qc))
@@ -4100,17 +4088,18 @@ unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
4100 4088
4101 ap->ops->qc_prep(qc); 4089 ap->ops->qc_prep(qc);
4102 4090
4103 qc->ap->active_tag = qc->tag; 4091 qc->err_mask |= ap->ops->qc_issue(qc);
4104 qc->flags |= ATA_QCFLAG_ACTIVE; 4092 if (unlikely(qc->err_mask))
4105 4093 goto err;
4106 return ap->ops->qc_issue(qc); 4094 return;
4107 4095
4108sg_err: 4096sg_err:
4109 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4097 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4110 return AC_ERR_SYSTEM; 4098 qc->err_mask |= AC_ERR_SYSTEM;
4099err:
4100 ata_qc_complete(qc);
4111} 4101}
4112 4102
4113
4114/** 4103/**
4115 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 4104 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4116 * @qc: command to issue to device 4105 * @qc: command to issue to device
@@ -4448,7 +4437,7 @@ int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4448 ap->flags &= ~ATA_FLAG_SUSPENDED; 4437 ap->flags &= ~ATA_FLAG_SUSPENDED;
4449 ata_set_mode(ap); 4438 ata_set_mode(ap);
4450 } 4439 }
4451 if (!ata_dev_present(dev)) 4440 if (!ata_dev_enabled(dev))
4452 return 0; 4441 return 0;
4453 if (dev->class == ATA_DEV_ATA) 4442 if (dev->class == ATA_DEV_ATA)
4454 ata_start_drive(ap, dev); 4443 ata_start_drive(ap, dev);
@@ -4466,7 +4455,7 @@ int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4466 */ 4455 */
4467int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state) 4456int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
4468{ 4457{
4469 if (!ata_dev_present(dev)) 4458 if (!ata_dev_enabled(dev))
4470 return 0; 4459 return 0;
4471 if (dev->class == ATA_DEV_ATA) 4460 if (dev->class == ATA_DEV_ATA)
4472 ata_flush_cache(ap, dev); 4461 ata_flush_cache(ap, dev);
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
index 628191bfd9..c1a4b29a9a 100644
--- a/drivers/scsi/libata-scsi.c
+++ b/drivers/scsi/libata-scsi.c
@@ -1431,9 +1431,7 @@ static void ata_scsi_translate(struct ata_port *ap, struct ata_device *dev,
1431 goto early_finish; 1431 goto early_finish;
1432 1432
1433 /* select device, send command to hardware */ 1433 /* select device, send command to hardware */
1434 qc->err_mask = ata_qc_issue(qc); 1434 ata_qc_issue(qc);
1435 if (qc->err_mask)
1436 ata_qc_complete(qc);
1437 1435
1438 VPRINTK("EXIT\n"); 1436 VPRINTK("EXIT\n");
1439 return; 1437 return;
@@ -2199,9 +2197,7 @@ static void atapi_request_sense(struct ata_queued_cmd *qc)
2199 2197
2200 qc->complete_fn = atapi_sense_complete; 2198 qc->complete_fn = atapi_sense_complete;
2201 2199
2202 qc->err_mask = ata_qc_issue(qc); 2200 ata_qc_issue(qc);
2203 if (qc->err_mask)
2204 ata_qc_complete(qc);
2205 2201
2206 DPRINTK("EXIT\n"); 2202 DPRINTK("EXIT\n");
2207} 2203}
@@ -2353,7 +2349,7 @@ ata_scsi_find_dev(struct ata_port *ap, const struct scsi_device *scsidev)
2353 (scsidev->lun != 0))) 2349 (scsidev->lun != 0)))
2354 return NULL; 2350 return NULL;
2355 2351
2356 if (unlikely(!ata_dev_present(dev))) 2352 if (unlikely(!ata_dev_enabled(dev)))
2357 return NULL; 2353 return NULL;
2358 2354
2359 if (!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) { 2355 if (!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) {
@@ -2747,7 +2743,7 @@ void ata_scsi_scan_host(struct ata_port *ap)
2747 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2743 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2748 dev = &ap->device[i]; 2744 dev = &ap->device[i];
2749 2745
2750 if (ata_dev_present(dev)) 2746 if (ata_dev_enabled(dev))
2751 scsi_scan_target(&ap->host->shost_gendev, 0, i, 0, 0); 2747 scsi_scan_target(&ap->host->shost_gendev, 0, i, 0, 0);
2752 } 2748 }
2753} 2749}
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
index 65f52beea8..1c755b1452 100644
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -47,7 +47,7 @@ extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
47extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc); 47extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc);
48extern void ata_port_flush_task(struct ata_port *ap); 48extern void ata_port_flush_task(struct ata_port *ap);
49extern void ata_qc_free(struct ata_queued_cmd *qc); 49extern void ata_qc_free(struct ata_queued_cmd *qc);
50extern unsigned int ata_qc_issue(struct ata_queued_cmd *qc); 50extern void ata_qc_issue(struct ata_queued_cmd *qc);
51extern int ata_check_atapi_dma(struct ata_queued_cmd *qc); 51extern int ata_check_atapi_dma(struct ata_queued_cmd *qc);
52extern void ata_dev_select(struct ata_port *ap, unsigned int device, 52extern void ata_dev_select(struct ata_port *ap, unsigned int device,
53 unsigned int wait, unsigned int can_sleep); 53 unsigned int wait, unsigned int can_sleep);
diff --git a/drivers/scsi/sata_mv.c b/drivers/scsi/sata_mv.c
index 4d965601ef..dc54f294fa 100644
--- a/drivers/scsi/sata_mv.c
+++ b/drivers/scsi/sata_mv.c
@@ -1991,7 +1991,7 @@ comreset_retry:
1991 tf.nsect = readb((void __iomem *) ap->ioaddr.nsect_addr); 1991 tf.nsect = readb((void __iomem *) ap->ioaddr.nsect_addr);
1992 1992
1993 dev->class = ata_dev_classify(&tf); 1993 dev->class = ata_dev_classify(&tf);
1994 if (!ata_dev_present(dev)) { 1994 if (!ata_dev_enabled(dev)) {
1995 VPRINTK("Port disabled post-sig: No device present.\n"); 1995 VPRINTK("Port disabled post-sig: No device present.\n");
1996 ata_port_disable(ap); 1996 ata_port_disable(ap);
1997 } 1997 }
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index 18c296c568..d6c7086a53 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -264,7 +264,7 @@ static void sil_post_set_mode (struct ata_port *ap)
264 264
265 for (i = 0; i < 2; i++) { 265 for (i = 0; i < 2; i++) {
266 dev = &ap->device[i]; 266 dev = &ap->device[i];
267 if (!ata_dev_present(dev)) 267 if (!ata_dev_enabled(dev))
268 dev_mode[i] = 0; /* PIO0/1/2 */ 268 dev_mode[i] = 0; /* PIO0/1/2 */
269 else if (dev->flags & ATA_DFLAG_PIO) 269 else if (dev->flags & ATA_DFLAG_PIO)
270 dev_mode[i] = 1; /* PIO3/4 */ 270 dev_mode[i] = 1; /* PIO3/4 */
diff --git a/drivers/scsi/zalon.c b/drivers/scsi/zalon.c
index b131432c67..a6cfbb3b36 100644
--- a/drivers/scsi/zalon.c
+++ b/drivers/scsi/zalon.c
@@ -88,7 +88,7 @@ zalon_probe(struct parisc_device *dev)
88 struct gsc_irq gsc_irq; 88 struct gsc_irq gsc_irq;
89 u32 zalon_vers; 89 u32 zalon_vers;
90 int error = -ENODEV; 90 int error = -ENODEV;
91 void __iomem *zalon = ioremap(dev->hpa.start, 4096); 91 void __iomem *zalon = ioremap_nocache(dev->hpa.start, 4096);
92 void __iomem *io_port = zalon + GSC_SCSI_ZALON_OFFSET; 92 void __iomem *io_port = zalon + GSC_SCSI_ZALON_OFFSET;
93 static int unit = 0; 93 static int unit = 0;
94 struct Scsi_Host *host; 94 struct Scsi_Host *host;
diff --git a/drivers/serial/8250_gsc.c b/drivers/serial/8250_gsc.c
index 8b4947933d..913c71cc05 100644
--- a/drivers/serial/8250_gsc.c
+++ b/drivers/serial/8250_gsc.c
@@ -52,13 +52,14 @@ serial_init_chip(struct parisc_device *dev)
52 address += 0x800; 52 address += 0x800;
53 } 53 }
54 54
55 memset(&port, 0, sizeof(struct uart_port)); 55 memset(&port, 0, sizeof(port));
56 port.mapbase = address; 56 port.iotype = UPIO_MEM;
57 port.irq = dev->irq; 57 port.uartclk = LASI_BASE_BAUD * 16;
58 port.iotype = UPIO_MEM; 58 port.mapbase = address;
59 port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 59 port.membase = ioremap_nocache(address, 16);
60 port.uartclk = LASI_BASE_BAUD * 16; 60 port.irq = dev->irq;
61 port.dev = &dev->dev; 61 port.flags = UPF_BOOT_AUTOCONF;
62 port.dev = &dev->dev;
62 63
63 err = serial8250_register_port(&port); 64 err = serial8250_register_port(&port);
64 if (err < 0) { 65 if (err < 0) {
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index fe0d8b8e91..7d22dc0478 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -63,6 +63,33 @@ config SERIAL_8250_CONSOLE
63 63
64 If unsure, say N. 64 If unsure, say N.
65 65
66config SERIAL_8250_GSC
67 tristate
68 depends on SERIAL_8250 && GSC
69 default SERIAL_8250
70
71config SERIAL_8250_PCI
72 tristate "8250/16550 PCI device support" if EMBEDDED
73 depends on SERIAL_8250 && PCI
74 default SERIAL_8250
75 help
76 This builds standard PCI serial support. You may be able to
77 disable this feature if you only need legacy serial support.
78 Saves about 9K.
79
80config SERIAL_8250_PNP
81 tristate "8250/16550 PNP device support" if EMBEDDED
82 depends on SERIAL_8250 && PNP
83 default SERIAL_8250
84 help
85 This builds standard PNP serial support. You may be able to
86 disable this feature if you only need legacy serial support.
87
88config SERIAL_8250_HP300
89 tristate
90 depends on SERIAL_8250 && HP300
91 default SERIAL_8250
92
66config SERIAL_8250_CS 93config SERIAL_8250_CS
67 tristate "8250/16550 PCMCIA device support" 94 tristate "8250/16550 PCMCIA device support"
68 depends on PCMCIA && SERIAL_8250 95 depends on PCMCIA && SERIAL_8250
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d2b4c21487..0a71bf68a0 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -4,15 +4,13 @@
4# $Id: Makefile,v 1.8 2002/07/21 21:32:30 rmk Exp $ 4# $Id: Makefile,v 1.8 2002/07/21 21:32:30 rmk Exp $
5# 5#
6 6
7serial-8250-y :=
8serial-8250-$(CONFIG_PNP) += 8250_pnp.o
9serial-8250-$(CONFIG_GSC) += 8250_gsc.o
10serial-8250-$(CONFIG_PCI) += 8250_pci.o
11serial-8250-$(CONFIG_HP300) += 8250_hp300.o
12
13obj-$(CONFIG_SERIAL_CORE) += serial_core.o 7obj-$(CONFIG_SERIAL_CORE) += serial_core.o
14obj-$(CONFIG_SERIAL_21285) += 21285.o 8obj-$(CONFIG_SERIAL_21285) += 21285.o
15obj-$(CONFIG_SERIAL_8250) += 8250.o $(serial-8250-y) 9obj-$(CONFIG_SERIAL_8250) += 8250.o
10obj-$(CONFIG_SERIAL_8250_PNP) += 8250_pnp.o
11obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o
12obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o
13obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o
16obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o 14obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o
17obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o 15obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o
18obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o 16obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 4d48b625cd..7d82370519 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -142,12 +142,14 @@ static void jsm_tty_send_xchar(struct uart_port *port, char ch)
142{ 142{
143 unsigned long lock_flags; 143 unsigned long lock_flags;
144 struct jsm_channel *channel = (struct jsm_channel *)port; 144 struct jsm_channel *channel = (struct jsm_channel *)port;
145 struct termios *termios;
145 146
146 spin_lock_irqsave(&port->lock, lock_flags); 147 spin_lock_irqsave(&port->lock, lock_flags);
147 if (ch == port->info->tty->termios->c_cc[VSTART]) 148 termios = port->info->tty->termios;
149 if (ch == termios->c_cc[VSTART])
148 channel->ch_bd->bd_ops->send_start_character(channel); 150 channel->ch_bd->bd_ops->send_start_character(channel);
149 151
150 if (ch == port->info->tty->termios->c_cc[VSTOP]) 152 if (ch == termios->c_cc[VSTOP])
151 channel->ch_bd->bd_ops->send_stop_character(channel); 153 channel->ch_bd->bd_ops->send_stop_character(channel);
152 spin_unlock_irqrestore(&port->lock, lock_flags); 154 spin_unlock_irqrestore(&port->lock, lock_flags);
153} 155}
@@ -178,6 +180,7 @@ static int jsm_tty_open(struct uart_port *port)
178 struct jsm_board *brd; 180 struct jsm_board *brd;
179 int rc = 0; 181 int rc = 0;
180 struct jsm_channel *channel = (struct jsm_channel *)port; 182 struct jsm_channel *channel = (struct jsm_channel *)port;
183 struct termios *termios;
181 184
182 /* Get board pointer from our array of majors we have allocated */ 185 /* Get board pointer from our array of majors we have allocated */
183 brd = channel->ch_bd; 186 brd = channel->ch_bd;
@@ -239,12 +242,13 @@ static int jsm_tty_open(struct uart_port *port)
239 channel->ch_cached_lsr = 0; 242 channel->ch_cached_lsr = 0;
240 channel->ch_stops_sent = 0; 243 channel->ch_stops_sent = 0;
241 244
242 channel->ch_c_cflag = port->info->tty->termios->c_cflag; 245 termios = port->info->tty->termios;
243 channel->ch_c_iflag = port->info->tty->termios->c_iflag; 246 channel->ch_c_cflag = termios->c_cflag;
244 channel->ch_c_oflag = port->info->tty->termios->c_oflag; 247 channel->ch_c_iflag = termios->c_iflag;
245 channel->ch_c_lflag = port->info->tty->termios->c_lflag; 248 channel->ch_c_oflag = termios->c_oflag;
246 channel->ch_startc = port->info->tty->termios->c_cc[VSTART]; 249 channel->ch_c_lflag = termios->c_lflag;
247 channel->ch_stopc = port->info->tty->termios->c_cc[VSTOP]; 250 channel->ch_startc = termios->c_cc[VSTART];
251 channel->ch_stopc = termios->c_cc[VSTOP];
248 252
249 /* Tell UART to init itself */ 253 /* Tell UART to init itself */
250 brd->bd_ops->uart_init(channel); 254 brd->bd_ops->uart_init(channel);
@@ -784,6 +788,7 @@ static void jsm_carrier(struct jsm_channel *ch)
784 788
785void jsm_check_queue_flow_control(struct jsm_channel *ch) 789void jsm_check_queue_flow_control(struct jsm_channel *ch)
786{ 790{
791 struct board_ops *bd_ops = ch->ch_bd->bd_ops;
787 int qleft = 0; 792 int qleft = 0;
788 793
789 /* Store how much space we have left in the queue */ 794 /* Store how much space we have left in the queue */
@@ -809,7 +814,7 @@ void jsm_check_queue_flow_control(struct jsm_channel *ch)
809 /* HWFLOW */ 814 /* HWFLOW */
810 if (ch->ch_c_cflag & CRTSCTS) { 815 if (ch->ch_c_cflag & CRTSCTS) {
811 if(!(ch->ch_flags & CH_RECEIVER_OFF)) { 816 if(!(ch->ch_flags & CH_RECEIVER_OFF)) {
812 ch->ch_bd->bd_ops->disable_receiver(ch); 817 bd_ops->disable_receiver(ch);
813 ch->ch_flags |= (CH_RECEIVER_OFF); 818 ch->ch_flags |= (CH_RECEIVER_OFF);
814 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, 819 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
815 "Internal queue hit hilevel mark (%d)! Turning off interrupts.\n", 820 "Internal queue hit hilevel mark (%d)! Turning off interrupts.\n",
@@ -819,7 +824,7 @@ void jsm_check_queue_flow_control(struct jsm_channel *ch)
819 /* SWFLOW */ 824 /* SWFLOW */
820 else if (ch->ch_c_iflag & IXOFF) { 825 else if (ch->ch_c_iflag & IXOFF) {
821 if (ch->ch_stops_sent <= MAX_STOPS_SENT) { 826 if (ch->ch_stops_sent <= MAX_STOPS_SENT) {
822 ch->ch_bd->bd_ops->send_stop_character(ch); 827 bd_ops->send_stop_character(ch);
823 ch->ch_stops_sent++; 828 ch->ch_stops_sent++;
824 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, 829 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
825 "Sending stop char! Times sent: %x\n", ch->ch_stops_sent); 830 "Sending stop char! Times sent: %x\n", ch->ch_stops_sent);
@@ -846,7 +851,7 @@ void jsm_check_queue_flow_control(struct jsm_channel *ch)
846 /* HWFLOW */ 851 /* HWFLOW */
847 if (ch->ch_c_cflag & CRTSCTS) { 852 if (ch->ch_c_cflag & CRTSCTS) {
848 if (ch->ch_flags & CH_RECEIVER_OFF) { 853 if (ch->ch_flags & CH_RECEIVER_OFF) {
849 ch->ch_bd->bd_ops->enable_receiver(ch); 854 bd_ops->enable_receiver(ch);
850 ch->ch_flags &= ~(CH_RECEIVER_OFF); 855 ch->ch_flags &= ~(CH_RECEIVER_OFF);
851 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, 856 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
852 "Internal queue hit lowlevel mark (%d)! Turning on interrupts.\n", 857 "Internal queue hit lowlevel mark (%d)! Turning on interrupts.\n",
@@ -856,7 +861,7 @@ void jsm_check_queue_flow_control(struct jsm_channel *ch)
856 /* SWFLOW */ 861 /* SWFLOW */
857 else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) { 862 else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) {
858 ch->ch_stops_sent = 0; 863 ch->ch_stops_sent = 0;
859 ch->ch_bd->bd_ops->send_start_character(ch); 864 bd_ops->send_start_character(ch);
860 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "Sending start char!\n"); 865 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "Sending start char!\n");
861 } 866 }
862 } 867 }
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c
index 868eaf4a1a..64c0e89124 100644
--- a/drivers/serial/mux.c
+++ b/drivers/serial/mux.c
@@ -51,7 +51,7 @@
51#define MUX_BREAK(status) ((status & 0xF000) == 0x2000) 51#define MUX_BREAK(status) ((status & 0xF000) == 0x2000)
52 52
53#define MUX_NR 256 53#define MUX_NR 256
54static unsigned int port_cnt = 0; 54static unsigned int port_cnt __read_mostly;
55static struct uart_port mux_ports[MUX_NR]; 55static struct uart_port mux_ports[MUX_NR];
56 56
57static struct uart_driver mux_driver = { 57static struct uart_driver mux_driver = {
@@ -461,7 +461,7 @@ static int __init mux_probe(struct parisc_device *dev)
461 port->iobase = 0; 461 port->iobase = 0;
462 port->mapbase = dev->hpa.start + MUX_OFFSET + 462 port->mapbase = dev->hpa.start + MUX_OFFSET +
463 (i * MUX_LINE_OFFSET); 463 (i * MUX_LINE_OFFSET);
464 port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET); 464 port->membase = ioremap_nocache(port->mapbase, MUX_LINE_OFFSET);
465 port->iotype = UPIO_MEM; 465 port->iotype = UPIO_MEM;
466 port->type = PORT_MUX; 466 port->type = PORT_MUX;
467 port->irq = NO_IRQ; 467 port->irq = NO_IRQ;
diff --git a/drivers/usb/net/zd1201.c b/drivers/usb/net/zd1201.c
index fe9b60cd8d..9b1e4ed1d0 100644
--- a/drivers/usb/net/zd1201.c
+++ b/drivers/usb/net/zd1201.c
@@ -1736,6 +1736,7 @@ static const struct iw_handler_def zd1201_iw_handlers = {
1736 .standard = (iw_handler *)zd1201_iw_handler, 1736 .standard = (iw_handler *)zd1201_iw_handler,
1737 .private = (iw_handler *)zd1201_private_handler, 1737 .private = (iw_handler *)zd1201_private_handler,
1738 .private_args = (struct iw_priv_args *) zd1201_private_args, 1738 .private_args = (struct iw_priv_args *) zd1201_private_args,
1739 .get_wireless_stats = zd1201_get_wireless_stats,
1739}; 1740};
1740 1741
1741static int zd1201_probe(struct usb_interface *interface, 1742static int zd1201_probe(struct usb_interface *interface,
@@ -1796,7 +1797,6 @@ static int zd1201_probe(struct usb_interface *interface,
1796 zd->dev->open = zd1201_net_open; 1797 zd->dev->open = zd1201_net_open;
1797 zd->dev->stop = zd1201_net_stop; 1798 zd->dev->stop = zd1201_net_stop;
1798 zd->dev->get_stats = zd1201_get_stats; 1799 zd->dev->get_stats = zd1201_get_stats;
1799 zd->dev->get_wireless_stats = zd1201_get_wireless_stats;
1800 zd->dev->wireless_handlers = 1800 zd->dev->wireless_handlers =
1801 (struct iw_handler_def *)&zd1201_iw_handlers; 1801 (struct iw_handler_def *)&zd1201_iw_handlers;
1802 zd->dev->hard_start_xmit = zd1201_hard_start_xmit; 1802 zd->dev->hard_start_xmit = zd1201_hard_start_xmit;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 22e9d696fd..f87c0171f4 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -904,18 +904,6 @@ config FB_MATROX_MULTIHEAD
904 There is no need for enabling 'Matrox multihead support' if you have 904 There is no need for enabling 'Matrox multihead support' if you have
905 only one Matrox card in the box. 905 only one Matrox card in the box.
906 906
907config FB_RADEON_OLD
908 tristate "ATI Radeon display support (Old driver)"
909 depends on FB && PCI
910 select FB_CFB_FILLRECT
911 select FB_CFB_COPYAREA
912 select FB_CFB_IMAGEBLIT
913 select FB_MACMODES if PPC
914 help
915 Choose this option if you want to use an ATI Radeon graphics card as
916 a framebuffer device. There are both PCI and AGP versions. You
917 don't need to choose this to run the Radeon in plain VGA mode.
918
919config FB_RADEON 907config FB_RADEON
920 tristate "ATI Radeon display support" 908 tristate "ATI Radeon display support"
921 depends on FB && PCI 909 depends on FB && PCI
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index cb90218515..23de3b2c78 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -39,7 +39,6 @@ obj-$(CONFIG_FB_KYRO) += kyro/
39obj-$(CONFIG_FB_SAVAGE) += savage/ 39obj-$(CONFIG_FB_SAVAGE) += savage/
40obj-$(CONFIG_FB_GEODE) += geode/ 40obj-$(CONFIG_FB_GEODE) += geode/
41obj-$(CONFIG_FB_I810) += vgastate.o 41obj-$(CONFIG_FB_I810) += vgastate.o
42obj-$(CONFIG_FB_RADEON_OLD) += radeonfb.o
43obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o 42obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o
44obj-$(CONFIG_FB_VIRGE) += virgefb.o 43obj-$(CONFIG_FB_VIRGE) += virgefb.o
45obj-$(CONFIG_FB_3DFX) += tdfxfb.o 44obj-$(CONFIG_FB_3DFX) += tdfxfb.o
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 9d996f2c10..b895eaaa73 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -43,11 +43,11 @@ config LCD_DEVICE
43 default y 43 default y
44 44
45config BACKLIGHT_CORGI 45config BACKLIGHT_CORGI
46 tristate "Sharp Corgi Backlight Driver (SL-C7xx Series)" 46 tristate "Sharp Corgi Backlight Driver (SL Series)"
47 depends on BACKLIGHT_DEVICE && PXA_SHARPSL 47 depends on BACKLIGHT_DEVICE && PXA_SHARPSL
48 default y 48 default y
49 help 49 help
50 If you have a Sharp Zaurus SL-C7xx, say y to enable the 50 If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y to enable the
51 backlight driver. 51 backlight driver.
52 52
53config BACKLIGHT_HP680 53config BACKLIGHT_HP680
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index 151fda8dde..334b1db1bd 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -16,14 +16,12 @@
16 16
17static ssize_t backlight_show_power(struct class_device *cdev, char *buf) 17static ssize_t backlight_show_power(struct class_device *cdev, char *buf)
18{ 18{
19 int rc; 19 int rc = -ENXIO;
20 struct backlight_device *bd = to_backlight_device(cdev); 20 struct backlight_device *bd = to_backlight_device(cdev);
21 21
22 down(&bd->sem); 22 down(&bd->sem);
23 if (likely(bd->props && bd->props->get_power)) 23 if (likely(bd->props))
24 rc = sprintf(buf, "%d\n", bd->props->get_power(bd)); 24 rc = sprintf(buf, "%d\n", bd->props->power);
25 else
26 rc = -ENXIO;
27 up(&bd->sem); 25 up(&bd->sem);
28 26
29 return rc; 27 return rc;
@@ -31,7 +29,7 @@ static ssize_t backlight_show_power(struct class_device *cdev, char *buf)
31 29
32static ssize_t backlight_store_power(struct class_device *cdev, const char *buf, size_t count) 30static ssize_t backlight_store_power(struct class_device *cdev, const char *buf, size_t count)
33{ 31{
34 int rc, power; 32 int rc = -ENXIO, power;
35 char *endp; 33 char *endp;
36 struct backlight_device *bd = to_backlight_device(cdev); 34 struct backlight_device *bd = to_backlight_device(cdev);
37 35
@@ -40,12 +38,13 @@ static ssize_t backlight_store_power(struct class_device *cdev, const char *buf,
40 return -EINVAL; 38 return -EINVAL;
41 39
42 down(&bd->sem); 40 down(&bd->sem);
43 if (likely(bd->props && bd->props->set_power)) { 41 if (likely(bd->props)) {
44 pr_debug("backlight: set power to %d\n", power); 42 pr_debug("backlight: set power to %d\n", power);
45 bd->props->set_power(bd, power); 43 bd->props->power = power;
44 if (likely(bd->props->update_status))
45 bd->props->update_status(bd);
46 rc = count; 46 rc = count;
47 } else 47 }
48 rc = -ENXIO;
49 up(&bd->sem); 48 up(&bd->sem);
50 49
51 return rc; 50 return rc;
@@ -53,14 +52,12 @@ static ssize_t backlight_store_power(struct class_device *cdev, const char *buf,
53 52
54static ssize_t backlight_show_brightness(struct class_device *cdev, char *buf) 53static ssize_t backlight_show_brightness(struct class_device *cdev, char *buf)
55{ 54{
56 int rc; 55 int rc = -ENXIO;
57 struct backlight_device *bd = to_backlight_device(cdev); 56 struct backlight_device *bd = to_backlight_device(cdev);
58 57
59 down(&bd->sem); 58 down(&bd->sem);
60 if (likely(bd->props && bd->props->get_brightness)) 59 if (likely(bd->props))
61 rc = sprintf(buf, "%d\n", bd->props->get_brightness(bd)); 60 rc = sprintf(buf, "%d\n", bd->props->brightness);
62 else
63 rc = -ENXIO;
64 up(&bd->sem); 61 up(&bd->sem);
65 62
66 return rc; 63 return rc;
@@ -68,7 +65,7 @@ static ssize_t backlight_show_brightness(struct class_device *cdev, char *buf)
68 65
69static ssize_t backlight_store_brightness(struct class_device *cdev, const char *buf, size_t count) 66static ssize_t backlight_store_brightness(struct class_device *cdev, const char *buf, size_t count)
70{ 67{
71 int rc, brightness; 68 int rc = -ENXIO, brightness;
72 char *endp; 69 char *endp;
73 struct backlight_device *bd = to_backlight_device(cdev); 70 struct backlight_device *bd = to_backlight_device(cdev);
74 71
@@ -77,12 +74,18 @@ static ssize_t backlight_store_brightness(struct class_device *cdev, const char
77 return -EINVAL; 74 return -EINVAL;
78 75
79 down(&bd->sem); 76 down(&bd->sem);
80 if (likely(bd->props && bd->props->set_brightness)) { 77 if (likely(bd->props)) {
81 pr_debug("backlight: set brightness to %d\n", brightness); 78 if (brightness > bd->props->max_brightness)
82 bd->props->set_brightness(bd, brightness); 79 rc = -EINVAL;
83 rc = count; 80 else {
84 } else 81 pr_debug("backlight: set brightness to %d\n",
85 rc = -ENXIO; 82 brightness);
83 bd->props->brightness = brightness;
84 if (likely(bd->props->update_status))
85 bd->props->update_status(bd);
86 rc = count;
87 }
88 }
86 up(&bd->sem); 89 up(&bd->sem);
87 90
88 return rc; 91 return rc;
@@ -90,14 +93,26 @@ static ssize_t backlight_store_brightness(struct class_device *cdev, const char
90 93
91static ssize_t backlight_show_max_brightness(struct class_device *cdev, char *buf) 94static ssize_t backlight_show_max_brightness(struct class_device *cdev, char *buf)
92{ 95{
93 int rc; 96 int rc = -ENXIO;
94 struct backlight_device *bd = to_backlight_device(cdev); 97 struct backlight_device *bd = to_backlight_device(cdev);
95 98
96 down(&bd->sem); 99 down(&bd->sem);
97 if (likely(bd->props)) 100 if (likely(bd->props))
98 rc = sprintf(buf, "%d\n", bd->props->max_brightness); 101 rc = sprintf(buf, "%d\n", bd->props->max_brightness);
99 else 102 up(&bd->sem);
100 rc = -ENXIO; 103
104 return rc;
105}
106
107static ssize_t backlight_show_actual_brightness(struct class_device *cdev,
108 char *buf)
109{
110 int rc = -ENXIO;
111 struct backlight_device *bd = to_backlight_device(cdev);
112
113 down(&bd->sem);
114 if (likely(bd->props && bd->props->get_brightness))
115 rc = sprintf(buf, "%d\n", bd->props->get_brightness(bd));
101 up(&bd->sem); 116 up(&bd->sem);
102 117
103 return rc; 118 return rc;
@@ -123,7 +138,10 @@ static struct class backlight_class = {
123 138
124static struct class_device_attribute bl_class_device_attributes[] = { 139static struct class_device_attribute bl_class_device_attributes[] = {
125 DECLARE_ATTR(power, 0644, backlight_show_power, backlight_store_power), 140 DECLARE_ATTR(power, 0644, backlight_show_power, backlight_store_power),
126 DECLARE_ATTR(brightness, 0644, backlight_show_brightness, backlight_store_brightness), 141 DECLARE_ATTR(brightness, 0644, backlight_show_brightness,
142 backlight_store_brightness),
143 DECLARE_ATTR(actual_brightness, 0444, backlight_show_actual_brightness,
144 NULL),
127 DECLARE_ATTR(max_brightness, 0444, backlight_show_max_brightness, NULL), 145 DECLARE_ATTR(max_brightness, 0444, backlight_show_max_brightness, NULL),
128}; 146};
129 147
@@ -144,8 +162,12 @@ static int fb_notifier_callback(struct notifier_block *self,
144 bd = container_of(self, struct backlight_device, fb_notif); 162 bd = container_of(self, struct backlight_device, fb_notif);
145 down(&bd->sem); 163 down(&bd->sem);
146 if (bd->props) 164 if (bd->props)
147 if (!bd->props->check_fb || bd->props->check_fb(evdata->info)) 165 if (!bd->props->check_fb ||
148 bd->props->set_power(bd, *(int *)evdata->data); 166 bd->props->check_fb(evdata->info)) {
167 bd->props->fb_blank = *(int *)evdata->data;
168 if (likely(bd->props && bd->props->update_status))
169 bd->props->update_status(bd);
170 }
149 up(&bd->sem); 171 up(&bd->sem);
150 return 0; 172 return 0;
151} 173}
@@ -231,6 +253,12 @@ void backlight_device_unregister(struct backlight_device *bd)
231 &bl_class_device_attributes[i]); 253 &bl_class_device_attributes[i]);
232 254
233 down(&bd->sem); 255 down(&bd->sem);
256 if (likely(bd->props && bd->props->update_status)) {
257 bd->props->brightness = 0;
258 bd->props->power = 0;
259 bd->props->update_status(bd);
260 }
261
234 bd->props = NULL; 262 bd->props = NULL;
235 up(&bd->sem); 263 up(&bd->sem);
236 264
diff --git a/drivers/video/backlight/corgi_bl.c b/drivers/video/backlight/corgi_bl.c
index d0aaf450e8..2ebbfd9514 100644
--- a/drivers/video/backlight/corgi_bl.c
+++ b/drivers/video/backlight/corgi_bl.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Backlight Driver for Sharp Corgi 2 * Backlight Driver for Sharp Zaurus Handhelds (various models)
3 * 3 *
4 * Copyright (c) 2004-2005 Richard Purdie 4 * Copyright (c) 2004-2006 Richard Purdie
5 * 5 *
6 * Based on Sharp's 2.4 Backlight Driver 6 * Based on Sharp's 2.4 Backlight Driver
7 * 7 *
@@ -15,80 +15,63 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/spinlock.h> 18#include <linux/mutex.h>
19#include <linux/fb.h> 19#include <linux/fb.h>
20#include <linux/backlight.h> 20#include <linux/backlight.h>
21
22#include <asm/arch/sharpsl.h> 21#include <asm/arch/sharpsl.h>
23#include <asm/hardware/sharpsl_pm.h> 22#include <asm/hardware/sharpsl_pm.h>
24 23
25#define CORGI_DEFAULT_INTENSITY 0x1f 24static int corgibl_intensity;
26#define CORGI_LIMIT_MASK 0x0b 25static DEFINE_MUTEX(bl_mutex);
27
28static int corgibl_powermode = FB_BLANK_UNBLANK;
29static int current_intensity = 0;
30static int corgibl_limit = 0;
31static void (*corgibl_mach_set_intensity)(int intensity);
32static spinlock_t bl_lock = SPIN_LOCK_UNLOCKED;
33static struct backlight_properties corgibl_data; 26static struct backlight_properties corgibl_data;
27static struct backlight_device *corgi_backlight_device;
28static struct corgibl_machinfo *bl_machinfo;
34 29
35static void corgibl_send_intensity(int intensity) 30static unsigned long corgibl_flags;
31#define CORGIBL_SUSPENDED 0x01
32#define CORGIBL_BATTLOW 0x02
33
34static int corgibl_send_intensity(struct backlight_device *bd)
36{ 35{
37 unsigned long flags;
38 void (*corgi_kick_batt)(void); 36 void (*corgi_kick_batt)(void);
37 int intensity = bd->props->brightness;
39 38
40 if (corgibl_powermode != FB_BLANK_UNBLANK) { 39 if (bd->props->power != FB_BLANK_UNBLANK)
41 intensity = 0; 40 intensity = 0;
42 } else { 41 if (bd->props->fb_blank != FB_BLANK_UNBLANK)
43 if (corgibl_limit) 42 intensity = 0;
44 intensity &= CORGI_LIMIT_MASK; 43 if (corgibl_flags & CORGIBL_SUSPENDED)
45 } 44 intensity = 0;
46 45 if (corgibl_flags & CORGIBL_BATTLOW)
47 spin_lock_irqsave(&bl_lock, flags); 46 intensity &= bl_machinfo->limit_mask;
48 47
49 corgibl_mach_set_intensity(intensity); 48 mutex_lock(&bl_mutex);
49 bl_machinfo->set_bl_intensity(intensity);
50 mutex_unlock(&bl_mutex);
50 51
51 spin_unlock_irqrestore(&bl_lock, flags); 52 corgibl_intensity = intensity;
52 53
53 corgi_kick_batt = symbol_get(sharpsl_battery_kick); 54 corgi_kick_batt = symbol_get(sharpsl_battery_kick);
54 if (corgi_kick_batt) { 55 if (corgi_kick_batt) {
55 corgi_kick_batt(); 56 corgi_kick_batt();
56 symbol_put(sharpsl_battery_kick); 57 symbol_put(sharpsl_battery_kick);
57 } 58 }
58}
59 59
60static void corgibl_blank(int blank) 60 return 0;
61{
62 switch(blank) {
63
64 case FB_BLANK_NORMAL:
65 case FB_BLANK_VSYNC_SUSPEND:
66 case FB_BLANK_HSYNC_SUSPEND:
67 case FB_BLANK_POWERDOWN:
68 if (corgibl_powermode == FB_BLANK_UNBLANK) {
69 corgibl_send_intensity(0);
70 corgibl_powermode = blank;
71 }
72 break;
73 case FB_BLANK_UNBLANK:
74 if (corgibl_powermode != FB_BLANK_UNBLANK) {
75 corgibl_powermode = blank;
76 corgibl_send_intensity(current_intensity);
77 }
78 break;
79 }
80} 61}
81 62
82#ifdef CONFIG_PM 63#ifdef CONFIG_PM
83static int corgibl_suspend(struct platform_device *dev, pm_message_t state) 64static int corgibl_suspend(struct platform_device *dev, pm_message_t state)
84{ 65{
85 corgibl_blank(FB_BLANK_POWERDOWN); 66 corgibl_flags |= CORGIBL_SUSPENDED;
67 corgibl_send_intensity(corgi_backlight_device);
86 return 0; 68 return 0;
87} 69}
88 70
89static int corgibl_resume(struct platform_device *dev) 71static int corgibl_resume(struct platform_device *dev)
90{ 72{
91 corgibl_blank(FB_BLANK_UNBLANK); 73 corgibl_flags &= ~CORGIBL_SUSPENDED;
74 corgibl_send_intensity(corgi_backlight_device);
92 return 0; 75 return 0;
93} 76}
94#else 77#else
@@ -96,68 +79,55 @@ static int corgibl_resume(struct platform_device *dev)
96#define corgibl_resume NULL 79#define corgibl_resume NULL
97#endif 80#endif
98 81
99 82static int corgibl_get_intensity(struct backlight_device *bd)
100static int corgibl_set_power(struct backlight_device *bd, int state)
101{
102 corgibl_blank(state);
103 return 0;
104}
105
106static int corgibl_get_power(struct backlight_device *bd)
107{ 83{
108 return corgibl_powermode; 84 return corgibl_intensity;
109} 85}
110 86
111static int corgibl_set_intensity(struct backlight_device *bd, int intensity) 87static int corgibl_set_intensity(struct backlight_device *bd)
112{ 88{
113 if (intensity > corgibl_data.max_brightness) 89 corgibl_send_intensity(corgi_backlight_device);
114 intensity = corgibl_data.max_brightness;
115 corgibl_send_intensity(intensity);
116 current_intensity=intensity;
117 return 0; 90 return 0;
118} 91}
119 92
120static int corgibl_get_intensity(struct backlight_device *bd)
121{
122 return current_intensity;
123}
124
125/* 93/*
126 * Called when the battery is low to limit the backlight intensity. 94 * Called when the battery is low to limit the backlight intensity.
127 * If limit==0 clear any limit, otherwise limit the intensity 95 * If limit==0 clear any limit, otherwise limit the intensity
128 */ 96 */
129void corgibl_limit_intensity(int limit) 97void corgibl_limit_intensity(int limit)
130{ 98{
131 corgibl_limit = (limit ? 1 : 0); 99 if (limit)
132 corgibl_send_intensity(current_intensity); 100 corgibl_flags |= CORGIBL_BATTLOW;
101 else
102 corgibl_flags &= ~CORGIBL_BATTLOW;
103 corgibl_send_intensity(corgi_backlight_device);
133} 104}
134EXPORT_SYMBOL(corgibl_limit_intensity); 105EXPORT_SYMBOL(corgibl_limit_intensity);
135 106
136 107
137static struct backlight_properties corgibl_data = { 108static struct backlight_properties corgibl_data = {
138 .owner = THIS_MODULE, 109 .owner = THIS_MODULE,
139 .get_power = corgibl_get_power,
140 .set_power = corgibl_set_power,
141 .get_brightness = corgibl_get_intensity, 110 .get_brightness = corgibl_get_intensity,
142 .set_brightness = corgibl_set_intensity, 111 .update_status = corgibl_set_intensity,
143}; 112};
144 113
145static struct backlight_device *corgi_backlight_device;
146
147static int __init corgibl_probe(struct platform_device *pdev) 114static int __init corgibl_probe(struct platform_device *pdev)
148{ 115{
149 struct corgibl_machinfo *machinfo = pdev->dev.platform_data; 116 struct corgibl_machinfo *machinfo = pdev->dev.platform_data;
150 117
118 bl_machinfo = machinfo;
151 corgibl_data.max_brightness = machinfo->max_intensity; 119 corgibl_data.max_brightness = machinfo->max_intensity;
152 corgibl_mach_set_intensity = machinfo->set_bl_intensity; 120 if (!machinfo->limit_mask)
121 machinfo->limit_mask = -1;
153 122
154 corgi_backlight_device = backlight_device_register ("corgi-bl", 123 corgi_backlight_device = backlight_device_register ("corgi-bl",
155 NULL, &corgibl_data); 124 NULL, &corgibl_data);
156 if (IS_ERR (corgi_backlight_device)) 125 if (IS_ERR (corgi_backlight_device))
157 return PTR_ERR (corgi_backlight_device); 126 return PTR_ERR (corgi_backlight_device);
158 127
159 corgibl_set_intensity(NULL, CORGI_DEFAULT_INTENSITY); 128 corgibl_data.power = FB_BLANK_UNBLANK;
160 corgibl_limit_intensity(0); 129 corgibl_data.brightness = machinfo->default_intensity;
130 corgibl_send_intensity(corgi_backlight_device);
161 131
162 printk("Corgi Backlight Driver Initialized.\n"); 132 printk("Corgi Backlight Driver Initialized.\n");
163 return 0; 133 return 0;
@@ -167,8 +137,6 @@ static int corgibl_remove(struct platform_device *dev)
167{ 137{
168 backlight_device_unregister(corgi_backlight_device); 138 backlight_device_unregister(corgi_backlight_device);
169 139
170 corgibl_set_intensity(NULL, 0);
171
172 printk("Corgi Backlight Driver Unloaded\n"); 140 printk("Corgi Backlight Driver Unloaded\n");
173 return 0; 141 return 0;
174} 142}
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c
index 95da4c9ed1..a71e984c93 100644
--- a/drivers/video/backlight/hp680_bl.c
+++ b/drivers/video/backlight/hp680_bl.c
@@ -13,7 +13,7 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/device.h> 16#include <linux/platform_device.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/fb.h> 18#include <linux/fb.h>
19#include <linux/backlight.h> 19#include <linux/backlight.h>
@@ -25,66 +25,58 @@
25#define HP680_MAX_INTENSITY 255 25#define HP680_MAX_INTENSITY 255
26#define HP680_DEFAULT_INTENSITY 10 26#define HP680_DEFAULT_INTENSITY 10
27 27
28static int hp680bl_powermode = FB_BLANK_UNBLANK; 28static int hp680bl_suspended;
29static int current_intensity = 0; 29static int current_intensity = 0;
30static spinlock_t bl_lock = SPIN_LOCK_UNLOCKED; 30static spinlock_t bl_lock = SPIN_LOCK_UNLOCKED;
31static struct backlight_device *hp680_backlight_device;
31 32
32static void hp680bl_send_intensity(int intensity) 33static void hp680bl_send_intensity(struct backlight_device *bd)
33{ 34{
34 unsigned long flags; 35 unsigned long flags;
36 u16 v;
37 int intensity = bd->props->brightness;
35 38
36 if (hp680bl_powermode != FB_BLANK_UNBLANK) 39 if (bd->props->power != FB_BLANK_UNBLANK)
40 intensity = 0;
41 if (bd->props->fb_blank != FB_BLANK_UNBLANK)
42 intensity = 0;
43 if (hp680bl_suspended)
37 intensity = 0; 44 intensity = 0;
38 45
39 spin_lock_irqsave(&bl_lock, flags); 46 spin_lock_irqsave(&bl_lock, flags);
40 sh_dac_output(255-(u8)intensity, DAC_LCD_BRIGHTNESS); 47 if (intensity && current_intensity == 0) {
48 sh_dac_enable(DAC_LCD_BRIGHTNESS);
49 v = inw(HD64461_GPBDR);
50 v &= ~HD64461_GPBDR_LCDOFF;
51 outw(v, HD64461_GPBDR);
52 sh_dac_output(255-(u8)intensity, DAC_LCD_BRIGHTNESS);
53 } else if (intensity == 0 && current_intensity != 0) {
54 sh_dac_output(255-(u8)intensity, DAC_LCD_BRIGHTNESS);
55 sh_dac_disable(DAC_LCD_BRIGHTNESS);
56 v = inw(HD64461_GPBDR);
57 v |= HD64461_GPBDR_LCDOFF;
58 outw(v, HD64461_GPBDR);
59 } else if (intensity) {
60 sh_dac_output(255-(u8)intensity, DAC_LCD_BRIGHTNESS);
61 }
41 spin_unlock_irqrestore(&bl_lock, flags); 62 spin_unlock_irqrestore(&bl_lock, flags);
42}
43 63
44static void hp680bl_blank(int blank) 64 current_intensity = intensity;
45{
46 u16 v;
47
48 switch(blank) {
49
50 case FB_BLANK_NORMAL:
51 case FB_BLANK_VSYNC_SUSPEND:
52 case FB_BLANK_HSYNC_SUSPEND:
53 case FB_BLANK_POWERDOWN:
54 if (hp680bl_powermode == FB_BLANK_UNBLANK) {
55 hp680bl_send_intensity(0);
56 hp680bl_powermode = blank;
57 sh_dac_disable(DAC_LCD_BRIGHTNESS);
58 v = inw(HD64461_GPBDR);
59 v |= HD64461_GPBDR_LCDOFF;
60 outw(v, HD64461_GPBDR);
61 }
62 break;
63 case FB_BLANK_UNBLANK:
64 if (hp680bl_powermode != FB_BLANK_UNBLANK) {
65 sh_dac_enable(DAC_LCD_BRIGHTNESS);
66 v = inw(HD64461_GPBDR);
67 v &= ~HD64461_GPBDR_LCDOFF;
68 outw(v, HD64461_GPBDR);
69 hp680bl_powermode = blank;
70 hp680bl_send_intensity(current_intensity);
71 }
72 break;
73 }
74} 65}
75 66
67
76#ifdef CONFIG_PM 68#ifdef CONFIG_PM
77static int hp680bl_suspend(struct device *dev, pm_message_t state, u32 level) 69static int hp680bl_suspend(struct platform_device *dev, pm_message_t state)
78{ 70{
79 if (level == SUSPEND_POWER_DOWN) 71 hp680bl_suspended = 1;
80 hp680bl_blank(FB_BLANK_POWERDOWN); 72 hp680bl_send_intensity(hp680_backlight_device);
81 return 0; 73 return 0;
82} 74}
83 75
84static int hp680bl_resume(struct device *dev, u32 level) 76static int hp680bl_resume(struct platform_device *dev)
85{ 77{
86 if (level == RESUME_POWER_ON) 78 hp680bl_suspended = 0;
87 hp680bl_blank(FB_BLANK_UNBLANK); 79 hp680bl_send_intensity(hp680_backlight_device);
88 return 0; 80 return 0;
89} 81}
90#else 82#else
@@ -92,24 +84,9 @@ static int hp680bl_resume(struct device *dev, u32 level)
92#define hp680bl_resume NULL 84#define hp680bl_resume NULL
93#endif 85#endif
94 86
95 87static int hp680bl_set_intensity(struct backlight_device *bd)
96static int hp680bl_set_power(struct backlight_device *bd, int state)
97{ 88{
98 hp680bl_blank(state); 89 hp680bl_send_intensity(bd);
99 return 0;
100}
101
102static int hp680bl_get_power(struct backlight_device *bd)
103{
104 return hp680bl_powermode;
105}
106
107static int hp680bl_set_intensity(struct backlight_device *bd, int intensity)
108{
109 if (intensity > HP680_MAX_INTENSITY)
110 intensity = HP680_MAX_INTENSITY;
111 hp680bl_send_intensity(intensity);
112 current_intensity = intensity;
113 return 0; 90 return 0;
114} 91}
115 92
@@ -120,65 +97,67 @@ static int hp680bl_get_intensity(struct backlight_device *bd)
120 97
121static struct backlight_properties hp680bl_data = { 98static struct backlight_properties hp680bl_data = {
122 .owner = THIS_MODULE, 99 .owner = THIS_MODULE,
123 .get_power = hp680bl_get_power,
124 .set_power = hp680bl_set_power,
125 .max_brightness = HP680_MAX_INTENSITY, 100 .max_brightness = HP680_MAX_INTENSITY,
126 .get_brightness = hp680bl_get_intensity, 101 .get_brightness = hp680bl_get_intensity,
127 .set_brightness = hp680bl_set_intensity, 102 .update_status = hp680bl_set_intensity,
128}; 103};
129 104
130static struct backlight_device *hp680_backlight_device; 105static int __init hp680bl_probe(struct platform_device *dev)
131
132static int __init hp680bl_probe(struct device *dev)
133{ 106{
134 hp680_backlight_device = backlight_device_register ("hp680-bl", 107 hp680_backlight_device = backlight_device_register ("hp680-bl",
135 NULL, &hp680bl_data); 108 NULL, &hp680bl_data);
136 if (IS_ERR (hp680_backlight_device)) 109 if (IS_ERR (hp680_backlight_device))
137 return PTR_ERR (hp680_backlight_device); 110 return PTR_ERR (hp680_backlight_device);
138 111
139 hp680bl_set_intensity(NULL, HP680_DEFAULT_INTENSITY); 112 hp680_backlight_device->props->brightness = HP680_DEFAULT_INTENSITY;
113 hp680bl_send_intensity(hp680_backlight_device);
140 114
141 return 0; 115 return 0;
142} 116}
143 117
144static int hp680bl_remove(struct device *dev) 118static int hp680bl_remove(struct platform_device *dev)
145{ 119{
146 backlight_device_unregister(hp680_backlight_device); 120 backlight_device_unregister(hp680_backlight_device);
147 121
148 return 0; 122 return 0;
149} 123}
150 124
151static struct device_driver hp680bl_driver = { 125static struct platform_driver hp680bl_driver = {
152 .name = "hp680-bl",
153 .bus = &platform_bus_type,
154 .probe = hp680bl_probe, 126 .probe = hp680bl_probe,
155 .remove = hp680bl_remove, 127 .remove = hp680bl_remove,
156 .suspend = hp680bl_suspend, 128 .suspend = hp680bl_suspend,
157 .resume = hp680bl_resume, 129 .resume = hp680bl_resume,
130 .driver = {
131 .name = "hp680-bl",
132 },
158}; 133};
159 134
160static struct platform_device hp680bl_device = { 135static struct platform_device *hp680bl_device;
161 .name = "hp680-bl",
162 .id = -1,
163};
164 136
165static int __init hp680bl_init(void) 137static int __init hp680bl_init(void)
166{ 138{
167 int ret; 139 int ret;
168 140
169 ret=driver_register(&hp680bl_driver); 141 ret = platform_driver_register(&hp680bl_driver);
170 if (!ret) { 142 if (!ret) {
171 ret = platform_device_register(&hp680bl_device); 143 hp680bl_device = platform_device_alloc("hp680-bl", -1);
172 if (ret) 144 if (!hp680bl_device)
173 driver_unregister(&hp680bl_driver); 145 return -ENOMEM;
146
147 ret = platform_device_add(hp680bl_device);
148
149 if (ret) {
150 platform_device_put(hp680bl_device);
151 platform_driver_unregister(&hp680bl_driver);
152 }
174 } 153 }
175 return ret; 154 return ret;
176} 155}
177 156
178static void __exit hp680bl_exit(void) 157static void __exit hp680bl_exit(void)
179{ 158{
180 platform_device_unregister(&hp680bl_device); 159 platform_device_unregister(hp680bl_device);
181 driver_unregister(&hp680bl_driver); 160 platform_driver_unregister(&hp680bl_driver);
182} 161}
183 162
184module_init(hp680bl_init); 163module_init(hp680bl_init);
diff --git a/drivers/video/cfbimgblt.c b/drivers/video/cfbimgblt.c
index 910e2338a2..8ba6152db2 100644
--- a/drivers/video/cfbimgblt.c
+++ b/drivers/video/cfbimgblt.c
@@ -169,7 +169,7 @@ static inline void slow_imageblit(const struct fb_image *image, struct fb_info *
169 169
170 while (j--) { 170 while (j--) {
171 l--; 171 l--;
172 color = (*s & 1 << (FB_BIT_NR(l))) ? fgcolor : bgcolor; 172 color = (*s & (1 << l)) ? fgcolor : bgcolor;
173 val |= FB_SHIFT_HIGH(color, shift); 173 val |= FB_SHIFT_HIGH(color, shift);
174 174
175 /* Did the bitshift spill bits to the next long? */ 175 /* Did the bitshift spill bits to the next long? */
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 041d069878..ca020719d2 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -466,7 +466,7 @@ static int __init fb_console_setup(char *this_opt)
466 int i, j; 466 int i, j;
467 467
468 if (!this_opt || !*this_opt) 468 if (!this_opt || !*this_opt)
469 return 0; 469 return 1;
470 470
471 while ((options = strsep(&this_opt, ",")) != NULL) { 471 while ((options = strsep(&this_opt, ",")) != NULL) {
472 if (!strncmp(options, "font:", 5)) 472 if (!strncmp(options, "font:", 5))
@@ -481,10 +481,10 @@ static int __init fb_console_setup(char *this_opt)
481 options++; 481 options++;
482 } 482 }
483 if (*options != ',') 483 if (*options != ',')
484 return 0; 484 return 1;
485 options++; 485 options++;
486 } else 486 } else
487 return 0; 487 return 1;
488 } 488 }
489 489
490 if (!strncmp(options, "map:", 4)) { 490 if (!strncmp(options, "map:", 4)) {
@@ -496,7 +496,7 @@ static int __init fb_console_setup(char *this_opt)
496 con2fb_map_boot[i] = 496 con2fb_map_boot[i] =
497 (options[j++]-'0') % FB_MAX; 497 (options[j++]-'0') % FB_MAX;
498 } 498 }
499 return 0; 499 return 1;
500 } 500 }
501 501
502 if (!strncmp(options, "vc:", 3)) { 502 if (!strncmp(options, "vc:", 3)) {
@@ -518,7 +518,7 @@ static int __init fb_console_setup(char *this_opt)
518 rotate = 0; 518 rotate = 0;
519 } 519 }
520 } 520 }
521 return 0; 521 return 1;
522} 522}
523 523
524__setup("fbcon=", fb_console_setup); 524__setup("fbcon=", fb_console_setup);
@@ -1142,6 +1142,7 @@ static void fbcon_init(struct vc_data *vc, int init)
1142 set_blitting_type(vc, info); 1142 set_blitting_type(vc, info);
1143 } 1143 }
1144 1144
1145 ops->p = &fb_display[fg_console];
1145} 1146}
1146 1147
1147static void fbcon_deinit(struct vc_data *vc) 1148static void fbcon_deinit(struct vc_data *vc)
diff --git a/drivers/video/console/sticore.c b/drivers/video/console/sticore.c
index 0339f5640a..74ac2acaf7 100644
--- a/drivers/video/console/sticore.c
+++ b/drivers/video/console/sticore.c
@@ -275,7 +275,7 @@ static int __init sti_setup(char *str)
275 if (str) 275 if (str)
276 strlcpy (default_sti_path, str, sizeof (default_sti_path)); 276 strlcpy (default_sti_path, str, sizeof (default_sti_path));
277 277
278 return 0; 278 return 1;
279} 279}
280 280
281/* Assuming the machine has multiple STI consoles (=graphic cards) which 281/* Assuming the machine has multiple STI consoles (=graphic cards) which
@@ -321,7 +321,7 @@ static int __init sti_font_setup(char *str)
321 i++; 321 i++;
322 } 322 }
323 323
324 return 0; 324 return 1;
325} 325}
326 326
327/* The optional linux kernel parameter "sti_font" defines which font 327/* The optional linux kernel parameter "sti_font" defines which font
@@ -373,7 +373,7 @@ sti_dump_globcfg(struct sti_glob_cfg *glob_cfg, unsigned int sti_mem_request)
373 glob_cfg->save_addr)); 373 glob_cfg->save_addr));
374 374
375 /* dump extended cfg */ 375 /* dump extended cfg */
376 cfg = PTR_STI(glob_cfg->ext_ptr); 376 cfg = PTR_STI((unsigned long)glob_cfg->ext_ptr);
377 DPRINTK(( KERN_INFO 377 DPRINTK(( KERN_INFO
378 "monitor %d\n" 378 "monitor %d\n"
379 "in friendly mode: %d\n" 379 "in friendly mode: %d\n"
@@ -453,25 +453,11 @@ sti_init_glob_cfg(struct sti_struct *sti,
453 sti->regions_phys[i] = 453 sti->regions_phys[i] =
454 REGION_OFFSET_TO_PHYS(sti->regions[i], newhpa); 454 REGION_OFFSET_TO_PHYS(sti->regions[i], newhpa);
455 455
456 /* remap virtually */
457 /* FIXME: add BTLB support if btlb==1 */
458 len = sti->regions[i].region_desc.length * 4096; 456 len = sti->regions[i].region_desc.length * 4096;
459
460/* XXX: Enabling IOREMAP debugging causes a crash, so we must be passing
461 * a virtual address to something expecting a physical address that doesn't
462 * go through a readX macro */
463#if 0
464 if (len)
465 glob_cfg->region_ptrs[i] = (unsigned long) (
466 sti->regions[i].region_desc.cache ?
467 ioremap(sti->regions_phys[i], len) :
468 ioremap_nocache(sti->regions_phys[i], len) );
469#else
470 if (len) 457 if (len)
471 glob_cfg->region_ptrs[i] = sti->regions_phys[i]; 458 glob_cfg->region_ptrs[i] = sti->regions_phys[i];
472#endif
473 459
474 DPRINTK(("region #%d: phys %08lx, virt %08x, len=%lukB, " 460 DPRINTK(("region #%d: phys %08lx, region_ptr %08x, len=%lukB, "
475 "btlb=%d, sysonly=%d, cache=%d, last=%d\n", 461 "btlb=%d, sysonly=%d, cache=%d, last=%d\n",
476 i, sti->regions_phys[i], glob_cfg->region_ptrs[i], 462 i, sti->regions_phys[i], glob_cfg->region_ptrs[i],
477 len/1024, 463 len/1024,
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index b1a8dca764..944855b3e4 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -1588,7 +1588,7 @@ static int __init video_setup(char *options)
1588 } 1588 }
1589 } 1589 }
1590 1590
1591 return 0; 1591 return 1;
1592} 1592}
1593__setup("video=", video_setup); 1593__setup("video=", video_setup);
1594#endif 1594#endif
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 53ad61f103..809fc5eefc 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -232,9 +232,9 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
232 if (var->yres < MIN_YRES) 232 if (var->yres < MIN_YRES)
233 var->yres = MIN_YRES; 233 var->yres = MIN_YRES;
234 if (var->xres > fbi->max_xres) 234 if (var->xres > fbi->max_xres)
235 var->xres = fbi->max_xres; 235 return -EINVAL;
236 if (var->yres > fbi->max_yres) 236 if (var->yres > fbi->max_yres)
237 var->yres = fbi->max_yres; 237 return -EINVAL;
238 var->xres_virtual = 238 var->xres_virtual =
239 max(var->xres_virtual, var->xres); 239 max(var->xres_virtual, var->xres);
240 var->yres_virtual = 240 var->yres_virtual =
@@ -781,7 +781,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi)
781 LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */ 781 LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
782 LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */ 782 LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
783 783
784 schedule_timeout(20 * HZ / 1000); 784 schedule_timeout(200 * HZ / 1000);
785 remove_wait_queue(&fbi->ctrlr_wait, &wait); 785 remove_wait_queue(&fbi->ctrlr_wait, &wait);
786 786
787 /* disable LCD controller clock */ 787 /* disable LCD controller clock */
@@ -1274,7 +1274,7 @@ int __init pxafb_probe(struct platform_device *dev)
1274 struct pxafb_mach_info *inf; 1274 struct pxafb_mach_info *inf;
1275 int ret; 1275 int ret;
1276 1276
1277 dev_dbg(dev, "pxafb_probe\n"); 1277 dev_dbg(&dev->dev, "pxafb_probe\n");
1278 1278
1279 inf = dev->dev.platform_data; 1279 inf = dev->dev.platform_data;
1280 ret = -ENOMEM; 1280 ret = -ENOMEM;
diff --git a/drivers/video/radeonfb.c b/drivers/video/radeonfb.c
deleted file mode 100644
index afb6c2ead5..0000000000
--- a/drivers/video/radeonfb.c
+++ /dev/null
@@ -1,3167 +0,0 @@
1/*
2 * drivers/video/radeonfb.c
3 * framebuffer driver for ATI Radeon chipset video boards
4 *
5 * Copyright 2000 Ani Joshi <ajoshi@kernel.crashing.org>
6 *
7 *
8 * ChangeLog:
9 * 2000-08-03 initial version 0.0.1
10 * 2000-09-10 more bug fixes, public release 0.0.5
11 * 2001-02-19 mode bug fixes, 0.0.7
12 * 2001-07-05 fixed scrolling issues, engine initialization,
13 * and minor mode tweaking, 0.0.9
14 * 2001-09-07 Radeon VE support, Nick Kurshev
15 * blanking, pan_display, and cmap fixes, 0.1.0
16 * 2001-10-10 Radeon 7500 and 8500 support, and experimental
17 * flat panel support, 0.1.1
18 * 2001-11-17 Radeon M6 (ppc) support, Daniel Berlin, 0.1.2
19 * 2001-11-18 DFP fixes, Kevin Hendricks, 0.1.3
20 * 2001-11-29 more cmap, backlight fixes, Benjamin Herrenschmidt
21 * 2002-01-18 DFP panel detection via BIOS, Michael Clark, 0.1.4
22 * 2002-06-02 console switching, mode set fixes, accel fixes
23 * 2002-06-03 MTRR support, Peter Horton, 0.1.5
24 * 2002-09-21 rv250, r300, m9 initial support,
25 * added mirror option, 0.1.6
26 *
27 * Special thanks to ATI DevRel team for their hardware donations.
28 *
29 */
30
31
32#define RADEON_VERSION "0.1.6"
33
34
35#include <linux/config.h>
36#include <linux/module.h>
37#include <linux/kernel.h>
38#include <linux/errno.h>
39#include <linux/string.h>
40#include <linux/mm.h>
41#include <linux/tty.h>
42#include <linux/slab.h>
43#include <linux/delay.h>
44#include <linux/fb.h>
45#include <linux/ioport.h>
46#include <linux/init.h>
47#include <linux/pci.h>
48#include <linux/vmalloc.h>
49
50#include <asm/io.h>
51#include <asm/uaccess.h>
52#if defined(__powerpc__)
53#include <asm/prom.h>
54#include <asm/pci-bridge.h>
55#include "macmodes.h"
56
57#ifdef CONFIG_NVRAM
58#include <linux/nvram.h>
59#endif
60
61#ifdef CONFIG_PMAC_BACKLIGHT
62#include <asm/backlight.h>
63#endif
64
65#ifdef CONFIG_BOOTX_TEXT
66#include <asm/btext.h>
67#endif
68
69#ifdef CONFIG_ADB_PMU
70#include <linux/adb.h>
71#include <linux/pmu.h>
72#endif
73
74#endif /* __powerpc__ */
75
76#ifdef CONFIG_MTRR
77#include <asm/mtrr.h>
78#endif
79
80#include <video/radeon.h>
81#include <linux/radeonfb.h>
82
83#define DEBUG 0
84
85#if DEBUG
86#define RTRACE printk
87#else
88#define RTRACE if(0) printk
89#endif
90
91// XXX
92#undef CONFIG_PMAC_PBOOK
93
94
95enum radeon_chips {
96 RADEON_QD,
97 RADEON_QE,
98 RADEON_QF,
99 RADEON_QG,
100 RADEON_QY,
101 RADEON_QZ,
102 RADEON_LW,
103 RADEON_LX,
104 RADEON_LY,
105 RADEON_LZ,
106 RADEON_QL,
107 RADEON_QN,
108 RADEON_QO,
109 RADEON_Ql,
110 RADEON_BB,
111 RADEON_QW,
112 RADEON_QX,
113 RADEON_Id,
114 RADEON_Ie,
115 RADEON_If,
116 RADEON_Ig,
117 RADEON_Ya,
118 RADEON_Yd,
119 RADEON_Ld,
120 RADEON_Le,
121 RADEON_Lf,
122 RADEON_Lg,
123 RADEON_ND,
124 RADEON_NE,
125 RADEON_NF,
126 RADEON_NG,
127 RADEON_QM
128};
129
130enum radeon_arch {
131 RADEON_R100,
132 RADEON_RV100,
133 RADEON_R200,
134 RADEON_RV200,
135 RADEON_RV250,
136 RADEON_R300,
137 RADEON_M6,
138 RADEON_M7,
139 RADEON_M9
140};
141
142static struct radeon_chip_info {
143 const char *name;
144 unsigned char arch;
145} radeon_chip_info[] __devinitdata = {
146 { "QD", RADEON_R100 },
147 { "QE", RADEON_R100 },
148 { "QF", RADEON_R100 },
149 { "QG", RADEON_R100 },
150 { "VE QY", RADEON_RV100 },
151 { "VE QZ", RADEON_RV100 },
152 { "M7 LW", RADEON_M7 },
153 { "M7 LX", RADEON_M7 },
154 { "M6 LY", RADEON_M6 },
155 { "M6 LZ", RADEON_M6 },
156 { "8500 QL", RADEON_R200 },
157 { "8500 QN", RADEON_R200 },
158 { "8500 QO", RADEON_R200 },
159 { "8500 Ql", RADEON_R200 },
160 { "8500 BB", RADEON_R200 },
161 { "7500 QW", RADEON_RV200 },
162 { "7500 QX", RADEON_RV200 },
163 { "9000 Id", RADEON_RV250 },
164 { "9000 Ie", RADEON_RV250 },
165 { "9000 If", RADEON_RV250 },
166 { "9000 Ig", RADEON_RV250 },
167 { "M9 Ld", RADEON_M9 },
168 { "M9 Le", RADEON_M9 },
169 { "M9 Lf", RADEON_M9 },
170 { "M9 Lg", RADEON_M9 },
171 { "9700 ND", RADEON_R300 },
172 { "9700 NE", RADEON_R300 },
173 { "9700 NF", RADEON_R300 },
174 { "9700 NG", RADEON_R300 },
175 { "9100 QM", RADEON_R200 }
176};
177
178
179enum radeon_montype
180{
181 MT_NONE,
182 MT_CRT, /* CRT */
183 MT_LCD, /* LCD */
184 MT_DFP, /* DVI */
185 MT_CTV, /* composite TV */
186 MT_STV /* S-Video out */
187};
188
189
190static struct pci_device_id radeonfb_pci_table[] = {
191 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QD},
192 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QE},
193 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QF},
194 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QG},
195 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QY},
196 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QZ},
197 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LW},
198 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LX},
199 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LY},
200 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LZ},
201 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QL},
202 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QN, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QN},
203 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QO},
204 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ql, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ql},
205 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_BB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_BB},
206 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QW},
207 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QX},
208 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Id},
209 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ie, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ie},
210 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_If, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_If},
211 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ig, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ig},
212 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ya, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ya},
213 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Yd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Yd},
214 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ld, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ld},
215 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Le, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Le},
216 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lf},
217 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lg, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lg},
218 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_ND, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_ND},
219 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NE},
220 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NF},
221 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NG},
222 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QM},
223 { 0, }
224};
225MODULE_DEVICE_TABLE(pci, radeonfb_pci_table);
226
227
228typedef struct {
229 u16 reg;
230 u32 val;
231} reg_val;
232
233
234/* these common regs are cleared before mode setting so they do not
235 * interfere with anything
236 */
237static reg_val common_regs[] = {
238 { OVR_CLR, 0 },
239 { OVR_WID_LEFT_RIGHT, 0 },
240 { OVR_WID_TOP_BOTTOM, 0 },
241 { OV0_SCALE_CNTL, 0 },
242 { SUBPIC_CNTL, 0 },
243 { VIPH_CONTROL, 0 },
244 { I2C_CNTL_1, 0 },
245 { GEN_INT_CNTL, 0 },
246 { CAP0_TRIG_CNTL, 0 },
247};
248
249static reg_val common_regs_m6[] = {
250 { OVR_CLR, 0 },
251 { OVR_WID_LEFT_RIGHT, 0 },
252 { OVR_WID_TOP_BOTTOM, 0 },
253 { OV0_SCALE_CNTL, 0 },
254 { SUBPIC_CNTL, 0 },
255 { GEN_INT_CNTL, 0 },
256 { CAP0_TRIG_CNTL, 0 }
257};
258
259typedef struct {
260 u8 clock_chip_type;
261 u8 struct_size;
262 u8 accelerator_entry;
263 u8 VGA_entry;
264 u16 VGA_table_offset;
265 u16 POST_table_offset;
266 u16 XCLK;
267 u16 MCLK;
268 u8 num_PLL_blocks;
269 u8 size_PLL_blocks;
270 u16 PCLK_ref_freq;
271 u16 PCLK_ref_divider;
272 u32 PCLK_min_freq;
273 u32 PCLK_max_freq;
274 u16 MCLK_ref_freq;
275 u16 MCLK_ref_divider;
276 u32 MCLK_min_freq;
277 u32 MCLK_max_freq;
278 u16 XCLK_ref_freq;
279 u16 XCLK_ref_divider;
280 u32 XCLK_min_freq;
281 u32 XCLK_max_freq;
282} __attribute__ ((packed)) PLL_BLOCK;
283
284
285struct pll_info {
286 int ppll_max;
287 int ppll_min;
288 int xclk;
289 int ref_div;
290 int ref_clk;
291};
292
293
294struct ram_info {
295 int ml;
296 int mb;
297 int trcd;
298 int trp;
299 int twr;
300 int cl;
301 int tr2w;
302 int loop_latency;
303 int rloop;
304};
305
306
307struct radeon_regs {
308 /* CRTC regs */
309 u32 crtc_h_total_disp;
310 u32 crtc_h_sync_strt_wid;
311 u32 crtc_v_total_disp;
312 u32 crtc_v_sync_strt_wid;
313 u32 crtc_pitch;
314 u32 crtc_gen_cntl;
315 u32 crtc_ext_cntl;
316 u32 dac_cntl;
317
318 u32 flags;
319 u32 pix_clock;
320 int xres, yres;
321
322 /* DDA regs */
323 u32 dda_config;
324 u32 dda_on_off;
325
326 /* PLL regs */
327 u32 ppll_div_3;
328 u32 ppll_ref_div;
329 u32 vclk_ecp_cntl;
330
331 /* Flat panel regs */
332 u32 fp_crtc_h_total_disp;
333 u32 fp_crtc_v_total_disp;
334 u32 fp_gen_cntl;
335 u32 fp_h_sync_strt_wid;
336 u32 fp_horz_stretch;
337 u32 fp_panel_cntl;
338 u32 fp_v_sync_strt_wid;
339 u32 fp_vert_stretch;
340 u32 lvds_gen_cntl;
341 u32 lvds_pll_cntl;
342 u32 tmds_crc;
343 u32 tmds_transmitter_cntl;
344
345#if defined(__BIG_ENDIAN)
346 u32 surface_cntl;
347#endif
348};
349
350
351struct radeonfb_info {
352 struct fb_info info;
353
354 struct radeon_regs state;
355 struct radeon_regs init_state;
356
357 char name[32];
358 char ram_type[12];
359
360 unsigned long mmio_base_phys;
361 unsigned long fb_base_phys;
362
363 void __iomem *mmio_base;
364 void __iomem *fb_base;
365
366 struct pci_dev *pdev;
367
368 unsigned char *EDID;
369 unsigned char __iomem *bios_seg;
370
371 u32 pseudo_palette[17];
372 struct { u8 red, green, blue, pad; } palette[256];
373
374 int chipset;
375 unsigned char arch;
376 int video_ram;
377 u8 rev;
378 int pitch, bpp, depth;
379 int xres, yres, pixclock;
380 int xres_virtual, yres_virtual;
381 u32 accel_flags;
382
383 int use_default_var;
384 int got_dfpinfo;
385
386 int hasCRTC2;
387 int crtDisp_type;
388 int dviDisp_type;
389
390 int panel_xres, panel_yres;
391 int clock;
392 int hOver_plus, hSync_width, hblank;
393 int vOver_plus, vSync_width, vblank;
394 int hAct_high, vAct_high, interlaced;
395 int synct, misc;
396
397 u32 dp_gui_master_cntl;
398
399 struct pll_info pll;
400 int pll_output_freq, post_div, fb_div;
401
402 struct ram_info ram;
403
404 int mtrr_hdl;
405
406#ifdef CONFIG_PMAC_PBOOK
407 int pm_reg;
408 u32 save_regs[64];
409 u32 mdll, mdll2;
410#endif /* CONFIG_PMAC_PBOOK */
411 int asleep;
412
413 struct radeonfb_info *next;
414};
415
416
417static struct fb_var_screeninfo radeonfb_default_var = {
418 640, 480, 640, 480, 0, 0, 8, 0,
419 {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
420 0, 0, -1, -1, 0, 39721, 40, 24, 32, 11, 96, 2,
421 0, FB_VMODE_NONINTERLACED
422};
423
424/*
425 * IO macros
426 */
427
428#define INREG8(addr) readb((rinfo->mmio_base)+addr)
429#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
430#define INREG(addr) readl((rinfo->mmio_base)+addr)
431#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
432
433#define OUTPLL(addr,val) \
434 do { \
435 OUTREG8(CLOCK_CNTL_INDEX, (addr & 0x0000003f) | 0x00000080); \
436 OUTREG(CLOCK_CNTL_DATA, val); \
437 } while(0)
438
439#define OUTPLLP(addr,val,mask) \
440 do { \
441 unsigned int _tmp = INPLL(addr); \
442 _tmp &= (mask); \
443 _tmp |= (val); \
444 OUTPLL(addr, _tmp); \
445 } while (0)
446
447#define OUTREGP(addr,val,mask) \
448 do { \
449 unsigned int _tmp = INREG(addr); \
450 _tmp &= (mask); \
451 _tmp |= (val); \
452 OUTREG(addr, _tmp); \
453 } while (0)
454
455
456static __inline__ u32 _INPLL(struct radeonfb_info *rinfo, u32 addr)
457{
458 OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f);
459 return (INREG(CLOCK_CNTL_DATA));
460}
461
462#define INPLL(addr) _INPLL(rinfo, addr)
463
464#define PRIMARY_MONITOR(rinfo) ((rinfo->dviDisp_type != MT_NONE) && \
465 (rinfo->dviDisp_type != MT_STV) && \
466 (rinfo->dviDisp_type != MT_CTV) ? \
467 rinfo->dviDisp_type : rinfo->crtDisp_type)
468
469static char *GET_MON_NAME(int type)
470{
471 char *pret = NULL;
472
473 switch (type) {
474 case MT_NONE:
475 pret = "no";
476 break;
477 case MT_CRT:
478 pret = "CRT";
479 break;
480 case MT_DFP:
481 pret = "DFP";
482 break;
483 case MT_LCD:
484 pret = "LCD";
485 break;
486 case MT_CTV:
487 pret = "CTV";
488 break;
489 case MT_STV:
490 pret = "STV";
491 break;
492 }
493
494 return pret;
495}
496
497
498/*
499 * 2D engine routines
500 */
501
502static __inline__ void radeon_engine_flush (struct radeonfb_info *rinfo)
503{
504 int i;
505
506 /* initiate flush */
507 OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
508 ~RB2D_DC_FLUSH_ALL);
509
510 for (i=0; i < 2000000; i++) {
511 if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
512 break;
513 }
514}
515
516
517static __inline__ void _radeon_fifo_wait (struct radeonfb_info *rinfo, int entries)
518{
519 int i;
520
521 for (i=0; i<2000000; i++)
522 if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
523 return;
524}
525
526
527static __inline__ void _radeon_engine_idle (struct radeonfb_info *rinfo)
528{
529 int i;
530
531 /* ensure FIFO is empty before waiting for idle */
532 _radeon_fifo_wait (rinfo, 64);
533
534 for (i=0; i<2000000; i++) {
535 if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
536 radeon_engine_flush (rinfo);
537 return;
538 }
539 }
540}
541
542
543#define radeon_engine_idle() _radeon_engine_idle(rinfo)
544#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
545
546
547
548/*
549 * helper routines
550 */
551
552static __inline__ u32 radeon_get_dstbpp(u16 depth)
553{
554 switch (depth) {
555 case 8:
556 return DST_8BPP;
557 case 15:
558 return DST_15BPP;
559 case 16:
560 return DST_16BPP;
561 case 32:
562 return DST_32BPP;
563 default:
564 return 0;
565 }
566}
567
568
569static inline int var_to_depth(const struct fb_var_screeninfo *var)
570{
571 if (var->bits_per_pixel != 16)
572 return var->bits_per_pixel;
573 return (var->green.length == 6) ? 16 : 15;
574}
575
576
577static void _radeon_engine_reset(struct radeonfb_info *rinfo)
578{
579 u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
580
581 radeon_engine_flush (rinfo);
582
583 clock_cntl_index = INREG(CLOCK_CNTL_INDEX);
584 mclk_cntl = INPLL(MCLK_CNTL);
585
586 OUTPLL(MCLK_CNTL, (mclk_cntl |
587 FORCEON_MCLKA |
588 FORCEON_MCLKB |
589 FORCEON_YCLKA |
590 FORCEON_YCLKB |
591 FORCEON_MC |
592 FORCEON_AIC));
593 rbbm_soft_reset = INREG(RBBM_SOFT_RESET);
594
595 OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset |
596 SOFT_RESET_CP |
597 SOFT_RESET_HI |
598 SOFT_RESET_SE |
599 SOFT_RESET_RE |
600 SOFT_RESET_PP |
601 SOFT_RESET_E2 |
602 SOFT_RESET_RB);
603 INREG(RBBM_SOFT_RESET);
604 OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset & (u32)
605 ~(SOFT_RESET_CP |
606 SOFT_RESET_HI |
607 SOFT_RESET_SE |
608 SOFT_RESET_RE |
609 SOFT_RESET_PP |
610 SOFT_RESET_E2 |
611 SOFT_RESET_RB));
612 INREG(RBBM_SOFT_RESET);
613
614 OUTPLL(MCLK_CNTL, mclk_cntl);
615 OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index);
616 OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset);
617
618 return;
619}
620
621#define radeon_engine_reset() _radeon_engine_reset(rinfo)
622
623
624static __inline__ int round_div(int num, int den)
625{
626 return (num + (den / 2)) / den;
627}
628
629
630
631static __inline__ int min_bits_req(int val)
632{
633 int bits_req = 0;
634
635 if (val == 0)
636 bits_req = 1;
637
638 while (val) {
639 val >>= 1;
640 bits_req++;
641 }
642
643 return (bits_req);
644}
645
646
647static __inline__ int _max(int val1, int val2)
648{
649 if (val1 >= val2)
650 return val1;
651 else
652 return val2;
653}
654
655
656
657/*
658 * globals
659 */
660
661#ifndef MODULE
662static char *mode_option;
663#endif
664
665static char noaccel = 0;
666static char mirror = 0;
667static int panel_yres = 0;
668static char force_dfp = 0;
669static struct radeonfb_info *board_list = NULL;
670static char nomtrr = 0;
671
672/*
673 * prototypes
674 */
675
676static void radeon_save_state (struct radeonfb_info *rinfo,
677 struct radeon_regs *save);
678static void radeon_engine_init (struct radeonfb_info *rinfo);
679static void radeon_write_mode (struct radeonfb_info *rinfo,
680 struct radeon_regs *mode);
681static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo);
682static int __devinit radeon_init_disp (struct radeonfb_info *rinfo);
683static int radeon_init_disp_var (struct radeonfb_info *rinfo, struct fb_var_screeninfo *var);
684static void __iomem *radeon_find_rom(struct radeonfb_info *rinfo);
685static void radeon_get_pllinfo(struct radeonfb_info *rinfo, void __iomem *bios_seg);
686static void radeon_get_moninfo (struct radeonfb_info *rinfo);
687static int radeon_get_dfpinfo (struct radeonfb_info *rinfo);
688static int radeon_get_dfpinfo_BIOS(struct radeonfb_info *rinfo);
689static void radeon_get_EDID(struct radeonfb_info *rinfo);
690static int radeon_dfp_parse_EDID(struct radeonfb_info *rinfo);
691static void radeon_update_default_var(struct radeonfb_info *rinfo);
692
693#ifdef CONFIG_PPC_OF
694
695static int radeon_read_OF (struct radeonfb_info *rinfo);
696static int radeon_get_EDID_OF(struct radeonfb_info *rinfo);
697extern struct device_node *pci_device_to_OF_node(struct pci_dev *dev);
698
699#ifdef CONFIG_PMAC_PBOOK
700int radeon_sleep_notify(struct pmu_sleep_notifier *self, int when);
701static struct pmu_sleep_notifier radeon_sleep_notifier = {
702 radeon_sleep_notify, SLEEP_LEVEL_VIDEO,
703};
704#endif /* CONFIG_PMAC_PBOOK */
705#ifdef CONFIG_PMAC_BACKLIGHT
706static int radeon_set_backlight_enable(int on, int level, void *data);
707static int radeon_set_backlight_level(int level, void *data);
708static struct backlight_controller radeon_backlight_controller = {
709 radeon_set_backlight_enable,
710 radeon_set_backlight_level
711};
712#endif /* CONFIG_PMAC_BACKLIGHT */
713
714#endif /* CONFIG_PPC_OF */
715
716
717static void __iomem *radeon_find_rom(struct radeonfb_info *rinfo)
718{
719#if defined(__i386__)
720 u32 segstart;
721 char __iomem *rom_base;
722 char __iomem *rom;
723 int stage;
724 int i,j;
725 char aty_rom_sig[] = "761295520";
726 char *radeon_sig[] = {
727 "RG6",
728 "RADEON"
729 };
730
731 for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
732
733 stage = 1;
734
735 rom_base = ioremap(segstart, 0x1000);
736
737 if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
738 stage = 2;
739
740
741 if (stage != 2) {
742 iounmap(rom_base);
743 continue;
744 }
745
746 rom = rom_base;
747
748 for (i = 0; (i < 128 - strlen(aty_rom_sig)) && (stage != 3); i++) {
749 if (aty_rom_sig[0] == *rom)
750 if (strncmp(aty_rom_sig, rom,
751 strlen(aty_rom_sig)) == 0)
752 stage = 3;
753 rom++;
754 }
755 if (stage != 3) {
756 iounmap(rom_base);
757 continue;
758 }
759 rom = rom_base;
760
761 for (i = 0; (i < 512) && (stage != 4); i++) {
762 for (j = 0; j < ARRAY_SIZE(radeon_sig); j++) {
763 if (radeon_sig[j][0] == *rom)
764 if (strncmp(radeon_sig[j], rom,
765 strlen(radeon_sig[j])) == 0) {
766 stage = 4;
767 break;
768 }
769 }
770 rom++;
771 }
772 if (stage != 4) {
773 iounmap(rom_base);
774 continue;
775 }
776
777 return rom_base;
778 }
779#endif
780 return NULL;
781}
782
783
784
785
786static void radeon_get_pllinfo(struct radeonfb_info *rinfo, void __iomem *bios_seg)
787{
788 void __iomem *bios_header;
789 void __iomem *header_ptr;
790 u16 bios_header_offset, pll_info_offset;
791 PLL_BLOCK pll;
792
793 if (bios_seg) {
794 bios_header = bios_seg + 0x48L;
795 header_ptr = bios_header;
796
797 bios_header_offset = readw(header_ptr);
798 bios_header = bios_seg + bios_header_offset;
799 bios_header += 0x30;
800
801 header_ptr = bios_header;
802 pll_info_offset = readw(header_ptr);
803 header_ptr = bios_seg + pll_info_offset;
804
805 memcpy_fromio(&pll, header_ptr, 50);
806
807 rinfo->pll.xclk = (u32)pll.XCLK;
808 rinfo->pll.ref_clk = (u32)pll.PCLK_ref_freq;
809 rinfo->pll.ref_div = (u32)pll.PCLK_ref_divider;
810 rinfo->pll.ppll_min = pll.PCLK_min_freq;
811 rinfo->pll.ppll_max = pll.PCLK_max_freq;
812
813 printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d from BIOS\n",
814 rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk);
815 } else {
816#ifdef CONFIG_PPC_OF
817 if (radeon_read_OF(rinfo)) {
818 unsigned int tmp, Nx, M, ref_div, xclk;
819
820 tmp = INPLL(M_SPLL_REF_FB_DIV);
821 ref_div = INPLL(PPLL_REF_DIV) & 0x3ff;
822
823 Nx = (tmp & 0xff00) >> 8;
824 M = (tmp & 0xff);
825 xclk = ((((2 * Nx * rinfo->pll.ref_clk) + (M)) /
826 (2 * M)));
827
828 rinfo->pll.xclk = xclk;
829 rinfo->pll.ref_div = ref_div;
830 rinfo->pll.ppll_min = 12000;
831 rinfo->pll.ppll_max = 35000;
832
833 printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d from OF\n",
834 rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk);
835
836 return;
837 }
838#endif
839 /* no BIOS or BIOS not found, use defaults */
840 switch (rinfo->chipset) {
841 case PCI_DEVICE_ID_ATI_RADEON_QW:
842 case PCI_DEVICE_ID_ATI_RADEON_QX:
843 rinfo->pll.ppll_max = 35000;
844 rinfo->pll.ppll_min = 12000;
845 rinfo->pll.xclk = 23000;
846 rinfo->pll.ref_div = 12;
847 rinfo->pll.ref_clk = 2700;
848 break;
849 case PCI_DEVICE_ID_ATI_RADEON_QL:
850 case PCI_DEVICE_ID_ATI_RADEON_QN:
851 case PCI_DEVICE_ID_ATI_RADEON_QO:
852 case PCI_DEVICE_ID_ATI_RADEON_Ql:
853 case PCI_DEVICE_ID_ATI_RADEON_BB:
854 rinfo->pll.ppll_max = 35000;
855 rinfo->pll.ppll_min = 12000;
856 rinfo->pll.xclk = 27500;
857 rinfo->pll.ref_div = 12;
858 rinfo->pll.ref_clk = 2700;
859 break;
860 case PCI_DEVICE_ID_ATI_RADEON_Id:
861 case PCI_DEVICE_ID_ATI_RADEON_Ie:
862 case PCI_DEVICE_ID_ATI_RADEON_If:
863 case PCI_DEVICE_ID_ATI_RADEON_Ig:
864 rinfo->pll.ppll_max = 35000;
865 rinfo->pll.ppll_min = 12000;
866 rinfo->pll.xclk = 25000;
867 rinfo->pll.ref_div = 12;
868 rinfo->pll.ref_clk = 2700;
869 break;
870 case PCI_DEVICE_ID_ATI_RADEON_ND:
871 case PCI_DEVICE_ID_ATI_RADEON_NE:
872 case PCI_DEVICE_ID_ATI_RADEON_NF:
873 case PCI_DEVICE_ID_ATI_RADEON_NG:
874 rinfo->pll.ppll_max = 40000;
875 rinfo->pll.ppll_min = 20000;
876 rinfo->pll.xclk = 27000;
877 rinfo->pll.ref_div = 12;
878 rinfo->pll.ref_clk = 2700;
879 break;
880 case PCI_DEVICE_ID_ATI_RADEON_QD:
881 case PCI_DEVICE_ID_ATI_RADEON_QE:
882 case PCI_DEVICE_ID_ATI_RADEON_QF:
883 case PCI_DEVICE_ID_ATI_RADEON_QG:
884 default:
885 rinfo->pll.ppll_max = 35000;
886 rinfo->pll.ppll_min = 12000;
887 rinfo->pll.xclk = 16600;
888 rinfo->pll.ref_div = 67;
889 rinfo->pll.ref_clk = 2700;
890 break;
891 }
892
893 printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d defaults\n",
894 rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk);
895 }
896}
897
898
899static void radeon_get_moninfo (struct radeonfb_info *rinfo)
900{
901 unsigned int tmp;
902
903 if (force_dfp) {
904 rinfo->dviDisp_type = MT_DFP;
905 return;
906 }
907
908 tmp = INREG(BIOS_4_SCRATCH);
909 printk(KERN_DEBUG "radeon_get_moninfo: bios 4 scratch = %x\n", tmp);
910
911 if (rinfo->hasCRTC2) {
912 /* primary DVI port */
913 if (tmp & 0x08)
914 rinfo->dviDisp_type = MT_DFP;
915 else if (tmp & 0x4)
916 rinfo->dviDisp_type = MT_LCD;
917 else if (tmp & 0x200)
918 rinfo->dviDisp_type = MT_CRT;
919 else if (tmp & 0x10)
920 rinfo->dviDisp_type = MT_CTV;
921 else if (tmp & 0x20)
922 rinfo->dviDisp_type = MT_STV;
923
924 /* secondary CRT port */
925 if (tmp & 0x2)
926 rinfo->crtDisp_type = MT_CRT;
927 else if (tmp & 0x800)
928 rinfo->crtDisp_type = MT_DFP;
929 else if (tmp & 0x400)
930 rinfo->crtDisp_type = MT_LCD;
931 else if (tmp & 0x1000)
932 rinfo->crtDisp_type = MT_CTV;
933 else if (tmp & 0x2000)
934 rinfo->crtDisp_type = MT_STV;
935 } else {
936 rinfo->dviDisp_type = MT_NONE;
937
938 tmp = INREG(FP_GEN_CNTL);
939
940 if (tmp & FP_EN_TMDS)
941 rinfo->crtDisp_type = MT_DFP;
942 else
943 rinfo->crtDisp_type = MT_CRT;
944 }
945}
946
947
948
949static void radeon_get_EDID(struct radeonfb_info *rinfo)
950{
951#ifdef CONFIG_PPC_OF
952 if (!radeon_get_EDID_OF(rinfo))
953 RTRACE("radeonfb: could not retrieve EDID from OF\n");
954#else
955 /* XXX use other methods later */
956#endif
957}
958
959
960#ifdef CONFIG_PPC_OF
961static int radeon_get_EDID_OF(struct radeonfb_info *rinfo)
962{
963 struct device_node *dp;
964 unsigned char *pedid = NULL;
965 static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID", "EDID1", NULL };
966 int i;
967
968 dp = pci_device_to_OF_node(rinfo->pdev);
969 while (dp != NULL) {
970 for (i = 0; propnames[i] != NULL; ++i) {
971 pedid = (unsigned char *)
972 get_property(dp, propnames[i], NULL);
973 if (pedid != NULL) {
974 rinfo->EDID = pedid;
975 return 1;
976 }
977 }
978 dp = dp->child;
979 }
980 return 0;
981}
982#endif /* CONFIG_PPC_OF */
983
984
985static int radeon_dfp_parse_EDID(struct radeonfb_info *rinfo)
986{
987 unsigned char *block = rinfo->EDID;
988
989 if (!block)
990 return 0;
991
992 /* jump to the detailed timing block section */
993 block += 54;
994
995 rinfo->clock = (block[0] + (block[1] << 8));
996 rinfo->panel_xres = (block[2] + ((block[4] & 0xf0) << 4));
997 rinfo->hblank = (block[3] + ((block[4] & 0x0f) << 8));
998 rinfo->panel_yres = (block[5] + ((block[7] & 0xf0) << 4));
999 rinfo->vblank = (block[6] + ((block[7] & 0x0f) << 8));
1000 rinfo->hOver_plus = (block[8] + ((block[11] & 0xc0) << 2));
1001 rinfo->hSync_width = (block[9] + ((block[11] & 0x30) << 4));
1002 rinfo->vOver_plus = ((block[10] >> 4) + ((block[11] & 0x0c) << 2));
1003 rinfo->vSync_width = ((block[10] & 0x0f) + ((block[11] & 0x03) << 4));
1004 rinfo->interlaced = ((block[17] & 0x80) >> 7);
1005 rinfo->synct = ((block[17] & 0x18) >> 3);
1006 rinfo->misc = ((block[17] & 0x06) >> 1);
1007 rinfo->hAct_high = rinfo->vAct_high = 0;
1008 if (rinfo->synct == 3) {
1009 if (rinfo->misc & 2)
1010 rinfo->hAct_high = 1;
1011 if (rinfo->misc & 1)
1012 rinfo->vAct_high = 1;
1013 }
1014
1015 printk("radeonfb: detected DFP panel size from EDID: %dx%d\n",
1016 rinfo->panel_xres, rinfo->panel_yres);
1017
1018 rinfo->got_dfpinfo = 1;
1019
1020 return 1;
1021}
1022
1023
1024static void radeon_update_default_var(struct radeonfb_info *rinfo)
1025{
1026 struct fb_var_screeninfo *var = &radeonfb_default_var;
1027
1028 var->xres = rinfo->panel_xres;
1029 var->yres = rinfo->panel_yres;
1030 var->xres_virtual = rinfo->panel_xres;
1031 var->yres_virtual = rinfo->panel_yres;
1032 var->xoffset = var->yoffset = 0;
1033 var->bits_per_pixel = 8;
1034 var->pixclock = 100000000 / rinfo->clock;
1035 var->left_margin = (rinfo->hblank - rinfo->hOver_plus - rinfo->hSync_width);
1036 var->right_margin = rinfo->hOver_plus;
1037 var->upper_margin = (rinfo->vblank - rinfo->vOver_plus - rinfo->vSync_width);
1038 var->lower_margin = rinfo->vOver_plus;
1039 var->hsync_len = rinfo->hSync_width;
1040 var->vsync_len = rinfo->vSync_width;
1041 var->sync = 0;
1042 if (rinfo->synct == 3) {
1043 if (rinfo->hAct_high)
1044 var->sync |= FB_SYNC_HOR_HIGH_ACT;
1045 if (rinfo->vAct_high)
1046 var->sync |= FB_SYNC_VERT_HIGH_ACT;
1047 }
1048
1049 var->vmode = 0;
1050 if (rinfo->interlaced)
1051 var->vmode |= FB_VMODE_INTERLACED;
1052
1053 rinfo->use_default_var = 1;
1054}
1055
1056
1057static int radeon_get_dfpinfo_BIOS(struct radeonfb_info *rinfo)
1058{
1059 char __iomem *fpbiosstart, *tmp, *tmp0;
1060 char stmp[30];
1061 int i;
1062
1063 if (!rinfo->bios_seg)
1064 return 0;
1065
1066 if (!(fpbiosstart = rinfo->bios_seg + readw(rinfo->bios_seg + 0x48))) {
1067 printk("radeonfb: Failed to detect DFP panel info using BIOS\n");
1068 return 0;
1069 }
1070
1071 if (!(tmp = rinfo->bios_seg + readw(fpbiosstart + 0x40))) {
1072 printk("radeonfb: Failed to detect DFP panel info using BIOS\n");
1073 return 0;
1074 }
1075
1076 for(i=0; i<24; i++)
1077 stmp[i] = readb(tmp+i+1);
1078 stmp[24] = 0;
1079 printk("radeonfb: panel ID string: %s\n", stmp);
1080 rinfo->panel_xres = readw(tmp + 25);
1081 rinfo->panel_yres = readw(tmp + 27);
1082 printk("radeonfb: detected DFP panel size from BIOS: %dx%d\n",
1083 rinfo->panel_xres, rinfo->panel_yres);
1084
1085 for(i=0; i<32; i++) {
1086 tmp0 = rinfo->bios_seg + readw(tmp+64+i*2);
1087 if (tmp0 == 0)
1088 break;
1089 if ((readw(tmp0) == rinfo->panel_xres) &&
1090 (readw(tmp0+2) == rinfo->panel_yres)) {
1091 rinfo->hblank = (readw(tmp0+17) - readw(tmp0+19)) * 8;
1092 rinfo->hOver_plus = ((readw(tmp0+21) - readw(tmp0+19) -1) * 8) & 0x7fff;
1093 rinfo->hSync_width = readb(tmp0+23) * 8;
1094 rinfo->vblank = readw(tmp0+24) - readw(tmp0+26);
1095 rinfo->vOver_plus = (readw(tmp0+28) & 0x7ff) - readw(tmp0+26);
1096 rinfo->vSync_width = (readw(tmp0+28) & 0xf800) >> 11;
1097 rinfo->clock = readw(tmp0+9);
1098
1099 rinfo->got_dfpinfo = 1;
1100 return 1;
1101 }
1102 }
1103
1104 return 0;
1105}
1106
1107
1108
1109static int radeon_get_dfpinfo (struct radeonfb_info *rinfo)
1110{
1111 unsigned int tmp;
1112 unsigned short a, b;
1113
1114 if (radeon_get_dfpinfo_BIOS(rinfo))
1115 radeon_update_default_var(rinfo);
1116
1117 if (radeon_dfp_parse_EDID(rinfo))
1118 radeon_update_default_var(rinfo);
1119
1120 if (!rinfo->got_dfpinfo) {
1121 /*
1122 * it seems all else has failed now and we
1123 * resort to probing registers for our DFP info
1124 */
1125 if (panel_yres) {
1126 rinfo->panel_yres = panel_yres;
1127 } else {
1128 tmp = INREG(FP_VERT_STRETCH);
1129 tmp &= 0x00fff000;
1130 rinfo->panel_yres = (unsigned short)(tmp >> 0x0c) + 1;
1131 }
1132
1133 switch (rinfo->panel_yres) {
1134 case 480:
1135 rinfo->panel_xres = 640;
1136 break;
1137 case 600:
1138 rinfo->panel_xres = 800;
1139 break;
1140 case 768:
1141#if defined(__powerpc__)
1142 if (rinfo->dviDisp_type == MT_LCD)
1143 rinfo->panel_xres = 1152;
1144 else
1145#endif
1146 rinfo->panel_xres = 1024;
1147 break;
1148 case 1024:
1149 rinfo->panel_xres = 1280;
1150 break;
1151 case 1050:
1152 rinfo->panel_xres = 1400;
1153 break;
1154 case 1200:
1155 rinfo->panel_xres = 1600;
1156 break;
1157 default:
1158 printk("radeonfb: Failed to detect DFP panel size\n");
1159 return 0;
1160 }
1161
1162 printk("radeonfb: detected DFP panel size from registers: %dx%d\n",
1163 rinfo->panel_xres, rinfo->panel_yres);
1164
1165 tmp = INREG(FP_CRTC_H_TOTAL_DISP);
1166 a = (tmp & FP_CRTC_H_TOTAL_MASK) + 4;
1167 b = (tmp & 0x01ff0000) >> FP_CRTC_H_DISP_SHIFT;
1168 rinfo->hblank = (a - b + 1) * 8;
1169
1170 tmp = INREG(FP_H_SYNC_STRT_WID);
1171 rinfo->hOver_plus = (unsigned short) ((tmp & FP_H_SYNC_STRT_CHAR_MASK) >>
1172 FP_H_SYNC_STRT_CHAR_SHIFT) - b - 1;
1173 rinfo->hOver_plus *= 8;
1174 rinfo->hSync_width = (unsigned short) ((tmp & FP_H_SYNC_WID_MASK) >>
1175 FP_H_SYNC_WID_SHIFT);
1176 rinfo->hSync_width *= 8;
1177 tmp = INREG(FP_CRTC_V_TOTAL_DISP);
1178 a = (tmp & FP_CRTC_V_TOTAL_MASK) + 1;
1179 b = (tmp & FP_CRTC_V_DISP_MASK) >> FP_CRTC_V_DISP_SHIFT;
1180 rinfo->vblank = a - b /* + 24 */ ;
1181
1182 tmp = INREG(FP_V_SYNC_STRT_WID);
1183 rinfo->vOver_plus = (unsigned short) (tmp & FP_V_SYNC_STRT_MASK)
1184 - b + 1;
1185 rinfo->vSync_width = (unsigned short) ((tmp & FP_V_SYNC_WID_MASK) >>
1186 FP_V_SYNC_WID_SHIFT);
1187
1188 return 1;
1189 }
1190
1191 return 1;
1192}
1193
1194
1195#ifdef CONFIG_PPC_OF
1196static int radeon_read_OF (struct radeonfb_info *rinfo)
1197{
1198 struct device_node *dp;
1199 unsigned int *xtal;
1200
1201 dp = pci_device_to_OF_node(rinfo->pdev);
1202
1203 xtal = (unsigned int *) get_property(dp, "ATY,RefCLK", NULL);
1204
1205 rinfo->pll.ref_clk = *xtal / 10;
1206
1207 if (*xtal)
1208 return 1;
1209 else
1210 return 0;
1211}
1212#endif
1213
1214
1215static void radeon_engine_init (struct radeonfb_info *rinfo)
1216{
1217 u32 temp;
1218
1219 /* disable 3D engine */
1220 OUTREG(RB3D_CNTL, 0);
1221
1222 radeon_engine_reset ();
1223
1224 radeon_fifo_wait (1);
1225 OUTREG(RB2D_DSTCACHE_MODE, 0);
1226
1227 radeon_fifo_wait (1);
1228 temp = INREG(DEFAULT_PITCH_OFFSET);
1229 OUTREG(DEFAULT_PITCH_OFFSET, ((temp & 0xc0000000) |
1230 (rinfo->pitch << 0x16)));
1231
1232 radeon_fifo_wait (1);
1233 OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN);
1234
1235 radeon_fifo_wait (1);
1236 OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX |
1237 DEFAULT_SC_BOTTOM_MAX));
1238
1239 temp = radeon_get_dstbpp(rinfo->depth);
1240 rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
1241 radeon_fifo_wait (1);
1242 OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl |
1243 GMC_BRUSH_SOLID_COLOR |
1244 GMC_SRC_DATATYPE_COLOR));
1245
1246 radeon_fifo_wait (7);
1247
1248 /* clear line drawing regs */
1249 OUTREG(DST_LINE_START, 0);
1250 OUTREG(DST_LINE_END, 0);
1251
1252 /* set brush color regs */
1253 OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff);
1254 OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000);
1255
1256 /* set source color regs */
1257 OUTREG(DP_SRC_FRGD_CLR, 0xffffffff);
1258 OUTREG(DP_SRC_BKGD_CLR, 0x00000000);
1259
1260 /* default write mask */
1261 OUTREG(DP_WRITE_MSK, 0xffffffff);
1262
1263 radeon_engine_idle ();
1264}
1265
1266
1267static int __devinit radeon_init_disp (struct radeonfb_info *rinfo)
1268{
1269 struct fb_info *info = &rinfo->info;
1270 struct fb_var_screeninfo var;
1271
1272 var = radeonfb_default_var;
1273 if ((radeon_init_disp_var(rinfo, &var)) < 0)
1274 return -1;
1275
1276 rinfo->depth = var_to_depth(&var);
1277 rinfo->bpp = var.bits_per_pixel;
1278
1279 info->var = var;
1280 fb_alloc_cmap(&info->cmap, 256, 0);
1281
1282 var.activate = FB_ACTIVATE_NOW;
1283 return 0;
1284}
1285
1286
1287static int radeon_init_disp_var (struct radeonfb_info *rinfo,
1288 struct fb_var_screeninfo *var)
1289{
1290#ifndef MODULE
1291 if (mode_option)
1292 fb_find_mode (var, &rinfo->info, mode_option,
1293 NULL, 0, NULL, 8);
1294 else
1295#endif
1296 if (rinfo->use_default_var)
1297 /* We will use the modified default far */
1298 *var = radeonfb_default_var;
1299 else
1300
1301 fb_find_mode (var, &rinfo->info, "640x480-8@60",
1302 NULL, 0, NULL, 0);
1303
1304 if (noaccel)
1305 var->accel_flags &= ~FB_ACCELF_TEXT;
1306 else
1307 var->accel_flags |= FB_ACCELF_TEXT;
1308
1309 return 0;
1310}
1311
1312
1313static int radeon_do_maximize(struct radeonfb_info *rinfo,
1314 struct fb_var_screeninfo *var,
1315 struct fb_var_screeninfo *v,
1316 int nom, int den)
1317{
1318 static struct {
1319 int xres, yres;
1320 } modes[] = {
1321 {1600, 1280},
1322 {1280, 1024},
1323 {1024, 768},
1324 {800, 600},
1325 {640, 480},
1326 {-1, -1}
1327 };
1328 int i;
1329
1330 /* use highest possible virtual resolution */
1331 if (v->xres_virtual == -1 && v->yres_virtual == -1) {
1332 printk("radeonfb: using max available virtual resolution\n");
1333 for (i=0; modes[i].xres != -1; i++) {
1334 if (modes[i].xres * nom / den * modes[i].yres <
1335 rinfo->video_ram / 2)
1336 break;
1337 }
1338 if (modes[i].xres == -1) {
1339 printk("radeonfb: could not find virtual resolution that fits into video memory!\n");
1340 return -EINVAL;
1341 }
1342 v->xres_virtual = modes[i].xres;
1343 v->yres_virtual = modes[i].yres;
1344
1345 printk("radeonfb: virtual resolution set to max of %dx%d\n",
1346 v->xres_virtual, v->yres_virtual);
1347 } else if (v->xres_virtual == -1) {
1348 v->xres_virtual = (rinfo->video_ram * den /
1349 (nom * v->yres_virtual * 2)) & ~15;
1350 } else if (v->yres_virtual == -1) {
1351 v->xres_virtual = (v->xres_virtual + 15) & ~15;
1352 v->yres_virtual = rinfo->video_ram * den /
1353 (nom * v->xres_virtual *2);
1354 } else {
1355 if (v->xres_virtual * nom / den * v->yres_virtual >
1356 rinfo->video_ram) {
1357 return -EINVAL;
1358 }
1359 }
1360
1361 if (v->xres_virtual * nom / den >= 8192) {
1362 v->xres_virtual = 8192 * den / nom - 16;
1363 }
1364
1365 if (v->xres_virtual < v->xres)
1366 return -EINVAL;
1367
1368 if (v->yres_virtual < v->yres)
1369 return -EINVAL;
1370
1371 return 0;
1372}
1373
1374
1375static int radeonfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
1376{
1377 struct radeonfb_info *rinfo = (struct radeonfb_info *) info->par;
1378 struct fb_var_screeninfo v;
1379 int nom, den;
1380
1381 memcpy (&v, var, sizeof (v));
1382
1383 switch (v.bits_per_pixel) {
1384 case 0 ... 8:
1385 v.bits_per_pixel = 8;
1386 break;
1387 case 9 ... 16:
1388 v.bits_per_pixel = 16;
1389 break;
1390 case 17 ... 24:
1391#if 0 /* Doesn't seem to work */
1392 v.bits_per_pixel = 24;
1393 break;
1394#endif
1395 return -EINVAL;
1396 case 25 ... 32:
1397 v.bits_per_pixel = 32;
1398 break;
1399 default:
1400 return -EINVAL;
1401 }
1402
1403 switch (var_to_depth(&v)) {
1404 case 8:
1405 nom = den = 1;
1406 v.red.offset = v.green.offset = v.blue.offset = 0;
1407 v.red.length = v.green.length = v.blue.length = 8;
1408 v.transp.offset = v.transp.length = 0;
1409 break;
1410 case 15:
1411 nom = 2;
1412 den = 1;
1413 v.red.offset = 10;
1414 v.green.offset = 5;
1415 v.blue.offset = 0;
1416 v.red.length = v.green.length = v.blue.length = 5;
1417 v.transp.offset = v.transp.length = 0;
1418 break;
1419 case 16:
1420 nom = 2;
1421 den = 1;
1422 v.red.offset = 11;
1423 v.green.offset = 5;
1424 v.blue.offset = 0;
1425 v.red.length = 5;
1426 v.green.length = 6;
1427 v.blue.length = 5;
1428 v.transp.offset = v.transp.length = 0;
1429 break;
1430 case 24:
1431 nom = 4;
1432 den = 1;
1433 v.red.offset = 16;
1434 v.green.offset = 8;
1435 v.blue.offset = 0;
1436 v.red.length = v.blue.length = v.green.length = 8;
1437 v.transp.offset = v.transp.length = 0;
1438 break;
1439 case 32:
1440 nom = 4;
1441 den = 1;
1442 v.red.offset = 16;
1443 v.green.offset = 8;
1444 v.blue.offset = 0;
1445 v.red.length = v.blue.length = v.green.length = 8;
1446 v.transp.offset = 24;
1447 v.transp.length = 8;
1448 break;
1449 default:
1450 printk ("radeonfb: mode %dx%dx%d rejected, color depth invalid\n",
1451 var->xres, var->yres, var->bits_per_pixel);
1452 return -EINVAL;
1453 }
1454
1455 if (radeon_do_maximize(rinfo, var, &v, nom, den) < 0)
1456 return -EINVAL;
1457
1458 if (v.xoffset < 0)
1459 v.xoffset = 0;
1460 if (v.yoffset < 0)
1461 v.yoffset = 0;
1462
1463 if (v.xoffset > v.xres_virtual - v.xres)
1464 v.xoffset = v.xres_virtual - v.xres - 1;
1465
1466 if (v.yoffset > v.yres_virtual - v.yres)
1467 v.yoffset = v.yres_virtual - v.yres - 1;
1468
1469 v.red.msb_right = v.green.msb_right = v.blue.msb_right =
1470 v.transp.offset = v.transp.length =
1471 v.transp.msb_right = 0;
1472
1473 if (noaccel)
1474 v.accel_flags = 0;
1475
1476 memcpy(var, &v, sizeof(v));
1477
1478 return 0;
1479}
1480
1481
1482static int radeonfb_pan_display (struct fb_var_screeninfo *var,
1483 struct fb_info *info)
1484{
1485 struct radeonfb_info *rinfo = (struct radeonfb_info *) info;
1486
1487 if ((var->xoffset + var->xres > var->xres_virtual)
1488 || (var->yoffset + var->yres > var->yres_virtual))
1489 return -EINVAL;
1490
1491 if (rinfo->asleep)
1492 return 0;
1493
1494 OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset)
1495 * var->bits_per_pixel / 8) & ~7);
1496 return 0;
1497}
1498
1499
1500static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd,
1501 unsigned long arg)
1502{
1503 struct radeonfb_info *rinfo = (struct radeonfb_info *) info;
1504 unsigned int tmp;
1505 u32 value = 0;
1506 int rc;
1507
1508 switch (cmd) {
1509 /*
1510 * TODO: set mirror accordingly for non-Mobility chipsets with 2 CRTC's
1511 */
1512 case FBIO_RADEON_SET_MIRROR:
1513 switch (rinfo->arch) {
1514 case RADEON_R100:
1515 case RADEON_RV100:
1516 case RADEON_R200:
1517 case RADEON_RV200:
1518 case RADEON_RV250:
1519 case RADEON_R300:
1520 return -EINVAL;
1521 default:
1522 /* RADEON M6, RADEON_M7, RADEON_M9 */
1523 break;
1524 }
1525
1526 rc = get_user(value, (__u32 __user *)arg);
1527
1528 if (rc)
1529 return rc;
1530
1531 if (value & 0x01) {
1532 tmp = INREG(LVDS_GEN_CNTL);
1533
1534 tmp |= (LVDS_ON | LVDS_BLON);
1535 } else {
1536 tmp = INREG(LVDS_GEN_CNTL);
1537
1538 tmp &= ~(LVDS_ON | LVDS_BLON);
1539 }
1540
1541 OUTREG(LVDS_GEN_CNTL, tmp);
1542
1543 if (value & 0x02) {
1544 tmp = INREG(CRTC_EXT_CNTL);
1545 tmp |= CRTC_CRT_ON;
1546
1547 mirror = 1;
1548 } else {
1549 tmp = INREG(CRTC_EXT_CNTL);
1550 tmp &= ~CRTC_CRT_ON;
1551
1552 mirror = 0;
1553 }
1554
1555 OUTREG(CRTC_EXT_CNTL, tmp);
1556
1557 break;
1558 case FBIO_RADEON_GET_MIRROR:
1559 switch (rinfo->arch) {
1560 case RADEON_R100:
1561 case RADEON_RV100:
1562 case RADEON_R200:
1563 case RADEON_RV200:
1564 case RADEON_RV250:
1565 case RADEON_R300:
1566 return -EINVAL;
1567 default:
1568 /* RADEON M6, RADEON_M7, RADEON_M9 */
1569 break;
1570 }
1571
1572 tmp = INREG(LVDS_GEN_CNTL);
1573 if ((LVDS_ON | LVDS_BLON) & tmp)
1574 value |= 0x01;
1575
1576 tmp = INREG(CRTC_EXT_CNTL);
1577 if (CRTC_CRT_ON & tmp)
1578 value |= 0x02;
1579
1580 return put_user(value, (__u32 __user *)arg);
1581 default:
1582 return -EINVAL;
1583 }
1584
1585 return -EINVAL;
1586}
1587
1588
1589static int radeonfb_blank (int blank, struct fb_info *info)
1590{
1591 struct radeonfb_info *rinfo = (struct radeonfb_info *) info;
1592 u32 val = INREG(CRTC_EXT_CNTL);
1593 u32 val2 = INREG(LVDS_GEN_CNTL);
1594
1595 if (rinfo->asleep)
1596 return 0;
1597
1598#ifdef CONFIG_PMAC_BACKLIGHT
1599 if (rinfo->dviDisp_type == MT_LCD && machine_is(powermac)) {
1600 set_backlight_enable(!blank);
1601 return 0;
1602 }
1603#endif
1604
1605 /* reset it */
1606 val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS |
1607 CRTC_VSYNC_DIS);
1608 val2 &= ~(LVDS_DISPLAY_DIS);
1609
1610 switch (blank) {
1611 case FB_BLANK_UNBLANK:
1612 case FB_BLANK_NORMAL:
1613 break;
1614 case FB_BLANK_VSYNC_SUSPEND:
1615 val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS);
1616 break;
1617 case FB_BLANK_HSYNC_SUSPEND:
1618 val |= (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS);
1619 break;
1620 case FB_BLANK_POWERDOWN:
1621 val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS |
1622 CRTC_HSYNC_DIS);
1623 val2 |= (LVDS_DISPLAY_DIS);
1624 break;
1625 }
1626
1627 switch (rinfo->dviDisp_type) {
1628 case MT_LCD:
1629 OUTREG(LVDS_GEN_CNTL, val2);
1630 break;
1631 case MT_CRT:
1632 default:
1633 OUTREG(CRTC_EXT_CNTL, val);
1634 break;
1635 }
1636
1637 /* let fbcon do a soft blank for us */
1638 return (blank == FB_BLANK_NORMAL) ? 1 : 0;
1639}
1640
1641
1642static int radeonfb_setcolreg (unsigned regno, unsigned red, unsigned green,
1643 unsigned blue, unsigned transp, struct fb_info *info)
1644{
1645 struct radeonfb_info *rinfo = (struct radeonfb_info *) info;
1646 u32 pindex, vclk_cntl;
1647 unsigned int i;
1648
1649 if (regno > 255)
1650 return 1;
1651
1652 red >>= 8;
1653 green >>= 8;
1654 blue >>= 8;
1655 rinfo->palette[regno].red = red;
1656 rinfo->palette[regno].green = green;
1657 rinfo->palette[regno].blue = blue;
1658
1659 /* default */
1660 pindex = regno;
1661
1662 if (!rinfo->asleep) {
1663 vclk_cntl = INPLL(VCLK_ECP_CNTL);
1664 OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb);
1665
1666 if (rinfo->bpp == 16) {
1667 pindex = regno * 8;
1668
1669 if (rinfo->depth == 16 && regno > 63)
1670 return 1;
1671 if (rinfo->depth == 15 && regno > 31)
1672 return 1;
1673
1674 /* For 565, the green component is mixed one order below */
1675 if (rinfo->depth == 16) {
1676 OUTREG(PALETTE_INDEX, pindex>>1);
1677 OUTREG(PALETTE_DATA, (rinfo->palette[regno>>1].red << 16) |
1678 (green << 8) | (rinfo->palette[regno>>1].blue));
1679 green = rinfo->palette[regno<<1].green;
1680 }
1681 }
1682
1683 if (rinfo->depth != 16 || regno < 32) {
1684 OUTREG(PALETTE_INDEX, pindex);
1685 OUTREG(PALETTE_DATA, (red << 16) | (green << 8) | blue);
1686 }
1687
1688 OUTPLL(VCLK_ECP_CNTL, vclk_cntl);
1689 }
1690 if (regno < 16) {
1691 switch (rinfo->depth) {
1692 case 15:
1693 ((u16 *) (info->pseudo_palette))[regno] =
1694 (regno << 10) | (regno << 5) | regno;
1695 break;
1696 case 16:
1697 ((u16 *) (info->pseudo_palette))[regno] =
1698 (regno << 11) | (regno << 6) | regno;
1699 break;
1700 case 24:
1701 ((u32 *) (info->pseudo_palette))[regno] =
1702 (regno << 16) | (regno << 8) | regno;
1703 break;
1704 case 32:
1705 i = (regno << 8) | regno;
1706 ((u32 *) (info->pseudo_palette))[regno] =
1707 (i << 16) | i;
1708 break;
1709 }
1710 }
1711 return 0;
1712}
1713
1714
1715
1716static void radeon_save_state (struct radeonfb_info *rinfo,
1717 struct radeon_regs *save)
1718{
1719 /* CRTC regs */
1720 save->crtc_gen_cntl = INREG(CRTC_GEN_CNTL);
1721 save->crtc_ext_cntl = INREG(CRTC_EXT_CNTL);
1722 save->dac_cntl = INREG(DAC_CNTL);
1723 save->crtc_h_total_disp = INREG(CRTC_H_TOTAL_DISP);
1724 save->crtc_h_sync_strt_wid = INREG(CRTC_H_SYNC_STRT_WID);
1725 save->crtc_v_total_disp = INREG(CRTC_V_TOTAL_DISP);
1726 save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID);
1727 save->crtc_pitch = INREG(CRTC_PITCH);
1728#if defined(__BIG_ENDIAN)
1729 save->surface_cntl = INREG(SURFACE_CNTL);
1730#endif
1731
1732 /* FP regs */
1733 save->fp_crtc_h_total_disp = INREG(FP_CRTC_H_TOTAL_DISP);
1734 save->fp_crtc_v_total_disp = INREG(FP_CRTC_V_TOTAL_DISP);
1735 save->fp_gen_cntl = INREG(FP_GEN_CNTL);
1736 save->fp_h_sync_strt_wid = INREG(FP_H_SYNC_STRT_WID);
1737 save->fp_horz_stretch = INREG(FP_HORZ_STRETCH);
1738 save->fp_v_sync_strt_wid = INREG(FP_V_SYNC_STRT_WID);
1739 save->fp_vert_stretch = INREG(FP_VERT_STRETCH);
1740 save->lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
1741 save->lvds_pll_cntl = INREG(LVDS_PLL_CNTL);
1742 save->tmds_crc = INREG(TMDS_CRC);
1743 save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL);
1744 save->vclk_ecp_cntl = INPLL(VCLK_ECP_CNTL);
1745}
1746
1747
1748
1749static int radeonfb_set_par (struct fb_info *info)
1750{
1751 struct radeonfb_info *rinfo = (struct radeonfb_info *)info->par;
1752 struct fb_var_screeninfo *mode = &info->var;
1753 struct radeon_regs newmode;
1754 int hTotal, vTotal, hSyncStart, hSyncEnd,
1755 hSyncPol, vSyncStart, vSyncEnd, vSyncPol, cSync;
1756 u8 hsync_adj_tab[] = {0, 0x12, 9, 9, 6, 5};
1757 u8 hsync_fudge_fp[] = {2, 2, 0, 0, 5, 5};
1758 u32 dotClock = 1000000000 / mode->pixclock,
1759 sync, h_sync_pol, v_sync_pol;
1760 int freq = dotClock / 10; /* x 100 */
1761 int xclk_freq, vclk_freq, xclk_per_trans, xclk_per_trans_precise;
1762 int useable_precision, roff, ron;
1763 int min_bits, format = 0;
1764 int hsync_start, hsync_fudge, bytpp, hsync_wid, vsync_wid;
1765 int primary_mon = PRIMARY_MONITOR(rinfo);
1766 int depth = var_to_depth(mode);
1767 int accel = (mode->accel_flags & FB_ACCELF_TEXT) != 0;
1768
1769 rinfo->xres = mode->xres;
1770 rinfo->yres = mode->yres;
1771 rinfo->xres_virtual = mode->xres_virtual;
1772 rinfo->yres_virtual = mode->yres_virtual;
1773 rinfo->pixclock = mode->pixclock;
1774
1775 hSyncStart = mode->xres + mode->right_margin;
1776 hSyncEnd = hSyncStart + mode->hsync_len;
1777 hTotal = hSyncEnd + mode->left_margin;
1778
1779 vSyncStart = mode->yres + mode->lower_margin;
1780 vSyncEnd = vSyncStart + mode->vsync_len;
1781 vTotal = vSyncEnd + mode->upper_margin;
1782
1783 if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
1784 if (rinfo->panel_xres < mode->xres)
1785 rinfo->xres = mode->xres = rinfo->panel_xres;
1786 if (rinfo->panel_yres < mode->yres)
1787 rinfo->yres = mode->yres = rinfo->panel_yres;
1788
1789 hTotal = mode->xres + rinfo->hblank;
1790 hSyncStart = mode->xres + rinfo->hOver_plus;
1791 hSyncEnd = hSyncStart + rinfo->hSync_width;
1792
1793 vTotal = mode->yres + rinfo->vblank;
1794 vSyncStart = mode->yres + rinfo->vOver_plus;
1795 vSyncEnd = vSyncStart + rinfo->vSync_width;
1796 }
1797
1798 sync = mode->sync;
1799 h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
1800 v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
1801
1802 RTRACE("hStart = %d, hEnd = %d, hTotal = %d\n",
1803 hSyncStart, hSyncEnd, hTotal);
1804 RTRACE("vStart = %d, vEnd = %d, vTotal = %d\n",
1805 vSyncStart, vSyncEnd, vTotal);
1806
1807 hsync_wid = (hSyncEnd - hSyncStart) / 8;
1808 vsync_wid = vSyncEnd - vSyncStart;
1809 if (hsync_wid == 0)
1810 hsync_wid = 1;
1811 else if (hsync_wid > 0x3f) /* max */
1812 hsync_wid = 0x3f;
1813
1814 if (vsync_wid == 0)
1815 vsync_wid = 1;
1816 else if (vsync_wid > 0x1f) /* max */
1817 vsync_wid = 0x1f;
1818
1819 hSyncPol = mode->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
1820 vSyncPol = mode->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
1821
1822 cSync = mode->sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
1823
1824 format = radeon_get_dstbpp(depth);
1825 bytpp = mode->bits_per_pixel >> 3;
1826
1827 if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD))
1828 hsync_fudge = hsync_fudge_fp[format-1];
1829 else
1830 hsync_fudge = hsync_adj_tab[format-1];
1831
1832 hsync_start = hSyncStart - 8 + hsync_fudge;
1833
1834 newmode.crtc_gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN |
1835 (format << 8);
1836
1837 if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
1838 newmode.crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN;
1839 if (mirror)
1840 newmode.crtc_ext_cntl |= CRTC_CRT_ON;
1841
1842 newmode.crtc_gen_cntl &= ~(CRTC_DBL_SCAN_EN |
1843 CRTC_INTERLACE_EN);
1844 } else {
1845 newmode.crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN |
1846 CRTC_CRT_ON;
1847 }
1848
1849 newmode.dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN |
1850 DAC_8BIT_EN;
1851
1852 newmode.crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) |
1853 (((mode->xres / 8) - 1) << 16));
1854
1855 newmode.crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) |
1856 (hsync_wid << 16) | (h_sync_pol << 23));
1857
1858 newmode.crtc_v_total_disp = ((vTotal - 1) & 0xffff) |
1859 ((mode->yres - 1) << 16);
1860
1861 newmode.crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) |
1862 (vsync_wid << 16) | (v_sync_pol << 23));
1863
1864 if (accel) {
1865 /* We first calculate the engine pitch */
1866 rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f)
1867 & ~(0x3f)) >> 6;
1868
1869 /* Then, re-multiply it to get the CRTC pitch */
1870 newmode.crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8);
1871 } else
1872 newmode.crtc_pitch = (mode->xres_virtual >> 3);
1873 newmode.crtc_pitch |= (newmode.crtc_pitch << 16);
1874
1875#if defined(__BIG_ENDIAN)
1876 /*
1877 * It looks like recent chips have a problem with SURFACE_CNTL,
1878 * setting SURF_TRANSLATION_DIS completely disables the
1879 * swapper as well, so we leave it unset now.
1880 */
1881 newmode.surface_cntl = 0;
1882
1883 /* Setup swapping on both apertures, though we currently
1884 * only use aperture 0, enabling swapper on aperture 1
1885 * won't harm
1886 */
1887 switch (mode->bits_per_pixel) {
1888 case 16:
1889 newmode.surface_cntl |= NONSURF_AP0_SWP_16BPP;
1890 newmode.surface_cntl |= NONSURF_AP1_SWP_16BPP;
1891 break;
1892 case 24:
1893 case 32:
1894 newmode.surface_cntl |= NONSURF_AP0_SWP_32BPP;
1895 newmode.surface_cntl |= NONSURF_AP1_SWP_32BPP;
1896 break;
1897 }
1898#endif
1899
1900 rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f)
1901 & ~(0x3f)) / 64;
1902
1903 RTRACE("h_total_disp = 0x%x\t hsync_strt_wid = 0x%x\n",
1904 newmode.crtc_h_total_disp, newmode.crtc_h_sync_strt_wid);
1905 RTRACE("v_total_disp = 0x%x\t vsync_strt_wid = 0x%x\n",
1906 newmode.crtc_v_total_disp, newmode.crtc_v_sync_strt_wid);
1907
1908 newmode.xres = mode->xres;
1909 newmode.yres = mode->yres;
1910
1911 rinfo->bpp = mode->bits_per_pixel;
1912 rinfo->depth = depth;
1913
1914 if (freq > rinfo->pll.ppll_max)
1915 freq = rinfo->pll.ppll_max;
1916 if (freq*12 < rinfo->pll.ppll_min)
1917 freq = rinfo->pll.ppll_min / 12;
1918
1919 {
1920 struct {
1921 int divider;
1922 int bitvalue;
1923 } *post_div,
1924 post_divs[] = {
1925 { 1, 0 },
1926 { 2, 1 },
1927 { 4, 2 },
1928 { 8, 3 },
1929 { 3, 4 },
1930 { 16, 5 },
1931 { 6, 6 },
1932 { 12, 7 },
1933 { 0, 0 },
1934 };
1935
1936 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
1937 rinfo->pll_output_freq = post_div->divider * freq;
1938 if (rinfo->pll_output_freq >= rinfo->pll.ppll_min &&
1939 rinfo->pll_output_freq <= rinfo->pll.ppll_max)
1940 break;
1941 }
1942
1943 rinfo->post_div = post_div->divider;
1944 rinfo->fb_div = round_div(rinfo->pll.ref_div*rinfo->pll_output_freq,
1945 rinfo->pll.ref_clk);
1946 newmode.ppll_ref_div = rinfo->pll.ref_div;
1947 newmode.ppll_div_3 = rinfo->fb_div | (post_div->bitvalue << 16);
1948 }
1949 newmode.vclk_ecp_cntl = rinfo->init_state.vclk_ecp_cntl;
1950
1951#ifdef CONFIG_PPC_OF
1952 /* Gross hack for iBook with M7 until I find out a proper fix */
1953 if (machine_is_compatible("PowerBook4,3") && rinfo->arch == RADEON_M7)
1954 newmode.ppll_div_3 = 0x000600ad;
1955#endif /* CONFIG_PPC_OF */
1956
1957 RTRACE("post div = 0x%x\n", rinfo->post_div);
1958 RTRACE("fb_div = 0x%x\n", rinfo->fb_div);
1959 RTRACE("ppll_div_3 = 0x%x\n", newmode.ppll_div_3);
1960
1961 /* DDA */
1962 vclk_freq = round_div(rinfo->pll.ref_clk * rinfo->fb_div,
1963 rinfo->pll.ref_div * rinfo->post_div);
1964 xclk_freq = rinfo->pll.xclk;
1965
1966 xclk_per_trans = round_div(xclk_freq * 128, vclk_freq * mode->bits_per_pixel);
1967
1968 min_bits = min_bits_req(xclk_per_trans);
1969 useable_precision = min_bits + 1;
1970
1971 xclk_per_trans_precise = round_div((xclk_freq * 128) << (11 - useable_precision),
1972 vclk_freq * mode->bits_per_pixel);
1973
1974 ron = (4 * rinfo->ram.mb + 3 * _max(rinfo->ram.trcd - 2, 0) +
1975 2 * rinfo->ram.trp + rinfo->ram.twr + rinfo->ram.cl + rinfo->ram.tr2w +
1976 xclk_per_trans) << (11 - useable_precision);
1977 roff = xclk_per_trans_precise * (32 - 4);
1978
1979 RTRACE("ron = %d, roff = %d\n", ron, roff);
1980 RTRACE("vclk_freq = %d, per = %d\n", vclk_freq, xclk_per_trans_precise);
1981
1982 if ((ron + rinfo->ram.rloop) >= roff) {
1983 printk("radeonfb: error ron out of range\n");
1984 return -EINVAL;
1985 }
1986
1987 newmode.dda_config = (xclk_per_trans_precise |
1988 (useable_precision << 16) |
1989 (rinfo->ram.rloop << 20));
1990 newmode.dda_on_off = (ron << 16) | roff;
1991
1992 if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
1993 unsigned int hRatio, vRatio;
1994
1995 /* We force the pixel clock to be always enabled. Allowing it
1996 * to be power managed during blanking would save power, but has
1997 * nasty interactions with the 2D engine & sleep code that haven't
1998 * been solved yet. --BenH
1999 */
2000 newmode.vclk_ecp_cntl &= ~PIXCLK_DAC_ALWAYS_ONb;
2001
2002 if (mode->xres > rinfo->panel_xres)
2003 mode->xres = rinfo->panel_xres;
2004 if (mode->yres > rinfo->panel_yres)
2005 mode->yres = rinfo->panel_yres;
2006
2007 newmode.fp_horz_stretch = (((rinfo->panel_xres / 8) - 1)
2008 << HORZ_PANEL_SHIFT);
2009 newmode.fp_vert_stretch = ((rinfo->panel_yres - 1)
2010 << VERT_PANEL_SHIFT);
2011
2012 if (mode->xres != rinfo->panel_xres) {
2013 hRatio = round_div(mode->xres * HORZ_STRETCH_RATIO_MAX,
2014 rinfo->panel_xres);
2015 newmode.fp_horz_stretch = (((((unsigned long)hRatio) & HORZ_STRETCH_RATIO_MASK)) |
2016 (newmode.fp_horz_stretch &
2017 (HORZ_PANEL_SIZE | HORZ_FP_LOOP_STRETCH |
2018 HORZ_AUTO_RATIO_INC)));
2019 newmode.fp_horz_stretch |= (HORZ_STRETCH_BLEND |
2020 HORZ_STRETCH_ENABLE);
2021 }
2022 newmode.fp_horz_stretch &= ~HORZ_AUTO_RATIO;
2023
2024 if (mode->yres != rinfo->panel_yres) {
2025 vRatio = round_div(mode->yres * VERT_STRETCH_RATIO_MAX,
2026 rinfo->panel_yres);
2027 newmode.fp_vert_stretch = (((((unsigned long)vRatio) & VERT_STRETCH_RATIO_MASK)) |
2028 (newmode.fp_vert_stretch &
2029 (VERT_PANEL_SIZE | VERT_STRETCH_RESERVED)));
2030 newmode.fp_vert_stretch |= (VERT_STRETCH_BLEND |
2031 VERT_STRETCH_ENABLE);
2032 }
2033 newmode.fp_vert_stretch &= ~VERT_AUTO_RATIO_EN;
2034
2035 newmode.fp_gen_cntl = (rinfo->init_state.fp_gen_cntl & (u32)
2036 ~(FP_SEL_CRTC2 |
2037 FP_RMX_HVSYNC_CONTROL_EN |
2038 FP_DFP_SYNC_SEL |
2039 FP_CRT_SYNC_SEL |
2040 FP_CRTC_LOCK_8DOT |
2041 FP_USE_SHADOW_EN |
2042 FP_CRTC_USE_SHADOW_VEND |
2043 FP_CRT_SYNC_ALT));
2044
2045 newmode.fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR |
2046 FP_CRTC_DONT_SHADOW_HEND);
2047
2048 newmode.lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl;
2049 newmode.lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl;
2050 newmode.tmds_crc = rinfo->init_state.tmds_crc;
2051 newmode.tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl;
2052
2053 if (primary_mon == MT_LCD) {
2054 newmode.lvds_gen_cntl |= (LVDS_ON | LVDS_BLON);
2055 newmode.fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN);
2056 } else {
2057 /* DFP */
2058 newmode.fp_gen_cntl |= (FP_FPON | FP_TMDS_EN);
2059 newmode.tmds_transmitter_cntl = (TMDS_RAN_PAT_RST |
2060 TMDS_ICHCSEL | TMDS_PLL_EN) &
2061 ~(TMDS_PLLRST);
2062 newmode.crtc_ext_cntl &= ~CRTC_CRT_ON;
2063 }
2064
2065 newmode.fp_crtc_h_total_disp = (((rinfo->hblank / 8) & 0x3ff) |
2066 (((mode->xres / 8) - 1) << 16));
2067 newmode.fp_crtc_v_total_disp = (rinfo->vblank & 0xffff) |
2068 ((mode->yres - 1) << 16);
2069 newmode.fp_h_sync_strt_wid = ((rinfo->hOver_plus & 0x1fff) |
2070 (hsync_wid << 16) | (h_sync_pol << 23));
2071 newmode.fp_v_sync_strt_wid = ((rinfo->vOver_plus & 0xfff) |
2072 (vsync_wid << 16) | (v_sync_pol << 23));
2073 }
2074
2075 /* do it! */
2076 if (!rinfo->asleep) {
2077 radeon_write_mode (rinfo, &newmode);
2078 /* (re)initialize the engine */
2079 if (noaccel)
2080 radeon_engine_init (rinfo);
2081
2082 }
2083 /* Update fix */
2084 if (accel)
2085 info->fix.line_length = rinfo->pitch*64;
2086 else
2087 info->fix.line_length = mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8);
2088 info->fix.visual = rinfo->depth == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
2089
2090#ifdef CONFIG_BOOTX_TEXT
2091 /* Update debug text engine */
2092 btext_update_display(rinfo->fb_base_phys, mode->xres, mode->yres,
2093 rinfo->depth, info->fix.line_length);
2094#endif
2095
2096 return 0;
2097}
2098
2099
2100static void radeon_write_mode (struct radeonfb_info *rinfo,
2101 struct radeon_regs *mode)
2102{
2103 int i;
2104 int primary_mon = PRIMARY_MONITOR(rinfo);
2105
2106 radeonfb_blank(VESA_POWERDOWN, (struct fb_info *)rinfo);
2107
2108
2109 if (rinfo->arch == RADEON_M6) {
2110 for (i=0; i<7; i++)
2111 OUTREG(common_regs_m6[i].reg, common_regs_m6[i].val);
2112 } else {
2113 for (i=0; i<9; i++)
2114 OUTREG(common_regs[i].reg, common_regs[i].val);
2115 }
2116
2117 OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl);
2118 OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
2119 CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS);
2120 OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING);
2121 OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp);
2122 OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid);
2123 OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp);
2124 OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid);
2125 OUTREG(CRTC_OFFSET, 0);
2126 OUTREG(CRTC_OFFSET_CNTL, 0);
2127 OUTREG(CRTC_PITCH, mode->crtc_pitch);
2128
2129#if defined(__BIG_ENDIAN)
2130 OUTREG(SURFACE_CNTL, mode->surface_cntl);
2131#endif
2132
2133 while ((INREG(CLOCK_CNTL_INDEX) & PPLL_DIV_SEL_MASK) !=
2134 PPLL_DIV_SEL_MASK) {
2135 OUTREGP(CLOCK_CNTL_INDEX, PPLL_DIV_SEL_MASK, 0xffff);
2136 }
2137
2138 OUTPLLP(PPLL_CNTL, PPLL_RESET, 0xffff);
2139
2140 while ((INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK) !=
2141 (mode->ppll_ref_div & PPLL_REF_DIV_MASK)) {
2142 OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK);
2143 }
2144
2145 while ((INPLL(PPLL_DIV_3) & PPLL_FB3_DIV_MASK) !=
2146 (mode->ppll_div_3 & PPLL_FB3_DIV_MASK)) {
2147 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK);
2148 }
2149
2150 while ((INPLL(PPLL_DIV_3) & PPLL_POST3_DIV_MASK) !=
2151 (mode->ppll_div_3 & PPLL_POST3_DIV_MASK)) {
2152 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK);
2153 }
2154
2155 OUTPLL(HTOTAL_CNTL, 0);
2156
2157 OUTPLLP(PPLL_CNTL, 0, ~PPLL_RESET);
2158
2159// OUTREG(DDA_CONFIG, mode->dda_config);
2160// OUTREG(DDA_ON_OFF, mode->dda_on_off);
2161
2162 if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
2163 OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp);
2164 OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp);
2165 OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid);
2166 OUTREG(FP_V_SYNC_STRT_WID, mode->fp_v_sync_strt_wid);
2167 OUTREG(FP_HORZ_STRETCH, mode->fp_horz_stretch);
2168 OUTREG(FP_VERT_STRETCH, mode->fp_vert_stretch);
2169 OUTREG(FP_GEN_CNTL, mode->fp_gen_cntl);
2170 OUTREG(TMDS_CRC, mode->tmds_crc);
2171 OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl);
2172
2173 if (primary_mon == MT_LCD) {
2174 unsigned int tmp = INREG(LVDS_GEN_CNTL);
2175
2176 mode->lvds_gen_cntl &= ~LVDS_STATE_MASK;
2177 mode->lvds_gen_cntl |= (rinfo->init_state.lvds_gen_cntl & LVDS_STATE_MASK);
2178
2179 if ((tmp & (LVDS_ON | LVDS_BLON)) ==
2180 (mode->lvds_gen_cntl & (LVDS_ON | LVDS_BLON))) {
2181 OUTREG(LVDS_GEN_CNTL, mode->lvds_gen_cntl);
2182 } else {
2183 if (mode->lvds_gen_cntl & (LVDS_ON | LVDS_BLON)) {
2184 udelay(1000);
2185 OUTREG(LVDS_GEN_CNTL, mode->lvds_gen_cntl);
2186 } else {
2187 OUTREG(LVDS_GEN_CNTL, mode->lvds_gen_cntl |
2188 LVDS_BLON);
2189 udelay(1000);
2190 OUTREG(LVDS_GEN_CNTL, mode->lvds_gen_cntl);
2191 }
2192 }
2193 }
2194 }
2195
2196 radeonfb_blank(VESA_NO_BLANKING, (struct fb_info *)rinfo);
2197
2198 OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
2199
2200 return;
2201}
2202
2203static struct fb_ops radeonfb_ops = {
2204 .owner = THIS_MODULE,
2205 .fb_check_var = radeonfb_check_var,
2206 .fb_set_par = radeonfb_set_par,
2207 .fb_setcolreg = radeonfb_setcolreg,
2208 .fb_pan_display = radeonfb_pan_display,
2209 .fb_blank = radeonfb_blank,
2210 .fb_ioctl = radeonfb_ioctl,
2211#if 0
2212 .fb_fillrect = radeonfb_fillrect,
2213 .fb_copyarea = radeonfb_copyarea,
2214 .fb_imageblit = radeonfb_imageblit,
2215 .fb_rasterimg = radeonfb_rasterimg,
2216#else
2217 .fb_fillrect = cfb_fillrect,
2218 .fb_copyarea = cfb_copyarea,
2219 .fb_imageblit = cfb_imageblit,
2220#endif
2221};
2222
2223
2224static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
2225{
2226 struct fb_info *info;
2227
2228 info = &rinfo->info;
2229
2230 info->par = rinfo;
2231 info->pseudo_palette = rinfo->pseudo_palette;
2232 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2233 info->fbops = &radeonfb_ops;
2234 info->screen_base = rinfo->fb_base;
2235
2236 /* Fill fix common fields */
2237 strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
2238 info->fix.smem_start = rinfo->fb_base_phys;
2239 info->fix.smem_len = rinfo->video_ram;
2240 info->fix.type = FB_TYPE_PACKED_PIXELS;
2241 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
2242 info->fix.xpanstep = 8;
2243 info->fix.ypanstep = 1;
2244 info->fix.ywrapstep = 0;
2245 info->fix.type_aux = 0;
2246 info->fix.mmio_start = rinfo->mmio_base_phys;
2247 info->fix.mmio_len = RADEON_REGSIZE;
2248 if (noaccel)
2249 info->fix.accel = FB_ACCEL_NONE;
2250 else
2251 info->fix.accel = FB_ACCEL_ATI_RADEON;
2252
2253 if (radeon_init_disp (rinfo) < 0)
2254 return -1;
2255
2256 return 0;
2257}
2258
2259
2260#ifdef CONFIG_PMAC_BACKLIGHT
2261
2262/* TODO: Dbl check these tables, we don't go up to full ON backlight
2263 * in these, possibly because we noticed MacOS doesn't, but I'd prefer
2264 * having some more official numbers from ATI
2265 */
2266static int backlight_conv_m6[] = {
2267 0xff, 0xc0, 0xb5, 0xaa, 0x9f, 0x94, 0x89, 0x7e,
2268 0x73, 0x68, 0x5d, 0x52, 0x47, 0x3c, 0x31, 0x24
2269};
2270static int backlight_conv_m7[] = {
2271 0x00, 0x3f, 0x4a, 0x55, 0x60, 0x6b, 0x76, 0x81,
2272 0x8c, 0x97, 0xa2, 0xad, 0xb8, 0xc3, 0xce, 0xd9
2273};
2274
2275#define BACKLIGHT_LVDS_OFF
2276#undef BACKLIGHT_DAC_OFF
2277
2278/* We turn off the LCD completely instead of just dimming the backlight.
2279 * This provides some greater power saving and the display is useless
2280 * without backlight anyway.
2281 */
2282
2283static int radeon_set_backlight_enable(int on, int level, void *data)
2284{
2285 struct radeonfb_info *rinfo = (struct radeonfb_info *)data;
2286 unsigned int lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
2287 int* conv_table;
2288
2289 /* Pardon me for that hack... maybe some day we can figure
2290 * out in what direction backlight should work on a given
2291 * panel ?
2292 */
2293 if ((rinfo->arch == RADEON_M7 || rinfo->arch == RADEON_M9)
2294 && !machine_is_compatible("PowerBook4,3"))
2295 conv_table = backlight_conv_m7;
2296 else
2297 conv_table = backlight_conv_m6;
2298
2299 lvds_gen_cntl |= (LVDS_BL_MOD_EN | LVDS_BLON);
2300 if (on && (level > BACKLIGHT_OFF)) {
2301 lvds_gen_cntl |= LVDS_DIGON;
2302 if (!(lvds_gen_cntl & LVDS_ON)) {
2303 lvds_gen_cntl &= ~LVDS_BLON;
2304 OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl);
2305 (void)INREG(LVDS_GEN_CNTL);
2306 mdelay(10);
2307 lvds_gen_cntl |= LVDS_BLON;
2308 OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl);
2309 }
2310 lvds_gen_cntl &= ~LVDS_BL_MOD_LEVEL_MASK;
2311 lvds_gen_cntl |= (conv_table[level] <<
2312 LVDS_BL_MOD_LEVEL_SHIFT);
2313 lvds_gen_cntl |= (LVDS_ON | LVDS_EN);
2314 lvds_gen_cntl &= ~LVDS_DISPLAY_DIS;
2315 } else {
2316 lvds_gen_cntl &= ~LVDS_BL_MOD_LEVEL_MASK;
2317 lvds_gen_cntl |= (conv_table[0] <<
2318 LVDS_BL_MOD_LEVEL_SHIFT);
2319 lvds_gen_cntl |= LVDS_DISPLAY_DIS;
2320 OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl);
2321 udelay(10);
2322 lvds_gen_cntl &= ~(LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGON);
2323 }
2324
2325 OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl);
2326 rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK;
2327 rinfo->init_state.lvds_gen_cntl |= (lvds_gen_cntl & LVDS_STATE_MASK);
2328
2329 return 0;
2330}
2331
2332static int radeon_set_backlight_level(int level, void *data)
2333{
2334 return radeon_set_backlight_enable(1, level, data);
2335}
2336#endif /* CONFIG_PMAC_BACKLIGHT */
2337
2338
2339#ifdef CONFIG_PMAC_PBOOK
2340
2341static u32 dbg_clk;
2342
2343/*
2344 * Radeon M6 Power Management code. This code currently only supports
2345 * the mobile chips, it's based from some informations provided by ATI
2346 * along with hours of tracing of MacOS drivers
2347 */
2348
2349static void radeon_pm_save_regs(struct radeonfb_info *rinfo)
2350{
2351 rinfo->save_regs[0] = INPLL(PLL_PWRMGT_CNTL);
2352 rinfo->save_regs[1] = INPLL(CLK_PWRMGT_CNTL);
2353 rinfo->save_regs[2] = INPLL(MCLK_CNTL);
2354 rinfo->save_regs[3] = INPLL(SCLK_CNTL);
2355 rinfo->save_regs[4] = INPLL(CLK_PIN_CNTL);
2356 rinfo->save_regs[5] = INPLL(VCLK_ECP_CNTL);
2357 rinfo->save_regs[6] = INPLL(PIXCLKS_CNTL);
2358 rinfo->save_regs[7] = INPLL(MCLK_MISC);
2359 rinfo->save_regs[8] = INPLL(P2PLL_CNTL);
2360
2361 rinfo->save_regs[9] = INREG(DISP_MISC_CNTL);
2362 rinfo->save_regs[10] = INREG(DISP_PWR_MAN);
2363 rinfo->save_regs[11] = INREG(LVDS_GEN_CNTL);
2364 rinfo->save_regs[12] = INREG(LVDS_PLL_CNTL);
2365 rinfo->save_regs[13] = INREG(TV_DAC_CNTL);
2366 rinfo->save_regs[14] = INREG(BUS_CNTL1);
2367 rinfo->save_regs[15] = INREG(CRTC_OFFSET_CNTL);
2368 rinfo->save_regs[16] = INREG(AGP_CNTL);
2369 rinfo->save_regs[17] = (INREG(CRTC_GEN_CNTL) & 0xfdffffff) | 0x04000000;
2370 rinfo->save_regs[18] = (INREG(CRTC2_GEN_CNTL) & 0xfdffffff) | 0x04000000;
2371 rinfo->save_regs[19] = INREG(GPIOPAD_A);
2372 rinfo->save_regs[20] = INREG(GPIOPAD_EN);
2373 rinfo->save_regs[21] = INREG(GPIOPAD_MASK);
2374 rinfo->save_regs[22] = INREG(ZV_LCDPAD_A);
2375 rinfo->save_regs[23] = INREG(ZV_LCDPAD_EN);
2376 rinfo->save_regs[24] = INREG(ZV_LCDPAD_MASK);
2377 rinfo->save_regs[25] = INREG(GPIO_VGA_DDC);
2378 rinfo->save_regs[26] = INREG(GPIO_DVI_DDC);
2379 rinfo->save_regs[27] = INREG(GPIO_MONID);
2380 rinfo->save_regs[28] = INREG(GPIO_CRT2_DDC);
2381
2382 rinfo->save_regs[29] = INREG(SURFACE_CNTL);
2383 rinfo->save_regs[30] = INREG(MC_FB_LOCATION);
2384 rinfo->save_regs[31] = INREG(DISPLAY_BASE_ADDR);
2385 rinfo->save_regs[32] = INREG(MC_AGP_LOCATION);
2386 rinfo->save_regs[33] = INREG(CRTC2_DISPLAY_BASE_ADDR);
2387}
2388
2389static void radeon_pm_restore_regs(struct radeonfb_info *rinfo)
2390{
2391 OUTPLL(P2PLL_CNTL, rinfo->save_regs[8] & 0xFFFFFFFE); /* First */
2392
2393 OUTPLL(PLL_PWRMGT_CNTL, rinfo->save_regs[0]);
2394 OUTPLL(CLK_PWRMGT_CNTL, rinfo->save_regs[1]);
2395 OUTPLL(MCLK_CNTL, rinfo->save_regs[2]);
2396 OUTPLL(SCLK_CNTL, rinfo->save_regs[3]);
2397 OUTPLL(CLK_PIN_CNTL, rinfo->save_regs[4]);
2398 OUTPLL(VCLK_ECP_CNTL, rinfo->save_regs[5]);
2399 OUTPLL(PIXCLKS_CNTL, rinfo->save_regs[6]);
2400 OUTPLL(MCLK_MISC, rinfo->save_regs[7]);
2401
2402 OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]);
2403 OUTREG(DISP_PWR_MAN, rinfo->save_regs[10]);
2404 OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11]);
2405 OUTREG(LVDS_PLL_CNTL,rinfo->save_regs[12]);
2406 OUTREG(TV_DAC_CNTL, rinfo->save_regs[13]);
2407 OUTREG(BUS_CNTL1, rinfo->save_regs[14]);
2408 OUTREG(CRTC_OFFSET_CNTL, rinfo->save_regs[15]);
2409 OUTREG(AGP_CNTL, rinfo->save_regs[16]);
2410 OUTREG(CRTC_GEN_CNTL, rinfo->save_regs[17]);
2411 OUTREG(CRTC2_GEN_CNTL, rinfo->save_regs[18]);
2412
2413 // wait VBL before that one ?
2414 OUTPLL(P2PLL_CNTL, rinfo->save_regs[8]);
2415
2416 OUTREG(GPIOPAD_A, rinfo->save_regs[19]);
2417 OUTREG(GPIOPAD_EN, rinfo->save_regs[20]);
2418 OUTREG(GPIOPAD_MASK, rinfo->save_regs[21]);
2419 OUTREG(ZV_LCDPAD_A, rinfo->save_regs[22]);
2420 OUTREG(ZV_LCDPAD_EN, rinfo->save_regs[23]);
2421 OUTREG(ZV_LCDPAD_MASK, rinfo->save_regs[24]);
2422 OUTREG(GPIO_VGA_DDC, rinfo->save_regs[25]);
2423 OUTREG(GPIO_DVI_DDC, rinfo->save_regs[26]);
2424 OUTREG(GPIO_MONID, rinfo->save_regs[27]);
2425 OUTREG(GPIO_CRT2_DDC, rinfo->save_regs[28]);
2426}
2427
2428static void radeon_pm_disable_iopad(struct radeonfb_info *rinfo)
2429{
2430 OUTREG(GPIOPAD_MASK, 0x0001ffff);
2431 OUTREG(GPIOPAD_EN, 0x00000400);
2432 OUTREG(GPIOPAD_A, 0x00000000);
2433 OUTREG(ZV_LCDPAD_MASK, 0x00000000);
2434 OUTREG(ZV_LCDPAD_EN, 0x00000000);
2435 OUTREG(ZV_LCDPAD_A, 0x00000000);
2436 OUTREG(GPIO_VGA_DDC, 0x00030000);
2437 OUTREG(GPIO_DVI_DDC, 0x00000000);
2438 OUTREG(GPIO_MONID, 0x00030000);
2439 OUTREG(GPIO_CRT2_DDC, 0x00000000);
2440}
2441
2442static void radeon_pm_program_v2clk(struct radeonfb_info *rinfo)
2443{
2444//
2445// u32 reg;
2446//
2447// OUTPLL(P2PLL_REF_DIV, 0x0c);
2448//
2449// .../... figure out what macos does here
2450}
2451
2452static void radeon_pm_low_current(struct radeonfb_info *rinfo)
2453{
2454 u32 reg;
2455
2456 reg = INREG(BUS_CNTL1);
2457 reg &= ~BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK;
2458 reg |= BUS_CNTL1_AGPCLK_VALID | (1<<BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT);
2459 OUTREG(BUS_CNTL1, reg);
2460
2461 reg = INPLL(PLL_PWRMGT_CNTL);
2462 reg |= PLL_PWRMGT_CNTL_SPLL_TURNOFF | PLL_PWRMGT_CNTL_PPLL_TURNOFF |
2463 PLL_PWRMGT_CNTL_P2PLL_TURNOFF | PLL_PWRMGT_CNTL_TVPLL_TURNOFF;
2464 reg &= ~PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK;
2465 reg &= ~PLL_PWRMGT_CNTL_MOBILE_SU;
2466 OUTPLL(PLL_PWRMGT_CNTL, reg);
2467
2468// reg = INPLL(TV_PLL_CNTL1);
2469// reg |= TV_PLL_CNTL1__TVPLL_RESET | TV_PLL_CNTL1__TVPLL_SLEEP;
2470// OUTPLL(TV_PLL_CNTL1, reg);
2471
2472 reg = INREG(TV_DAC_CNTL);
2473 reg &= ~(TV_DAC_CNTL_BGADJ_MASK |TV_DAC_CNTL_DACADJ_MASK);
2474 reg |=TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD |
2475 TV_DAC_CNTL_BDACPD |
2476 (8<<TV_DAC_CNTL_BGADJ__SHIFT) | (8<<TV_DAC_CNTL_DACADJ__SHIFT);
2477 OUTREG(TV_DAC_CNTL, reg);
2478
2479 reg = INREG(TMDS_TRANSMITTER_CNTL);
2480 reg &= ~(TMDS_PLL_EN |TMDS_PLLRST);
2481 OUTREG(TMDS_TRANSMITTER_CNTL, reg);
2482
2483// lvds_pll_cntl = regr32(g, LVDS_PLL_CNTL);
2484// lvds_pll_cntl &= ~LVDS_PLL_CNTL__LVDS_PLL_EN;
2485// lvds_pll_cntl |= LVDS_PLL_CNTL__LVDS_PLL_RESET;
2486// regw32(g, LVDS_PLL_CNTL, lvds_pll_cntl);
2487
2488 reg = INREG(DAC_CNTL);
2489 reg &= ~DAC_CMP_EN;
2490 OUTREG(DAC_CNTL, reg);
2491
2492 reg = INREG(DAC_CNTL2);
2493 reg &= ~DAC2_CMP_EN;
2494 OUTREG(DAC_CNTL2, reg);
2495
2496 reg = INREG(TV_DAC_CNTL);
2497 reg &= ~TV_DAC_CNTL_DETECT;
2498 OUTREG(TV_DAC_CNTL, reg);
2499}
2500
2501static void radeon_pm_setup_for_suspend(struct radeonfb_info *rinfo)
2502{
2503 /* This code is disabled. It does what is in the pm_init
2504 * function of the MacOS driver code ATI sent me. However,
2505 * it doesn't fix my sleep problem, and is causing other issues
2506 * on wakeup (bascially the machine dying when switching consoles
2507 * I haven't had time to investigate this yet
2508 */
2509#if 0
2510 u32 disp_misc_cntl;
2511 u32 disp_pwr_man;
2512 u32 temp;
2513
2514 // set SPLL, MPLL, PPLL, P2PLL, TVPLL, SCLK, MCLK, PCLK, P2CLK,
2515 // TCLK and TEST_MODE to 0
2516 temp = INPLL(CLK_PWRMGT_CNTL);
2517 OUTPLL(CLK_PWRMGT_CNTL , temp & ~0xc00002ff);
2518
2519 // Turn on Power Management
2520 temp = INPLL(CLK_PWRMGT_CNTL);
2521 OUTPLL(CLK_PWRMGT_CNTL , temp | 0x00000400);
2522
2523 // Turn off display clock if using mobile chips
2524 temp = INPLL(CLK_PWRMGT_CNTL);
2525 OUTREG(CLK_PWRMGT_CNTL , temp | 0x00100000);
2526
2527 // Force PIXCLK_ALWAYS_ON and PIXCLK_DAC_ALWAYS_ON
2528 temp = INPLL(VCLK_ECP_CNTL);
2529 OUTPLL(VCLK_ECP_CNTL, temp & ~0x000000c0);
2530
2531 // Force ECP_FORCE_ON to 1
2532 temp = INPLL(VCLK_ECP_CNTL);
2533 OUTPLL(VCLK_ECP_CNTL, temp | 0x00040000);
2534
2535 // Force PIXCLK_BLEND_ALWAYS_ON and PIXCLK_GV_ALWAYS_ON
2536 temp = INPLL(PIXCLKS_CNTL);
2537 OUTPLL(PIXCLKS_CNTL, temp & ~0x00001800);
2538
2539 // Forcing SCLK_CNTL to ON
2540 OUTPLL(SCLK_CNTL, (INPLL(SCLK_CNTL)& 0x00000007) | 0xffff8000 );
2541
2542 // Set PM control over XTALIN pad
2543 temp = INPLL(CLK_PIN_CNTL);
2544 OUTPLL(CLK_PIN_CNTL, temp | 0x00080000);
2545
2546 // Force MCLK and YCLK and MC as dynamic
2547 temp = INPLL(MCLK_CNTL);
2548 OUTPLL(MCLK_CNTL, temp & 0xffeaffff);
2549
2550 // PLL_TURNOFF
2551 temp = INPLL(PLL_PWRMGT_CNTL);
2552 OUTPLL(PLL_PWRMGT_CNTL, temp | 0x0000001f);
2553
2554 // set MOBILE_SU to 1 if M6 or DDR64 is detected
2555 temp = INPLL(PLL_PWRMGT_CNTL);
2556 OUTPLL(PLL_PWRMGT_CNTL, temp | 0x00010000);
2557
2558 // select PM access mode (PM_MODE_SEL) (use ACPI mode)
2559// temp = INPLL(PLL_PWRMGT_CNTL);
2560// OUTPLL(PLL_PWRMGT_CNTL, temp | 0x00002000);
2561 temp = INPLL(PLL_PWRMGT_CNTL);
2562 OUTPLL(PLL_PWRMGT_CNTL, temp & ~0x00002000);
2563
2564 // set DISP_MISC_CNTL register
2565 disp_misc_cntl = INREG(DISP_MISC_CNTL);
2566 disp_misc_cntl &= ~( DISP_MISC_CNTL_SOFT_RESET_GRPH_PP |
2567 DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP |
2568 DISP_MISC_CNTL_SOFT_RESET_OV0_PP |
2569 DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK |
2570 DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK |
2571 DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK |
2572 DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP |
2573 DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK |
2574 DISP_MISC_CNTL_SOFT_RESET_LVDS |
2575 DISP_MISC_CNTL_SOFT_RESET_TMDS |
2576 DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS |
2577 DISP_MISC_CNTL_SOFT_RESET_TV);
2578 OUTREG(DISP_MISC_CNTL, disp_misc_cntl);
2579
2580 // set DISP_PWR_MAN register
2581 disp_pwr_man = INREG(DISP_PWR_MAN);
2582 // clau - 9.29.2000 - changes made to bit23:18 to set to 1 as requested by George
2583 disp_pwr_man |= (DISP_PWR_MAN_DIG_TMDS_ENABLE_RST |
2584 DISP_PWR_MAN_TV_ENABLE_RST |
2585 // DISP_PWR_MAN_AUTO_PWRUP_EN |
2586 DISP_PWR_MAN_DISP_D3_GRPH_RST |
2587 DISP_PWR_MAN_DISP_D3_SUBPIC_RST |
2588 DISP_PWR_MAN_DISP_D3_OV0_RST |
2589 DISP_PWR_MAN_DISP_D1D2_GRPH_RST |
2590 DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST |
2591 DISP_PWR_MAN_DISP_D1D2_OV0_RST);
2592 disp_pwr_man &= ~(DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN |
2593 DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN|
2594 DISP_PWR_MAN_DISP_D3_RST |
2595 DISP_PWR_MAN_DISP_D3_REG_RST);
2596 OUTREG(DISP_PWR_MAN, disp_pwr_man);
2597
2598 // clau - 10.24.2000
2599 // - add in setting for BUS_CNTL1 b27:26 = 0x01 and b31 = 0x1
2600 // - add in setting for AGP_CNTL b7:0 = 0x20
2601 // - add in setting for DVI_DDC_DATA_OUT_EN b17:16 = 0x0
2602
2603 // the following settings (two lines) are applied at a later part of this function, only on mobile platform
2604 // requres -mobile flag
2605 OUTREG(BUS_CNTL1, (INREG(BUS_CNTL1) & 0xf3ffffff) | 0x04000000);
2606 OUTREG(BUS_CNTL1, INREG(BUS_CNTL1) | 0x80000000);
2607 OUTREG(AGP_CNTL, (INREG(AGP_CNTL) & 0xffffff00) | 0x20);
2608 OUTREG(GPIO_DVI_DDC, INREG(GPIO_DVI_DDC) & 0xfffcffff);
2609
2610 // yulee - 12.12.2000
2611 // A12 only
2612 // EN_MCLK_TRISTATE_IN_SUSPEND@MCLK_MISC = 1
2613 // ACCESS_REGS_IN_SUSPEND@CLK_PIN_CNTL = 0
2614 // only on mobile platform
2615 OUTPLL(MCLK_MISC, INPLL(MCLK_MISC) | 0x00040000 );
2616
2617 // yulee -12.12.2000
2618 // AGPCLK_VALID@BUS_CNTL1 = 1
2619 // MOBILE_PLATFORM_SEL@BUS_CNTL1 = 01
2620 // CRTC_STEREO_SYNC_OUT_EN@CRTC_OFFSET_CNTL = 0
2621 // CG_CLK_TO_OUTPIN@CLK_PIN_CNTL = 0
2622 // only on mobile platform
2623 OUTPLL(CLK_PIN_CNTL, INPLL(CLK_PIN_CNTL ) & 0xFFFFF7FF );
2624 OUTREG(BUS_CNTL1, (INREG(BUS_CNTL1 ) & 0xF3FFFFFF) | 0x84000000 );
2625 OUTREG(CRTC_OFFSET_CNTL, INREG(CRTC_OFFSET_CNTL ) & 0xFFEFFFFF );
2626
2627 mdelay(100);
2628#endif
2629
2630 /* Disable CRTCs */
2631 OUTREG(CRTC_GEN_CNTL, (INREG(CRTC_GEN_CNTL) & ~CRTC_EN) | CRTC_DISP_REQ_EN_B);
2632 OUTREG(CRTC2_GEN_CNTL, (INREG(CRTC2_GEN_CNTL) & ~CRTC2_EN) | CRTC2_DISP_REQ_EN_B);
2633 (void)INREG(CRTC2_GEN_CNTL);
2634 mdelay(17);
2635}
2636
2637static void radeon_set_suspend(struct radeonfb_info *rinfo, int suspend)
2638{
2639 u16 pwr_cmd;
2640
2641 if (!rinfo->pm_reg)
2642 return;
2643
2644 /* Set the chip into appropriate suspend mode (we use D2,
2645 * D3 would require a compete re-initialization of the chip,
2646 * including PCI config registers, clocks, AGP conf, ...)
2647 */
2648 if (suspend) {
2649 /* According to ATI, we should program V2CLK here, I have
2650 * to verify what's up exactly
2651 */
2652 /* Save some registers */
2653 radeon_pm_save_regs(rinfo);
2654
2655 /* Check that on M7 too, might work might not. M7 may also
2656 * need explicit enabling of PM
2657 */
2658 if (rinfo->arch == RADEON_M6) {
2659 /* Program V2CLK */
2660 radeon_pm_program_v2clk(rinfo);
2661
2662 /* Disable IO PADs */
2663 radeon_pm_disable_iopad(rinfo);
2664
2665 /* Set low current */
2666 radeon_pm_low_current(rinfo);
2667
2668 /* Prepare chip for power management */
2669 radeon_pm_setup_for_suspend(rinfo);
2670
2671 /* Reset the MDLL */
2672 OUTPLL(MDLL_CKO, INPLL(MDLL_CKO) | MCKOA_RESET);
2673 (void)INPLL(MDLL_RDCKA);
2674 OUTPLL(MDLL_CKO, INPLL(MDLL_CKO) & ~MCKOA_RESET);
2675 (void)INPLL(MDLL_RDCKA);
2676 }
2677
2678 /* Switch PCI power managment to D2. */
2679 for (;;) {
2680 pci_read_config_word(
2681 rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL,
2682 &pwr_cmd);
2683 if (pwr_cmd & 2)
2684 break;
2685 pci_write_config_word(
2686 rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL,
2687 (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | 2);
2688 mdelay(500);
2689 }
2690 } else {
2691 /* Switch back PCI powermanagment to D0 */
2692 mdelay(200);
2693 pci_write_config_word(rinfo->pdev, rinfo->pm_reg+PCI_PM_CTRL, 0);
2694 mdelay(500);
2695
2696 dbg_clk = INPLL(1);
2697
2698 /* Do we need that on M7 ? */
2699 if (rinfo->arch == RADEON_M6) {
2700 /* Restore the MDLL */
2701 OUTPLL(MDLL_CKO, INPLL(MDLL_CKO) & ~MCKOA_RESET);
2702 (void)INPLL(MDLL_CKO);
2703 }
2704
2705 /* Restore some registers */
2706 radeon_pm_restore_regs(rinfo);
2707 }
2708}
2709
2710/*
2711 * Save the contents of the framebuffer when we go to sleep,
2712 * and restore it when we wake up again.
2713 */
2714
2715int radeon_sleep_notify(struct pmu_sleep_notifier *self, int when)
2716{
2717 struct radeonfb_info *rinfo;
2718
2719 for (rinfo = board_list; rinfo != NULL; rinfo = rinfo->next) {
2720 struct fb_fix_screeninfo fix;
2721 int nb;
2722 struct display *disp;
2723
2724 disp = (rinfo->currcon < 0) ? rinfo->info.disp : &fb_display[rinfo->currcon];
2725
2726 switch (rinfo->arch) {
2727 case RADEON_M6:
2728 case RADEON_M7:
2729 case RADEON_M9:
2730 break;
2731 default:
2732 return PBOOK_SLEEP_REFUSE;
2733 }
2734
2735 radeonfb_get_fix(&fix, fg_console, (struct fb_info *)rinfo);
2736 nb = fb_display[fg_console].var.yres * fix.line_length;
2737
2738 switch (when) {
2739 case PBOOK_SLEEP_NOW:
2740 acquire_console_sem();
2741 disp->dispsw = &fbcon_dummy;
2742
2743 if (!noaccel) {
2744 /* Make sure engine is reset */
2745 radeon_engine_reset();
2746 radeon_engine_idle();
2747 }
2748
2749 /* Blank display and LCD */
2750 radeonfb_blank(VESA_POWERDOWN+1,
2751 (struct fb_info *)rinfo);
2752
2753 /* Sleep */
2754 rinfo->asleep = 1;
2755 radeon_set_suspend(rinfo, 1);
2756 release_console_sem();
2757
2758 break;
2759 case PBOOK_WAKE:
2760 acquire_console_sem();
2761 /* Wakeup */
2762 radeon_set_suspend(rinfo, 0);
2763
2764 if (!noaccel)
2765 radeon_engine_init(rinfo);
2766 rinfo->asleep = 0;
2767 radeon_set_dispsw(rinfo, disp);
2768 radeon_load_video_mode(rinfo, &disp->var);
2769 do_install_cmap(rinfo->currcon < 0 ? 0 : rinfo->currcon,
2770 (struct fb_info *)rinfo);
2771
2772 radeonfb_blank(0, (struct fb_info *)rinfo);
2773 release_console_sem();
2774 printk("CLK_PIN_CNTL on wakeup was: %08x\n", dbg_clk);
2775 break;
2776 }
2777 }
2778
2779 return PBOOK_SLEEP_OK;
2780}
2781
2782#endif /* CONFIG_PMAC_PBOOK */
2783
2784static int radeonfb_pci_register (struct pci_dev *pdev,
2785 const struct pci_device_id *ent)
2786{
2787 struct radeonfb_info *rinfo;
2788 struct radeon_chip_info *rci = &radeon_chip_info[ent->driver_data];
2789 u32 tmp;
2790
2791 RTRACE("radeonfb_pci_register BEGIN\n");
2792
2793 /* Enable device in PCI config */
2794 if (pci_enable_device(pdev) != 0) {
2795 printk(KERN_ERR "radeonfb: Cannot enable PCI device\n");
2796 return -ENODEV;
2797 }
2798
2799 rinfo = kmalloc (sizeof (struct radeonfb_info), GFP_KERNEL);
2800 if (!rinfo) {
2801 printk ("radeonfb: could not allocate memory\n");
2802 return -ENODEV;
2803 }
2804
2805 memset (rinfo, 0, sizeof (struct radeonfb_info));
2806 //info = &rinfo->info;
2807 rinfo->pdev = pdev;
2808 strcpy(rinfo->name, rci->name);
2809 rinfo->arch = rci->arch;
2810
2811 /* Set base addrs */
2812 rinfo->fb_base_phys = pci_resource_start (pdev, 0);
2813 rinfo->mmio_base_phys = pci_resource_start (pdev, 2);
2814
2815 /* request the mem regions */
2816 if (!request_mem_region (rinfo->fb_base_phys,
2817 pci_resource_len(pdev, 0), "radeonfb")) {
2818 printk ("radeonfb: cannot reserve FB region\n");
2819 kfree (rinfo);
2820 return -ENODEV;
2821 }
2822
2823 if (!request_mem_region (rinfo->mmio_base_phys,
2824 pci_resource_len(pdev, 2), "radeonfb")) {
2825 printk ("radeonfb: cannot reserve MMIO region\n");
2826 release_mem_region (rinfo->fb_base_phys,
2827 pci_resource_len(pdev, 0));
2828 kfree (rinfo);
2829 return -ENODEV;
2830 }
2831
2832 /* map the regions */
2833 rinfo->mmio_base = ioremap (rinfo->mmio_base_phys, RADEON_REGSIZE);
2834 if (!rinfo->mmio_base) {
2835 printk ("radeonfb: cannot map MMIO\n");
2836 release_mem_region (rinfo->mmio_base_phys,
2837 pci_resource_len(pdev, 2));
2838 release_mem_region (rinfo->fb_base_phys,
2839 pci_resource_len(pdev, 0));
2840 kfree (rinfo);
2841 return -ENODEV;
2842 }
2843
2844 rinfo->chipset = pdev->device;
2845
2846 switch (rinfo->arch) {
2847 case RADEON_R100:
2848 rinfo->hasCRTC2 = 0;
2849 break;
2850 default:
2851 /* all the rest have it */
2852 rinfo->hasCRTC2 = 1;
2853 break;
2854 }
2855#if 0
2856 if (rinfo->arch == RADEON_M7) {
2857 /*
2858 * Noticed some errors in accel with M7, will have to work these out...
2859 */
2860 noaccel = 1;
2861 }
2862#endif
2863 if (mirror)
2864 printk("radeonfb: mirroring display to CRT\n");
2865
2866 /* framebuffer size */
2867 tmp = INREG(CONFIG_MEMSIZE);
2868
2869 /* mem size is bits [28:0], mask off the rest */
2870 rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;
2871
2872 /* ram type */
2873 tmp = INREG(MEM_SDRAM_MODE_REG);
2874 switch ((MEM_CFG_TYPE & tmp) >> 30) {
2875 case 0:
2876 /* SDR SGRAM (2:1) */
2877 strcpy(rinfo->ram_type, "SDR SGRAM");
2878 rinfo->ram.ml = 4;
2879 rinfo->ram.mb = 4;
2880 rinfo->ram.trcd = 1;
2881 rinfo->ram.trp = 2;
2882 rinfo->ram.twr = 1;
2883 rinfo->ram.cl = 2;
2884 rinfo->ram.loop_latency = 16;
2885 rinfo->ram.rloop = 16;
2886
2887 break;
2888 case 1:
2889 /* DDR SGRAM */
2890 strcpy(rinfo->ram_type, "DDR SGRAM");
2891 rinfo->ram.ml = 4;
2892 rinfo->ram.mb = 4;
2893 rinfo->ram.trcd = 3;
2894 rinfo->ram.trp = 3;
2895 rinfo->ram.twr = 2;
2896 rinfo->ram.cl = 3;
2897 rinfo->ram.tr2w = 1;
2898 rinfo->ram.loop_latency = 16;
2899 rinfo->ram.rloop = 16;
2900
2901 break;
2902 default:
2903 /* 64-bit SDR SGRAM */
2904 strcpy(rinfo->ram_type, "SDR SGRAM 64");
2905 rinfo->ram.ml = 4;
2906 rinfo->ram.mb = 8;
2907 rinfo->ram.trcd = 3;
2908 rinfo->ram.trp = 3;
2909 rinfo->ram.twr = 1;
2910 rinfo->ram.cl = 3;
2911 rinfo->ram.tr2w = 1;
2912 rinfo->ram.loop_latency = 17;
2913 rinfo->ram.rloop = 17;
2914
2915 break;
2916 }
2917
2918 rinfo->bios_seg = radeon_find_rom(rinfo);
2919 radeon_get_pllinfo(rinfo, rinfo->bios_seg);
2920
2921 /*
2922 * Hack to get around some busted production M6's
2923 * reporting no ram
2924 */
2925 if (rinfo->video_ram == 0) {
2926 switch (pdev->device) {
2927 case PCI_DEVICE_ID_ATI_RADEON_LY:
2928 case PCI_DEVICE_ID_ATI_RADEON_LZ:
2929 rinfo->video_ram = 8192 * 1024;
2930 break;
2931 default:
2932 break;
2933 }
2934 }
2935
2936
2937 RTRACE("radeonfb: probed %s %dk videoram\n", (rinfo->ram_type), (rinfo->video_ram/1024));
2938
2939#if !defined(__powerpc__)
2940 radeon_get_moninfo(rinfo);
2941#else
2942 switch (pdev->device) {
2943 case PCI_DEVICE_ID_ATI_RADEON_LW:
2944 case PCI_DEVICE_ID_ATI_RADEON_LX:
2945 case PCI_DEVICE_ID_ATI_RADEON_LY:
2946 case PCI_DEVICE_ID_ATI_RADEON_LZ:
2947 rinfo->dviDisp_type = MT_LCD;
2948 break;
2949 default:
2950 radeon_get_moninfo(rinfo);
2951 break;
2952 }
2953#endif
2954
2955 radeon_get_EDID(rinfo);
2956
2957 if ((rinfo->dviDisp_type == MT_DFP) || (rinfo->dviDisp_type == MT_LCD) ||
2958 (rinfo->crtDisp_type == MT_DFP)) {
2959 if (!radeon_get_dfpinfo(rinfo)) {
2960 iounmap(rinfo->mmio_base);
2961 release_mem_region (rinfo->mmio_base_phys,
2962 pci_resource_len(pdev, 2));
2963 release_mem_region (rinfo->fb_base_phys,
2964 pci_resource_len(pdev, 0));
2965 kfree (rinfo);
2966 return -ENODEV;
2967 }
2968 }
2969
2970 rinfo->fb_base = ioremap (rinfo->fb_base_phys, rinfo->video_ram);
2971 if (!rinfo->fb_base) {
2972 printk ("radeonfb: cannot map FB\n");
2973 iounmap(rinfo->mmio_base);
2974 release_mem_region (rinfo->mmio_base_phys,
2975 pci_resource_len(pdev, 2));
2976 release_mem_region (rinfo->fb_base_phys,
2977 pci_resource_len(pdev, 0));
2978 kfree (rinfo);
2979 return -ENODEV;
2980 }
2981
2982 /* I SHOULD FIX THAT CRAP ! I should probably mimmic XFree DRI
2983 * driver setup here.
2984 *
2985 * On PPC, OF based cards setup the internal memory
2986 * mapping in strange ways. We change it so that the
2987 * framebuffer is mapped at 0 and given half of the card's
2988 * address space (2Gb). AGP is mapped high (0xe0000000) and
2989 * can use up to 512Mb. Once DRI is fully implemented, we
2990 * will have to setup the PCI remapper to remap the agp_special_page
2991 * memory page somewhere between those regions so that the card
2992 * use a normal PCI bus master cycle to access the ring read ptr.
2993 * --BenH.
2994 */
2995#ifdef CONFIG_ALL_PPC
2996 if (rinfo->hasCRTC2)
2997 OUTREG(CRTC2_GEN_CNTL,
2998 (INREG(CRTC2_GEN_CNTL) & ~CRTC2_EN) | CRTC2_DISP_REQ_EN_B);
2999 OUTREG(CRTC_EXT_CNTL, INREG(CRTC_EXT_CNTL) | CRTC_DISPLAY_DIS);
3000 OUTREG(MC_FB_LOCATION, 0x7fff0000);
3001 OUTREG(MC_AGP_LOCATION, 0xffffe000);
3002 OUTREG(DISPLAY_BASE_ADDR, 0x00000000);
3003 if (rinfo->hasCRTC2)
3004 OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0x00000000);
3005 OUTREG(SRC_OFFSET, 0x00000000);
3006 OUTREG(DST_OFFSET, 0x00000000);
3007 mdelay(10);
3008 OUTREG(CRTC_EXT_CNTL, INREG(CRTC_EXT_CNTL) & ~CRTC_DISPLAY_DIS);
3009#endif /* CONFIG_ALL_PPC */
3010
3011 /* save current mode regs before we switch into the new one
3012 * so we can restore this upon __exit
3013 */
3014 radeon_save_state (rinfo, &rinfo->init_state);
3015
3016 /* set all the vital stuff */
3017 radeon_set_fbinfo (rinfo);
3018
3019 pci_set_drvdata(pdev, rinfo);
3020 rinfo->next = board_list;
3021 board_list = rinfo;
3022 ((struct fb_info *) rinfo)->device = &pdev->dev;
3023 if (register_framebuffer ((struct fb_info *) rinfo) < 0) {
3024 printk ("radeonfb: could not register framebuffer\n");
3025 iounmap(rinfo->fb_base);
3026 iounmap(rinfo->mmio_base);
3027 release_mem_region (rinfo->mmio_base_phys,
3028 pci_resource_len(pdev, 2));
3029 release_mem_region (rinfo->fb_base_phys,
3030 pci_resource_len(pdev, 0));
3031 kfree (rinfo);
3032 return -ENODEV;
3033 }
3034
3035#ifdef CONFIG_MTRR
3036 rinfo->mtrr_hdl = nomtrr ? -1 : mtrr_add(rinfo->fb_base_phys,
3037 rinfo->video_ram,
3038 MTRR_TYPE_WRCOMB, 1);
3039#endif
3040
3041#ifdef CONFIG_PMAC_BACKLIGHT
3042 if (rinfo->dviDisp_type == MT_LCD)
3043 register_backlight_controller(&radeon_backlight_controller,
3044 rinfo, "ati");
3045#endif
3046
3047#ifdef CONFIG_PMAC_PBOOK
3048 if (rinfo->dviDisp_type == MT_LCD) {
3049 rinfo->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM);
3050 pmu_register_sleep_notifier(&radeon_sleep_notifier);
3051 }
3052#endif
3053
3054 printk ("radeonfb: ATI Radeon %s %s %d MB\n", rinfo->name, rinfo->ram_type,
3055 (rinfo->video_ram/(1024*1024)));
3056
3057 if (rinfo->hasCRTC2) {
3058 printk("radeonfb: DVI port %s monitor connected\n",
3059 GET_MON_NAME(rinfo->dviDisp_type));
3060 printk("radeonfb: CRT port %s monitor connected\n",
3061 GET_MON_NAME(rinfo->crtDisp_type));
3062 } else {
3063 printk("radeonfb: CRT port %s monitor connected\n",
3064 GET_MON_NAME(rinfo->crtDisp_type));
3065 }
3066
3067 RTRACE("radeonfb_pci_register END\n");
3068
3069 return 0;
3070}
3071
3072
3073
3074static void __devexit radeonfb_pci_unregister (struct pci_dev *pdev)
3075{
3076 struct radeonfb_info *rinfo = pci_get_drvdata(pdev);
3077
3078 if (!rinfo)
3079 return;
3080
3081 /* restore original state
3082 *
3083 * Doesn't quite work yet, possibly because of the PPC hacking
3084 * I do on startup, disable for now. --BenH
3085 */
3086 radeon_write_mode (rinfo, &rinfo->init_state);
3087
3088#ifdef CONFIG_MTRR
3089 if (rinfo->mtrr_hdl >= 0)
3090 mtrr_del(rinfo->mtrr_hdl, 0, 0);
3091#endif
3092
3093 unregister_framebuffer ((struct fb_info *) rinfo);
3094
3095 iounmap(rinfo->mmio_base);
3096 iounmap(rinfo->fb_base);
3097
3098 release_mem_region (rinfo->mmio_base_phys,
3099 pci_resource_len(pdev, 2));
3100 release_mem_region (rinfo->fb_base_phys,
3101 pci_resource_len(pdev, 0));
3102
3103 kfree (rinfo);
3104}
3105
3106
3107static struct pci_driver radeonfb_driver = {
3108 .name = "radeonfb",
3109 .id_table = radeonfb_pci_table,
3110 .probe = radeonfb_pci_register,
3111 .remove = __devexit_p(radeonfb_pci_unregister),
3112};
3113
3114#ifndef MODULE
3115static int __init radeonfb_old_setup (char *options)
3116{
3117 char *this_opt;
3118
3119 if (!options || !*options)
3120 return 0;
3121
3122 while ((this_opt = strsep (&options, ",")) != NULL) {
3123 if (!*this_opt)
3124 continue;
3125 if (!strncmp(this_opt, "noaccel", 7)) {
3126 noaccel = 1;
3127 } else if (!strncmp(this_opt, "mirror", 6)) {
3128 mirror = 1;
3129 } else if (!strncmp(this_opt, "dfp", 3)) {
3130 force_dfp = 1;
3131 } else if (!strncmp(this_opt, "panel_yres:", 11)) {
3132 panel_yres = simple_strtoul((this_opt+11), NULL, 0);
3133 } else if (!strncmp(this_opt, "nomtrr", 6)) {
3134 nomtrr = 1;
3135 } else
3136 mode_option = this_opt;
3137 }
3138
3139 return 0;
3140}
3141#endif /* MODULE */
3142
3143static int __init radeonfb_old_init (void)
3144{
3145#ifndef MODULE
3146 char *option = NULL;
3147
3148 if (fb_get_options("radeonfb_old", &option))
3149 return -ENODEV;
3150 radeonfb_old_setup(option);
3151#endif
3152 return pci_register_driver (&radeonfb_driver);
3153}
3154
3155
3156static void __exit radeonfb_old_exit (void)
3157{
3158 pci_unregister_driver (&radeonfb_driver);
3159}
3160
3161module_init(radeonfb_old_init);
3162module_exit(radeonfb_old_exit);
3163
3164
3165MODULE_AUTHOR("Ani Joshi");
3166MODULE_DESCRIPTION("framebuffer driver for ATI Radeon chipset");
3167MODULE_LICENSE("GPL");
diff --git a/drivers/video/sticore.h b/drivers/video/sticore.h
index dc93336af5..1a9a60c74b 100644
--- a/drivers/video/sticore.h
+++ b/drivers/video/sticore.h
@@ -34,36 +34,20 @@
34 * for them to fix it and steal their solution. prumpf 34 * for them to fix it and steal their solution. prumpf
35 */ 35 */
36 36
37#define STI_WAIT 1 37#include <asm/io.h>
38
39#include <asm/io.h> /* for USE_HPPA_IOREMAP */
40
41#if USE_HPPA_IOREMAP
42 38
43#define STI_PTR(p) (p) 39#define STI_WAIT 1
44#define PTR_STI(p) (p)
45static inline int STI_CALL( unsigned long func,
46 void *flags, void *inptr, void *outptr, void *glob_cfg )
47{
48 int (*f)(void *,void *,void *,void *);
49 f = (void*)func;
50 return f(flags, inptr, outptr, glob_cfg);
51}
52
53#else /* !USE_HPPA_IOREMAP */
54 40
55#define STI_PTR(p) ( virt_to_phys(p) ) 41#define STI_PTR(p) ( virt_to_phys(p) )
56#define PTR_STI(p) ( phys_to_virt((long)p) ) 42#define PTR_STI(p) ( phys_to_virt((unsigned long)p) )
57#define STI_CALL(func, flags, inptr, outptr, glob_cfg) \ 43#define STI_CALL(func, flags, inptr, outptr, glob_cfg) \
58 ({ \ 44 ({ \
59 pdc_sti_call( func, (unsigned long)STI_PTR(flags), \ 45 pdc_sti_call( func, STI_PTR(flags), \
60 (unsigned long)STI_PTR(inptr), \ 46 STI_PTR(inptr), \
61 (unsigned long)STI_PTR(outptr), \ 47 STI_PTR(outptr), \
62 (unsigned long)STI_PTR(glob_cfg)); \ 48 STI_PTR(glob_cfg)); \
63 }) 49 })
64 50
65#endif /* USE_HPPA_IOREMAP */
66
67 51
68#define sti_onscreen_x(sti) (sti->glob_cfg->onscreen_x) 52#define sti_onscreen_x(sti) (sti->glob_cfg->onscreen_x)
69#define sti_onscreen_y(sti) (sti->glob_cfg->onscreen_y) 53#define sti_onscreen_y(sti) (sti->glob_cfg->onscreen_y)
@@ -352,8 +336,9 @@ struct sti_struct {
352 struct sti_conf_outptr outptr; /* configuration */ 336 struct sti_conf_outptr outptr; /* configuration */
353 struct sti_conf_outptr_ext outptr_ext; 337 struct sti_conf_outptr_ext outptr_ext;
354 338
355 /* PCI data structures (pg. 17ff from sti.pdf) */
356 struct pci_dev *pd; 339 struct pci_dev *pd;
340
341 /* PCI data structures (pg. 17ff from sti.pdf) */
357 u8 rm_entry[16]; /* pci region mapper array == pci config space offset */ 342 u8 rm_entry[16]; /* pci region mapper array == pci config space offset */
358 343
359 /* pointer to the fb_info where this STI device is used */ 344 /* pointer to the fb_info where this STI device is used */
diff --git a/drivers/video/stifb.c b/drivers/video/stifb.c
index 56d71d6e9a..4a292aae6e 100644
--- a/drivers/video/stifb.c
+++ b/drivers/video/stifb.c
@@ -3,7 +3,7 @@
3 * Low level Frame buffer driver for HP workstations with 3 * Low level Frame buffer driver for HP workstations with
4 * STI (standard text interface) video firmware. 4 * STI (standard text interface) video firmware.
5 * 5 *
6 * Copyright (C) 2001-2005 Helge Deller <deller@gmx.de> 6 * Copyright (C) 2001-2006 Helge Deller <deller@gmx.de>
7 * Portions Copyright (C) 2001 Thomas Bogendoerfer <tsbogend@alpha.franken.de> 7 * Portions Copyright (C) 2001 Thomas Bogendoerfer <tsbogend@alpha.franken.de>
8 * 8 *
9 * Based on: 9 * Based on:
@@ -514,7 +514,7 @@ rattlerSetupPlanes(struct stifb_info *fb)
514 SETUP_HW(fb); 514 SETUP_HW(fb);
515 WRITE_BYTE(1, fb, REG_16b1); 515 WRITE_BYTE(1, fb, REG_16b1);
516 516
517 fb_memset(fb->info.fix.smem_start, 0xff, 517 fb_memset((void*)fb->info.fix.smem_start, 0xff,
518 fb->info.var.yres*fb->info.fix.line_length); 518 fb->info.var.yres*fb->info.fix.line_length);
519 519
520 CRX24_SET_OVLY_MASK(fb); 520 CRX24_SET_OVLY_MASK(fb);
@@ -908,83 +908,6 @@ SETUP_HCRX(struct stifb_info *fb)
908 908
909/* ------------------- driver specific functions --------------------------- */ 909/* ------------------- driver specific functions --------------------------- */
910 910
911#define TMPBUFLEN 2048
912
913static ssize_t
914stifb_read(struct file *file, char *buf, size_t count, loff_t *ppos)
915{
916 unsigned long p = *ppos;
917 struct inode *inode = file->f_dentry->d_inode;
918 int fbidx = iminor(inode);
919 struct fb_info *info = registered_fb[fbidx];
920 char tmpbuf[TMPBUFLEN];
921
922 if (!info || ! info->screen_base)
923 return -ENODEV;
924
925 if (p >= info->fix.smem_len)
926 return 0;
927 if (count >= info->fix.smem_len)
928 count = info->fix.smem_len;
929 if (count + p > info->fix.smem_len)
930 count = info->fix.smem_len - p;
931 if (count > sizeof(tmpbuf))
932 count = sizeof(tmpbuf);
933 if (count) {
934 char *base_addr;
935
936 base_addr = info->screen_base;
937 memcpy_fromio(&tmpbuf, base_addr+p, count);
938 count -= copy_to_user(buf, &tmpbuf, count);
939 if (!count)
940 return -EFAULT;
941 *ppos += count;
942 }
943 return count;
944}
945
946static ssize_t
947stifb_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
948{
949 struct inode *inode = file->f_dentry->d_inode;
950 int fbidx = iminor(inode);
951 struct fb_info *info = registered_fb[fbidx];
952 unsigned long p = *ppos;
953 size_t c;
954 int err;
955 char tmpbuf[TMPBUFLEN];
956
957 if (!info || !info->screen_base)
958 return -ENODEV;
959
960 if (p > info->fix.smem_len)
961 return -ENOSPC;
962 if (count >= info->fix.smem_len)
963 count = info->fix.smem_len;
964 err = 0;
965 if (count + p > info->fix.smem_len) {
966 count = info->fix.smem_len - p;
967 err = -ENOSPC;
968 }
969
970 p += (unsigned long)info->screen_base;
971 c = count;
972 while (c) {
973 int len = c > sizeof(tmpbuf) ? sizeof(tmpbuf) : c;
974 err = -EFAULT;
975 if (copy_from_user(&tmpbuf, buf, len))
976 break;
977 memcpy_toio(p, &tmpbuf, len);
978 c -= len;
979 p += len;
980 buf += len;
981 *ppos += len;
982 }
983 if (count-c)
984 return (count-c);
985 return err;
986}
987
988static int 911static int
989stifb_setcolreg(u_int regno, u_int red, u_int green, 912stifb_setcolreg(u_int regno, u_int red, u_int green,
990 u_int blue, u_int transp, struct fb_info *info) 913 u_int blue, u_int transp, struct fb_info *info)
@@ -1137,8 +1060,6 @@ stifb_init_display(struct stifb_info *fb)
1137 1060
1138static struct fb_ops stifb_ops = { 1061static struct fb_ops stifb_ops = {
1139 .owner = THIS_MODULE, 1062 .owner = THIS_MODULE,
1140 .fb_read = stifb_read,
1141 .fb_write = stifb_write,
1142 .fb_setcolreg = stifb_setcolreg, 1063 .fb_setcolreg = stifb_setcolreg,
1143 .fb_blank = stifb_blank, 1064 .fb_blank = stifb_blank,
1144 .fb_fillrect = cfb_fillrect, 1065 .fb_fillrect = cfb_fillrect,
@@ -1162,7 +1083,7 @@ stifb_init_fb(struct sti_struct *sti, int bpp_pref)
1162 char *dev_name; 1083 char *dev_name;
1163 int bpp, xres, yres; 1084 int bpp, xres, yres;
1164 1085
1165 fb = kmalloc(sizeof(*fb), GFP_ATOMIC); 1086 fb = kzalloc(sizeof(*fb), GFP_ATOMIC);
1166 if (!fb) { 1087 if (!fb) {
1167 printk(KERN_ERR "stifb: Could not allocate stifb structure\n"); 1088 printk(KERN_ERR "stifb: Could not allocate stifb structure\n");
1168 return -ENODEV; 1089 return -ENODEV;
@@ -1171,7 +1092,6 @@ stifb_init_fb(struct sti_struct *sti, int bpp_pref)
1171 info = &fb->info; 1092 info = &fb->info;
1172 1093
1173 /* set struct to a known state */ 1094 /* set struct to a known state */
1174 memset(fb, 0, sizeof(*fb));
1175 fix = &info->fix; 1095 fix = &info->fix;
1176 var = &info->var; 1096 var = &info->var;
1177 1097
@@ -1234,7 +1154,7 @@ stifb_init_fb(struct sti_struct *sti, int bpp_pref)
1234 case S9000_ID_TOMCAT: /* Dual CRX, behaves else like a CRX */ 1154 case S9000_ID_TOMCAT: /* Dual CRX, behaves else like a CRX */
1235 /* FIXME: TomCat supports two heads: 1155 /* FIXME: TomCat supports two heads:
1236 * fb.iobase = REGION_BASE(fb_info,3); 1156 * fb.iobase = REGION_BASE(fb_info,3);
1237 * fb.screen_base = (void*) REGION_BASE(fb_info,2); 1157 * fb.screen_base = ioremap_nocache(REGION_BASE(fb_info,2),xxx);
1238 * for now we only support the left one ! */ 1158 * for now we only support the left one ! */
1239 xres = fb->ngle_rom.x_size_visible; 1159 xres = fb->ngle_rom.x_size_visible;
1240 yres = fb->ngle_rom.y_size_visible; 1160 yres = fb->ngle_rom.y_size_visible;
@@ -1327,7 +1247,8 @@ stifb_init_fb(struct sti_struct *sti, int bpp_pref)
1327 1247
1328 strcpy(fix->id, "stifb"); 1248 strcpy(fix->id, "stifb");
1329 info->fbops = &stifb_ops; 1249 info->fbops = &stifb_ops;
1330 info->screen_base = (void*) REGION_BASE(fb,1); 1250 info->screen_base = ioremap_nocache(REGION_BASE(fb,1), fix->smem_len);
1251 info->screen_size = fix->smem_len;
1331 info->flags = FBINFO_DEFAULT; 1252 info->flags = FBINFO_DEFAULT;
1332 info->pseudo_palette = &fb->pseudo_palette; 1253 info->pseudo_palette = &fb->pseudo_palette;
1333 1254
@@ -1457,7 +1378,7 @@ stifb_setup(char *options)
1457 int i; 1378 int i;
1458 1379
1459 if (!options || !*options) 1380 if (!options || !*options)
1460 return 0; 1381 return 1;
1461 1382
1462 if (strncmp(options, "off", 3) == 0) { 1383 if (strncmp(options, "off", 3) == 0) {
1463 stifb_disabled = 1; 1384 stifb_disabled = 1;
@@ -1472,7 +1393,7 @@ stifb_setup(char *options)
1472 stifb_bpp_pref[i] = simple_strtoul(options, &options, 10); 1393 stifb_bpp_pref[i] = simple_strtoul(options, &options, 10);
1473 } 1394 }
1474 } 1395 }
1475 return 0; 1396 return 1;
1476} 1397}
1477 1398
1478__setup("stifb=", stifb_setup); 1399__setup("stifb=", stifb_setup);
diff --git a/drivers/video/w100fb.c b/drivers/video/w100fb.c
index f6e24ee85f..5fc86ea206 100644
--- a/drivers/video/w100fb.c
+++ b/drivers/video/w100fb.c
@@ -4,8 +4,9 @@
4 * Frame Buffer Device for ATI Imageon w100 (Wallaby) 4 * Frame Buffer Device for ATI Imageon w100 (Wallaby)
5 * 5 *
6 * Copyright (C) 2002, ATI Corp. 6 * Copyright (C) 2002, ATI Corp.
7 * Copyright (C) 2004-2005 Richard Purdie 7 * Copyright (C) 2004-2006 Richard Purdie
8 * Copyright (c) 2005 Ian Molton 8 * Copyright (c) 2005 Ian Molton
9 * Copyright (c) 2006 Alberto Mardegan
9 * 10 *
10 * Rewritten for 2.6 by Richard Purdie <rpurdie@rpsys.net> 11 * Rewritten for 2.6 by Richard Purdie <rpurdie@rpsys.net>
11 * 12 *
@@ -14,6 +15,9 @@
14 * 15 *
15 * w32xx support by Ian Molton 16 * w32xx support by Ian Molton
16 * 17 *
18 * Hardware acceleration support by Alberto Mardegan
19 * <mardy@users.sourceforge.net>
20 *
17 * This program is free software; you can redistribute it and/or modify 21 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as 22 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation. 23 * published by the Free Software Foundation.
@@ -47,6 +51,7 @@ static void w100_set_dispregs(struct w100fb_par*);
47static void w100_update_enable(void); 51static void w100_update_enable(void);
48static void w100_update_disable(void); 52static void w100_update_disable(void);
49static void calc_hsync(struct w100fb_par *par); 53static void calc_hsync(struct w100fb_par *par);
54static void w100_init_graphic_engine(struct w100fb_par *par);
50struct w100_pll_info *w100_get_xtal_table(unsigned int freq); 55struct w100_pll_info *w100_get_xtal_table(unsigned int freq);
51 56
52/* Pseudo palette size */ 57/* Pseudo palette size */
@@ -248,6 +253,152 @@ static int w100fb_blank(int blank_mode, struct fb_info *info)
248} 253}
249 254
250 255
256static void w100_fifo_wait(int entries)
257{
258 union rbbm_status_u status;
259 int i;
260
261 for (i = 0; i < 2000000; i++) {
262 status.val = readl(remapped_regs + mmRBBM_STATUS);
263 if (status.f.cmdfifo_avail >= entries)
264 return;
265 udelay(1);
266 }
267 printk(KERN_ERR "w100fb: FIFO Timeout!\n");
268}
269
270
271static int w100fb_sync(struct fb_info *info)
272{
273 union rbbm_status_u status;
274 int i;
275
276 for (i = 0; i < 2000000; i++) {
277 status.val = readl(remapped_regs + mmRBBM_STATUS);
278 if (!status.f.gui_active)
279 return 0;
280 udelay(1);
281 }
282 printk(KERN_ERR "w100fb: Graphic engine timeout!\n");
283 return -EBUSY;
284}
285
286
287static void w100_init_graphic_engine(struct w100fb_par *par)
288{
289 union dp_gui_master_cntl_u gmc;
290 union dp_mix_u dp_mix;
291 union dp_datatype_u dp_datatype;
292 union dp_cntl_u dp_cntl;
293
294 w100_fifo_wait(4);
295 writel(W100_FB_BASE, remapped_regs + mmDST_OFFSET);
296 writel(par->xres, remapped_regs + mmDST_PITCH);
297 writel(W100_FB_BASE, remapped_regs + mmSRC_OFFSET);
298 writel(par->xres, remapped_regs + mmSRC_PITCH);
299
300 w100_fifo_wait(3);
301 writel(0, remapped_regs + mmSC_TOP_LEFT);
302 writel((par->yres << 16) | par->xres, remapped_regs + mmSC_BOTTOM_RIGHT);
303 writel(0x1fff1fff, remapped_regs + mmSRC_SC_BOTTOM_RIGHT);
304
305 w100_fifo_wait(4);
306 dp_cntl.val = 0;
307 dp_cntl.f.dst_x_dir = 1;
308 dp_cntl.f.dst_y_dir = 1;
309 dp_cntl.f.src_x_dir = 1;
310 dp_cntl.f.src_y_dir = 1;
311 dp_cntl.f.dst_major_x = 1;
312 dp_cntl.f.src_major_x = 1;
313 writel(dp_cntl.val, remapped_regs + mmDP_CNTL);
314
315 gmc.val = 0;
316 gmc.f.gmc_src_pitch_offset_cntl = 1;
317 gmc.f.gmc_dst_pitch_offset_cntl = 1;
318 gmc.f.gmc_src_clipping = 1;
319 gmc.f.gmc_dst_clipping = 1;
320 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE;
321 gmc.f.gmc_dst_datatype = 3; /* from DstType_16Bpp_444 */
322 gmc.f.gmc_src_datatype = SRC_DATATYPE_EQU_DST;
323 gmc.f.gmc_byte_pix_order = 1;
324 gmc.f.gmc_default_sel = 0;
325 gmc.f.gmc_rop3 = ROP3_SRCCOPY;
326 gmc.f.gmc_dp_src_source = DP_SRC_MEM_RECTANGULAR;
327 gmc.f.gmc_clr_cmp_fcn_dis = 1;
328 gmc.f.gmc_wr_msk_dis = 1;
329 gmc.f.gmc_dp_op = DP_OP_ROP;
330 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
331
332 dp_datatype.val = dp_mix.val = 0;
333 dp_datatype.f.dp_dst_datatype = gmc.f.gmc_dst_datatype;
334 dp_datatype.f.dp_brush_datatype = gmc.f.gmc_brush_datatype;
335 dp_datatype.f.dp_src2_type = 0;
336 dp_datatype.f.dp_src2_datatype = gmc.f.gmc_src_datatype;
337 dp_datatype.f.dp_src_datatype = gmc.f.gmc_src_datatype;
338 dp_datatype.f.dp_byte_pix_order = gmc.f.gmc_byte_pix_order;
339 writel(dp_datatype.val, remapped_regs + mmDP_DATATYPE);
340
341 dp_mix.f.dp_src_source = gmc.f.gmc_dp_src_source;
342 dp_mix.f.dp_src2_source = 1;
343 dp_mix.f.dp_rop3 = gmc.f.gmc_rop3;
344 dp_mix.f.dp_op = gmc.f.gmc_dp_op;
345 writel(dp_mix.val, remapped_regs + mmDP_MIX);
346}
347
348
349static void w100fb_fillrect(struct fb_info *info,
350 const struct fb_fillrect *rect)
351{
352 union dp_gui_master_cntl_u gmc;
353
354 if (info->state != FBINFO_STATE_RUNNING)
355 return;
356 if (info->flags & FBINFO_HWACCEL_DISABLED) {
357 cfb_fillrect(info, rect);
358 return;
359 }
360
361 gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL);
362 gmc.f.gmc_rop3 = ROP3_PATCOPY;
363 gmc.f.gmc_brush_datatype = GMC_BRUSH_SOLID_COLOR;
364 w100_fifo_wait(2);
365 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
366 writel(rect->color, remapped_regs + mmDP_BRUSH_FRGD_CLR);
367
368 w100_fifo_wait(2);
369 writel((rect->dy << 16) | (rect->dx & 0xffff), remapped_regs + mmDST_Y_X);
370 writel((rect->width << 16) | (rect->height & 0xffff),
371 remapped_regs + mmDST_WIDTH_HEIGHT);
372}
373
374
375static void w100fb_copyarea(struct fb_info *info,
376 const struct fb_copyarea *area)
377{
378 u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy;
379 u32 h = area->height, w = area->width;
380 union dp_gui_master_cntl_u gmc;
381
382 if (info->state != FBINFO_STATE_RUNNING)
383 return;
384 if (info->flags & FBINFO_HWACCEL_DISABLED) {
385 cfb_copyarea(info, area);
386 return;
387 }
388
389 gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL);
390 gmc.f.gmc_rop3 = ROP3_SRCCOPY;
391 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE;
392 w100_fifo_wait(1);
393 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL);
394
395 w100_fifo_wait(3);
396 writel((sy << 16) | (sx & 0xffff), remapped_regs + mmSRC_Y_X);
397 writel((dy << 16) | (dx & 0xffff), remapped_regs + mmDST_Y_X);
398 writel((w << 16) | (h & 0xffff), remapped_regs + mmDST_WIDTH_HEIGHT);
399}
400
401
251/* 402/*
252 * Change the resolution by calling the appropriate hardware functions 403 * Change the resolution by calling the appropriate hardware functions
253 */ 404 */
@@ -265,6 +416,7 @@ static void w100fb_activate_var(struct w100fb_par *par)
265 w100_init_lcd(par); 416 w100_init_lcd(par);
266 w100_set_dispregs(par); 417 w100_set_dispregs(par);
267 w100_update_enable(); 418 w100_update_enable();
419 w100_init_graphic_engine(par);
268 420
269 calc_hsync(par); 421 calc_hsync(par);
270 422
@@ -394,9 +546,10 @@ static struct fb_ops w100fb_ops = {
394 .fb_set_par = w100fb_set_par, 546 .fb_set_par = w100fb_set_par,
395 .fb_setcolreg = w100fb_setcolreg, 547 .fb_setcolreg = w100fb_setcolreg,
396 .fb_blank = w100fb_blank, 548 .fb_blank = w100fb_blank,
397 .fb_fillrect = cfb_fillrect, 549 .fb_fillrect = w100fb_fillrect,
398 .fb_copyarea = cfb_copyarea, 550 .fb_copyarea = w100fb_copyarea,
399 .fb_imageblit = cfb_imageblit, 551 .fb_imageblit = cfb_imageblit,
552 .fb_sync = w100fb_sync,
400}; 553};
401 554
402#ifdef CONFIG_PM 555#ifdef CONFIG_PM
@@ -543,7 +696,8 @@ int __init w100fb_probe(struct platform_device *pdev)
543 } 696 }
544 697
545 info->fbops = &w100fb_ops; 698 info->fbops = &w100fb_ops;
546 info->flags = FBINFO_DEFAULT; 699 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
700 FBINFO_HWACCEL_FILLRECT;
547 info->node = -1; 701 info->node = -1;
548 info->screen_base = remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE); 702 info->screen_base = remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE);
549 info->screen_size = REMAPPED_FB_LEN; 703 info->screen_size = REMAPPED_FB_LEN;
diff --git a/drivers/video/w100fb.h b/drivers/video/w100fb.h
index 7a58a1e3e4..fffae7b4f6 100644
--- a/drivers/video/w100fb.h
+++ b/drivers/video/w100fb.h
@@ -122,15 +122,32 @@
122/* Block DISPLAY End: */ 122/* Block DISPLAY End: */
123 123
124/* Block GFX Start: */ 124/* Block GFX Start: */
125#define mmDST_OFFSET 0x1004
126#define mmDST_PITCH 0x1008
127#define mmDST_Y_X 0x1038
128#define mmDST_WIDTH_HEIGHT 0x1198
129#define mmDP_GUI_MASTER_CNTL 0x106C
125#define mmBRUSH_OFFSET 0x108C 130#define mmBRUSH_OFFSET 0x108C
126#define mmBRUSH_Y_X 0x1074 131#define mmBRUSH_Y_X 0x1074
132#define mmDP_BRUSH_FRGD_CLR 0x107C
133#define mmSRC_OFFSET 0x11AC
134#define mmSRC_PITCH 0x11B0
135#define mmSRC_Y_X 0x1034
127#define mmDEFAULT_PITCH_OFFSET 0x10A0 136#define mmDEFAULT_PITCH_OFFSET 0x10A0
128#define mmDEFAULT_SC_BOTTOM_RIGHT 0x10A8 137#define mmDEFAULT_SC_BOTTOM_RIGHT 0x10A8
129#define mmDEFAULT2_SC_BOTTOM_RIGHT 0x10AC 138#define mmDEFAULT2_SC_BOTTOM_RIGHT 0x10AC
139#define mmSC_TOP_LEFT 0x11BC
140#define mmSC_BOTTOM_RIGHT 0x11C0
141#define mmSRC_SC_BOTTOM_RIGHT 0x11C4
130#define mmGLOBAL_ALPHA 0x1210 142#define mmGLOBAL_ALPHA 0x1210
131#define mmFILTER_COEF 0x1214 143#define mmFILTER_COEF 0x1214
132#define mmMVC_CNTL_START 0x11E0 144#define mmMVC_CNTL_START 0x11E0
133#define mmE2_ARITHMETIC_CNTL 0x1220 145#define mmE2_ARITHMETIC_CNTL 0x1220
146#define mmDP_CNTL 0x11C8
147#define mmDP_CNTL_DST_DIR 0x11CC
148#define mmDP_DATATYPE 0x12C4
149#define mmDP_MIX 0x12C8
150#define mmDP_WRITE_MSK 0x12CC
134#define mmENG_CNTL 0x13E8 151#define mmENG_CNTL 0x13E8
135#define mmENG_PERF_CNT 0x13F0 152#define mmENG_PERF_CNT 0x13F0
136/* Block GFX End: */ 153/* Block GFX End: */
@@ -179,6 +196,7 @@
179/* Block RBBM Start: */ 196/* Block RBBM Start: */
180#define mmWAIT_UNTIL 0x1400 197#define mmWAIT_UNTIL 0x1400
181#define mmISYNC_CNTL 0x1404 198#define mmISYNC_CNTL 0x1404
199#define mmRBBM_STATUS 0x0140
182#define mmRBBM_CNTL 0x0144 200#define mmRBBM_CNTL 0x0144
183#define mmNQWAIT_UNTIL 0x0150 201#define mmNQWAIT_UNTIL 0x0150
184/* Block RBBM End: */ 202/* Block RBBM End: */
@@ -225,147 +243,147 @@
225/* Register structure definitions */ 243/* Register structure definitions */
226 244
227struct wrap_top_dir_t { 245struct wrap_top_dir_t {
228 unsigned long top_addr : 23; 246 u32 top_addr : 23;
229 unsigned long : 9; 247 u32 : 9;
230} __attribute__((packed)); 248} __attribute__((packed));
231 249
232union wrap_top_dir_u { 250union wrap_top_dir_u {
233 unsigned long val : 32; 251 u32 val : 32;
234 struct wrap_top_dir_t f; 252 struct wrap_top_dir_t f;
235} __attribute__((packed)); 253} __attribute__((packed));
236 254
237struct wrap_start_dir_t { 255struct wrap_start_dir_t {
238 unsigned long start_addr : 23; 256 u32 start_addr : 23;
239 unsigned long : 9; 257 u32 : 9;
240} __attribute__((packed)); 258} __attribute__((packed));
241 259
242union wrap_start_dir_u { 260union wrap_start_dir_u {
243 unsigned long val : 32; 261 u32 val : 32;
244 struct wrap_start_dir_t f; 262 struct wrap_start_dir_t f;
245} __attribute__((packed)); 263} __attribute__((packed));
246 264
247struct cif_cntl_t { 265struct cif_cntl_t {
248 unsigned long swap_reg : 2; 266 u32 swap_reg : 2;
249 unsigned long swap_fbuf_1 : 2; 267 u32 swap_fbuf_1 : 2;
250 unsigned long swap_fbuf_2 : 2; 268 u32 swap_fbuf_2 : 2;
251 unsigned long swap_fbuf_3 : 2; 269 u32 swap_fbuf_3 : 2;
252 unsigned long pmi_int_disable : 1; 270 u32 pmi_int_disable : 1;
253 unsigned long pmi_schmen_disable : 1; 271 u32 pmi_schmen_disable : 1;
254 unsigned long intb_oe : 1; 272 u32 intb_oe : 1;
255 unsigned long en_wait_to_compensate_dq_prop_dly : 1; 273 u32 en_wait_to_compensate_dq_prop_dly : 1;
256 unsigned long compensate_wait_rd_size : 2; 274 u32 compensate_wait_rd_size : 2;
257 unsigned long wait_asserted_timeout_val : 2; 275 u32 wait_asserted_timeout_val : 2;
258 unsigned long wait_masked_val : 2; 276 u32 wait_masked_val : 2;
259 unsigned long en_wait_timeout : 1; 277 u32 en_wait_timeout : 1;
260 unsigned long en_one_clk_setup_before_wait : 1; 278 u32 en_one_clk_setup_before_wait : 1;
261 unsigned long interrupt_active_high : 1; 279 u32 interrupt_active_high : 1;
262 unsigned long en_overwrite_straps : 1; 280 u32 en_overwrite_straps : 1;
263 unsigned long strap_wait_active_hi : 1; 281 u32 strap_wait_active_hi : 1;
264 unsigned long lat_busy_count : 2; 282 u32 lat_busy_count : 2;
265 unsigned long lat_rd_pm4_sclk_busy : 1; 283 u32 lat_rd_pm4_sclk_busy : 1;
266 unsigned long dis_system_bits : 1; 284 u32 dis_system_bits : 1;
267 unsigned long dis_mr : 1; 285 u32 dis_mr : 1;
268 unsigned long cif_spare_1 : 4; 286 u32 cif_spare_1 : 4;
269} __attribute__((packed)); 287} __attribute__((packed));
270 288
271union cif_cntl_u { 289union cif_cntl_u {
272 unsigned long val : 32; 290 u32 val : 32;
273 struct cif_cntl_t f; 291 struct cif_cntl_t f;
274} __attribute__((packed)); 292} __attribute__((packed));
275 293
276struct cfgreg_base_t { 294struct cfgreg_base_t {
277 unsigned long cfgreg_base : 24; 295 u32 cfgreg_base : 24;
278 unsigned long : 8; 296 u32 : 8;
279} __attribute__((packed)); 297} __attribute__((packed));
280 298
281union cfgreg_base_u { 299union cfgreg_base_u {
282 unsigned long val : 32; 300 u32 val : 32;
283 struct cfgreg_base_t f; 301 struct cfgreg_base_t f;
284} __attribute__((packed)); 302} __attribute__((packed));
285 303
286struct cif_io_t { 304struct cif_io_t {
287 unsigned long dq_srp : 1; 305 u32 dq_srp : 1;
288 unsigned long dq_srn : 1; 306 u32 dq_srn : 1;
289 unsigned long dq_sp : 4; 307 u32 dq_sp : 4;
290 unsigned long dq_sn : 4; 308 u32 dq_sn : 4;
291 unsigned long waitb_srp : 1; 309 u32 waitb_srp : 1;
292 unsigned long waitb_srn : 1; 310 u32 waitb_srn : 1;
293 unsigned long waitb_sp : 4; 311 u32 waitb_sp : 4;
294 unsigned long waitb_sn : 4; 312 u32 waitb_sn : 4;
295 unsigned long intb_srp : 1; 313 u32 intb_srp : 1;
296 unsigned long intb_srn : 1; 314 u32 intb_srn : 1;
297 unsigned long intb_sp : 4; 315 u32 intb_sp : 4;
298 unsigned long intb_sn : 4; 316 u32 intb_sn : 4;
299 unsigned long : 2; 317 u32 : 2;
300} __attribute__((packed)); 318} __attribute__((packed));
301 319
302union cif_io_u { 320union cif_io_u {
303 unsigned long val : 32; 321 u32 val : 32;
304 struct cif_io_t f; 322 struct cif_io_t f;
305} __attribute__((packed)); 323} __attribute__((packed));
306 324
307struct cif_read_dbg_t { 325struct cif_read_dbg_t {
308 unsigned long unpacker_pre_fetch_trig_gen : 2; 326 u32 unpacker_pre_fetch_trig_gen : 2;
309 unsigned long dly_second_rd_fetch_trig : 1; 327 u32 dly_second_rd_fetch_trig : 1;
310 unsigned long rst_rd_burst_id : 1; 328 u32 rst_rd_burst_id : 1;
311 unsigned long dis_rd_burst_id : 1; 329 u32 dis_rd_burst_id : 1;
312 unsigned long en_block_rd_when_packer_is_not_emp : 1; 330 u32 en_block_rd_when_packer_is_not_emp : 1;
313 unsigned long dis_pre_fetch_cntl_sm : 1; 331 u32 dis_pre_fetch_cntl_sm : 1;
314 unsigned long rbbm_chrncy_dis : 1; 332 u32 rbbm_chrncy_dis : 1;
315 unsigned long rbbm_rd_after_wr_lat : 2; 333 u32 rbbm_rd_after_wr_lat : 2;
316 unsigned long dis_be_during_rd : 1; 334 u32 dis_be_during_rd : 1;
317 unsigned long one_clk_invalidate_pulse : 1; 335 u32 one_clk_invalidate_pulse : 1;
318 unsigned long dis_chnl_priority : 1; 336 u32 dis_chnl_priority : 1;
319 unsigned long rst_read_path_a_pls : 1; 337 u32 rst_read_path_a_pls : 1;
320 unsigned long rst_read_path_b_pls : 1; 338 u32 rst_read_path_b_pls : 1;
321 unsigned long dis_reg_rd_fetch_trig : 1; 339 u32 dis_reg_rd_fetch_trig : 1;
322 unsigned long dis_rd_fetch_trig_from_ind_addr : 1; 340 u32 dis_rd_fetch_trig_from_ind_addr : 1;
323 unsigned long dis_rd_same_byte_to_trig_fetch : 1; 341 u32 dis_rd_same_byte_to_trig_fetch : 1;
324 unsigned long dis_dir_wrap : 1; 342 u32 dis_dir_wrap : 1;
325 unsigned long dis_ring_buf_to_force_dec : 1; 343 u32 dis_ring_buf_to_force_dec : 1;
326 unsigned long dis_addr_comp_in_16bit : 1; 344 u32 dis_addr_comp_in_16bit : 1;
327 unsigned long clr_w : 1; 345 u32 clr_w : 1;
328 unsigned long err_rd_tag_is_3 : 1; 346 u32 err_rd_tag_is_3 : 1;
329 unsigned long err_load_when_ful_a : 1; 347 u32 err_load_when_ful_a : 1;
330 unsigned long err_load_when_ful_b : 1; 348 u32 err_load_when_ful_b : 1;
331 unsigned long : 7; 349 u32 : 7;
332} __attribute__((packed)); 350} __attribute__((packed));
333 351
334union cif_read_dbg_u { 352union cif_read_dbg_u {
335 unsigned long val : 32; 353 u32 val : 32;
336 struct cif_read_dbg_t f; 354 struct cif_read_dbg_t f;
337} __attribute__((packed)); 355} __attribute__((packed));
338 356
339struct cif_write_dbg_t { 357struct cif_write_dbg_t {
340 unsigned long packer_timeout_count : 2; 358 u32 packer_timeout_count : 2;
341 unsigned long en_upper_load_cond : 1; 359 u32 en_upper_load_cond : 1;
342 unsigned long en_chnl_change_cond : 1; 360 u32 en_chnl_change_cond : 1;
343 unsigned long dis_addr_comp_cond : 1; 361 u32 dis_addr_comp_cond : 1;
344 unsigned long dis_load_same_byte_addr_cond : 1; 362 u32 dis_load_same_byte_addr_cond : 1;
345 unsigned long dis_timeout_cond : 1; 363 u32 dis_timeout_cond : 1;
346 unsigned long dis_timeout_during_rbbm : 1; 364 u32 dis_timeout_during_rbbm : 1;
347 unsigned long dis_packer_ful_during_rbbm_timeout : 1; 365 u32 dis_packer_ful_during_rbbm_timeout : 1;
348 unsigned long en_dword_split_to_rbbm : 1; 366 u32 en_dword_split_to_rbbm : 1;
349 unsigned long en_dummy_val : 1; 367 u32 en_dummy_val : 1;
350 unsigned long dummy_val_sel : 1; 368 u32 dummy_val_sel : 1;
351 unsigned long mask_pm4_wrptr_dec : 1; 369 u32 mask_pm4_wrptr_dec : 1;
352 unsigned long dis_mc_clean_cond : 1; 370 u32 dis_mc_clean_cond : 1;
353 unsigned long err_two_reqi_during_ful : 1; 371 u32 err_two_reqi_during_ful : 1;
354 unsigned long err_reqi_during_idle_clk : 1; 372 u32 err_reqi_during_idle_clk : 1;
355 unsigned long err_global : 1; 373 u32 err_global : 1;
356 unsigned long en_wr_buf_dbg_load : 1; 374 u32 en_wr_buf_dbg_load : 1;
357 unsigned long en_wr_buf_dbg_path : 1; 375 u32 en_wr_buf_dbg_path : 1;
358 unsigned long sel_wr_buf_byte : 3; 376 u32 sel_wr_buf_byte : 3;
359 unsigned long dis_rd_flush_wr : 1; 377 u32 dis_rd_flush_wr : 1;
360 unsigned long dis_packer_ful_cond : 1; 378 u32 dis_packer_ful_cond : 1;
361 unsigned long dis_invalidate_by_ops_chnl : 1; 379 u32 dis_invalidate_by_ops_chnl : 1;
362 unsigned long en_halt_when_reqi_err : 1; 380 u32 en_halt_when_reqi_err : 1;
363 unsigned long cif_spare_2 : 5; 381 u32 cif_spare_2 : 5;
364 unsigned long : 1; 382 u32 : 1;
365} __attribute__((packed)); 383} __attribute__((packed));
366 384
367union cif_write_dbg_u { 385union cif_write_dbg_u {
368 unsigned long val : 32; 386 u32 val : 32;
369 struct cif_write_dbg_t f; 387 struct cif_write_dbg_t f;
370} __attribute__((packed)); 388} __attribute__((packed));
371 389
@@ -403,327 +421,327 @@ union cpu_defaults_u {
403} __attribute__((packed)); 421} __attribute__((packed));
404 422
405struct crtc_total_t { 423struct crtc_total_t {
406 unsigned long crtc_h_total : 10; 424 u32 crtc_h_total : 10;
407 unsigned long : 6; 425 u32 : 6;
408 unsigned long crtc_v_total : 10; 426 u32 crtc_v_total : 10;
409 unsigned long : 6; 427 u32 : 6;
410} __attribute__((packed)); 428} __attribute__((packed));
411 429
412union crtc_total_u { 430union crtc_total_u {
413 unsigned long val : 32; 431 u32 val : 32;
414 struct crtc_total_t f; 432 struct crtc_total_t f;
415} __attribute__((packed)); 433} __attribute__((packed));
416 434
417struct crtc_ss_t { 435struct crtc_ss_t {
418 unsigned long ss_start : 10; 436 u32 ss_start : 10;
419 unsigned long : 6; 437 u32 : 6;
420 unsigned long ss_end : 10; 438 u32 ss_end : 10;
421 unsigned long : 2; 439 u32 : 2;
422 unsigned long ss_align : 1; 440 u32 ss_align : 1;
423 unsigned long ss_pol : 1; 441 u32 ss_pol : 1;
424 unsigned long ss_run_mode : 1; 442 u32 ss_run_mode : 1;
425 unsigned long ss_en : 1; 443 u32 ss_en : 1;
426} __attribute__((packed)); 444} __attribute__((packed));
427 445
428union crtc_ss_u { 446union crtc_ss_u {
429 unsigned long val : 32; 447 u32 val : 32;
430 struct crtc_ss_t f; 448 struct crtc_ss_t f;
431} __attribute__((packed)); 449} __attribute__((packed));
432 450
433struct active_h_disp_t { 451struct active_h_disp_t {
434 unsigned long active_h_start : 10; 452 u32 active_h_start : 10;
435 unsigned long : 6; 453 u32 : 6;
436 unsigned long active_h_end : 10; 454 u32 active_h_end : 10;
437 unsigned long : 6; 455 u32 : 6;
438} __attribute__((packed)); 456} __attribute__((packed));
439 457
440union active_h_disp_u { 458union active_h_disp_u {
441 unsigned long val : 32; 459 u32 val : 32;
442 struct active_h_disp_t f; 460 struct active_h_disp_t f;
443} __attribute__((packed)); 461} __attribute__((packed));
444 462
445struct active_v_disp_t { 463struct active_v_disp_t {
446 unsigned long active_v_start : 10; 464 u32 active_v_start : 10;
447 unsigned long : 6; 465 u32 : 6;
448 unsigned long active_v_end : 10; 466 u32 active_v_end : 10;
449 unsigned long : 6; 467 u32 : 6;
450} __attribute__((packed)); 468} __attribute__((packed));
451 469
452union active_v_disp_u { 470union active_v_disp_u {
453 unsigned long val : 32; 471 u32 val : 32;
454 struct active_v_disp_t f; 472 struct active_v_disp_t f;
455} __attribute__((packed)); 473} __attribute__((packed));
456 474
457struct graphic_h_disp_t { 475struct graphic_h_disp_t {
458 unsigned long graphic_h_start : 10; 476 u32 graphic_h_start : 10;
459 unsigned long : 6; 477 u32 : 6;
460 unsigned long graphic_h_end : 10; 478 u32 graphic_h_end : 10;
461 unsigned long : 6; 479 u32 : 6;
462} __attribute__((packed)); 480} __attribute__((packed));
463 481
464union graphic_h_disp_u { 482union graphic_h_disp_u {
465 unsigned long val : 32; 483 u32 val : 32;
466 struct graphic_h_disp_t f; 484 struct graphic_h_disp_t f;
467} __attribute__((packed)); 485} __attribute__((packed));
468 486
469struct graphic_v_disp_t { 487struct graphic_v_disp_t {
470 unsigned long graphic_v_start : 10; 488 u32 graphic_v_start : 10;
471 unsigned long : 6; 489 u32 : 6;
472 unsigned long graphic_v_end : 10; 490 u32 graphic_v_end : 10;
473 unsigned long : 6; 491 u32 : 6;
474} __attribute__((packed)); 492} __attribute__((packed));
475 493
476union graphic_v_disp_u{ 494union graphic_v_disp_u{
477 unsigned long val : 32; 495 u32 val : 32;
478 struct graphic_v_disp_t f; 496 struct graphic_v_disp_t f;
479} __attribute__((packed)); 497} __attribute__((packed));
480 498
481struct graphic_ctrl_t_w100 { 499struct graphic_ctrl_t_w100 {
482 unsigned long color_depth : 3; 500 u32 color_depth : 3;
483 unsigned long portrait_mode : 2; 501 u32 portrait_mode : 2;
484 unsigned long low_power_on : 1; 502 u32 low_power_on : 1;
485 unsigned long req_freq : 4; 503 u32 req_freq : 4;
486 unsigned long en_crtc : 1; 504 u32 en_crtc : 1;
487 unsigned long en_graphic_req : 1; 505 u32 en_graphic_req : 1;
488 unsigned long en_graphic_crtc : 1; 506 u32 en_graphic_crtc : 1;
489 unsigned long total_req_graphic : 9; 507 u32 total_req_graphic : 9;
490 unsigned long lcd_pclk_on : 1; 508 u32 lcd_pclk_on : 1;
491 unsigned long lcd_sclk_on : 1; 509 u32 lcd_sclk_on : 1;
492 unsigned long pclk_running : 1; 510 u32 pclk_running : 1;
493 unsigned long sclk_running : 1; 511 u32 sclk_running : 1;
494 unsigned long : 6; 512 u32 : 6;
495} __attribute__((packed)); 513} __attribute__((packed));
496 514
497struct graphic_ctrl_t_w32xx { 515struct graphic_ctrl_t_w32xx {
498 unsigned long color_depth : 3; 516 u32 color_depth : 3;
499 unsigned long portrait_mode : 2; 517 u32 portrait_mode : 2;
500 unsigned long low_power_on : 1; 518 u32 low_power_on : 1;
501 unsigned long req_freq : 4; 519 u32 req_freq : 4;
502 unsigned long en_crtc : 1; 520 u32 en_crtc : 1;
503 unsigned long en_graphic_req : 1; 521 u32 en_graphic_req : 1;
504 unsigned long en_graphic_crtc : 1; 522 u32 en_graphic_crtc : 1;
505 unsigned long total_req_graphic : 10; 523 u32 total_req_graphic : 10;
506 unsigned long lcd_pclk_on : 1; 524 u32 lcd_pclk_on : 1;
507 unsigned long lcd_sclk_on : 1; 525 u32 lcd_sclk_on : 1;
508 unsigned long pclk_running : 1; 526 u32 pclk_running : 1;
509 unsigned long sclk_running : 1; 527 u32 sclk_running : 1;
510 unsigned long : 5; 528 u32 : 5;
511} __attribute__((packed)); 529} __attribute__((packed));
512 530
513union graphic_ctrl_u { 531union graphic_ctrl_u {
514 unsigned long val : 32; 532 u32 val : 32;
515 struct graphic_ctrl_t_w100 f_w100; 533 struct graphic_ctrl_t_w100 f_w100;
516 struct graphic_ctrl_t_w32xx f_w32xx; 534 struct graphic_ctrl_t_w32xx f_w32xx;
517} __attribute__((packed)); 535} __attribute__((packed));
518 536
519struct video_ctrl_t { 537struct video_ctrl_t {
520 unsigned long video_mode : 1; 538 u32 video_mode : 1;
521 unsigned long keyer_en : 1; 539 u32 keyer_en : 1;
522 unsigned long en_video_req : 1; 540 u32 en_video_req : 1;
523 unsigned long en_graphic_req_video : 1; 541 u32 en_graphic_req_video : 1;
524 unsigned long en_video_crtc : 1; 542 u32 en_video_crtc : 1;
525 unsigned long video_hor_exp : 2; 543 u32 video_hor_exp : 2;
526 unsigned long video_ver_exp : 2; 544 u32 video_ver_exp : 2;
527 unsigned long uv_combine : 1; 545 u32 uv_combine : 1;
528 unsigned long total_req_video : 9; 546 u32 total_req_video : 9;
529 unsigned long video_ch_sel : 1; 547 u32 video_ch_sel : 1;
530 unsigned long video_portrait : 2; 548 u32 video_portrait : 2;
531 unsigned long yuv2rgb_en : 1; 549 u32 yuv2rgb_en : 1;
532 unsigned long yuv2rgb_option : 1; 550 u32 yuv2rgb_option : 1;
533 unsigned long video_inv_hor : 1; 551 u32 video_inv_hor : 1;
534 unsigned long video_inv_ver : 1; 552 u32 video_inv_ver : 1;
535 unsigned long gamma_sel : 2; 553 u32 gamma_sel : 2;
536 unsigned long dis_limit : 1; 554 u32 dis_limit : 1;
537 unsigned long en_uv_hblend : 1; 555 u32 en_uv_hblend : 1;
538 unsigned long rgb_gamma_sel : 2; 556 u32 rgb_gamma_sel : 2;
539} __attribute__((packed)); 557} __attribute__((packed));
540 558
541union video_ctrl_u { 559union video_ctrl_u {
542 unsigned long val : 32; 560 u32 val : 32;
543 struct video_ctrl_t f; 561 struct video_ctrl_t f;
544} __attribute__((packed)); 562} __attribute__((packed));
545 563
546struct disp_db_buf_cntl_rd_t { 564struct disp_db_buf_cntl_rd_t {
547 unsigned long en_db_buf : 1; 565 u32 en_db_buf : 1;
548 unsigned long update_db_buf_done : 1; 566 u32 update_db_buf_done : 1;
549 unsigned long db_buf_cntl : 6; 567 u32 db_buf_cntl : 6;
550 unsigned long : 24; 568 u32 : 24;
551} __attribute__((packed)); 569} __attribute__((packed));
552 570
553union disp_db_buf_cntl_rd_u { 571union disp_db_buf_cntl_rd_u {
554 unsigned long val : 32; 572 u32 val : 32;
555 struct disp_db_buf_cntl_rd_t f; 573 struct disp_db_buf_cntl_rd_t f;
556} __attribute__((packed)); 574} __attribute__((packed));
557 575
558struct disp_db_buf_cntl_wr_t { 576struct disp_db_buf_cntl_wr_t {
559 unsigned long en_db_buf : 1; 577 u32 en_db_buf : 1;
560 unsigned long update_db_buf : 1; 578 u32 update_db_buf : 1;
561 unsigned long db_buf_cntl : 6; 579 u32 db_buf_cntl : 6;
562 unsigned long : 24; 580 u32 : 24;
563} __attribute__((packed)); 581} __attribute__((packed));
564 582
565union disp_db_buf_cntl_wr_u { 583union disp_db_buf_cntl_wr_u {
566 unsigned long val : 32; 584 u32 val : 32;
567 struct disp_db_buf_cntl_wr_t f; 585 struct disp_db_buf_cntl_wr_t f;
568} __attribute__((packed)); 586} __attribute__((packed));
569 587
570struct gamma_value1_t { 588struct gamma_value1_t {
571 unsigned long gamma1 : 8; 589 u32 gamma1 : 8;
572 unsigned long gamma2 : 8; 590 u32 gamma2 : 8;
573 unsigned long gamma3 : 8; 591 u32 gamma3 : 8;
574 unsigned long gamma4 : 8; 592 u32 gamma4 : 8;
575} __attribute__((packed)); 593} __attribute__((packed));
576 594
577union gamma_value1_u { 595union gamma_value1_u {
578 unsigned long val : 32; 596 u32 val : 32;
579 struct gamma_value1_t f; 597 struct gamma_value1_t f;
580} __attribute__((packed)); 598} __attribute__((packed));
581 599
582struct gamma_value2_t { 600struct gamma_value2_t {
583 unsigned long gamma5 : 8; 601 u32 gamma5 : 8;
584 unsigned long gamma6 : 8; 602 u32 gamma6 : 8;
585 unsigned long gamma7 : 8; 603 u32 gamma7 : 8;
586 unsigned long gamma8 : 8; 604 u32 gamma8 : 8;
587} __attribute__((packed)); 605} __attribute__((packed));
588 606
589union gamma_value2_u { 607union gamma_value2_u {
590 unsigned long val : 32; 608 u32 val : 32;
591 struct gamma_value2_t f; 609 struct gamma_value2_t f;
592} __attribute__((packed)); 610} __attribute__((packed));
593 611
594struct gamma_slope_t { 612struct gamma_slope_t {
595 unsigned long slope1 : 3; 613 u32 slope1 : 3;
596 unsigned long slope2 : 3; 614 u32 slope2 : 3;
597 unsigned long slope3 : 3; 615 u32 slope3 : 3;
598 unsigned long slope4 : 3; 616 u32 slope4 : 3;
599 unsigned long slope5 : 3; 617 u32 slope5 : 3;
600 unsigned long slope6 : 3; 618 u32 slope6 : 3;
601 unsigned long slope7 : 3; 619 u32 slope7 : 3;
602 unsigned long slope8 : 3; 620 u32 slope8 : 3;
603 unsigned long : 8; 621 u32 : 8;
604} __attribute__((packed)); 622} __attribute__((packed));
605 623
606union gamma_slope_u { 624union gamma_slope_u {
607 unsigned long val : 32; 625 u32 val : 32;
608 struct gamma_slope_t f; 626 struct gamma_slope_t f;
609} __attribute__((packed)); 627} __attribute__((packed));
610 628
611struct mc_ext_mem_location_t { 629struct mc_ext_mem_location_t {
612 unsigned long mc_ext_mem_start : 16; 630 u32 mc_ext_mem_start : 16;
613 unsigned long mc_ext_mem_top : 16; 631 u32 mc_ext_mem_top : 16;
614} __attribute__((packed)); 632} __attribute__((packed));
615 633
616union mc_ext_mem_location_u { 634union mc_ext_mem_location_u {
617 unsigned long val : 32; 635 u32 val : 32;
618 struct mc_ext_mem_location_t f; 636 struct mc_ext_mem_location_t f;
619} __attribute__((packed)); 637} __attribute__((packed));
620 638
621struct mc_fb_location_t { 639struct mc_fb_location_t {
622 unsigned long mc_fb_start : 16; 640 u32 mc_fb_start : 16;
623 unsigned long mc_fb_top : 16; 641 u32 mc_fb_top : 16;
624} __attribute__((packed)); 642} __attribute__((packed));
625 643
626union mc_fb_location_u { 644union mc_fb_location_u {
627 unsigned long val : 32; 645 u32 val : 32;
628 struct mc_fb_location_t f; 646 struct mc_fb_location_t f;
629} __attribute__((packed)); 647} __attribute__((packed));
630 648
631struct clk_pin_cntl_t { 649struct clk_pin_cntl_t {
632 unsigned long osc_en : 1; 650 u32 osc_en : 1;
633 unsigned long osc_gain : 5; 651 u32 osc_gain : 5;
634 unsigned long dont_use_xtalin : 1; 652 u32 dont_use_xtalin : 1;
635 unsigned long xtalin_pm_en : 1; 653 u32 xtalin_pm_en : 1;
636 unsigned long xtalin_dbl_en : 1; 654 u32 xtalin_dbl_en : 1;
637 unsigned long : 7; 655 u32 : 7;
638 unsigned long cg_debug : 16; 656 u32 cg_debug : 16;
639} __attribute__((packed)); 657} __attribute__((packed));
640 658
641union clk_pin_cntl_u { 659union clk_pin_cntl_u {
642 unsigned long val : 32; 660 u32 val : 32;
643 struct clk_pin_cntl_t f; 661 struct clk_pin_cntl_t f;
644} __attribute__((packed)); 662} __attribute__((packed));
645 663
646struct pll_ref_fb_div_t { 664struct pll_ref_fb_div_t {
647 unsigned long pll_ref_div : 4; 665 u32 pll_ref_div : 4;
648 unsigned long : 4; 666 u32 : 4;
649 unsigned long pll_fb_div_int : 6; 667 u32 pll_fb_div_int : 6;
650 unsigned long : 2; 668 u32 : 2;
651 unsigned long pll_fb_div_frac : 3; 669 u32 pll_fb_div_frac : 3;
652 unsigned long : 1; 670 u32 : 1;
653 unsigned long pll_reset_time : 4; 671 u32 pll_reset_time : 4;
654 unsigned long pll_lock_time : 8; 672 u32 pll_lock_time : 8;
655} __attribute__((packed)); 673} __attribute__((packed));
656 674
657union pll_ref_fb_div_u { 675union pll_ref_fb_div_u {
658 unsigned long val : 32; 676 u32 val : 32;
659 struct pll_ref_fb_div_t f; 677 struct pll_ref_fb_div_t f;
660} __attribute__((packed)); 678} __attribute__((packed));
661 679
662struct pll_cntl_t { 680struct pll_cntl_t {
663 unsigned long pll_pwdn : 1; 681 u32 pll_pwdn : 1;
664 unsigned long pll_reset : 1; 682 u32 pll_reset : 1;
665 unsigned long pll_pm_en : 1; 683 u32 pll_pm_en : 1;
666 unsigned long pll_mode : 1; 684 u32 pll_mode : 1;
667 unsigned long pll_refclk_sel : 1; 685 u32 pll_refclk_sel : 1;
668 unsigned long pll_fbclk_sel : 1; 686 u32 pll_fbclk_sel : 1;
669 unsigned long pll_tcpoff : 1; 687 u32 pll_tcpoff : 1;
670 unsigned long pll_pcp : 3; 688 u32 pll_pcp : 3;
671 unsigned long pll_pvg : 3; 689 u32 pll_pvg : 3;
672 unsigned long pll_vcofr : 1; 690 u32 pll_vcofr : 1;
673 unsigned long pll_ioffset : 2; 691 u32 pll_ioffset : 2;
674 unsigned long pll_pecc_mode : 2; 692 u32 pll_pecc_mode : 2;
675 unsigned long pll_pecc_scon : 2; 693 u32 pll_pecc_scon : 2;
676 unsigned long pll_dactal : 4; 694 u32 pll_dactal : 4;
677 unsigned long pll_cp_clip : 2; 695 u32 pll_cp_clip : 2;
678 unsigned long pll_conf : 3; 696 u32 pll_conf : 3;
679 unsigned long pll_mbctrl : 2; 697 u32 pll_mbctrl : 2;
680 unsigned long pll_ring_off : 1; 698 u32 pll_ring_off : 1;
681} __attribute__((packed)); 699} __attribute__((packed));
682 700
683union pll_cntl_u { 701union pll_cntl_u {
684 unsigned long val : 32; 702 u32 val : 32;
685 struct pll_cntl_t f; 703 struct pll_cntl_t f;
686} __attribute__((packed)); 704} __attribute__((packed));
687 705
688struct sclk_cntl_t { 706struct sclk_cntl_t {
689 unsigned long sclk_src_sel : 2; 707 u32 sclk_src_sel : 2;
690 unsigned long : 2; 708 u32 : 2;
691 unsigned long sclk_post_div_fast : 4; 709 u32 sclk_post_div_fast : 4;
692 unsigned long sclk_clkon_hys : 3; 710 u32 sclk_clkon_hys : 3;
693 unsigned long sclk_post_div_slow : 4; 711 u32 sclk_post_div_slow : 4;
694 unsigned long disp_cg_ok2switch_en : 1; 712 u32 disp_cg_ok2switch_en : 1;
695 unsigned long sclk_force_reg : 1; 713 u32 sclk_force_reg : 1;
696 unsigned long sclk_force_disp : 1; 714 u32 sclk_force_disp : 1;
697 unsigned long sclk_force_mc : 1; 715 u32 sclk_force_mc : 1;
698 unsigned long sclk_force_extmc : 1; 716 u32 sclk_force_extmc : 1;
699 unsigned long sclk_force_cp : 1; 717 u32 sclk_force_cp : 1;
700 unsigned long sclk_force_e2 : 1; 718 u32 sclk_force_e2 : 1;
701 unsigned long sclk_force_e3 : 1; 719 u32 sclk_force_e3 : 1;
702 unsigned long sclk_force_idct : 1; 720 u32 sclk_force_idct : 1;
703 unsigned long sclk_force_bist : 1; 721 u32 sclk_force_bist : 1;
704 unsigned long busy_extend_cp : 1; 722 u32 busy_extend_cp : 1;
705 unsigned long busy_extend_e2 : 1; 723 u32 busy_extend_e2 : 1;
706 unsigned long busy_extend_e3 : 1; 724 u32 busy_extend_e3 : 1;
707 unsigned long busy_extend_idct : 1; 725 u32 busy_extend_idct : 1;
708 unsigned long : 3; 726 u32 : 3;
709} __attribute__((packed)); 727} __attribute__((packed));
710 728
711union sclk_cntl_u { 729union sclk_cntl_u {
712 unsigned long val : 32; 730 u32 val : 32;
713 struct sclk_cntl_t f; 731 struct sclk_cntl_t f;
714} __attribute__((packed)); 732} __attribute__((packed));
715 733
716struct pclk_cntl_t { 734struct pclk_cntl_t {
717 unsigned long pclk_src_sel : 2; 735 u32 pclk_src_sel : 2;
718 unsigned long : 2; 736 u32 : 2;
719 unsigned long pclk_post_div : 4; 737 u32 pclk_post_div : 4;
720 unsigned long : 8; 738 u32 : 8;
721 unsigned long pclk_force_disp : 1; 739 u32 pclk_force_disp : 1;
722 unsigned long : 15; 740 u32 : 15;
723} __attribute__((packed)); 741} __attribute__((packed));
724 742
725union pclk_cntl_u { 743union pclk_cntl_u {
726 unsigned long val : 32; 744 u32 val : 32;
727 struct pclk_cntl_t f; 745 struct pclk_cntl_t f;
728} __attribute__((packed)); 746} __attribute__((packed));
729 747
@@ -735,36 +753,176 @@ union pclk_cntl_u {
735#define TESTCLK_SRC_XTAL 0x06 753#define TESTCLK_SRC_XTAL 0x06
736 754
737struct clk_test_cntl_t { 755struct clk_test_cntl_t {
738 unsigned long testclk_sel : 4; 756 u32 testclk_sel : 4;
739 unsigned long : 3; 757 u32 : 3;
740 unsigned long start_check_freq : 1; 758 u32 start_check_freq : 1;
741 unsigned long tstcount_rst : 1; 759 u32 tstcount_rst : 1;
742 unsigned long : 15; 760 u32 : 15;
743 unsigned long test_count : 8; 761 u32 test_count : 8;
744} __attribute__((packed)); 762} __attribute__((packed));
745 763
746union clk_test_cntl_u { 764union clk_test_cntl_u {
747 unsigned long val : 32; 765 u32 val : 32;
748 struct clk_test_cntl_t f; 766 struct clk_test_cntl_t f;
749} __attribute__((packed)); 767} __attribute__((packed));
750 768
751struct pwrmgt_cntl_t { 769struct pwrmgt_cntl_t {
752 unsigned long pwm_enable : 1; 770 u32 pwm_enable : 1;
753 unsigned long : 1; 771 u32 : 1;
754 unsigned long pwm_mode_req : 2; 772 u32 pwm_mode_req : 2;
755 unsigned long pwm_wakeup_cond : 2; 773 u32 pwm_wakeup_cond : 2;
756 unsigned long pwm_fast_noml_hw_en : 1; 774 u32 pwm_fast_noml_hw_en : 1;
757 unsigned long pwm_noml_fast_hw_en : 1; 775 u32 pwm_noml_fast_hw_en : 1;
758 unsigned long pwm_fast_noml_cond : 4; 776 u32 pwm_fast_noml_cond : 4;
759 unsigned long pwm_noml_fast_cond : 4; 777 u32 pwm_noml_fast_cond : 4;
760 unsigned long pwm_idle_timer : 8; 778 u32 pwm_idle_timer : 8;
761 unsigned long pwm_busy_timer : 8; 779 u32 pwm_busy_timer : 8;
762} __attribute__((packed)); 780} __attribute__((packed));
763 781
764union pwrmgt_cntl_u { 782union pwrmgt_cntl_u {
765 unsigned long val : 32; 783 u32 val : 32;
766 struct pwrmgt_cntl_t f; 784 struct pwrmgt_cntl_t f;
767} __attribute__((packed)); 785} __attribute__((packed));
768 786
787#define SRC_DATATYPE_EQU_DST 3
788
789#define ROP3_SRCCOPY 0xcc
790#define ROP3_PATCOPY 0xf0
791
792#define GMC_BRUSH_SOLID_COLOR 13
793#define GMC_BRUSH_NONE 15
794
795#define DP_SRC_MEM_RECTANGULAR 2
796
797#define DP_OP_ROP 0
798
799struct dp_gui_master_cntl_t {
800 u32 gmc_src_pitch_offset_cntl : 1;
801 u32 gmc_dst_pitch_offset_cntl : 1;
802 u32 gmc_src_clipping : 1;
803 u32 gmc_dst_clipping : 1;
804 u32 gmc_brush_datatype : 4;
805 u32 gmc_dst_datatype : 4;
806 u32 gmc_src_datatype : 3;
807 u32 gmc_byte_pix_order : 1;
808 u32 gmc_default_sel : 1;
809 u32 gmc_rop3 : 8;
810 u32 gmc_dp_src_source : 3;
811 u32 gmc_clr_cmp_fcn_dis : 1;
812 u32 : 1;
813 u32 gmc_wr_msk_dis : 1;
814 u32 gmc_dp_op : 1;
815} __attribute__((packed));
816
817union dp_gui_master_cntl_u {
818 u32 val : 32;
819 struct dp_gui_master_cntl_t f;
820} __attribute__((packed));
821
822struct rbbm_status_t {
823 u32 cmdfifo_avail : 7;
824 u32 : 1;
825 u32 hirq_on_rbb : 1;
826 u32 cprq_on_rbb : 1;
827 u32 cfrq_on_rbb : 1;
828 u32 hirq_in_rtbuf : 1;
829 u32 cprq_in_rtbuf : 1;
830 u32 cfrq_in_rtbuf : 1;
831 u32 cf_pipe_busy : 1;
832 u32 eng_ev_busy : 1;
833 u32 cp_cmdstrm_busy : 1;
834 u32 e2_busy : 1;
835 u32 rb2d_busy : 1;
836 u32 rb3d_busy : 1;
837 u32 se_busy : 1;
838 u32 re_busy : 1;
839 u32 tam_busy : 1;
840 u32 tdm_busy : 1;
841 u32 pb_busy : 1;
842 u32 : 6;
843 u32 gui_active : 1;
844} __attribute__((packed));
845
846union rbbm_status_u {
847 u32 val : 32;
848 struct rbbm_status_t f;
849} __attribute__((packed));
850
851struct dp_datatype_t {
852 u32 dp_dst_datatype : 4;
853 u32 : 4;
854 u32 dp_brush_datatype : 4;
855 u32 dp_src2_type : 1;
856 u32 dp_src2_datatype : 3;
857 u32 dp_src_datatype : 3;
858 u32 : 11;
859 u32 dp_byte_pix_order : 1;
860 u32 : 1;
861} __attribute__((packed));
862
863union dp_datatype_u {
864 u32 val : 32;
865 struct dp_datatype_t f;
866} __attribute__((packed));
867
868struct dp_mix_t {
869 u32 : 8;
870 u32 dp_src_source : 3;
871 u32 dp_src2_source : 3;
872 u32 : 2;
873 u32 dp_rop3 : 8;
874 u32 dp_op : 1;
875 u32 : 7;
876} __attribute__((packed));
877
878union dp_mix_u {
879 u32 val : 32;
880 struct dp_mix_t f;
881} __attribute__((packed));
882
883struct eng_cntl_t {
884 u32 erc_reg_rd_ws : 1;
885 u32 erc_reg_wr_ws : 1;
886 u32 erc_idle_reg_wr : 1;
887 u32 dis_engine_triggers : 1;
888 u32 dis_rop_src_uses_dst_w_h : 1;
889 u32 dis_src_uses_dst_dirmaj : 1;
890 u32 : 6;
891 u32 force_3dclk_when_2dclk : 1;
892 u32 : 19;
893} __attribute__((packed));
894
895union eng_cntl_u {
896 u32 val : 32;
897 struct eng_cntl_t f;
898} __attribute__((packed));
899
900struct dp_cntl_t {
901 u32 dst_x_dir : 1;
902 u32 dst_y_dir : 1;
903 u32 src_x_dir : 1;
904 u32 src_y_dir : 1;
905 u32 dst_major_x : 1;
906 u32 src_major_x : 1;
907 u32 : 26;
908} __attribute__((packed));
909
910union dp_cntl_u {
911 u32 val : 32;
912 struct dp_cntl_t f;
913} __attribute__((packed));
914
915struct dp_cntl_dst_dir_t {
916 u32 : 15;
917 u32 dst_y_dir : 1;
918 u32 : 15;
919 u32 dst_x_dir : 1;
920} __attribute__((packed));
921
922union dp_cntl_dst_dir_u {
923 u32 val : 32;
924 struct dp_cntl_dst_dir_t f;
925} __attribute__((packed));
926
769#endif 927#endif
770 928