diff options
author | Anton Altaparmakov <aia21@cantab.net> | 2005-05-30 16:34:37 -0400 |
---|---|---|
committer | Anton Altaparmakov <aia21@cantab.net> | 2005-05-30 16:34:37 -0400 |
commit | 4ff4258a3e558814a3d48c50a59cd22f56bbea2f (patch) | |
tree | 35ac4a5d2b162687eef0c38aecf14f3a7c5afee0 /drivers | |
parent | 442d207eb0b4e7047c4fedccd900c425e689d502 (diff) | |
parent | 5e485b7975472ba4a408523deb6541e70c451842 (diff) |
Automatic merge with /usr/src/ntfs-2.6.git.
Diffstat (limited to 'drivers')
43 files changed, 802 insertions, 2692 deletions
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 0400a52d50..670fdb5142 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig | |||
@@ -40,13 +40,12 @@ config ACPI | |||
40 | available at: | 40 | available at: |
41 | <http://www.acpi.info> | 41 | <http://www.acpi.info> |
42 | 42 | ||
43 | if ACPI | ||
44 | |||
43 | config ACPI_BOOT | 45 | config ACPI_BOOT |
44 | bool | 46 | bool |
45 | depends on ACPI || X86_HT | ||
46 | default y | 47 | default y |
47 | 48 | ||
48 | if ACPI | ||
49 | |||
50 | config ACPI_INTERPRETER | 49 | config ACPI_INTERPRETER |
51 | bool | 50 | bool |
52 | depends on !IA64_SGI_SN | 51 | depends on !IA64_SGI_SN |
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c index 12b0eea634..8093f2e003 100644 --- a/drivers/acpi/pci_irq.c +++ b/drivers/acpi/pci_irq.c | |||
@@ -391,7 +391,6 @@ acpi_pci_irq_enable ( | |||
391 | u8 pin = 0; | 391 | u8 pin = 0; |
392 | int edge_level = ACPI_LEVEL_SENSITIVE; | 392 | int edge_level = ACPI_LEVEL_SENSITIVE; |
393 | int active_high_low = ACPI_ACTIVE_LOW; | 393 | int active_high_low = ACPI_ACTIVE_LOW; |
394 | extern int via_interrupt_line_quirk; | ||
395 | char *link = NULL; | 394 | char *link = NULL; |
396 | 395 | ||
397 | ACPI_FUNCTION_TRACE("acpi_pci_irq_enable"); | 396 | ACPI_FUNCTION_TRACE("acpi_pci_irq_enable"); |
@@ -444,9 +443,6 @@ acpi_pci_irq_enable ( | |||
444 | } | 443 | } |
445 | } | 444 | } |
446 | 445 | ||
447 | if (via_interrupt_line_quirk) | ||
448 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq & 15); | ||
449 | |||
450 | dev->irq = acpi_register_gsi(irq, edge_level, active_high_low); | 446 | dev->irq = acpi_register_gsi(irq, edge_level, active_high_low); |
451 | 447 | ||
452 | printk(KERN_INFO PREFIX "PCI Interrupt %s[%c] -> ", | 448 | printk(KERN_INFO PREFIX "PCI Interrupt %s[%c] -> ", |
diff --git a/drivers/cdrom/viocd.c b/drivers/cdrom/viocd.c index fcca26c89b..38dd9ffbe8 100644 --- a/drivers/cdrom/viocd.c +++ b/drivers/cdrom/viocd.c | |||
@@ -488,6 +488,20 @@ static int viocd_packet(struct cdrom_device_info *cdi, | |||
488 | & (CDC_DVD_RAM | CDC_RAM)) != 0; | 488 | & (CDC_DVD_RAM | CDC_RAM)) != 0; |
489 | } | 489 | } |
490 | break; | 490 | break; |
491 | case GPCMD_GET_CONFIGURATION: | ||
492 | if (cgc->cmd[3] == CDF_RWRT) { | ||
493 | struct rwrt_feature_desc *rfd = (struct rwrt_feature_desc *)(cgc->buffer + sizeof(struct feature_header)); | ||
494 | |||
495 | if ((buflen >= | ||
496 | (sizeof(struct feature_header) + sizeof(*rfd))) && | ||
497 | (cdi->ops->capability & ~cdi->mask | ||
498 | & (CDC_DVD_RAM | CDC_RAM))) { | ||
499 | rfd->feature_code = cpu_to_be16(CDF_RWRT); | ||
500 | rfd->curr = 1; | ||
501 | ret = 0; | ||
502 | } | ||
503 | } | ||
504 | break; | ||
491 | default: | 505 | default: |
492 | if (cgc->sense) { | 506 | if (cgc->sense) { |
493 | /* indicate Unknown code */ | 507 | /* indicate Unknown code */ |
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c index f0bd242e03..78e3e7b24d 100644 --- a/drivers/ide/ide-cd.c +++ b/drivers/ide/ide-cd.c | |||
@@ -1932,8 +1932,11 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) | |||
1932 | 1932 | ||
1933 | /* | 1933 | /* |
1934 | * check if dma is safe | 1934 | * check if dma is safe |
1935 | * | ||
1936 | * NOTE! The "len" and "addr" checks should possibly have | ||
1937 | * separate masks. | ||
1935 | */ | 1938 | */ |
1936 | if ((rq->data_len & 3) || (addr & mask)) | 1939 | if ((rq->data_len & mask) || (addr & mask)) |
1937 | info->dma = 0; | 1940 | info->dma = 0; |
1938 | } | 1941 | } |
1939 | 1942 | ||
diff --git a/drivers/input/gameport/Kconfig b/drivers/input/gameport/Kconfig index 6282f460ab..1d93f50929 100644 --- a/drivers/input/gameport/Kconfig +++ b/drivers/input/gameport/Kconfig | |||
@@ -68,23 +68,3 @@ config GAMEPORT_CS461X | |||
68 | depends on PCI | 68 | depends on PCI |
69 | 69 | ||
70 | endif | 70 | endif |
71 | |||
72 | # Yes, SOUND_GAMEPORT looks a bit odd. Yes, it ends up being turned on | ||
73 | # in every .config. Please don't touch it. It is here to handle an | ||
74 | # unusual dependency between GAMEPORT and sound drivers. | ||
75 | # | ||
76 | # Some sound drivers call gameport functions. If GAMEPORT is | ||
77 | # not selected, empty stubs are provided for the functions and all is | ||
78 | # well. | ||
79 | # If GAMEPORT is built in, everything is fine. | ||
80 | # If GAMEPORT is a module, however, it would need to be loaded for the | ||
81 | # sound driver to be able to link properly. Therefore, the sound | ||
82 | # driver must be a module as well in that case. Since there's no way | ||
83 | # to express that directly in Kconfig, we use SOUND_GAMEPORT to | ||
84 | # express it. SOUND_GAMEPORT boils down to "if GAMEPORT is 'm', | ||
85 | # anything that depends on SOUND_GAMEPORT must be 'm' as well. if | ||
86 | # GAMEPORT is 'y' or 'n', it can be anything". | ||
87 | config SOUND_GAMEPORT | ||
88 | tristate | ||
89 | default m if GAMEPORT=m | ||
90 | default y | ||
diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c index 7d7527f8b0..627d343dfb 100644 --- a/drivers/input/joydev.c +++ b/drivers/input/joydev.c | |||
@@ -422,7 +422,7 @@ static struct input_handle *joydev_connect(struct input_handler *handler, struct | |||
422 | joydev->nkey++; | 422 | joydev->nkey++; |
423 | } | 423 | } |
424 | 424 | ||
425 | for (i = 0; i < BTN_JOYSTICK - BTN_MISC + 1; i++) | 425 | for (i = 0; i < BTN_JOYSTICK - BTN_MISC; i++) |
426 | if (test_bit(i + BTN_MISC, dev->keybit)) { | 426 | if (test_bit(i + BTN_MISC, dev->keybit)) { |
427 | joydev->keymap[i] = joydev->nkey; | 427 | joydev->keymap[i] = joydev->nkey; |
428 | joydev->keypam[joydev->nkey] = i + BTN_MISC; | 428 | joydev->keypam[joydev->nkey] = i + BTN_MISC; |
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c index 79c332f16f..af0446c6de 100644 --- a/drivers/input/keyboard/atkbd.c +++ b/drivers/input/keyboard/atkbd.c | |||
@@ -171,9 +171,9 @@ static struct { | |||
171 | unsigned char set2; | 171 | unsigned char set2; |
172 | } atkbd_scroll_keys[] = { | 172 | } atkbd_scroll_keys[] = { |
173 | { ATKBD_SCR_1, 0xc5 }, | 173 | { ATKBD_SCR_1, 0xc5 }, |
174 | { ATKBD_SCR_2, 0xa9 }, | 174 | { ATKBD_SCR_2, 0x9d }, |
175 | { ATKBD_SCR_4, 0xb6 }, | 175 | { ATKBD_SCR_4, 0xa4 }, |
176 | { ATKBD_SCR_8, 0xa7 }, | 176 | { ATKBD_SCR_8, 0x9b }, |
177 | { ATKBD_SCR_CLICK, 0xe0 }, | 177 | { ATKBD_SCR_CLICK, 0xe0 }, |
178 | { ATKBD_SCR_LEFT, 0xcb }, | 178 | { ATKBD_SCR_LEFT, 0xcb }, |
179 | { ATKBD_SCR_RIGHT, 0xd2 }, | 179 | { ATKBD_SCR_RIGHT, 0xd2 }, |
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c index cd8509549e..019034b21a 100644 --- a/drivers/input/mouse/psmouse-base.c +++ b/drivers/input/mouse/psmouse-base.c | |||
@@ -518,13 +518,16 @@ static int psmouse_probe(struct psmouse *psmouse) | |||
518 | /* | 518 | /* |
519 | * First, we check if it's a mouse. It should send 0x00 or 0x03 | 519 | * First, we check if it's a mouse. It should send 0x00 or 0x03 |
520 | * in case of an IntelliMouse in 4-byte mode or 0x04 for IM Explorer. | 520 | * in case of an IntelliMouse in 4-byte mode or 0x04 for IM Explorer. |
521 | * Sunrex K8561 IR Keyboard/Mouse reports 0xff on second and subsequent | ||
522 | * ID queries, probably due to a firmware bug. | ||
521 | */ | 523 | */ |
522 | 524 | ||
523 | param[0] = 0xa5; | 525 | param[0] = 0xa5; |
524 | if (ps2_command(ps2dev, param, PSMOUSE_CMD_GETID)) | 526 | if (ps2_command(ps2dev, param, PSMOUSE_CMD_GETID)) |
525 | return -1; | 527 | return -1; |
526 | 528 | ||
527 | if (param[0] != 0x00 && param[0] != 0x03 && param[0] != 0x04) | 529 | if (param[0] != 0x00 && param[0] != 0x03 && |
530 | param[0] != 0x04 && param[0] != 0xff) | ||
528 | return -1; | 531 | return -1; |
529 | 532 | ||
530 | /* | 533 | /* |
@@ -972,7 +975,7 @@ static int psmouse_set_maxproto(const char *val, struct kernel_param *kp) | |||
972 | return -EINVAL; | 975 | return -EINVAL; |
973 | 976 | ||
974 | if (!strncmp(val, "any", 3)) { | 977 | if (!strncmp(val, "any", 3)) { |
975 | *((unsigned int *)kp->arg) = -1UL; | 978 | *((unsigned int *)kp->arg) = -1U; |
976 | return 0; | 979 | return 0; |
977 | } | 980 | } |
978 | 981 | ||
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c index 69832f8fb7..36c721227b 100644 --- a/drivers/input/mouse/synaptics.c +++ b/drivers/input/mouse/synaptics.c | |||
@@ -143,39 +143,6 @@ static int synaptics_identify(struct psmouse *psmouse) | |||
143 | return -1; | 143 | return -1; |
144 | } | 144 | } |
145 | 145 | ||
146 | static void print_ident(struct synaptics_data *priv) | ||
147 | { | ||
148 | printk(KERN_INFO "Synaptics Touchpad, model: %ld\n", SYN_ID_MODEL(priv->identity)); | ||
149 | printk(KERN_INFO " Firmware: %ld.%ld\n", SYN_ID_MAJOR(priv->identity), | ||
150 | SYN_ID_MINOR(priv->identity)); | ||
151 | if (SYN_MODEL_ROT180(priv->model_id)) | ||
152 | printk(KERN_INFO " 180 degree mounted touchpad\n"); | ||
153 | if (SYN_MODEL_PORTRAIT(priv->model_id)) | ||
154 | printk(KERN_INFO " portrait touchpad\n"); | ||
155 | printk(KERN_INFO " Sensor: %ld\n", SYN_MODEL_SENSOR(priv->model_id)); | ||
156 | if (SYN_MODEL_NEWABS(priv->model_id)) | ||
157 | printk(KERN_INFO " new absolute packet format\n"); | ||
158 | if (SYN_MODEL_PEN(priv->model_id)) | ||
159 | printk(KERN_INFO " pen detection\n"); | ||
160 | |||
161 | if (SYN_CAP_EXTENDED(priv->capabilities)) { | ||
162 | printk(KERN_INFO " Touchpad has extended capability bits\n"); | ||
163 | if (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap)) | ||
164 | printk(KERN_INFO " -> %d multi-buttons, i.e. besides standard buttons\n", | ||
165 | (int)(SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap))); | ||
166 | if (SYN_CAP_MIDDLE_BUTTON(priv->capabilities)) | ||
167 | printk(KERN_INFO " -> middle button\n"); | ||
168 | if (SYN_CAP_FOUR_BUTTON(priv->capabilities)) | ||
169 | printk(KERN_INFO " -> four buttons\n"); | ||
170 | if (SYN_CAP_MULTIFINGER(priv->capabilities)) | ||
171 | printk(KERN_INFO " -> multifinger detection\n"); | ||
172 | if (SYN_CAP_PALMDETECT(priv->capabilities)) | ||
173 | printk(KERN_INFO " -> palm detection\n"); | ||
174 | if (SYN_CAP_PASS_THROUGH(priv->capabilities)) | ||
175 | printk(KERN_INFO " -> pass-through port\n"); | ||
176 | } | ||
177 | } | ||
178 | |||
179 | static int synaptics_query_hardware(struct psmouse *psmouse) | 146 | static int synaptics_query_hardware(struct psmouse *psmouse) |
180 | { | 147 | { |
181 | int retries = 0; | 148 | int retries = 0; |
@@ -666,7 +633,11 @@ int synaptics_init(struct psmouse *psmouse) | |||
666 | 633 | ||
667 | priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS; | 634 | priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS; |
668 | 635 | ||
669 | print_ident(priv); | 636 | printk(KERN_INFO "Synaptics Touchpad, model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx\n", |
637 | SYN_ID_MODEL(priv->identity), | ||
638 | SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity), | ||
639 | priv->model_id, priv->capabilities, priv->ext_cap); | ||
640 | |||
670 | set_input_params(&psmouse->dev, priv); | 641 | set_input_params(&psmouse->dev, priv); |
671 | 642 | ||
672 | psmouse->protocol_handler = synaptics_process_byte; | 643 | psmouse->protocol_handler = synaptics_process_byte; |
diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c index 564974ce57..96fb987083 100644 --- a/drivers/input/mousedev.c +++ b/drivers/input/mousedev.c | |||
@@ -101,6 +101,7 @@ struct mousedev_list { | |||
101 | unsigned char ready, buffer, bufsiz; | 101 | unsigned char ready, buffer, bufsiz; |
102 | unsigned char imexseq, impsseq; | 102 | unsigned char imexseq, impsseq; |
103 | enum mousedev_emul mode; | 103 | enum mousedev_emul mode; |
104 | unsigned long last_buttons; | ||
104 | }; | 105 | }; |
105 | 106 | ||
106 | #define MOUSEDEV_SEQ_LEN 6 | 107 | #define MOUSEDEV_SEQ_LEN 6 |
@@ -224,7 +225,7 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h | |||
224 | spin_lock_irqsave(&list->packet_lock, flags); | 225 | spin_lock_irqsave(&list->packet_lock, flags); |
225 | 226 | ||
226 | p = &list->packets[list->head]; | 227 | p = &list->packets[list->head]; |
227 | if (list->ready && p->buttons != packet->buttons) { | 228 | if (list->ready && p->buttons != mousedev->packet.buttons) { |
228 | unsigned int new_head = (list->head + 1) % PACKET_QUEUE_LEN; | 229 | unsigned int new_head = (list->head + 1) % PACKET_QUEUE_LEN; |
229 | if (new_head != list->tail) { | 230 | if (new_head != list->tail) { |
230 | p = &list->packets[list->head = new_head]; | 231 | p = &list->packets[list->head = new_head]; |
@@ -249,10 +250,13 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h | |||
249 | p->dz += packet->dz; | 250 | p->dz += packet->dz; |
250 | p->buttons = mousedev->packet.buttons; | 251 | p->buttons = mousedev->packet.buttons; |
251 | 252 | ||
252 | list->ready = 1; | 253 | if (p->dx || p->dy || p->dz || p->buttons != list->last_buttons) |
254 | list->ready = 1; | ||
253 | 255 | ||
254 | spin_unlock_irqrestore(&list->packet_lock, flags); | 256 | spin_unlock_irqrestore(&list->packet_lock, flags); |
255 | kill_fasync(&list->fasync, SIGIO, POLL_IN); | 257 | |
258 | if (list->ready) | ||
259 | kill_fasync(&list->fasync, SIGIO, POLL_IN); | ||
256 | } | 260 | } |
257 | 261 | ||
258 | wake_up_interruptible(&mousedev->wait); | 262 | wake_up_interruptible(&mousedev->wait); |
@@ -477,9 +481,10 @@ static void mousedev_packet(struct mousedev_list *list, signed char *ps2_data) | |||
477 | } | 481 | } |
478 | 482 | ||
479 | if (!p->dx && !p->dy && !p->dz) { | 483 | if (!p->dx && !p->dy && !p->dz) { |
480 | if (list->tail == list->head) | 484 | if (list->tail == list->head) { |
481 | list->ready = 0; | 485 | list->ready = 0; |
482 | else | 486 | list->last_buttons = p->buttons; |
487 | } else | ||
483 | list->tail = (list->tail + 1) % PACKET_QUEUE_LEN; | 488 | list->tail = (list->tail + 1) % PACKET_QUEUE_LEN; |
484 | } | 489 | } |
485 | 490 | ||
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h index f64867808f..0487ecbb8a 100644 --- a/drivers/input/serio/i8042-x86ia64io.h +++ b/drivers/input/serio/i8042-x86ia64io.h | |||
@@ -88,9 +88,11 @@ static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = { | |||
88 | }; | 88 | }; |
89 | 89 | ||
90 | /* | 90 | /* |
91 | * Some Fujitsu notebooks are ahving trouble with touhcpads if | 91 | * Some Fujitsu notebooks are having trouble with touchpads if |
92 | * active multiplexing mode is activated. Luckily they don't have | 92 | * active multiplexing mode is activated. Luckily they don't have |
93 | * external PS/2 ports so we can safely disable it. | 93 | * external PS/2 ports so we can safely disable it. |
94 | * ... apparently some Toshibas don't like MUX mode either and | ||
95 | * die horrible death on reboot. | ||
94 | */ | 96 | */ |
95 | static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = { | 97 | static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = { |
96 | { | 98 | { |
@@ -115,12 +117,26 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = { | |||
115 | }, | 117 | }, |
116 | }, | 118 | }, |
117 | { | 119 | { |
120 | .ident = "Fujitsu Lifebook S6230", | ||
121 | .matches = { | ||
122 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), | ||
123 | DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S6230"), | ||
124 | }, | ||
125 | }, | ||
126 | { | ||
118 | .ident = "Fujitsu T70H", | 127 | .ident = "Fujitsu T70H", |
119 | .matches = { | 128 | .matches = { |
120 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), | 129 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), |
121 | DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"), | 130 | DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"), |
122 | }, | 131 | }, |
123 | }, | 132 | }, |
133 | { | ||
134 | .ident = "Toshiba P10", | ||
135 | .matches = { | ||
136 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
137 | DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P10"), | ||
138 | }, | ||
139 | }, | ||
124 | { } | 140 | { } |
125 | }; | 141 | }; |
126 | 142 | ||
@@ -215,11 +231,15 @@ static struct pnp_driver i8042_pnp_aux_driver = { | |||
215 | 231 | ||
216 | static void i8042_pnp_exit(void) | 232 | static void i8042_pnp_exit(void) |
217 | { | 233 | { |
218 | if (i8042_pnp_kbd_registered) | 234 | if (i8042_pnp_kbd_registered) { |
235 | i8042_pnp_kbd_registered = 0; | ||
219 | pnp_unregister_driver(&i8042_pnp_kbd_driver); | 236 | pnp_unregister_driver(&i8042_pnp_kbd_driver); |
237 | } | ||
220 | 238 | ||
221 | if (i8042_pnp_aux_registered) | 239 | if (i8042_pnp_aux_registered) { |
240 | i8042_pnp_aux_registered = 0; | ||
222 | pnp_unregister_driver(&i8042_pnp_aux_driver); | 241 | pnp_unregister_driver(&i8042_pnp_aux_driver); |
242 | } | ||
223 | } | 243 | } |
224 | 244 | ||
225 | static int i8042_pnp_init(void) | 245 | static int i8042_pnp_init(void) |
@@ -227,7 +247,7 @@ static int i8042_pnp_init(void) | |||
227 | int result_kbd, result_aux; | 247 | int result_kbd, result_aux; |
228 | 248 | ||
229 | if (i8042_nopnp) { | 249 | if (i8042_nopnp) { |
230 | printk("i8042: PNP detection disabled\n"); | 250 | printk(KERN_INFO "i8042: PNP detection disabled\n"); |
231 | return 0; | 251 | return 0; |
232 | } | 252 | } |
233 | 253 | ||
@@ -241,7 +261,7 @@ static int i8042_pnp_init(void) | |||
241 | #if defined(__ia64__) | 261 | #if defined(__ia64__) |
242 | return -ENODEV; | 262 | return -ENODEV; |
243 | #else | 263 | #else |
244 | printk(KERN_WARNING "PNP: No PS/2 controller found. Probing ports directly.\n"); | 264 | printk(KERN_INFO "PNP: No PS/2 controller found. Probing ports directly.\n"); |
245 | return 0; | 265 | return 0; |
246 | #endif | 266 | #endif |
247 | } | 267 | } |
@@ -265,7 +285,7 @@ static int i8042_pnp_init(void) | |||
265 | i8042_pnp_kbd_irq = i8042_kbd_irq; | 285 | i8042_pnp_kbd_irq = i8042_kbd_irq; |
266 | } | 286 | } |
267 | 287 | ||
268 | if (result_aux > 0 && !i8042_pnp_aux_irq) { | 288 | if (!i8042_pnp_aux_irq) { |
269 | printk(KERN_WARNING "PNP: PS/2 controller doesn't have AUX irq; using default %#x\n", i8042_aux_irq); | 289 | printk(KERN_WARNING "PNP: PS/2 controller doesn't have AUX irq; using default %#x\n", i8042_aux_irq); |
270 | i8042_pnp_aux_irq = i8042_aux_irq; | 290 | i8042_pnp_aux_irq = i8042_aux_irq; |
271 | } | 291 | } |
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 8e63e464d3..5900de3c3f 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
@@ -698,6 +698,26 @@ static void i8042_timer_func(unsigned long data) | |||
698 | i8042_interrupt(0, NULL, NULL); | 698 | i8042_interrupt(0, NULL, NULL); |
699 | } | 699 | } |
700 | 700 | ||
701 | static int i8042_ctl_test(void) | ||
702 | { | ||
703 | unsigned char param; | ||
704 | |||
705 | if (!i8042_reset) | ||
706 | return 0; | ||
707 | |||
708 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { | ||
709 | printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); | ||
710 | return -1; | ||
711 | } | ||
712 | |||
713 | if (param != I8042_RET_CTL_TEST) { | ||
714 | printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", | ||
715 | param, I8042_RET_CTL_TEST); | ||
716 | return -1; | ||
717 | } | ||
718 | |||
719 | return 0; | ||
720 | } | ||
701 | 721 | ||
702 | /* | 722 | /* |
703 | * i8042_controller init initializes the i8042 controller, and, | 723 | * i8042_controller init initializes the i8042 controller, and, |
@@ -719,21 +739,8 @@ static int i8042_controller_init(void) | |||
719 | return -1; | 739 | return -1; |
720 | } | 740 | } |
721 | 741 | ||
722 | if (i8042_reset) { | 742 | if (i8042_ctl_test()) |
723 | 743 | return -1; | |
724 | unsigned char param; | ||
725 | |||
726 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { | ||
727 | printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); | ||
728 | return -1; | ||
729 | } | ||
730 | |||
731 | if (param != I8042_RET_CTL_TEST) { | ||
732 | printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", | ||
733 | param, I8042_RET_CTL_TEST); | ||
734 | return -1; | ||
735 | } | ||
736 | } | ||
737 | 744 | ||
738 | /* | 745 | /* |
739 | * Save the CTR for restoral on unload / reboot. | 746 | * Save the CTR for restoral on unload / reboot. |
@@ -802,15 +809,11 @@ static int i8042_controller_init(void) | |||
802 | */ | 809 | */ |
803 | static void i8042_controller_reset(void) | 810 | static void i8042_controller_reset(void) |
804 | { | 811 | { |
805 | unsigned char param; | ||
806 | |||
807 | /* | 812 | /* |
808 | * Reset the controller if requested. | 813 | * Reset the controller if requested. |
809 | */ | 814 | */ |
810 | 815 | ||
811 | if (i8042_reset) | 816 | i8042_ctl_test(); |
812 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) | ||
813 | printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n"); | ||
814 | 817 | ||
815 | /* | 818 | /* |
816 | * Disable MUX mode if present. | 819 | * Disable MUX mode if present. |
@@ -922,8 +925,11 @@ static int i8042_resume(struct device *dev, u32 level) | |||
922 | if (level != RESUME_ENABLE) | 925 | if (level != RESUME_ENABLE) |
923 | return 0; | 926 | return 0; |
924 | 927 | ||
925 | if (i8042_controller_init()) { | 928 | if (i8042_ctl_test()) |
926 | printk(KERN_ERR "i8042: resume failed\n"); | 929 | return -1; |
930 | |||
931 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | ||
932 | printk(KERN_ERR "i8042: Can't write CTR\n"); | ||
927 | return -1; | 933 | return -1; |
928 | } | 934 | } |
929 | 935 | ||
diff --git a/drivers/input/touchscreen/gunze.c b/drivers/input/touchscreen/gunze.c index c9d0a15367..53a27e43dd 100644 --- a/drivers/input/touchscreen/gunze.c +++ b/drivers/input/touchscreen/gunze.c | |||
@@ -68,8 +68,7 @@ static void gunze_process_packet(struct gunze* gunze, struct pt_regs *regs) | |||
68 | 68 | ||
69 | if (gunze->idx != GUNZE_MAX_LENGTH || gunze->data[5] != ',' || | 69 | if (gunze->idx != GUNZE_MAX_LENGTH || gunze->data[5] != ',' || |
70 | (gunze->data[0] != 'T' && gunze->data[0] != 'R')) { | 70 | (gunze->data[0] != 'T' && gunze->data[0] != 'R')) { |
71 | gunze->data[10] = 0; | 71 | printk(KERN_WARNING "gunze.c: bad packet: >%.*s<\n", GUNZE_MAX_LENGTH, gunze->data); |
72 | printk(KERN_WARNING "gunze.c: bad packet: >%s<\n", gunze->data); | ||
73 | return; | 72 | return; |
74 | } | 73 | } |
75 | 74 | ||
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c index e654aa5eec..bb9f4044c7 100644 --- a/drivers/macintosh/via-pmu.c +++ b/drivers/macintosh/via-pmu.c | |||
@@ -2421,7 +2421,7 @@ pmac_wakeup_devices(void) | |||
2421 | 2421 | ||
2422 | /* Re-enable local CPU interrupts */ | 2422 | /* Re-enable local CPU interrupts */ |
2423 | local_irq_enable(); | 2423 | local_irq_enable(); |
2424 | mdelay(100); | 2424 | mdelay(10); |
2425 | preempt_enable(); | 2425 | preempt_enable(); |
2426 | 2426 | ||
2427 | /* Re-enable clock spreading on some machines */ | 2427 | /* Re-enable clock spreading on some machines */ |
@@ -2549,7 +2549,9 @@ powerbook_sleep_Core99(void) | |||
2549 | return ret; | 2549 | return ret; |
2550 | } | 2550 | } |
2551 | 2551 | ||
2552 | printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); | 2552 | /* Stop environment and ADB interrupts */ |
2553 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | ||
2554 | pmu_wait_complete(&req); | ||
2553 | 2555 | ||
2554 | /* Tell PMU what events will wake us up */ | 2556 | /* Tell PMU what events will wake us up */ |
2555 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | 2557 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, |
@@ -2611,8 +2613,6 @@ powerbook_sleep_Core99(void) | |||
2611 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | 2613 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); |
2612 | pmu_wait_complete(&req); | 2614 | pmu_wait_complete(&req); |
2613 | 2615 | ||
2614 | printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); | ||
2615 | |||
2616 | pmac_wakeup_devices(); | 2616 | pmac_wakeup_devices(); |
2617 | 2617 | ||
2618 | return 0; | 2618 | return 0; |
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c index d047e349d7..1339912c30 100644 --- a/drivers/media/dvb/bt8xx/dst.c +++ b/drivers/media/dvb/bt8xx/dst.c | |||
@@ -906,22 +906,12 @@ static int dst_tone_power_cmd(struct dst_state* state) | |||
906 | if (state->dst_type == DST_TYPE_IS_TERR) | 906 | if (state->dst_type == DST_TYPE_IS_TERR) |
907 | return 0; | 907 | return 0; |
908 | 908 | ||
909 | if (state->voltage == SEC_VOLTAGE_OFF) | 909 | paket[4] = state->tx_tuna[4]; |
910 | paket[4] = 0; | 910 | paket[2] = state->tx_tuna[2]; |
911 | else | 911 | paket[3] = state->tx_tuna[3]; |
912 | paket[4] = 1; | ||
913 | |||
914 | if (state->tone == SEC_TONE_ON) | ||
915 | paket[2] = 0x02; | ||
916 | else | ||
917 | paket[2] = 0; | ||
918 | if (state->minicmd == SEC_MINI_A) | ||
919 | paket[3] = 0x02; | ||
920 | else | ||
921 | paket[3] = 0; | ||
922 | |||
923 | paket[7] = dst_check_sum (paket, 7); | 912 | paket[7] = dst_check_sum (paket, 7); |
924 | dst_command(state, paket, 8); | 913 | dst_command(state, paket, 8); |
914 | |||
925 | return 0; | 915 | return 0; |
926 | } | 916 | } |
927 | 917 | ||
@@ -980,7 +970,7 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage); | |||
980 | 970 | ||
981 | static int dst_write_tuna(struct dvb_frontend* fe) | 971 | static int dst_write_tuna(struct dvb_frontend* fe) |
982 | { | 972 | { |
983 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 973 | struct dst_state* state = fe->demodulator_priv; |
984 | int retval; | 974 | int retval; |
985 | u8 reply; | 975 | u8 reply; |
986 | 976 | ||
@@ -1048,10 +1038,10 @@ static int dst_write_tuna(struct dvb_frontend* fe) | |||
1048 | 1038 | ||
1049 | static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | 1039 | static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) |
1050 | { | 1040 | { |
1051 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1041 | struct dst_state* state = fe->demodulator_priv; |
1052 | u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec }; | 1042 | u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec }; |
1053 | 1043 | ||
1054 | if (state->dst_type == DST_TYPE_IS_TERR) | 1044 | if (state->dst_type != DST_TYPE_IS_SAT) |
1055 | return 0; | 1045 | return 0; |
1056 | 1046 | ||
1057 | if (cmd->msg_len == 0 || cmd->msg_len > 4) | 1047 | if (cmd->msg_len == 0 || cmd->msg_len > 4) |
@@ -1064,39 +1054,32 @@ static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* | |||
1064 | 1054 | ||
1065 | static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | 1055 | static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) |
1066 | { | 1056 | { |
1067 | u8 *val; | ||
1068 | int need_cmd; | 1057 | int need_cmd; |
1069 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1058 | struct dst_state* state = fe->demodulator_priv; |
1070 | 1059 | ||
1071 | state->voltage = voltage; | 1060 | state->voltage = voltage; |
1072 | 1061 | ||
1073 | if (state->dst_type == DST_TYPE_IS_TERR) | 1062 | if (state->dst_type != DST_TYPE_IS_SAT) |
1074 | return 0; | 1063 | return 0; |
1075 | 1064 | ||
1076 | need_cmd = 0; | 1065 | need_cmd = 0; |
1077 | val = &state->tx_tuna[0]; | ||
1078 | val[8] &= ~0x40; | ||
1079 | switch (voltage) { | 1066 | switch (voltage) { |
1080 | case SEC_VOLTAGE_13: | 1067 | case SEC_VOLTAGE_13: |
1081 | if ((state->diseq_flags & HAS_POWER) == 0) | 1068 | case SEC_VOLTAGE_18: |
1082 | need_cmd = 1; | 1069 | if ((state->diseq_flags & HAS_POWER) == 0) |
1083 | state->diseq_flags |= HAS_POWER; | 1070 | need_cmd = 1; |
1084 | break; | 1071 | state->diseq_flags |= HAS_POWER; |
1072 | state->tx_tuna[4] = 0x01; | ||
1073 | break; | ||
1085 | 1074 | ||
1086 | case SEC_VOLTAGE_18: | 1075 | case SEC_VOLTAGE_OFF: |
1087 | if ((state->diseq_flags & HAS_POWER) == 0) | ||
1088 | need_cmd = 1; | 1076 | need_cmd = 1; |
1089 | state->diseq_flags |= HAS_POWER; | 1077 | state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE); |
1090 | val[8] |= 0x40; | 1078 | state->tx_tuna[4] = 0x00; |
1091 | break; | 1079 | break; |
1092 | |||
1093 | case SEC_VOLTAGE_OFF: | ||
1094 | need_cmd = 1; | ||
1095 | state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE); | ||
1096 | break; | ||
1097 | 1080 | ||
1098 | default: | 1081 | default: |
1099 | return -EINVAL; | 1082 | return -EINVAL; |
1100 | } | 1083 | } |
1101 | if (need_cmd) | 1084 | if (need_cmd) |
1102 | dst_tone_power_cmd(state); | 1085 | dst_tone_power_cmd(state); |
@@ -1106,37 +1089,56 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | |||
1106 | 1089 | ||
1107 | static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | 1090 | static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) |
1108 | { | 1091 | { |
1109 | u8 *val; | 1092 | struct dst_state* state = fe->demodulator_priv; |
1110 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | ||
1111 | 1093 | ||
1112 | state->tone = tone; | 1094 | state->tone = tone; |
1113 | 1095 | ||
1114 | if (state->dst_type == DST_TYPE_IS_TERR) | 1096 | if (state->dst_type != DST_TYPE_IS_SAT) |
1115 | return 0; | 1097 | return 0; |
1116 | 1098 | ||
1117 | val = &state->tx_tuna[0]; | 1099 | switch (tone) { |
1100 | case SEC_TONE_OFF: | ||
1101 | state->tx_tuna[2] = 0xff; | ||
1102 | break; | ||
1118 | 1103 | ||
1119 | val[8] &= ~0x1; | 1104 | case SEC_TONE_ON: |
1105 | state->tx_tuna[2] = 0x02; | ||
1106 | break; | ||
1120 | 1107 | ||
1121 | switch (tone) { | 1108 | default: |
1122 | case SEC_TONE_OFF: | 1109 | return -EINVAL; |
1123 | break; | 1110 | } |
1111 | dst_tone_power_cmd(state); | ||
1124 | 1112 | ||
1125 | case SEC_TONE_ON: | 1113 | return 0; |
1126 | val[8] |= 1; | 1114 | } |
1127 | break; | ||
1128 | 1115 | ||
1129 | default: | 1116 | static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd) |
1130 | return -EINVAL; | 1117 | { |
1118 | struct dst_state *state = fe->demodulator_priv; | ||
1119 | |||
1120 | if (state->dst_type != DST_TYPE_IS_SAT) | ||
1121 | return 0; | ||
1122 | |||
1123 | state->minicmd = minicmd; | ||
1124 | |||
1125 | switch (minicmd) { | ||
1126 | case SEC_MINI_A: | ||
1127 | state->tx_tuna[3] = 0x02; | ||
1128 | break; | ||
1129 | case SEC_MINI_B: | ||
1130 | state->tx_tuna[3] = 0xff; | ||
1131 | break; | ||
1131 | } | 1132 | } |
1132 | dst_tone_power_cmd(state); | 1133 | dst_tone_power_cmd(state); |
1133 | 1134 | ||
1134 | return 0; | 1135 | return 0; |
1135 | } | 1136 | } |
1136 | 1137 | ||
1138 | |||
1137 | static int dst_init(struct dvb_frontend* fe) | 1139 | static int dst_init(struct dvb_frontend* fe) |
1138 | { | 1140 | { |
1139 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1141 | struct dst_state* state = fe->demodulator_priv; |
1140 | static u8 ini_satci_tuna[] = { 9, 0, 3, 0xb6, 1, 0, 0x73, 0x21, 0, 0 }; | 1142 | static u8 ini_satci_tuna[] = { 9, 0, 3, 0xb6, 1, 0, 0x73, 0x21, 0, 0 }; |
1141 | static u8 ini_satfta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 }; | 1143 | static u8 ini_satfta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 }; |
1142 | static u8 ini_tvfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; | 1144 | static u8 ini_tvfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 }; |
@@ -1168,7 +1170,7 @@ static int dst_init(struct dvb_frontend* fe) | |||
1168 | 1170 | ||
1169 | static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status) | 1171 | static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status) |
1170 | { | 1172 | { |
1171 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1173 | struct dst_state* state = fe->demodulator_priv; |
1172 | 1174 | ||
1173 | *status = 0; | 1175 | *status = 0; |
1174 | if (state->diseq_flags & HAS_LOCK) { | 1176 | if (state->diseq_flags & HAS_LOCK) { |
@@ -1182,7 +1184,7 @@ static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status) | |||
1182 | 1184 | ||
1183 | static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength) | 1185 | static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength) |
1184 | { | 1186 | { |
1185 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1187 | struct dst_state* state = fe->demodulator_priv; |
1186 | 1188 | ||
1187 | dst_get_signal(state); | 1189 | dst_get_signal(state); |
1188 | *strength = state->decode_strength; | 1190 | *strength = state->decode_strength; |
@@ -1192,7 +1194,7 @@ static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |||
1192 | 1194 | ||
1193 | static int dst_read_snr(struct dvb_frontend* fe, u16* snr) | 1195 | static int dst_read_snr(struct dvb_frontend* fe, u16* snr) |
1194 | { | 1196 | { |
1195 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1197 | struct dst_state* state = fe->demodulator_priv; |
1196 | 1198 | ||
1197 | dst_get_signal(state); | 1199 | dst_get_signal(state); |
1198 | *snr = state->decode_snr; | 1200 | *snr = state->decode_snr; |
@@ -1202,7 +1204,7 @@ static int dst_read_snr(struct dvb_frontend* fe, u16* snr) | |||
1202 | 1204 | ||
1203 | static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | 1205 | static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) |
1204 | { | 1206 | { |
1205 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1207 | struct dst_state* state = fe->demodulator_priv; |
1206 | 1208 | ||
1207 | dst_set_freq(state, p->frequency); | 1209 | dst_set_freq(state, p->frequency); |
1208 | if (verbose > 4) | 1210 | if (verbose > 4) |
@@ -1228,7 +1230,7 @@ static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
1228 | 1230 | ||
1229 | static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | 1231 | static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) |
1230 | { | 1232 | { |
1231 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1233 | struct dst_state* state = fe->demodulator_priv; |
1232 | 1234 | ||
1233 | p->frequency = state->decode_freq; | 1235 | p->frequency = state->decode_freq; |
1234 | p->inversion = state->inversion; | 1236 | p->inversion = state->inversion; |
@@ -1248,7 +1250,7 @@ static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet | |||
1248 | 1250 | ||
1249 | static void dst_release(struct dvb_frontend* fe) | 1251 | static void dst_release(struct dvb_frontend* fe) |
1250 | { | 1252 | { |
1251 | struct dst_state* state = (struct dst_state*) fe->demodulator_priv; | 1253 | struct dst_state* state = fe->demodulator_priv; |
1252 | kfree(state); | 1254 | kfree(state); |
1253 | } | 1255 | } |
1254 | 1256 | ||
@@ -1346,7 +1348,7 @@ static struct dvb_frontend_ops dst_dvbs_ops = { | |||
1346 | .read_signal_strength = dst_read_signal_strength, | 1348 | .read_signal_strength = dst_read_signal_strength, |
1347 | .read_snr = dst_read_snr, | 1349 | .read_snr = dst_read_snr, |
1348 | 1350 | ||
1349 | .diseqc_send_burst = dst_set_tone, | 1351 | .diseqc_send_burst = dst_send_burst, |
1350 | .diseqc_send_master_cmd = dst_set_diseqc, | 1352 | .diseqc_send_master_cmd = dst_set_diseqc, |
1351 | .set_voltage = dst_set_voltage, | 1353 | .set_voltage = dst_set_voltage, |
1352 | .set_tone = dst_set_tone, | 1354 | .set_tone = dst_set_tone, |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index f10dd74988..fc9b5cd957 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -133,6 +133,8 @@ | |||
133 | /* number of ETHTOOL_GSTATS u64's */ | 133 | /* number of ETHTOOL_GSTATS u64's */ |
134 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) | 134 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) |
135 | 135 | ||
136 | #define TG3_NUM_TEST 6 | ||
137 | |||
136 | static char version[] __devinitdata = | 138 | static char version[] __devinitdata = |
137 | DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; | 139 | DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; |
138 | 140 | ||
@@ -316,6 +318,17 @@ static struct { | |||
316 | { "nic_tx_threshold_hit" } | 318 | { "nic_tx_threshold_hit" } |
317 | }; | 319 | }; |
318 | 320 | ||
321 | static struct { | ||
322 | const char string[ETH_GSTRING_LEN]; | ||
323 | } ethtool_test_keys[TG3_NUM_TEST] = { | ||
324 | { "nvram test (online) " }, | ||
325 | { "link test (online) " }, | ||
326 | { "register test (offline)" }, | ||
327 | { "memory test (offline)" }, | ||
328 | { "loopback test (offline)" }, | ||
329 | { "interrupt test (offline)" }, | ||
330 | }; | ||
331 | |||
319 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) | 332 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) |
320 | { | 333 | { |
321 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { | 334 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { |
@@ -3070,7 +3083,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id, | |||
3070 | } | 3083 | } |
3071 | 3084 | ||
3072 | static int tg3_init_hw(struct tg3 *); | 3085 | static int tg3_init_hw(struct tg3 *); |
3073 | static int tg3_halt(struct tg3 *, int); | 3086 | static int tg3_halt(struct tg3 *, int, int); |
3074 | 3087 | ||
3075 | #ifdef CONFIG_NET_POLL_CONTROLLER | 3088 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3076 | static void tg3_poll_controller(struct net_device *dev) | 3089 | static void tg3_poll_controller(struct net_device *dev) |
@@ -3094,7 +3107,7 @@ static void tg3_reset_task(void *_data) | |||
3094 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; | 3107 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; |
3095 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; | 3108 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; |
3096 | 3109 | ||
3097 | tg3_halt(tp, 0); | 3110 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); |
3098 | tg3_init_hw(tp); | 3111 | tg3_init_hw(tp); |
3099 | 3112 | ||
3100 | tg3_netif_start(tp); | 3113 | tg3_netif_start(tp); |
@@ -3440,7 +3453,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu) | |||
3440 | spin_lock_irq(&tp->lock); | 3453 | spin_lock_irq(&tp->lock); |
3441 | spin_lock(&tp->tx_lock); | 3454 | spin_lock(&tp->tx_lock); |
3442 | 3455 | ||
3443 | tg3_halt(tp, 1); | 3456 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
3444 | 3457 | ||
3445 | tg3_set_mtu(dev, tp, new_mtu); | 3458 | tg3_set_mtu(dev, tp, new_mtu); |
3446 | 3459 | ||
@@ -4131,19 +4144,19 @@ static void tg3_stop_fw(struct tg3 *tp) | |||
4131 | } | 4144 | } |
4132 | 4145 | ||
4133 | /* tp->lock is held. */ | 4146 | /* tp->lock is held. */ |
4134 | static int tg3_halt(struct tg3 *tp, int silent) | 4147 | static int tg3_halt(struct tg3 *tp, int kind, int silent) |
4135 | { | 4148 | { |
4136 | int err; | 4149 | int err; |
4137 | 4150 | ||
4138 | tg3_stop_fw(tp); | 4151 | tg3_stop_fw(tp); |
4139 | 4152 | ||
4140 | tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN); | 4153 | tg3_write_sig_pre_reset(tp, kind); |
4141 | 4154 | ||
4142 | tg3_abort_hw(tp, silent); | 4155 | tg3_abort_hw(tp, silent); |
4143 | err = tg3_chip_reset(tp); | 4156 | err = tg3_chip_reset(tp); |
4144 | 4157 | ||
4145 | tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN); | 4158 | tg3_write_sig_legacy(tp, kind); |
4146 | tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); | 4159 | tg3_write_sig_post_reset(tp, kind); |
4147 | 4160 | ||
4148 | if (err) | 4161 | if (err) |
4149 | return err; | 4162 | return err; |
@@ -4357,7 +4370,12 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_b | |||
4357 | */ | 4370 | */ |
4358 | tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG; | 4371 | tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG; |
4359 | 4372 | ||
4373 | /* It is possible that bootcode is still loading at this point. | ||
4374 | * Get the nvram lock first before halting the cpu. | ||
4375 | */ | ||
4376 | tg3_nvram_lock(tp); | ||
4360 | err = tg3_halt_cpu(tp, cpu_base); | 4377 | err = tg3_halt_cpu(tp, cpu_base); |
4378 | tg3_nvram_unlock(tp); | ||
4361 | if (err) | 4379 | if (err) |
4362 | goto out; | 4380 | goto out; |
4363 | 4381 | ||
@@ -5881,6 +5899,9 @@ static int tg3_test_interrupt(struct tg3 *tp) | |||
5881 | int err, i; | 5899 | int err, i; |
5882 | u32 int_mbox = 0; | 5900 | u32 int_mbox = 0; |
5883 | 5901 | ||
5902 | if (!netif_running(dev)) | ||
5903 | return -ENODEV; | ||
5904 | |||
5884 | tg3_disable_ints(tp); | 5905 | tg3_disable_ints(tp); |
5885 | 5906 | ||
5886 | free_irq(tp->pdev->irq, dev); | 5907 | free_irq(tp->pdev->irq, dev); |
@@ -5984,7 +6005,7 @@ static int tg3_test_msi(struct tg3 *tp) | |||
5984 | spin_lock_irq(&tp->lock); | 6005 | spin_lock_irq(&tp->lock); |
5985 | spin_lock(&tp->tx_lock); | 6006 | spin_lock(&tp->tx_lock); |
5986 | 6007 | ||
5987 | tg3_halt(tp, 1); | 6008 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
5988 | err = tg3_init_hw(tp); | 6009 | err = tg3_init_hw(tp); |
5989 | 6010 | ||
5990 | spin_unlock(&tp->tx_lock); | 6011 | spin_unlock(&tp->tx_lock); |
@@ -6060,7 +6081,7 @@ static int tg3_open(struct net_device *dev) | |||
6060 | 6081 | ||
6061 | err = tg3_init_hw(tp); | 6082 | err = tg3_init_hw(tp); |
6062 | if (err) { | 6083 | if (err) { |
6063 | tg3_halt(tp, 1); | 6084 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
6064 | tg3_free_rings(tp); | 6085 | tg3_free_rings(tp); |
6065 | } else { | 6086 | } else { |
6066 | if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) | 6087 | if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) |
@@ -6104,7 +6125,7 @@ static int tg3_open(struct net_device *dev) | |||
6104 | pci_disable_msi(tp->pdev); | 6125 | pci_disable_msi(tp->pdev); |
6105 | tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI; | 6126 | tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI; |
6106 | } | 6127 | } |
6107 | tg3_halt(tp, 1); | 6128 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
6108 | tg3_free_rings(tp); | 6129 | tg3_free_rings(tp); |
6109 | tg3_free_consistent(tp); | 6130 | tg3_free_consistent(tp); |
6110 | 6131 | ||
@@ -6377,7 +6398,7 @@ static int tg3_close(struct net_device *dev) | |||
6377 | 6398 | ||
6378 | tg3_disable_ints(tp); | 6399 | tg3_disable_ints(tp); |
6379 | 6400 | ||
6380 | tg3_halt(tp, 1); | 6401 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
6381 | tg3_free_rings(tp); | 6402 | tg3_free_rings(tp); |
6382 | tp->tg3_flags &= | 6403 | tp->tg3_flags &= |
6383 | ~(TG3_FLAG_INIT_COMPLETE | | 6404 | ~(TG3_FLAG_INIT_COMPLETE | |
@@ -7097,7 +7118,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e | |||
7097 | tp->tx_pending = ering->tx_pending; | 7118 | tp->tx_pending = ering->tx_pending; |
7098 | 7119 | ||
7099 | if (netif_running(dev)) { | 7120 | if (netif_running(dev)) { |
7100 | tg3_halt(tp, 1); | 7121 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
7101 | tg3_init_hw(tp); | 7122 | tg3_init_hw(tp); |
7102 | tg3_netif_start(tp); | 7123 | tg3_netif_start(tp); |
7103 | } | 7124 | } |
@@ -7140,7 +7161,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
7140 | tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE; | 7161 | tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE; |
7141 | 7162 | ||
7142 | if (netif_running(dev)) { | 7163 | if (netif_running(dev)) { |
7143 | tg3_halt(tp, 1); | 7164 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
7144 | tg3_init_hw(tp); | 7165 | tg3_init_hw(tp); |
7145 | tg3_netif_start(tp); | 7166 | tg3_netif_start(tp); |
7146 | } | 7167 | } |
@@ -7199,12 +7220,20 @@ static int tg3_get_stats_count (struct net_device *dev) | |||
7199 | return TG3_NUM_STATS; | 7220 | return TG3_NUM_STATS; |
7200 | } | 7221 | } |
7201 | 7222 | ||
7223 | static int tg3_get_test_count (struct net_device *dev) | ||
7224 | { | ||
7225 | return TG3_NUM_TEST; | ||
7226 | } | ||
7227 | |||
7202 | static void tg3_get_strings (struct net_device *dev, u32 stringset, u8 *buf) | 7228 | static void tg3_get_strings (struct net_device *dev, u32 stringset, u8 *buf) |
7203 | { | 7229 | { |
7204 | switch (stringset) { | 7230 | switch (stringset) { |
7205 | case ETH_SS_STATS: | 7231 | case ETH_SS_STATS: |
7206 | memcpy(buf, ðtool_stats_keys, sizeof(ethtool_stats_keys)); | 7232 | memcpy(buf, ðtool_stats_keys, sizeof(ethtool_stats_keys)); |
7207 | break; | 7233 | break; |
7234 | case ETH_SS_TEST: | ||
7235 | memcpy(buf, ðtool_test_keys, sizeof(ethtool_test_keys)); | ||
7236 | break; | ||
7208 | default: | 7237 | default: |
7209 | WARN_ON(1); /* we need a WARN() */ | 7238 | WARN_ON(1); /* we need a WARN() */ |
7210 | break; | 7239 | break; |
@@ -7218,6 +7247,516 @@ static void tg3_get_ethtool_stats (struct net_device *dev, | |||
7218 | memcpy(tmp_stats, tg3_get_estats(tp), sizeof(tp->estats)); | 7247 | memcpy(tmp_stats, tg3_get_estats(tp), sizeof(tp->estats)); |
7219 | } | 7248 | } |
7220 | 7249 | ||
7250 | #define NVRAM_TEST_SIZE 0x100 | ||
7251 | |||
7252 | static int tg3_test_nvram(struct tg3 *tp) | ||
7253 | { | ||
7254 | u32 *buf, csum; | ||
7255 | int i, j, err = 0; | ||
7256 | |||
7257 | buf = kmalloc(NVRAM_TEST_SIZE, GFP_KERNEL); | ||
7258 | if (buf == NULL) | ||
7259 | return -ENOMEM; | ||
7260 | |||
7261 | for (i = 0, j = 0; i < NVRAM_TEST_SIZE; i += 4, j++) { | ||
7262 | u32 val; | ||
7263 | |||
7264 | if ((err = tg3_nvram_read(tp, i, &val)) != 0) | ||
7265 | break; | ||
7266 | buf[j] = cpu_to_le32(val); | ||
7267 | } | ||
7268 | if (i < NVRAM_TEST_SIZE) | ||
7269 | goto out; | ||
7270 | |||
7271 | err = -EIO; | ||
7272 | if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC) | ||
7273 | goto out; | ||
7274 | |||
7275 | /* Bootstrap checksum at offset 0x10 */ | ||
7276 | csum = calc_crc((unsigned char *) buf, 0x10); | ||
7277 | if(csum != cpu_to_le32(buf[0x10/4])) | ||
7278 | goto out; | ||
7279 | |||
7280 | /* Manufacturing block starts at offset 0x74, checksum at 0xfc */ | ||
7281 | csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88); | ||
7282 | if (csum != cpu_to_le32(buf[0xfc/4])) | ||
7283 | goto out; | ||
7284 | |||
7285 | err = 0; | ||
7286 | |||
7287 | out: | ||
7288 | kfree(buf); | ||
7289 | return err; | ||
7290 | } | ||
7291 | |||
7292 | #define TG3_SERDES_TIMEOUT_SEC 2 | ||
7293 | #define TG3_COPPER_TIMEOUT_SEC 6 | ||
7294 | |||
7295 | static int tg3_test_link(struct tg3 *tp) | ||
7296 | { | ||
7297 | int i, max; | ||
7298 | |||
7299 | if (!netif_running(tp->dev)) | ||
7300 | return -ENODEV; | ||
7301 | |||
7302 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) | ||
7303 | max = TG3_SERDES_TIMEOUT_SEC; | ||
7304 | else | ||
7305 | max = TG3_COPPER_TIMEOUT_SEC; | ||
7306 | |||
7307 | for (i = 0; i < max; i++) { | ||
7308 | if (netif_carrier_ok(tp->dev)) | ||
7309 | return 0; | ||
7310 | |||
7311 | if (msleep_interruptible(1000)) | ||
7312 | break; | ||
7313 | } | ||
7314 | |||
7315 | return -EIO; | ||
7316 | } | ||
7317 | |||
7318 | /* Only test the commonly used registers */ | ||
7319 | static int tg3_test_registers(struct tg3 *tp) | ||
7320 | { | ||
7321 | int i, is_5705; | ||
7322 | u32 offset, read_mask, write_mask, val, save_val, read_val; | ||
7323 | static struct { | ||
7324 | u16 offset; | ||
7325 | u16 flags; | ||
7326 | #define TG3_FL_5705 0x1 | ||
7327 | #define TG3_FL_NOT_5705 0x2 | ||
7328 | #define TG3_FL_NOT_5788 0x4 | ||
7329 | u32 read_mask; | ||
7330 | u32 write_mask; | ||
7331 | } reg_tbl[] = { | ||
7332 | /* MAC Control Registers */ | ||
7333 | { MAC_MODE, TG3_FL_NOT_5705, | ||
7334 | 0x00000000, 0x00ef6f8c }, | ||
7335 | { MAC_MODE, TG3_FL_5705, | ||
7336 | 0x00000000, 0x01ef6b8c }, | ||
7337 | { MAC_STATUS, TG3_FL_NOT_5705, | ||
7338 | 0x03800107, 0x00000000 }, | ||
7339 | { MAC_STATUS, TG3_FL_5705, | ||
7340 | 0x03800100, 0x00000000 }, | ||
7341 | { MAC_ADDR_0_HIGH, 0x0000, | ||
7342 | 0x00000000, 0x0000ffff }, | ||
7343 | { MAC_ADDR_0_LOW, 0x0000, | ||
7344 | 0x00000000, 0xffffffff }, | ||
7345 | { MAC_RX_MTU_SIZE, 0x0000, | ||
7346 | 0x00000000, 0x0000ffff }, | ||
7347 | { MAC_TX_MODE, 0x0000, | ||
7348 | 0x00000000, 0x00000070 }, | ||
7349 | { MAC_TX_LENGTHS, 0x0000, | ||
7350 | 0x00000000, 0x00003fff }, | ||
7351 | { MAC_RX_MODE, TG3_FL_NOT_5705, | ||
7352 | 0x00000000, 0x000007fc }, | ||
7353 | { MAC_RX_MODE, TG3_FL_5705, | ||
7354 | 0x00000000, 0x000007dc }, | ||
7355 | { MAC_HASH_REG_0, 0x0000, | ||
7356 | 0x00000000, 0xffffffff }, | ||
7357 | { MAC_HASH_REG_1, 0x0000, | ||
7358 | 0x00000000, 0xffffffff }, | ||
7359 | { MAC_HASH_REG_2, 0x0000, | ||
7360 | 0x00000000, 0xffffffff }, | ||
7361 | { MAC_HASH_REG_3, 0x0000, | ||
7362 | 0x00000000, 0xffffffff }, | ||
7363 | |||
7364 | /* Receive Data and Receive BD Initiator Control Registers. */ | ||
7365 | { RCVDBDI_JUMBO_BD+0, TG3_FL_NOT_5705, | ||
7366 | 0x00000000, 0xffffffff }, | ||
7367 | { RCVDBDI_JUMBO_BD+4, TG3_FL_NOT_5705, | ||
7368 | 0x00000000, 0xffffffff }, | ||
7369 | { RCVDBDI_JUMBO_BD+8, TG3_FL_NOT_5705, | ||
7370 | 0x00000000, 0x00000003 }, | ||
7371 | { RCVDBDI_JUMBO_BD+0xc, TG3_FL_NOT_5705, | ||
7372 | 0x00000000, 0xffffffff }, | ||
7373 | { RCVDBDI_STD_BD+0, 0x0000, | ||
7374 | 0x00000000, 0xffffffff }, | ||
7375 | { RCVDBDI_STD_BD+4, 0x0000, | ||
7376 | 0x00000000, 0xffffffff }, | ||
7377 | { RCVDBDI_STD_BD+8, 0x0000, | ||
7378 | 0x00000000, 0xffff0002 }, | ||
7379 | { RCVDBDI_STD_BD+0xc, 0x0000, | ||
7380 | 0x00000000, 0xffffffff }, | ||
7381 | |||
7382 | /* Receive BD Initiator Control Registers. */ | ||
7383 | { RCVBDI_STD_THRESH, TG3_FL_NOT_5705, | ||
7384 | 0x00000000, 0xffffffff }, | ||
7385 | { RCVBDI_STD_THRESH, TG3_FL_5705, | ||
7386 | 0x00000000, 0x000003ff }, | ||
7387 | { RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705, | ||
7388 | 0x00000000, 0xffffffff }, | ||
7389 | |||
7390 | /* Host Coalescing Control Registers. */ | ||
7391 | { HOSTCC_MODE, TG3_FL_NOT_5705, | ||
7392 | 0x00000000, 0x00000004 }, | ||
7393 | { HOSTCC_MODE, TG3_FL_5705, | ||
7394 | 0x00000000, 0x000000f6 }, | ||
7395 | { HOSTCC_RXCOL_TICKS, TG3_FL_NOT_5705, | ||
7396 | 0x00000000, 0xffffffff }, | ||
7397 | { HOSTCC_RXCOL_TICKS, TG3_FL_5705, | ||
7398 | 0x00000000, 0x000003ff }, | ||
7399 | { HOSTCC_TXCOL_TICKS, TG3_FL_NOT_5705, | ||
7400 | 0x00000000, 0xffffffff }, | ||
7401 | { HOSTCC_TXCOL_TICKS, TG3_FL_5705, | ||
7402 | 0x00000000, 0x000003ff }, | ||
7403 | { HOSTCC_RXMAX_FRAMES, TG3_FL_NOT_5705, | ||
7404 | 0x00000000, 0xffffffff }, | ||
7405 | { HOSTCC_RXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788, | ||
7406 | 0x00000000, 0x000000ff }, | ||
7407 | { HOSTCC_TXMAX_FRAMES, TG3_FL_NOT_5705, | ||
7408 | 0x00000000, 0xffffffff }, | ||
7409 | { HOSTCC_TXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788, | ||
7410 | 0x00000000, 0x000000ff }, | ||
7411 | { HOSTCC_RXCOAL_TICK_INT, TG3_FL_NOT_5705, | ||
7412 | 0x00000000, 0xffffffff }, | ||
7413 | { HOSTCC_TXCOAL_TICK_INT, TG3_FL_NOT_5705, | ||
7414 | 0x00000000, 0xffffffff }, | ||
7415 | { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_NOT_5705, | ||
7416 | 0x00000000, 0xffffffff }, | ||
7417 | { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788, | ||
7418 | 0x00000000, 0x000000ff }, | ||
7419 | { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_NOT_5705, | ||
7420 | 0x00000000, 0xffffffff }, | ||
7421 | { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788, | ||
7422 | 0x00000000, 0x000000ff }, | ||
7423 | { HOSTCC_STAT_COAL_TICKS, TG3_FL_NOT_5705, | ||
7424 | 0x00000000, 0xffffffff }, | ||
7425 | { HOSTCC_STATS_BLK_HOST_ADDR, TG3_FL_NOT_5705, | ||
7426 | 0x00000000, 0xffffffff }, | ||
7427 | { HOSTCC_STATS_BLK_HOST_ADDR+4, TG3_FL_NOT_5705, | ||
7428 | 0x00000000, 0xffffffff }, | ||
7429 | { HOSTCC_STATUS_BLK_HOST_ADDR, 0x0000, | ||
7430 | 0x00000000, 0xffffffff }, | ||
7431 | { HOSTCC_STATUS_BLK_HOST_ADDR+4, 0x0000, | ||
7432 | 0x00000000, 0xffffffff }, | ||
7433 | { HOSTCC_STATS_BLK_NIC_ADDR, 0x0000, | ||
7434 | 0xffffffff, 0x00000000 }, | ||
7435 | { HOSTCC_STATUS_BLK_NIC_ADDR, 0x0000, | ||
7436 | 0xffffffff, 0x00000000 }, | ||
7437 | |||
7438 | /* Buffer Manager Control Registers. */ | ||
7439 | { BUFMGR_MB_POOL_ADDR, 0x0000, | ||
7440 | 0x00000000, 0x007fff80 }, | ||
7441 | { BUFMGR_MB_POOL_SIZE, 0x0000, | ||
7442 | 0x00000000, 0x007fffff }, | ||
7443 | { BUFMGR_MB_RDMA_LOW_WATER, 0x0000, | ||
7444 | 0x00000000, 0x0000003f }, | ||
7445 | { BUFMGR_MB_MACRX_LOW_WATER, 0x0000, | ||
7446 | 0x00000000, 0x000001ff }, | ||
7447 | { BUFMGR_MB_HIGH_WATER, 0x0000, | ||
7448 | 0x00000000, 0x000001ff }, | ||
7449 | { BUFMGR_DMA_DESC_POOL_ADDR, TG3_FL_NOT_5705, | ||
7450 | 0xffffffff, 0x00000000 }, | ||
7451 | { BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705, | ||
7452 | 0xffffffff, 0x00000000 }, | ||
7453 | |||
7454 | /* Mailbox Registers */ | ||
7455 | { GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000, | ||
7456 | 0x00000000, 0x000001ff }, | ||
7457 | { GRCMBOX_RCVJUMBO_PROD_IDX+4, TG3_FL_NOT_5705, | ||
7458 | 0x00000000, 0x000001ff }, | ||
7459 | { GRCMBOX_RCVRET_CON_IDX_0+4, 0x0000, | ||
7460 | 0x00000000, 0x000007ff }, | ||
7461 | { GRCMBOX_SNDHOST_PROD_IDX_0+4, 0x0000, | ||
7462 | 0x00000000, 0x000001ff }, | ||
7463 | |||
7464 | { 0xffff, 0x0000, 0x00000000, 0x00000000 }, | ||
7465 | }; | ||
7466 | |||
7467 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) | ||
7468 | is_5705 = 1; | ||
7469 | else | ||
7470 | is_5705 = 0; | ||
7471 | |||
7472 | for (i = 0; reg_tbl[i].offset != 0xffff; i++) { | ||
7473 | if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705)) | ||
7474 | continue; | ||
7475 | |||
7476 | if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705)) | ||
7477 | continue; | ||
7478 | |||
7479 | if ((tp->tg3_flags2 & TG3_FLG2_IS_5788) && | ||
7480 | (reg_tbl[i].flags & TG3_FL_NOT_5788)) | ||
7481 | continue; | ||
7482 | |||
7483 | offset = (u32) reg_tbl[i].offset; | ||
7484 | read_mask = reg_tbl[i].read_mask; | ||
7485 | write_mask = reg_tbl[i].write_mask; | ||
7486 | |||
7487 | /* Save the original register content */ | ||
7488 | save_val = tr32(offset); | ||
7489 | |||
7490 | /* Determine the read-only value. */ | ||
7491 | read_val = save_val & read_mask; | ||
7492 | |||
7493 | /* Write zero to the register, then make sure the read-only bits | ||
7494 | * are not changed and the read/write bits are all zeros. | ||
7495 | */ | ||
7496 | tw32(offset, 0); | ||
7497 | |||
7498 | val = tr32(offset); | ||
7499 | |||
7500 | /* Test the read-only and read/write bits. */ | ||
7501 | if (((val & read_mask) != read_val) || (val & write_mask)) | ||
7502 | goto out; | ||
7503 | |||
7504 | /* Write ones to all the bits defined by RdMask and WrMask, then | ||
7505 | * make sure the read-only bits are not changed and the | ||
7506 | * read/write bits are all ones. | ||
7507 | */ | ||
7508 | tw32(offset, read_mask | write_mask); | ||
7509 | |||
7510 | val = tr32(offset); | ||
7511 | |||
7512 | /* Test the read-only bits. */ | ||
7513 | if ((val & read_mask) != read_val) | ||
7514 | goto out; | ||
7515 | |||
7516 | /* Test the read/write bits. */ | ||
7517 | if ((val & write_mask) != write_mask) | ||
7518 | goto out; | ||
7519 | |||
7520 | tw32(offset, save_val); | ||
7521 | } | ||
7522 | |||
7523 | return 0; | ||
7524 | |||
7525 | out: | ||
7526 | printk(KERN_ERR PFX "Register test failed at offset %x\n", offset); | ||
7527 | tw32(offset, save_val); | ||
7528 | return -EIO; | ||
7529 | } | ||
7530 | |||
7531 | static int tg3_do_mem_test(struct tg3 *tp, u32 offset, u32 len) | ||
7532 | { | ||
7533 | static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a }; | ||
7534 | int i; | ||
7535 | u32 j; | ||
7536 | |||
7537 | for (i = 0; i < sizeof(test_pattern)/sizeof(u32); i++) { | ||
7538 | for (j = 0; j < len; j += 4) { | ||
7539 | u32 val; | ||
7540 | |||
7541 | tg3_write_mem(tp, offset + j, test_pattern[i]); | ||
7542 | tg3_read_mem(tp, offset + j, &val); | ||
7543 | if (val != test_pattern[i]) | ||
7544 | return -EIO; | ||
7545 | } | ||
7546 | } | ||
7547 | return 0; | ||
7548 | } | ||
7549 | |||
7550 | static int tg3_test_memory(struct tg3 *tp) | ||
7551 | { | ||
7552 | static struct mem_entry { | ||
7553 | u32 offset; | ||
7554 | u32 len; | ||
7555 | } mem_tbl_570x[] = { | ||
7556 | { 0x00000000, 0x01000}, | ||
7557 | { 0x00002000, 0x1c000}, | ||
7558 | { 0xffffffff, 0x00000} | ||
7559 | }, mem_tbl_5705[] = { | ||
7560 | { 0x00000100, 0x0000c}, | ||
7561 | { 0x00000200, 0x00008}, | ||
7562 | { 0x00000b50, 0x00400}, | ||
7563 | { 0x00004000, 0x00800}, | ||
7564 | { 0x00006000, 0x01000}, | ||
7565 | { 0x00008000, 0x02000}, | ||
7566 | { 0x00010000, 0x0e000}, | ||
7567 | { 0xffffffff, 0x00000} | ||
7568 | }; | ||
7569 | struct mem_entry *mem_tbl; | ||
7570 | int err = 0; | ||
7571 | int i; | ||
7572 | |||
7573 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) | ||
7574 | mem_tbl = mem_tbl_5705; | ||
7575 | else | ||
7576 | mem_tbl = mem_tbl_570x; | ||
7577 | |||
7578 | for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) { | ||
7579 | if ((err = tg3_do_mem_test(tp, mem_tbl[i].offset, | ||
7580 | mem_tbl[i].len)) != 0) | ||
7581 | break; | ||
7582 | } | ||
7583 | |||
7584 | return err; | ||
7585 | } | ||
7586 | |||
7587 | static int tg3_test_loopback(struct tg3 *tp) | ||
7588 | { | ||
7589 | u32 mac_mode, send_idx, rx_start_idx, rx_idx, tx_idx, opaque_key; | ||
7590 | u32 desc_idx; | ||
7591 | struct sk_buff *skb, *rx_skb; | ||
7592 | u8 *tx_data; | ||
7593 | dma_addr_t map; | ||
7594 | int num_pkts, tx_len, rx_len, i, err; | ||
7595 | struct tg3_rx_buffer_desc *desc; | ||
7596 | |||
7597 | if (!netif_running(tp->dev)) | ||
7598 | return -ENODEV; | ||
7599 | |||
7600 | err = -EIO; | ||
7601 | |||
7602 | tg3_abort_hw(tp, 1); | ||
7603 | |||
7604 | /* Clearing this flag to keep interrupts disabled */ | ||
7605 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | ||
7606 | tg3_reset_hw(tp); | ||
7607 | |||
7608 | mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | | ||
7609 | MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY | | ||
7610 | MAC_MODE_PORT_MODE_GMII; | ||
7611 | tw32(MAC_MODE, mac_mode); | ||
7612 | |||
7613 | tx_len = 1514; | ||
7614 | skb = dev_alloc_skb(tx_len); | ||
7615 | tx_data = skb_put(skb, tx_len); | ||
7616 | memcpy(tx_data, tp->dev->dev_addr, 6); | ||
7617 | memset(tx_data + 6, 0x0, 8); | ||
7618 | |||
7619 | tw32(MAC_RX_MTU_SIZE, tx_len + 4); | ||
7620 | |||
7621 | for (i = 14; i < tx_len; i++) | ||
7622 | tx_data[i] = (u8) (i & 0xff); | ||
7623 | |||
7624 | map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE); | ||
7625 | |||
7626 | tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | | ||
7627 | HOSTCC_MODE_NOW); | ||
7628 | |||
7629 | udelay(10); | ||
7630 | |||
7631 | rx_start_idx = tp->hw_status->idx[0].rx_producer; | ||
7632 | |||
7633 | send_idx = 0; | ||
7634 | num_pkts = 0; | ||
7635 | |||
7636 | tg3_set_txd(tp, send_idx, map, tx_len, 0, 1); | ||
7637 | |||
7638 | send_idx++; | ||
7639 | num_pkts++; | ||
7640 | |||
7641 | tw32_tx_mbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW, send_idx); | ||
7642 | tr32(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW); | ||
7643 | |||
7644 | udelay(10); | ||
7645 | |||
7646 | for (i = 0; i < 10; i++) { | ||
7647 | tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | | ||
7648 | HOSTCC_MODE_NOW); | ||
7649 | |||
7650 | udelay(10); | ||
7651 | |||
7652 | tx_idx = tp->hw_status->idx[0].tx_consumer; | ||
7653 | rx_idx = tp->hw_status->idx[0].rx_producer; | ||
7654 | if ((tx_idx == send_idx) && | ||
7655 | (rx_idx == (rx_start_idx + num_pkts))) | ||
7656 | break; | ||
7657 | } | ||
7658 | |||
7659 | pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE); | ||
7660 | dev_kfree_skb(skb); | ||
7661 | |||
7662 | if (tx_idx != send_idx) | ||
7663 | goto out; | ||
7664 | |||
7665 | if (rx_idx != rx_start_idx + num_pkts) | ||
7666 | goto out; | ||
7667 | |||
7668 | desc = &tp->rx_rcb[rx_start_idx]; | ||
7669 | desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK; | ||
7670 | opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK; | ||
7671 | if (opaque_key != RXD_OPAQUE_RING_STD) | ||
7672 | goto out; | ||
7673 | |||
7674 | if ((desc->err_vlan & RXD_ERR_MASK) != 0 && | ||
7675 | (desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII)) | ||
7676 | goto out; | ||
7677 | |||
7678 | rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; | ||
7679 | if (rx_len != tx_len) | ||
7680 | goto out; | ||
7681 | |||
7682 | rx_skb = tp->rx_std_buffers[desc_idx].skb; | ||
7683 | |||
7684 | map = pci_unmap_addr(&tp->rx_std_buffers[desc_idx], mapping); | ||
7685 | pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len, PCI_DMA_FROMDEVICE); | ||
7686 | |||
7687 | for (i = 14; i < tx_len; i++) { | ||
7688 | if (*(rx_skb->data + i) != (u8) (i & 0xff)) | ||
7689 | goto out; | ||
7690 | } | ||
7691 | err = 0; | ||
7692 | |||
7693 | /* tg3_free_rings will unmap and free the rx_skb */ | ||
7694 | out: | ||
7695 | return err; | ||
7696 | } | ||
7697 | |||
7698 | static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, | ||
7699 | u64 *data) | ||
7700 | { | ||
7701 | struct tg3 *tp = netdev_priv(dev); | ||
7702 | |||
7703 | memset(data, 0, sizeof(u64) * TG3_NUM_TEST); | ||
7704 | |||
7705 | if (tg3_test_nvram(tp) != 0) { | ||
7706 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7707 | data[0] = 1; | ||
7708 | } | ||
7709 | if (tg3_test_link(tp) != 0) { | ||
7710 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7711 | data[1] = 1; | ||
7712 | } | ||
7713 | if (etest->flags & ETH_TEST_FL_OFFLINE) { | ||
7714 | if (netif_running(dev)) | ||
7715 | tg3_netif_stop(tp); | ||
7716 | |||
7717 | spin_lock_irq(&tp->lock); | ||
7718 | spin_lock(&tp->tx_lock); | ||
7719 | |||
7720 | tg3_halt(tp, RESET_KIND_SUSPEND, 1); | ||
7721 | tg3_nvram_lock(tp); | ||
7722 | tg3_halt_cpu(tp, RX_CPU_BASE); | ||
7723 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) | ||
7724 | tg3_halt_cpu(tp, TX_CPU_BASE); | ||
7725 | tg3_nvram_unlock(tp); | ||
7726 | |||
7727 | if (tg3_test_registers(tp) != 0) { | ||
7728 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7729 | data[2] = 1; | ||
7730 | } | ||
7731 | if (tg3_test_memory(tp) != 0) { | ||
7732 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7733 | data[3] = 1; | ||
7734 | } | ||
7735 | if (tg3_test_loopback(tp) != 0) { | ||
7736 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7737 | data[4] = 1; | ||
7738 | } | ||
7739 | |||
7740 | spin_unlock(&tp->tx_lock); | ||
7741 | spin_unlock_irq(&tp->lock); | ||
7742 | if (tg3_test_interrupt(tp) != 0) { | ||
7743 | etest->flags |= ETH_TEST_FL_FAILED; | ||
7744 | data[5] = 1; | ||
7745 | } | ||
7746 | spin_lock_irq(&tp->lock); | ||
7747 | spin_lock(&tp->tx_lock); | ||
7748 | |||
7749 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); | ||
7750 | if (netif_running(dev)) { | ||
7751 | tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; | ||
7752 | tg3_init_hw(tp); | ||
7753 | tg3_netif_start(tp); | ||
7754 | } | ||
7755 | spin_unlock(&tp->tx_lock); | ||
7756 | spin_unlock_irq(&tp->lock); | ||
7757 | } | ||
7758 | } | ||
7759 | |||
7221 | static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | 7760 | static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
7222 | { | 7761 | { |
7223 | struct mii_ioctl_data *data = if_mii(ifr); | 7762 | struct mii_ioctl_data *data = if_mii(ifr); |
@@ -7331,6 +7870,8 @@ static struct ethtool_ops tg3_ethtool_ops = { | |||
7331 | .get_tso = ethtool_op_get_tso, | 7870 | .get_tso = ethtool_op_get_tso, |
7332 | .set_tso = tg3_set_tso, | 7871 | .set_tso = tg3_set_tso, |
7333 | #endif | 7872 | #endif |
7873 | .self_test_count = tg3_get_test_count, | ||
7874 | .self_test = tg3_self_test, | ||
7334 | .get_strings = tg3_get_strings, | 7875 | .get_strings = tg3_get_strings, |
7335 | .get_stats_count = tg3_get_stats_count, | 7876 | .get_stats_count = tg3_get_stats_count, |
7336 | .get_ethtool_stats = tg3_get_ethtool_stats, | 7877 | .get_ethtool_stats = tg3_get_ethtool_stats, |
@@ -9478,7 +10019,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
9478 | (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { | 10019 | (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { |
9479 | pci_save_state(tp->pdev); | 10020 | pci_save_state(tp->pdev); |
9480 | tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); | 10021 | tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); |
9481 | tg3_halt(tp, 1); | 10022 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
9482 | } | 10023 | } |
9483 | 10024 | ||
9484 | err = tg3_test_dma(tp); | 10025 | err = tg3_test_dma(tp); |
@@ -9605,7 +10146,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
9605 | 10146 | ||
9606 | spin_lock_irq(&tp->lock); | 10147 | spin_lock_irq(&tp->lock); |
9607 | spin_lock(&tp->tx_lock); | 10148 | spin_lock(&tp->tx_lock); |
9608 | tg3_halt(tp, 1); | 10149 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
9609 | spin_unlock(&tp->tx_lock); | 10150 | spin_unlock(&tp->tx_lock); |
9610 | spin_unlock_irq(&tp->lock); | 10151 | spin_unlock_irq(&tp->lock); |
9611 | 10152 | ||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 026aa04669..637e949303 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/acpi.h> | ||
21 | #include "pci.h" | 22 | #include "pci.h" |
22 | 23 | ||
23 | /* Deal with broken BIOS'es that neglect to enable passive release, | 24 | /* Deal with broken BIOS'es that neglect to enable passive release, |
@@ -467,9 +468,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC, | |||
467 | * non-x86 architectures (yes Via exists on PPC among other places), | 468 | * non-x86 architectures (yes Via exists on PPC among other places), |
468 | * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get | 469 | * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get |
469 | * interrupts delivered properly. | 470 | * interrupts delivered properly. |
470 | * | ||
471 | * TODO: When we have device-specific interrupt routers, | ||
472 | * quirk_via_irqpic will go away from quirks. | ||
473 | */ | 471 | */ |
474 | 472 | ||
475 | /* | 473 | /* |
@@ -494,6 +492,29 @@ static void __devinit quirk_via_acpi(struct pci_dev *d) | |||
494 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi ); | 492 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi ); |
495 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi ); | 493 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi ); |
496 | 494 | ||
495 | static void quirk_via_irqpic(struct pci_dev *dev) | ||
496 | { | ||
497 | u8 irq, new_irq; | ||
498 | |||
499 | #ifdef CONFIG_X86_IO_APIC | ||
500 | if (nr_ioapics && !skip_ioapic_setup) | ||
501 | return; | ||
502 | #endif | ||
503 | #ifdef CONFIG_ACPI | ||
504 | if (acpi_irq_model != ACPI_IRQ_MODEL_PIC) | ||
505 | return; | ||
506 | #endif | ||
507 | new_irq = dev->irq & 0xf; | ||
508 | pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); | ||
509 | if (new_irq != irq) { | ||
510 | printk(KERN_INFO "PCI: Via PIC IRQ fixup for %s, from %d to %d\n", | ||
511 | pci_name(dev), irq, new_irq); | ||
512 | udelay(15); /* unknown if delay really needed */ | ||
513 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); | ||
514 | } | ||
515 | } | ||
516 | DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irqpic); | ||
517 | |||
497 | /* | 518 | /* |
498 | * PIIX3 USB: We have to disable USB interrupts that are | 519 | * PIIX3 USB: We have to disable USB interrupts that are |
499 | * hardwired to PIRQD# and may be shared with an | 520 | * hardwired to PIRQD# and may be shared with an |
@@ -683,19 +704,6 @@ static void __init quirk_disable_pxb(struct pci_dev *pdev) | |||
683 | } | 704 | } |
684 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb ); | 705 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb ); |
685 | 706 | ||
686 | /* | ||
687 | * VIA northbridges care about PCI_INTERRUPT_LINE | ||
688 | */ | ||
689 | int via_interrupt_line_quirk; | ||
690 | |||
691 | static void __devinit quirk_via_bridge(struct pci_dev *pdev) | ||
692 | { | ||
693 | if(pdev->devfn == 0) { | ||
694 | printk(KERN_INFO "PCI: Via IRQ fixup\n"); | ||
695 | via_interrupt_line_quirk = 1; | ||
696 | } | ||
697 | } | ||
698 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_bridge ); | ||
699 | 707 | ||
700 | /* | 708 | /* |
701 | * Serverworks CSB5 IDE does not fully support native mode | 709 | * Serverworks CSB5 IDE does not fully support native mode |
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index da5bd33d98..fc5263c6b1 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
33 | #include <linux/interrupt.h> | 33 | #include <linux/interrupt.h> |
34 | #include <linux/sched.h> | 34 | #include <linux/sched.h> |
35 | #include <linux/dma-mapping.h> | ||
35 | #include "scsi.h" | 36 | #include "scsi.h" |
36 | #include <scsi/scsi_host.h> | 37 | #include <scsi/scsi_host.h> |
37 | #include <linux/libata.h> | 38 | #include <linux/libata.h> |
@@ -289,6 +290,8 @@ static void ahci_host_stop(struct ata_host_set *host_set) | |||
289 | { | 290 | { |
290 | struct ahci_host_priv *hpriv = host_set->private_data; | 291 | struct ahci_host_priv *hpriv = host_set->private_data; |
291 | kfree(hpriv); | 292 | kfree(hpriv); |
293 | |||
294 | ata_host_stop(host_set); | ||
292 | } | 295 | } |
293 | 296 | ||
294 | static int ahci_port_start(struct ata_port *ap) | 297 | static int ahci_port_start(struct ata_port *ap) |
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c index 550c992169..7c02b7dc70 100644 --- a/drivers/scsi/aic7xxx/aic79xx_osm.c +++ b/drivers/scsi/aic7xxx/aic79xx_osm.c | |||
@@ -2488,7 +2488,7 @@ ahd_linux_dv_thread(void *data) | |||
2488 | sprintf(current->comm, "ahd_dv_%d", ahd->unit); | 2488 | sprintf(current->comm, "ahd_dv_%d", ahd->unit); |
2489 | #else | 2489 | #else |
2490 | daemonize("ahd_dv_%d", ahd->unit); | 2490 | daemonize("ahd_dv_%d", ahd->unit); |
2491 | current->flags |= PF_FREEZE; | 2491 | current->flags |= PF_NOFREEZE; |
2492 | #endif | 2492 | #endif |
2493 | unlock_kernel(); | 2493 | unlock_kernel(); |
2494 | 2494 | ||
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index 3867f91ef8..54c52349ad 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c | |||
@@ -153,6 +153,7 @@ static struct ata_port_operations piix_pata_ops = { | |||
153 | 153 | ||
154 | .port_start = ata_port_start, | 154 | .port_start = ata_port_start, |
155 | .port_stop = ata_port_stop, | 155 | .port_stop = ata_port_stop, |
156 | .host_stop = ata_host_stop, | ||
156 | }; | 157 | }; |
157 | 158 | ||
158 | static struct ata_port_operations piix_sata_ops = { | 159 | static struct ata_port_operations piix_sata_ops = { |
@@ -180,6 +181,7 @@ static struct ata_port_operations piix_sata_ops = { | |||
180 | 181 | ||
181 | .port_start = ata_port_start, | 182 | .port_start = ata_port_start, |
182 | .port_stop = ata_port_stop, | 183 | .port_stop = ata_port_stop, |
184 | .host_stop = ata_host_stop, | ||
183 | }; | 185 | }; |
184 | 186 | ||
185 | static struct ata_port_info piix_port_info[] = { | 187 | static struct ata_port_info piix_port_info[] = { |
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c index 63d3f70d06..30a88f0e7b 100644 --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c | |||
@@ -3322,6 +3322,13 @@ void ata_port_stop (struct ata_port *ap) | |||
3322 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | 3322 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
3323 | } | 3323 | } |
3324 | 3324 | ||
3325 | void ata_host_stop (struct ata_host_set *host_set) | ||
3326 | { | ||
3327 | if (host_set->mmio_base) | ||
3328 | iounmap(host_set->mmio_base); | ||
3329 | } | ||
3330 | |||
3331 | |||
3325 | /** | 3332 | /** |
3326 | * ata_host_remove - Unregister SCSI host structure with upper layers | 3333 | * ata_host_remove - Unregister SCSI host structure with upper layers |
3327 | * @ap: Port to unregister | 3334 | * @ap: Port to unregister |
@@ -3878,10 +3885,6 @@ void ata_pci_remove_one (struct pci_dev *pdev) | |||
3878 | } | 3885 | } |
3879 | 3886 | ||
3880 | free_irq(host_set->irq, host_set); | 3887 | free_irq(host_set->irq, host_set); |
3881 | if (host_set->ops->host_stop) | ||
3882 | host_set->ops->host_stop(host_set); | ||
3883 | if (host_set->mmio_base) | ||
3884 | iounmap(host_set->mmio_base); | ||
3885 | 3888 | ||
3886 | for (i = 0; i < host_set->n_ports; i++) { | 3889 | for (i = 0; i < host_set->n_ports; i++) { |
3887 | ap = host_set->ports[i]; | 3890 | ap = host_set->ports[i]; |
@@ -3900,6 +3903,9 @@ void ata_pci_remove_one (struct pci_dev *pdev) | |||
3900 | scsi_host_put(ap->host); | 3903 | scsi_host_put(ap->host); |
3901 | } | 3904 | } |
3902 | 3905 | ||
3906 | if (host_set->ops->host_stop) | ||
3907 | host_set->ops->host_stop(host_set); | ||
3908 | |||
3903 | kfree(host_set); | 3909 | kfree(host_set); |
3904 | 3910 | ||
3905 | pci_release_regions(pdev); | 3911 | pci_release_regions(pdev); |
@@ -3997,6 +4003,7 @@ EXPORT_SYMBOL_GPL(ata_chk_err); | |||
3997 | EXPORT_SYMBOL_GPL(ata_exec_command); | 4003 | EXPORT_SYMBOL_GPL(ata_exec_command); |
3998 | EXPORT_SYMBOL_GPL(ata_port_start); | 4004 | EXPORT_SYMBOL_GPL(ata_port_start); |
3999 | EXPORT_SYMBOL_GPL(ata_port_stop); | 4005 | EXPORT_SYMBOL_GPL(ata_port_stop); |
4006 | EXPORT_SYMBOL_GPL(ata_host_stop); | ||
4000 | EXPORT_SYMBOL_GPL(ata_interrupt); | 4007 | EXPORT_SYMBOL_GPL(ata_interrupt); |
4001 | EXPORT_SYMBOL_GPL(ata_qc_prep); | 4008 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
4002 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | 4009 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h index 6518226b8f..d90430bbb0 100644 --- a/drivers/scsi/libata.h +++ b/drivers/scsi/libata.h | |||
@@ -26,7 +26,7 @@ | |||
26 | #define __LIBATA_H__ | 26 | #define __LIBATA_H__ |
27 | 27 | ||
28 | #define DRV_NAME "libata" | 28 | #define DRV_NAME "libata" |
29 | #define DRV_VERSION "1.10" /* must be exactly four chars */ | 29 | #define DRV_VERSION "1.11" /* must be exactly four chars */ |
30 | 30 | ||
31 | struct ata_scsi_args { | 31 | struct ata_scsi_args { |
32 | u16 *id; | 32 | u16 *id; |
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c index 69009f853a..b0403ccd8a 100644 --- a/drivers/scsi/sata_nv.c +++ b/drivers/scsi/sata_nv.c | |||
@@ -329,6 +329,8 @@ static void nv_host_stop (struct ata_host_set *host_set) | |||
329 | host->host_desc->disable_hotplug(host_set); | 329 | host->host_desc->disable_hotplug(host_set); |
330 | 330 | ||
331 | kfree(host); | 331 | kfree(host); |
332 | |||
333 | ata_host_stop(host_set); | ||
332 | } | 334 | } |
333 | 335 | ||
334 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 336 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c index c4e9e02981..b18c90582e 100644 --- a/drivers/scsi/sata_promise.c +++ b/drivers/scsi/sata_promise.c | |||
@@ -122,6 +122,7 @@ static struct ata_port_operations pdc_ata_ops = { | |||
122 | .scr_write = pdc_sata_scr_write, | 122 | .scr_write = pdc_sata_scr_write, |
123 | .port_start = pdc_port_start, | 123 | .port_start = pdc_port_start, |
124 | .port_stop = pdc_port_stop, | 124 | .port_stop = pdc_port_stop, |
125 | .host_stop = ata_host_stop, | ||
125 | }; | 126 | }; |
126 | 127 | ||
127 | static struct ata_port_info pdc_port_info[] = { | 128 | static struct ata_port_info pdc_port_info[] = { |
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c index dfd3621047..1383e8a28d 100644 --- a/drivers/scsi/sata_qstor.c +++ b/drivers/scsi/sata_qstor.c | |||
@@ -536,6 +536,8 @@ static void qs_host_stop(struct ata_host_set *host_set) | |||
536 | 536 | ||
537 | writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ | 537 | writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ |
538 | writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ | 538 | writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ |
539 | |||
540 | ata_host_stop(host_set); | ||
539 | } | 541 | } |
540 | 542 | ||
541 | static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe) | 543 | static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe) |
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c index 2b2ff48be3..238580d244 100644 --- a/drivers/scsi/sata_sil.c +++ b/drivers/scsi/sata_sil.c | |||
@@ -161,6 +161,7 @@ static struct ata_port_operations sil_ops = { | |||
161 | .scr_write = sil_scr_write, | 161 | .scr_write = sil_scr_write, |
162 | .port_start = ata_port_start, | 162 | .port_start = ata_port_start, |
163 | .port_stop = ata_port_stop, | 163 | .port_stop = ata_port_stop, |
164 | .host_stop = ata_host_stop, | ||
164 | }; | 165 | }; |
165 | 166 | ||
166 | static struct ata_port_info sil_port_info[] = { | 167 | static struct ata_port_info sil_port_info[] = { |
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c index 5105ddd084..e418b89c6b 100644 --- a/drivers/scsi/sata_sis.c +++ b/drivers/scsi/sata_sis.c | |||
@@ -114,6 +114,7 @@ static struct ata_port_operations sis_ops = { | |||
114 | .scr_write = sis_scr_write, | 114 | .scr_write = sis_scr_write, |
115 | .port_start = ata_port_start, | 115 | .port_start = ata_port_start, |
116 | .port_stop = ata_port_stop, | 116 | .port_stop = ata_port_stop, |
117 | .host_stop = ata_host_stop, | ||
117 | }; | 118 | }; |
118 | 119 | ||
119 | static struct ata_port_info sis_port_info = { | 120 | static struct ata_port_info sis_port_info = { |
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c index 05075bd3a8..edef1fa969 100644 --- a/drivers/scsi/sata_svw.c +++ b/drivers/scsi/sata_svw.c | |||
@@ -313,6 +313,7 @@ static struct ata_port_operations k2_sata_ops = { | |||
313 | .scr_write = k2_sata_scr_write, | 313 | .scr_write = k2_sata_scr_write, |
314 | .port_start = ata_port_start, | 314 | .port_start = ata_port_start, |
315 | .port_stop = ata_port_stop, | 315 | .port_stop = ata_port_stop, |
316 | .host_stop = ata_host_stop, | ||
316 | }; | 317 | }; |
317 | 318 | ||
318 | static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base) | 319 | static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base) |
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c index 70118650c4..140cea05de 100644 --- a/drivers/scsi/sata_sx4.c +++ b/drivers/scsi/sata_sx4.c | |||
@@ -245,6 +245,8 @@ static void pdc20621_host_stop(struct ata_host_set *host_set) | |||
245 | 245 | ||
246 | iounmap(dimm_mmio); | 246 | iounmap(dimm_mmio); |
247 | kfree(hpriv); | 247 | kfree(hpriv); |
248 | |||
249 | ata_host_stop(host_set); | ||
248 | } | 250 | } |
249 | 251 | ||
250 | static int pdc_port_start(struct ata_port *ap) | 252 | static int pdc_port_start(struct ata_port *ap) |
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c index 0bff4f475f..a71fb54eeb 100644 --- a/drivers/scsi/sata_uli.c +++ b/drivers/scsi/sata_uli.c | |||
@@ -113,6 +113,7 @@ static struct ata_port_operations uli_ops = { | |||
113 | 113 | ||
114 | .port_start = ata_port_start, | 114 | .port_start = ata_port_start, |
115 | .port_stop = ata_port_stop, | 115 | .port_stop = ata_port_stop, |
116 | .host_stop = ata_host_stop, | ||
116 | }; | 117 | }; |
117 | 118 | ||
118 | static struct ata_port_info uli_port_info = { | 119 | static struct ata_port_info uli_port_info = { |
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c index 3a78306672..f43183c19a 100644 --- a/drivers/scsi/sata_via.c +++ b/drivers/scsi/sata_via.c | |||
@@ -134,6 +134,7 @@ static struct ata_port_operations svia_sata_ops = { | |||
134 | 134 | ||
135 | .port_start = ata_port_start, | 135 | .port_start = ata_port_start, |
136 | .port_stop = ata_port_stop, | 136 | .port_stop = ata_port_stop, |
137 | .host_stop = ata_host_stop, | ||
137 | }; | 138 | }; |
138 | 139 | ||
139 | static struct ata_port_info svia_port_info = { | 140 | static struct ata_port_info svia_port_info = { |
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c index 2c28f0ad73..c5e09dc6f3 100644 --- a/drivers/scsi/sata_vsc.c +++ b/drivers/scsi/sata_vsc.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/blkdev.h> | 21 | #include <linux/blkdev.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/dma-mapping.h> | ||
24 | #include "scsi.h" | 25 | #include "scsi.h" |
25 | #include <scsi/scsi_host.h> | 26 | #include <scsi/scsi_host.h> |
26 | #include <linux/libata.h> | 27 | #include <linux/libata.h> |
@@ -230,6 +231,7 @@ static struct ata_port_operations vsc_sata_ops = { | |||
230 | .scr_write = vsc_sata_scr_write, | 231 | .scr_write = vsc_sata_scr_write, |
231 | .port_start = ata_port_start, | 232 | .port_start = ata_port_start, |
232 | .port_stop = ata_port_stop, | 233 | .port_stop = ata_port_stop, |
234 | .host_stop = ata_host_stop, | ||
233 | }; | 235 | }; |
234 | 236 | ||
235 | static void __devinit vsc_sata_setup_port(struct ata_ioports *port, unsigned long base) | 237 | static void __devinit vsc_sata_setup_port(struct ata_ioports *port, unsigned long base) |
diff --git a/drivers/usb/media/pwc/Makefile b/drivers/usb/media/pwc/Makefile index e0b41ed440..2d93a77501 100644 --- a/drivers/usb/media/pwc/Makefile +++ b/drivers/usb/media/pwc/Makefile | |||
@@ -1,6 +1,6 @@ | |||
1 | ifneq ($(KERNELRELEASE),) | 1 | ifneq ($(KERNELRELEASE),) |
2 | 2 | ||
3 | pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-dec1.o pwc-dec23.o pwc-kiara.o pwc-timon.o | 3 | pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-timon.o pwc-kiara.o |
4 | 4 | ||
5 | obj-$(CONFIG_USB_PWC) += pwc.o | 5 | obj-$(CONFIG_USB_PWC) += pwc.o |
6 | 6 | ||
diff --git a/drivers/usb/media/pwc/pwc-ctrl.c b/drivers/usb/media/pwc/pwc-ctrl.c index 42ec468d52..5309919095 100644 --- a/drivers/usb/media/pwc/pwc-ctrl.c +++ b/drivers/usb/media/pwc/pwc-ctrl.c | |||
@@ -48,8 +48,6 @@ | |||
48 | #include "pwc-uncompress.h" | 48 | #include "pwc-uncompress.h" |
49 | #include "pwc-kiara.h" | 49 | #include "pwc-kiara.h" |
50 | #include "pwc-timon.h" | 50 | #include "pwc-timon.h" |
51 | #include "pwc-dec1.h" | ||
52 | #include "pwc-dec23.h" | ||
53 | 51 | ||
54 | /* Request types: video */ | 52 | /* Request types: video */ |
55 | #define SET_LUM_CTL 0x01 | 53 | #define SET_LUM_CTL 0x01 |
@@ -246,7 +244,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra | |||
246 | switch(pdev->type) { | 244 | switch(pdev->type) { |
247 | case 645: | 245 | case 645: |
248 | case 646: | 246 | case 646: |
249 | pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data); | 247 | /* pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data); */ |
250 | break; | 248 | break; |
251 | 249 | ||
252 | case 675: | 250 | case 675: |
@@ -256,7 +254,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra | |||
256 | case 730: | 254 | case 730: |
257 | case 740: | 255 | case 740: |
258 | case 750: | 256 | case 750: |
259 | pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); | 257 | /* pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */ |
260 | break; | 258 | break; |
261 | } | 259 | } |
262 | } | 260 | } |
@@ -318,8 +316,8 @@ static inline int set_video_mode_Timon(struct pwc_device *pdev, int size, int fr | |||
318 | if (ret < 0) | 316 | if (ret < 0) |
319 | return ret; | 317 | return ret; |
320 | 318 | ||
321 | if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW) | 319 | /* if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW) |
322 | pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); | 320 | pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */ |
323 | 321 | ||
324 | pdev->cmd_len = 13; | 322 | pdev->cmd_len = 13; |
325 | memcpy(pdev->cmd_buf, buf, 13); | 323 | memcpy(pdev->cmd_buf, buf, 13); |
@@ -397,8 +395,8 @@ static inline int set_video_mode_Kiara(struct pwc_device *pdev, int size, int fr | |||
397 | if (ret < 0) | 395 | if (ret < 0) |
398 | return ret; | 396 | return ret; |
399 | 397 | ||
400 | if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW) | 398 | /* if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW) |
401 | pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); | 399 | pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */ |
402 | 400 | ||
403 | pdev->cmd_len = 12; | 401 | pdev->cmd_len = 12; |
404 | memcpy(pdev->cmd_buf, buf, 12); | 402 | memcpy(pdev->cmd_buf, buf, 12); |
diff --git a/drivers/usb/media/pwc/pwc-dec1.c b/drivers/usb/media/pwc/pwc-dec1.c deleted file mode 100644 index 57d03d9178..0000000000 --- a/drivers/usb/media/pwc/pwc-dec1.c +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* Linux driver for Philips webcam | ||
2 | Decompression for chipset version 1 | ||
3 | (C) 2004 Luc Saillard (luc@saillard.org) | ||
4 | |||
5 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
6 | driver and thus may have bugs that are not present in the original version. | ||
7 | Please send bug reports and support requests to <luc@saillard.org>. | ||
8 | The decompression routines have been implemented by reverse-engineering the | ||
9 | Nemosoft binary pwcx module. Caveat emptor. | ||
10 | |||
11 | This program is free software; you can redistribute it and/or modify | ||
12 | it under the terms of the GNU General Public License as published by | ||
13 | the Free Software Foundation; either version 2 of the License, or | ||
14 | (at your option) any later version. | ||
15 | |||
16 | This program is distributed in the hope that it will be useful, | ||
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | GNU General Public License for more details. | ||
20 | |||
21 | You should have received a copy of the GNU General Public License | ||
22 | along with this program; if not, write to the Free Software | ||
23 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | */ | ||
25 | |||
26 | |||
27 | |||
28 | #include "pwc-dec1.h" | ||
29 | |||
30 | |||
31 | void pwc_dec1_init(int type, int release, void *buffer, void *table) | ||
32 | { | ||
33 | |||
34 | } | ||
35 | |||
36 | void pwc_dec1_exit(void) | ||
37 | { | ||
38 | |||
39 | |||
40 | |||
41 | } | ||
42 | |||
diff --git a/drivers/usb/media/pwc/pwc-dec1.h b/drivers/usb/media/pwc/pwc-dec1.h deleted file mode 100644 index a7ffd9c45a..0000000000 --- a/drivers/usb/media/pwc/pwc-dec1.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* Linux driver for Philips webcam | ||
2 | (C) 2004 Luc Saillard (luc@saillard.org) | ||
3 | |||
4 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
5 | driver and thus may have bugs that are not present in the original version. | ||
6 | Please send bug reports and support requests to <luc@saillard.org>. | ||
7 | The decompression routines have been implemented by reverse-engineering the | ||
8 | Nemosoft binary pwcx module. Caveat emptor. | ||
9 | |||
10 | This program is free software; you can redistribute it and/or modify | ||
11 | it under the terms of the GNU General Public License as published by | ||
12 | the Free Software Foundation; either version 2 of the License, or | ||
13 | (at your option) any later version. | ||
14 | |||
15 | This program is distributed in the hope that it will be useful, | ||
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | GNU General Public License for more details. | ||
19 | |||
20 | You should have received a copy of the GNU General Public License | ||
21 | along with this program; if not, write to the Free Software | ||
22 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | |||
25 | |||
26 | |||
27 | #ifndef PWC_DEC1_H | ||
28 | #define PWC_DEC1_H | ||
29 | |||
30 | void pwc_dec1_init(int type, int release, void *buffer, void *private_data); | ||
31 | void pwc_dec1_exit(void); | ||
32 | |||
33 | #endif | ||
34 | |||
35 | |||
36 | |||
diff --git a/drivers/usb/media/pwc/pwc-dec23.c b/drivers/usb/media/pwc/pwc-dec23.c deleted file mode 100644 index 98fa3f7a9e..0000000000 --- a/drivers/usb/media/pwc/pwc-dec23.c +++ /dev/null | |||
@@ -1,623 +0,0 @@ | |||
1 | /* Linux driver for Philips webcam | ||
2 | Decompression for chipset version 2 et 3 | ||
3 | (C) 2004 Luc Saillard (luc@saillard.org) | ||
4 | |||
5 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
6 | driver and thus may have bugs that are not present in the original version. | ||
7 | Please send bug reports and support requests to <luc@saillard.org>. | ||
8 | The decompression routines have been implemented by reverse-engineering the | ||
9 | Nemosoft binary pwcx module. Caveat emptor. | ||
10 | |||
11 | This program is free software; you can redistribute it and/or modify | ||
12 | it under the terms of the GNU General Public License as published by | ||
13 | the Free Software Foundation; either version 2 of the License, or | ||
14 | (at your option) any later version. | ||
15 | |||
16 | This program is distributed in the hope that it will be useful, | ||
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | GNU General Public License for more details. | ||
20 | |||
21 | You should have received a copy of the GNU General Public License | ||
22 | along with this program; if not, write to the Free Software | ||
23 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | */ | ||
25 | |||
26 | #include "pwc-timon.h" | ||
27 | #include "pwc-kiara.h" | ||
28 | #include "pwc-dec23.h" | ||
29 | #include "pwc-ioctl.h" | ||
30 | |||
31 | #include <linux/string.h> | ||
32 | |||
33 | /**** | ||
34 | * | ||
35 | * | ||
36 | * | ||
37 | */ | ||
38 | |||
39 | |||
40 | static void fill_table_a000(unsigned int *p) | ||
41 | { | ||
42 | static unsigned int initial_values[12] = { | ||
43 | 0xFFAD9B00, 0xFFDDEE00, 0x00221200, 0x00526500, | ||
44 | 0xFFC21E00, 0x003DE200, 0xFF924B80, 0xFFD2A300, | ||
45 | 0x002D5D00, 0x006DB480, 0xFFED3E00, 0x0012C200 | ||
46 | }; | ||
47 | static unsigned int values_derivated[12] = { | ||
48 | 0x0000A4CA, 0x00004424, 0xFFFFBBDC, 0xFFFF5B36, | ||
49 | 0x00007BC4, 0xFFFF843C, 0x0000DB69, 0x00005ABA, | ||
50 | 0xFFFFA546, 0xFFFF2497, 0x00002584, 0xFFFFDA7C | ||
51 | }; | ||
52 | unsigned int temp_values[12]; | ||
53 | int i,j; | ||
54 | |||
55 | memcpy(temp_values,initial_values,sizeof(initial_values)); | ||
56 | for (i=0;i<256;i++) | ||
57 | { | ||
58 | for (j=0;j<12;j++) | ||
59 | { | ||
60 | *p++ = temp_values[j]; | ||
61 | temp_values[j] += values_derivated[j]; | ||
62 | } | ||
63 | } | ||
64 | } | ||
65 | |||
66 | static void fill_table_d000(unsigned char *p) | ||
67 | { | ||
68 | int bit,byte; | ||
69 | |||
70 | for (bit=0; bit<8; bit++) | ||
71 | { | ||
72 | unsigned char bitpower = 1<<bit; | ||
73 | unsigned char mask = bitpower-1; | ||
74 | for (byte=0; byte<256; byte++) | ||
75 | { | ||
76 | if (byte & bitpower) | ||
77 | *p++ = -(byte & mask); | ||
78 | else | ||
79 | *p++ = (byte & mask); | ||
80 | } | ||
81 | } | ||
82 | } | ||
83 | |||
84 | /* | ||
85 | * | ||
86 | * Kiara: 0 <= ver <= 7 | ||
87 | * Timon: 0 <= ver <= 15 | ||
88 | * | ||
89 | */ | ||
90 | static void fill_table_color(unsigned int version, const unsigned int *romtable, | ||
91 | unsigned char *p0004, | ||
92 | unsigned char *p8004) | ||
93 | { | ||
94 | const unsigned int *table; | ||
95 | unsigned char *p0, *p8; | ||
96 | int i,j,k; | ||
97 | int dl,bit,pw; | ||
98 | |||
99 | romtable += version*256; | ||
100 | |||
101 | for (i=0; i<2; i++) | ||
102 | { | ||
103 | table = romtable + i*128; | ||
104 | |||
105 | for (dl=0; dl<16; dl++) | ||
106 | { | ||
107 | p0 = p0004 + (i<<14) + (dl<<10); | ||
108 | p8 = p8004 + (i<<12) + (dl<<8); | ||
109 | |||
110 | for (j=0; j<8; j++ , table++, p0+=128) | ||
111 | { | ||
112 | for (k=0; k<16; k++) | ||
113 | { | ||
114 | if (k==0) | ||
115 | bit=1; | ||
116 | else if (k>=1 && k<3) | ||
117 | bit=(table[0]>>15)&7; | ||
118 | else if (k>=3 && k<6) | ||
119 | bit=(table[0]>>12)&7; | ||
120 | else if (k>=6 && k<10) | ||
121 | bit=(table[0]>>9)&7; | ||
122 | else if (k>=10 && k<13) | ||
123 | bit=(table[0]>>6)&7; | ||
124 | else if (k>=13 && k<15) | ||
125 | bit=(table[0]>>3)&7; | ||
126 | else | ||
127 | bit=(table[0])&7; | ||
128 | if (k == 0) | ||
129 | *(unsigned char *)p8++ = 8; | ||
130 | else | ||
131 | *(unsigned char *)p8++ = j - bit; | ||
132 | *(unsigned char *)p8++ = bit; | ||
133 | |||
134 | pw = 1<<bit; | ||
135 | p0[k+0x00] = (1*pw) + 0x80; | ||
136 | p0[k+0x10] = (2*pw) + 0x80; | ||
137 | p0[k+0x20] = (3*pw) + 0x80; | ||
138 | p0[k+0x30] = (4*pw) + 0x80; | ||
139 | p0[k+0x40] = (-pw) + 0x80; | ||
140 | p0[k+0x50] = (2*-pw) + 0x80; | ||
141 | p0[k+0x60] = (3*-pw) + 0x80; | ||
142 | p0[k+0x70] = (4*-pw) + 0x80; | ||
143 | } /* end of for (k=0; k<16; k++, p8++) */ | ||
144 | } /* end of for (j=0; j<8; j++ , table++) */ | ||
145 | } /* end of for (dl=0; dl<16; dl++) */ | ||
146 | } /* end of for (i=0; i<2; i++) */ | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * precision = (pdev->xx + pdev->yy) | ||
151 | * | ||
152 | */ | ||
153 | static void fill_table_dc00_d800(unsigned int precision, unsigned int *pdc00, unsigned int *pd800) | ||
154 | { | ||
155 | int i; | ||
156 | unsigned int offset1, offset2; | ||
157 | |||
158 | for(i=0,offset1=0x4000, offset2=0; i<256 ; i++,offset1+=0x7BC4, offset2+=0x7BC4) | ||
159 | { | ||
160 | unsigned int msb = offset1 >> 15; | ||
161 | |||
162 | if ( msb > 255) | ||
163 | { | ||
164 | if (msb) | ||
165 | msb=0; | ||
166 | else | ||
167 | msb=255; | ||
168 | } | ||
169 | |||
170 | *pdc00++ = msb << precision; | ||
171 | *pd800++ = offset2; | ||
172 | } | ||
173 | |||
174 | } | ||
175 | |||
176 | /* | ||
177 | * struct { | ||
178 | * unsigned char op; // operation to execute | ||
179 | * unsigned char bits; // bits use to perform operation | ||
180 | * unsigned char offset1; // offset to add to access in the table_0004 % 16 | ||
181 | * unsigned char offset2; // offset to add to access in the table_0004 | ||
182 | * } | ||
183 | * | ||
184 | */ | ||
185 | static unsigned int table_ops[] = { | ||
186 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x30, | ||
187 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00, | ||
188 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00, | ||
189 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00, | ||
190 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x10, | ||
191 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00, | ||
192 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40, | ||
193 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00, | ||
194 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x70, | ||
195 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00, | ||
196 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00, | ||
197 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00, | ||
198 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x50, | ||
199 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00, | ||
200 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40, | ||
201 | 0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00 | ||
202 | }; | ||
203 | |||
204 | /* | ||
205 | * TODO: multiply by 4 all values | ||
206 | * | ||
207 | */ | ||
208 | static unsigned int MulIdx[256] = { | ||
209 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
210 | 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, | ||
211 | 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, | ||
212 | 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, | ||
213 | 6, 7, 8, 9, 7,10,11, 8, 8,11,10, 7, 9, 8, 7, 6, | ||
214 | 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4, | ||
215 | 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2, | ||
216 | 0, 3, 3, 0, 1, 2, 2, 1, 2, 1, 1, 2, 3, 0, 0, 3, | ||
217 | 0, 1, 2, 3, 3, 2, 1, 0, 3, 2, 1, 0, 0, 1, 2, 3, | ||
218 | 1, 1, 1, 1, 3, 3, 3, 3, 0, 0, 0, 0, 2, 2, 2, 2, | ||
219 | 7,10,11, 8, 9, 8, 7, 6, 6, 7, 8, 9, 8,11,10, 7, | ||
220 | 4, 5, 5, 4, 5, 4, 4, 5, 5, 4, 4, 5, 4, 5, 5, 4, | ||
221 | 7, 9, 6, 8,10, 8, 7,11,11, 7, 8,10, 8, 6, 9, 7, | ||
222 | 1, 3, 0, 2, 2, 0, 3, 1, 2, 0, 3, 1, 1, 3, 0, 2, | ||
223 | 1, 2, 2, 1, 3, 0, 0, 3, 0, 3, 3, 0, 2, 1, 1, 2, | ||
224 | 10, 8, 7,11, 8, 6, 9, 7, 7, 9, 6, 8,11, 7, 8,10 | ||
225 | }; | ||
226 | |||
227 | |||
228 | |||
229 | void pwc_dec23_init(int type, int release, unsigned char *mode, void *data) | ||
230 | { | ||
231 | int flags; | ||
232 | struct pwc_dec23_private *pdev = data; | ||
233 | release = release; | ||
234 | |||
235 | switch (type) | ||
236 | { | ||
237 | case 720: | ||
238 | case 730: | ||
239 | case 740: | ||
240 | case 750: | ||
241 | flags = mode[2]&0x18; /* our: flags = 8, mode[2]==e8 */ | ||
242 | if (flags==8) | ||
243 | pdev->zz = 7; | ||
244 | else if (flags==0x10) | ||
245 | pdev->zz = 8; | ||
246 | else | ||
247 | pdev->zz = 6; | ||
248 | flags = mode[2]>>5; /* our: 7 */ | ||
249 | |||
250 | fill_table_color(flags, (unsigned int *)KiaraRomTable, pdev->table_0004, pdev->table_8004); | ||
251 | break; | ||
252 | |||
253 | |||
254 | case 675: | ||
255 | case 680: | ||
256 | case 690: | ||
257 | flags = mode[2]&6; | ||
258 | if (flags==2) | ||
259 | pdev->zz = 7; | ||
260 | else if (flags==4) | ||
261 | pdev->zz = 8; | ||
262 | else | ||
263 | pdev->zz = 6; | ||
264 | flags = mode[2]>>3; | ||
265 | |||
266 | fill_table_color(flags, (unsigned int *)TimonRomTable, pdev->table_0004, pdev->table_8004); | ||
267 | break; | ||
268 | |||
269 | default: | ||
270 | /* Not supported */ | ||
271 | return; | ||
272 | } | ||
273 | |||
274 | /* * * * ** */ | ||
275 | pdev->xx = 8 - pdev->zz; | ||
276 | pdev->yy = 15 - pdev->xx; | ||
277 | pdev->zzmask = 0xFF>>pdev->xx; | ||
278 | //pdev->zzmask = (1U<<pdev->zz)-1; | ||
279 | |||
280 | |||
281 | fill_table_dc00_d800(pdev->xx + pdev->yy, pdev->table_dc00, pdev->table_d800); | ||
282 | fill_table_a000(pdev->table_a004); | ||
283 | fill_table_d000(pdev->table_d004); | ||
284 | } | ||
285 | |||
286 | |||
287 | /* | ||
288 | * To manage the stream, we keep in a 32 bits variables, | ||
289 | * the next bits in the stream. fill_reservoir() add to | ||
290 | * the reservoir at least wanted nbits. | ||
291 | * | ||
292 | * | ||
293 | */ | ||
294 | #define fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted) do { \ | ||
295 | while (nbits_in_reservoir<nbits_wanted) \ | ||
296 | { \ | ||
297 | reservoir |= (*(stream)++) << nbits_in_reservoir; \ | ||
298 | nbits_in_reservoir+=8; \ | ||
299 | } \ | ||
300 | } while(0); | ||
301 | |||
302 | #define get_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted,result) do { \ | ||
303 | fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted); \ | ||
304 | result = (reservoir) & ((1U<<nbits_wanted)-1); \ | ||
305 | reservoir >>= nbits_wanted; \ | ||
306 | nbits_in_reservoir -= nbits_wanted; \ | ||
307 | } while(0); | ||
308 | |||
309 | |||
310 | |||
311 | static void DecompressBand23(const struct pwc_dec23_private *pdev, | ||
312 | const unsigned char *rawyuv, | ||
313 | unsigned char *planar_y, | ||
314 | unsigned char *planar_u, | ||
315 | unsigned char *planar_v, | ||
316 | unsigned int image_x, /* aka number of pixels wanted ??? */ | ||
317 | unsigned int pixels_per_line, /* aka number of pixels per line */ | ||
318 | int flags) | ||
319 | { | ||
320 | |||
321 | |||
322 | unsigned int reservoir, nbits_in_reservoir; | ||
323 | int first_4_bits; | ||
324 | unsigned int bytes_per_channel; | ||
325 | int line_size; /* size of the line (4Y+U+V) */ | ||
326 | int passes; | ||
327 | const unsigned char *ptable0004, *ptable8004; | ||
328 | |||
329 | int even_line; | ||
330 | unsigned int temp_colors[16]; | ||
331 | int nblocks; | ||
332 | |||
333 | const unsigned char *stream; | ||
334 | unsigned char *dest_y, *dest_u=NULL, *dest_v=NULL; | ||
335 | unsigned int offset_to_plane_u, offset_to_plane_v; | ||
336 | |||
337 | int i; | ||
338 | |||
339 | |||
340 | reservoir = 0; | ||
341 | nbits_in_reservoir = 0; | ||
342 | stream = rawyuv+1; /* The first byte of the stream is skipped */ | ||
343 | even_line = 1; | ||
344 | |||
345 | get_nbits(reservoir,nbits_in_reservoir,stream,4,first_4_bits); | ||
346 | |||
347 | line_size = pixels_per_line*3; | ||
348 | |||
349 | for (passes=0;passes<2;passes++) | ||
350 | { | ||
351 | if (passes==0) | ||
352 | { | ||
353 | bytes_per_channel = pixels_per_line; | ||
354 | dest_y = planar_y; | ||
355 | nblocks = image_x/4; | ||
356 | } | ||
357 | else | ||
358 | { | ||
359 | /* Format planar: All Y, then all U, then all V */ | ||
360 | bytes_per_channel = pixels_per_line/2; | ||
361 | dest_u = planar_u; | ||
362 | dest_v = planar_v; | ||
363 | dest_y = dest_u; | ||
364 | nblocks = image_x/8; | ||
365 | } | ||
366 | |||
367 | offset_to_plane_u = bytes_per_channel*2; | ||
368 | offset_to_plane_v = bytes_per_channel*3; | ||
369 | /* | ||
370 | printf("bytes_per_channel = %d\n",bytes_per_channel); | ||
371 | printf("offset_to_plane_u = %d\n",offset_to_plane_u); | ||
372 | printf("offset_to_plane_v = %d\n",offset_to_plane_v); | ||
373 | */ | ||
374 | |||
375 | while (nblocks-->0) | ||
376 | { | ||
377 | unsigned int gray_index; | ||
378 | |||
379 | fill_nbits(reservoir,nbits_in_reservoir,stream,16); | ||
380 | gray_index = reservoir & pdev->zzmask; | ||
381 | reservoir >>= pdev->zz; | ||
382 | nbits_in_reservoir -= pdev->zz; | ||
383 | |||
384 | fill_nbits(reservoir,nbits_in_reservoir,stream,2); | ||
385 | |||
386 | if ( (reservoir & 3) == 0) | ||
387 | { | ||
388 | reservoir>>=2; | ||
389 | nbits_in_reservoir-=2; | ||
390 | for (i=0;i<16;i++) | ||
391 | temp_colors[i] = pdev->table_dc00[gray_index]; | ||
392 | |||
393 | } | ||
394 | else | ||
395 | { | ||
396 | unsigned int channel_v, offset1; | ||
397 | |||
398 | /* swap bit 0 and 2 of offset_OR */ | ||
399 | channel_v = ((reservoir & 1) << 2) | (reservoir & 2) | ((reservoir & 4)>>2); | ||
400 | reservoir>>=3; | ||
401 | nbits_in_reservoir-=3; | ||
402 | |||
403 | for (i=0;i<16;i++) | ||
404 | temp_colors[i] = pdev->table_d800[gray_index]; | ||
405 | |||
406 | ptable0004 = pdev->table_0004 + (passes*16384) + (first_4_bits*1024) + (channel_v*128); | ||
407 | ptable8004 = pdev->table_8004 + (passes*4096) + (first_4_bits*256) + (channel_v*32); | ||
408 | |||
409 | offset1 = 0; | ||
410 | while(1) | ||
411 | { | ||
412 | unsigned int index_in_table_ops, op, rows=0; | ||
413 | fill_nbits(reservoir,nbits_in_reservoir,stream,16); | ||
414 | |||
415 | /* mode is 0,1 or 2 */ | ||
416 | index_in_table_ops = (reservoir&0x3F); | ||
417 | op = table_ops[ index_in_table_ops*4 ]; | ||
418 | if (op == 2) | ||
419 | { | ||
420 | reservoir >>= 2; | ||
421 | nbits_in_reservoir -= 2; | ||
422 | break; /* exit the while(1) */ | ||
423 | } | ||
424 | if (op == 0) | ||
425 | { | ||
426 | unsigned int shift; | ||
427 | |||
428 | offset1 = (offset1 + table_ops[index_in_table_ops*4+2]) & 0x0F; | ||
429 | shift = table_ops[ index_in_table_ops*4+1 ]; | ||
430 | reservoir >>= shift; | ||
431 | nbits_in_reservoir -= shift; | ||
432 | rows = ptable0004[ offset1 + table_ops[index_in_table_ops*4+3] ]; | ||
433 | } | ||
434 | if (op == 1) | ||
435 | { | ||
436 | /* 10bits [ xxxx xxxx yyyy 000 ] | ||
437 | * yyy => offset in the table8004 | ||
438 | * xxx => offset in the tabled004 | ||
439 | */ | ||
440 | unsigned int mask, shift; | ||
441 | unsigned int col1, row1, total_bits; | ||
442 | |||
443 | offset1 = (offset1 + ((reservoir>>3)&0x0F)+1) & 0x0F; | ||
444 | |||
445 | col1 = (reservoir>>7) & 0xFF; | ||
446 | row1 = ptable8004 [ offset1*2 ]; | ||
447 | |||
448 | /* Bit mask table */ | ||
449 | mask = pdev->table_d004[ (row1<<8) + col1 ]; | ||
450 | shift = ptable8004 [ offset1*2 + 1]; | ||
451 | rows = ((mask << shift) + 0x80) & 0xFF; | ||
452 | |||
453 | total_bits = row1 + 8; | ||
454 | reservoir >>= total_bits; | ||
455 | nbits_in_reservoir -= total_bits; | ||
456 | } | ||
457 | { | ||
458 | const unsigned int *table_a004 = pdev->table_a004 + rows*12; | ||
459 | unsigned int *poffset = MulIdx + offset1*16; /* 64/4 (int) */ | ||
460 | for (i=0;i<16;i++) | ||
461 | { | ||
462 | temp_colors[i] += table_a004[ *poffset ]; | ||
463 | poffset++; | ||
464 | } | ||
465 | } | ||
466 | } | ||
467 | } | ||
468 | #define USE_SIGNED_INT_FOR_COLOR | ||
469 | #ifdef USE_SIGNED_INT_FOR_COLOR | ||
470 | # define CLAMP(x) ((x)>255?255:((x)<0?0:x)) | ||
471 | #else | ||
472 | # define CLAMP(x) ((x)>255?255:x) | ||
473 | #endif | ||
474 | |||
475 | if (passes == 0) | ||
476 | { | ||
477 | #ifdef USE_SIGNED_INT_FOR_COLOR | ||
478 | const int *c = temp_colors; | ||
479 | #else | ||
480 | const unsigned int *c = temp_colors; | ||
481 | #endif | ||
482 | unsigned char *d; | ||
483 | |||
484 | d = dest_y; | ||
485 | for (i=0;i<4;i++,c++) | ||
486 | *d++ = CLAMP((*c) >> pdev->yy); | ||
487 | |||
488 | d = dest_y + bytes_per_channel; | ||
489 | for (i=0;i<4;i++,c++) | ||
490 | *d++ = CLAMP((*c) >> pdev->yy); | ||
491 | |||
492 | d = dest_y + offset_to_plane_u; | ||
493 | for (i=0;i<4;i++,c++) | ||
494 | *d++ = CLAMP((*c) >> pdev->yy); | ||
495 | |||
496 | d = dest_y + offset_to_plane_v; | ||
497 | for (i=0;i<4;i++,c++) | ||
498 | *d++ = CLAMP((*c) >> pdev->yy); | ||
499 | |||
500 | dest_y += 4; | ||
501 | } | ||
502 | else if (passes == 1) | ||
503 | { | ||
504 | #ifdef USE_SIGNED_INT_FOR_COLOR | ||
505 | int *c1 = temp_colors; | ||
506 | int *c2 = temp_colors+4; | ||
507 | #else | ||
508 | unsigned int *c1 = temp_colors; | ||
509 | unsigned int *c2 = temp_colors+4; | ||
510 | #endif | ||
511 | unsigned char *d; | ||
512 | |||
513 | d = dest_y; | ||
514 | for (i=0;i<4;i++,c1++,c2++) | ||
515 | { | ||
516 | *d++ = CLAMP((*c1) >> pdev->yy); | ||
517 | *d++ = CLAMP((*c2) >> pdev->yy); | ||
518 | } | ||
519 | c1 = temp_colors+12; | ||
520 | //c2 = temp_colors+8; | ||
521 | d = dest_y + bytes_per_channel; | ||
522 | for (i=0;i<4;i++,c1++,c2++) | ||
523 | { | ||
524 | *d++ = CLAMP((*c1) >> pdev->yy); | ||
525 | *d++ = CLAMP((*c2) >> pdev->yy); | ||
526 | } | ||
527 | |||
528 | if (even_line) /* Each line, swap u/v */ | ||
529 | { | ||
530 | even_line=0; | ||
531 | dest_y = dest_v; | ||
532 | dest_u += 8; | ||
533 | } | ||
534 | else | ||
535 | { | ||
536 | even_line=1; | ||
537 | dest_y = dest_u; | ||
538 | dest_v += 8; | ||
539 | } | ||
540 | } | ||
541 | |||
542 | } /* end of while (nblocks-->0) */ | ||
543 | |||
544 | } /* end of for (passes=0;passes<2;passes++) */ | ||
545 | |||
546 | } | ||
547 | |||
548 | |||
549 | /** | ||
550 | * | ||
551 | * image: size of the image wanted | ||
552 | * view : size of the image returned by the camera | ||
553 | * offset: (x,y) to displayer image in the view | ||
554 | * | ||
555 | * src: raw data | ||
556 | * dst: image output | ||
557 | * flags: PWCX_FLAG_PLANAR | ||
558 | * pdev: private buffer | ||
559 | * bandlength: | ||
560 | * | ||
561 | */ | ||
562 | void pwc_dec23_decompress(const struct pwc_coord *image, | ||
563 | const struct pwc_coord *view, | ||
564 | const struct pwc_coord *offset, | ||
565 | const void *src, | ||
566 | void *dst, | ||
567 | int flags, | ||
568 | const void *data, | ||
569 | int bandlength) | ||
570 | { | ||
571 | const struct pwc_dec23_private *pdev = data; | ||
572 | unsigned char *pout, *pout_planar_y=NULL, *pout_planar_u=NULL, *pout_planar_v=NULL; | ||
573 | int i,n,stride,pixel_size; | ||
574 | |||
575 | |||
576 | if (flags & PWCX_FLAG_BAYER) | ||
577 | { | ||
578 | pout = dst + (view->x * offset->y) + offset->x; | ||
579 | pixel_size = view->x * 4; | ||
580 | } | ||
581 | else | ||
582 | { | ||
583 | n = view->x * view->y; | ||
584 | |||
585 | /* offset in Y plane */ | ||
586 | stride = view->x * offset->y; | ||
587 | pout_planar_y = dst + stride + offset->x; | ||
588 | |||
589 | /* offsets in U/V planes */ | ||
590 | stride = (view->x * offset->y)/4 + offset->x/2; | ||
591 | pout_planar_u = dst + n + + stride; | ||
592 | pout_planar_v = dst + n + n/4 + stride; | ||
593 | |||
594 | pixel_size = view->x * 4; | ||
595 | } | ||
596 | |||
597 | |||
598 | for (i=0;i<image->y;i+=4) | ||
599 | { | ||
600 | if (flags & PWCX_FLAG_BAYER) | ||
601 | { | ||
602 | //TODO: | ||
603 | //DecompressBandBayer(pdev,src,pout,image.x,view->x,flags); | ||
604 | src += bandlength; | ||
605 | pout += pixel_size; | ||
606 | } | ||
607 | else | ||
608 | { | ||
609 | DecompressBand23(pdev,src,pout_planar_y,pout_planar_u,pout_planar_v,image->x,view->x,flags); | ||
610 | src += bandlength; | ||
611 | pout_planar_y += pixel_size; | ||
612 | pout_planar_u += view->x; | ||
613 | pout_planar_v += view->x; | ||
614 | } | ||
615 | } | ||
616 | } | ||
617 | |||
618 | void pwc_dec23_exit(void) | ||
619 | { | ||
620 | /* Do nothing */ | ||
621 | |||
622 | } | ||
623 | |||
diff --git a/drivers/usb/media/pwc/pwc-dec23.h b/drivers/usb/media/pwc/pwc-dec23.h deleted file mode 100644 index 5b2aacdefa..0000000000 --- a/drivers/usb/media/pwc/pwc-dec23.h +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | /* Linux driver for Philips webcam | ||
2 | (C) 2004 Luc Saillard (luc@saillard.org) | ||
3 | |||
4 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
5 | driver and thus may have bugs that are not present in the original version. | ||
6 | Please send bug reports and support requests to <luc@saillard.org>. | ||
7 | The decompression routines have been implemented by reverse-engineering the | ||
8 | Nemosoft binary pwcx module. Caveat emptor. | ||
9 | |||
10 | This program is free software; you can redistribute it and/or modify | ||
11 | it under the terms of the GNU General Public License as published by | ||
12 | the Free Software Foundation; either version 2 of the License, or | ||
13 | (at your option) any later version. | ||
14 | |||
15 | This program is distributed in the hope that it will be useful, | ||
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | GNU General Public License for more details. | ||
19 | |||
20 | You should have received a copy of the GNU General Public License | ||
21 | along with this program; if not, write to the Free Software | ||
22 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | |||
25 | #ifndef PWC_DEC23_H | ||
26 | #define PWC_DEC23_H | ||
27 | |||
28 | struct pwc_dec23_private | ||
29 | { | ||
30 | unsigned char xx,yy,zz,zzmask; | ||
31 | |||
32 | unsigned char table_0004[2*0x4000]; | ||
33 | unsigned char table_8004[2*0x1000]; | ||
34 | unsigned int table_a004[256*12]; | ||
35 | |||
36 | unsigned char table_d004[8*256]; | ||
37 | unsigned int table_d800[256]; | ||
38 | unsigned int table_dc00[256]; | ||
39 | }; | ||
40 | |||
41 | |||
42 | void pwc_dec23_init(int type, int release, unsigned char *buffer, void *private_data); | ||
43 | void pwc_dec23_exit(void); | ||
44 | void pwc_dec23_decompress(const struct pwc_coord *image, | ||
45 | const struct pwc_coord *view, | ||
46 | const struct pwc_coord *offset, | ||
47 | const void *src, | ||
48 | void *dst, | ||
49 | int flags, | ||
50 | const void *data, | ||
51 | int bandlength); | ||
52 | |||
53 | |||
54 | |||
55 | #endif | ||
56 | |||
57 | |||
58 | |||
diff --git a/drivers/usb/media/pwc/pwc-if.c b/drivers/usb/media/pwc/pwc-if.c index cca47f480a..5429ff3b97 100644 --- a/drivers/usb/media/pwc/pwc-if.c +++ b/drivers/usb/media/pwc/pwc-if.c | |||
@@ -68,8 +68,6 @@ | |||
68 | #include "pwc-ioctl.h" | 68 | #include "pwc-ioctl.h" |
69 | #include "pwc-kiara.h" | 69 | #include "pwc-kiara.h" |
70 | #include "pwc-timon.h" | 70 | #include "pwc-timon.h" |
71 | #include "pwc-dec23.h" | ||
72 | #include "pwc-dec1.h" | ||
73 | #include "pwc-uncompress.h" | 71 | #include "pwc-uncompress.h" |
74 | 72 | ||
75 | /* Function prototypes and driver templates */ | 73 | /* Function prototypes and driver templates */ |
@@ -322,6 +320,7 @@ static int pwc_allocate_buffers(struct pwc_device *pdev) | |||
322 | case 730: | 320 | case 730: |
323 | case 740: | 321 | case 740: |
324 | case 750: | 322 | case 750: |
323 | #if 0 | ||
325 | Trace(TRACE_MEMORY,"private_data(%zu)\n",sizeof(struct pwc_dec23_private)); | 324 | Trace(TRACE_MEMORY,"private_data(%zu)\n",sizeof(struct pwc_dec23_private)); |
326 | kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); /* Timon & Kiara */ | 325 | kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); /* Timon & Kiara */ |
327 | break; | 326 | break; |
@@ -330,6 +329,8 @@ static int pwc_allocate_buffers(struct pwc_device *pdev) | |||
330 | /* TODO & FIXME */ | 329 | /* TODO & FIXME */ |
331 | kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); | 330 | kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); |
332 | break; | 331 | break; |
332 | #endif | ||
333 | ; | ||
333 | } | 334 | } |
334 | if (kbuf == NULL) { | 335 | if (kbuf == NULL) { |
335 | Err("Failed to allocate decompress table.\n"); | 336 | Err("Failed to allocate decompress table.\n"); |
@@ -1131,11 +1132,11 @@ static int pwc_video_close(struct inode *inode, struct file *file) | |||
1131 | case 730: | 1132 | case 730: |
1132 | case 740: | 1133 | case 740: |
1133 | case 750: | 1134 | case 750: |
1134 | pwc_dec23_exit(); /* Timon & Kiara */ | 1135 | /* pwc_dec23_exit(); *//* Timon & Kiara */ |
1135 | break; | 1136 | break; |
1136 | case 645: | 1137 | case 645: |
1137 | case 646: | 1138 | case 646: |
1138 | pwc_dec1_exit(); | 1139 | /* pwc_dec1_exit(); */ |
1139 | break; | 1140 | break; |
1140 | } | 1141 | } |
1141 | 1142 | ||
diff --git a/drivers/usb/media/pwc/pwc-kiara.c b/drivers/usb/media/pwc/pwc-kiara.c index 5485800efd..c498c68bac 100644 --- a/drivers/usb/media/pwc/pwc-kiara.c +++ b/drivers/usb/media/pwc/pwc-kiara.c | |||
@@ -316,576 +316,3 @@ const struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] = | |||
316 | }, | 316 | }, |
317 | }; | 317 | }; |
318 | 318 | ||
319 | |||
320 | /* | ||
321 | * Rom table for kiara chips | ||
322 | * | ||
323 | * 32 roms tables (one for each resolution ?) | ||
324 | * 2 tables per roms (one for each passes) (Y, and U&V) | ||
325 | * 128 bytes per passes | ||
326 | */ | ||
327 | |||
328 | const unsigned int KiaraRomTable [8][2][16][8] = | ||
329 | { | ||
330 | { /* version 0 */ | ||
331 | { /* version 0, passes 0 */ | ||
332 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
333 | 0x00000000,0x00000000,0x00000001,0x00000001}, | ||
334 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
335 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
336 | {0x00000000,0x00000000,0x00000009,0x00000049, | ||
337 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
338 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
339 | 0x00000049,0x00000249,0x0000024a,0x00000049}, | ||
340 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
341 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
342 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
343 | 0x00000249,0x0000124a,0x0000024a,0x0000024a}, | ||
344 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
345 | 0x0000124a,0x00009252,0x00001252,0x00001252}, | ||
346 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
347 | 0x00009252,0x00009292,0x00009292,0x00009292}, | ||
348 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
349 | 0x00009292,0x00009292,0x00009493,0x000124db}, | ||
350 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
351 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
352 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
353 | 0x0000a493,0x000124db,0x000124db,0x000126dc}, | ||
354 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
355 | 0x000124db,0x000126dc,0x000136e4,0x000126dc}, | ||
356 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
357 | 0x000124db,0x000136e4,0x000136e4,0x000136e4}, | ||
358 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
359 | 0x000126dc,0x0001b724,0x0001b92d,0x0001b925}, | ||
360 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
361 | 0x000136e4,0x0001b925,0x0001c96e,0x0001c92d}, | ||
362 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
363 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
364 | }, | ||
365 | { /* version 0, passes 1 */ | ||
366 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
367 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
368 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
369 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
370 | {0x00000000,0x00000000,0x00000001,0x00000009, | ||
371 | 0x00000009,0x00000009,0x00000009,0x00000001}, | ||
372 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
373 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
374 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
375 | 0x00000049,0x00000049,0x0000024a,0x0000024a}, | ||
376 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
377 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
378 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
379 | 0x00000249,0x00000249,0x0000024a,0x00001252}, | ||
380 | {0x00000000,0x00000000,0x00000049,0x00001249, | ||
381 | 0x0000124a,0x0000124a,0x00001252,0x00009292}, | ||
382 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
383 | 0x00009252,0x00009252,0x00009292,0x00009493}, | ||
384 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
385 | 0x00009292,0x00009292,0x00009292,0x00009493}, | ||
386 | {0x00000000,0x00000000,0x00000249,0x00009292, | ||
387 | 0x00009492,0x00009493,0x0000a49b,0x00009493}, | ||
388 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
389 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
390 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
391 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
392 | {0x00000000,0x00000000,0x00009252,0x00009493, | ||
393 | 0x000126dc,0x000126dc,0x000136e4,0x000136e4}, | ||
394 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
395 | 0x000136e4,0x000136e4,0x0001b725,0x0001b724}, | ||
396 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
397 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
398 | } | ||
399 | }, | ||
400 | { /* version 1 */ | ||
401 | { /* version 1, passes 0 */ | ||
402 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
403 | 0x00000000,0x00000000,0x00000000,0x00000001}, | ||
404 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
405 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
406 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
407 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
408 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
409 | 0x00000049,0x00000249,0x0000024a,0x0000024a}, | ||
410 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
411 | 0x00000249,0x00000249,0x0000024a,0x00001252}, | ||
412 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
413 | 0x00000249,0x0000124a,0x00001252,0x00001252}, | ||
414 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
415 | 0x0000124a,0x0000124a,0x00009292,0x00009292}, | ||
416 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
417 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
418 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
419 | 0x00009252,0x00009292,0x00009292,0x00009292}, | ||
420 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
421 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
422 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
423 | 0x00009252,0x00009493,0x00009493,0x00009493}, | ||
424 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
425 | 0x00009292,0x00009493,0x00009493,0x00009493}, | ||
426 | {0x00000000,0x00000000,0x00000249,0x00009252, | ||
427 | 0x00009492,0x00009493,0x0000a49b,0x0000a49b}, | ||
428 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
429 | 0x00009492,0x000124db,0x000124db,0x000124db}, | ||
430 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
431 | 0x0000a493,0x000126dc,0x000126dc,0x000126dc}, | ||
432 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
433 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
434 | }, | ||
435 | { /* version 1, passes 1 */ | ||
436 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
437 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
438 | {0x00000000,0x00000000,0x00000049,0x00000009, | ||
439 | 0x00000049,0x00000009,0x00000001,0x00000000}, | ||
440 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
441 | 0x00000049,0x00000049,0x00000049,0x00000000}, | ||
442 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
443 | 0x00000249,0x00000049,0x0000024a,0x00000001}, | ||
444 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
445 | 0x00000249,0x00000249,0x0000024a,0x00000001}, | ||
446 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
447 | 0x00000249,0x00000249,0x0000024a,0x00000001}, | ||
448 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
449 | 0x00000249,0x00000249,0x0000024a,0x00000009}, | ||
450 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
451 | 0x0000124a,0x0000124a,0x0000024a,0x00000009}, | ||
452 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
453 | 0x0000124a,0x0000124a,0x0000024a,0x00000009}, | ||
454 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
455 | 0x0000124a,0x00009252,0x00001252,0x00000049}, | ||
456 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
457 | 0x0000124a,0x00009292,0x00001252,0x00000049}, | ||
458 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
459 | 0x0000124a,0x00009292,0x00001252,0x00000049}, | ||
460 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
461 | 0x00009252,0x00009292,0x00001252,0x0000024a}, | ||
462 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
463 | 0x00009292,0x00009292,0x00001252,0x0000024a}, | ||
464 | {0x00000000,0x00000000,0x0000924a,0x0000924a, | ||
465 | 0x00009492,0x00009493,0x00009292,0x00001252}, | ||
466 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
467 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
468 | } | ||
469 | }, | ||
470 | { /* version 2 */ | ||
471 | { /* version 2, passes 0 */ | ||
472 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
473 | 0x00000049,0x00000049,0x0000024a,0x0000024a}, | ||
474 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
475 | 0x00000249,0x0000124a,0x00001252,0x00009292}, | ||
476 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
477 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
478 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
479 | 0x0000124a,0x00009292,0x00009493,0x00009493}, | ||
480 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
481 | 0x00009252,0x00009493,0x00009493,0x0000a49b}, | ||
482 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
483 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
484 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
485 | 0x00009292,0x00009493,0x0000a49b,0x000124db}, | ||
486 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
487 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
488 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
489 | 0x00009492,0x000124db,0x000124db,0x000126dc}, | ||
490 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
491 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
492 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
493 | 0x0000a493,0x000124db,0x000126dc,0x000136e4}, | ||
494 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
495 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
496 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
497 | 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, | ||
498 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
499 | 0x000124db,0x000136e4,0x000136e4,0x0001b724}, | ||
500 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
501 | 0x000126dc,0x0001b724,0x0001b725,0x0001b925}, | ||
502 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
503 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
504 | }, | ||
505 | { /* version 2, passes 1 */ | ||
506 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
507 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
508 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
509 | 0x00000249,0x00000249,0x0000024a,0x00000049}, | ||
510 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
511 | 0x0000124a,0x0000124a,0x00001252,0x00000049}, | ||
512 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
513 | 0x0000124a,0x0000124a,0x00009292,0x0000024a}, | ||
514 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
515 | 0x00009252,0x00009292,0x00009292,0x0000024a}, | ||
516 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
517 | 0x00009252,0x00009292,0x0000a49b,0x0000024a}, | ||
518 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
519 | 0x00009292,0x00009493,0x0000a49b,0x00001252}, | ||
520 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
521 | 0x00009292,0x00009493,0x0000a49b,0x00001252}, | ||
522 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
523 | 0x00009492,0x0000a49b,0x0000a49b,0x00001252}, | ||
524 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
525 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
526 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
527 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
528 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
529 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009292}, | ||
530 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
531 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
532 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
533 | 0x0000a493,0x000124db,0x0000a49b,0x00009493}, | ||
534 | {0x00000000,0x00000000,0x00009252,0x0000a49b, | ||
535 | 0x0001249b,0x000126dc,0x000124db,0x0000a49b}, | ||
536 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
537 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
538 | } | ||
539 | }, | ||
540 | { /* version 3 */ | ||
541 | { /* version 3, passes 0 */ | ||
542 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
543 | 0x0000124a,0x0000124a,0x00009292,0x00009292}, | ||
544 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
545 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
546 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
547 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
548 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
549 | 0x00009492,0x000124db,0x000126dc,0x000126dc}, | ||
550 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
551 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
552 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
553 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
554 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
555 | 0x0000a493,0x000126dc,0x000136e4,0x0001b724}, | ||
556 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
557 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
558 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
559 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
560 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
561 | 0x0001249b,0x000136e4,0x0001b725,0x0001b724}, | ||
562 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
563 | 0x000124db,0x000136e4,0x0001b725,0x0001b925}, | ||
564 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
565 | 0x000126dc,0x000136e4,0x0001b92d,0x0001b925}, | ||
566 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
567 | 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, | ||
568 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
569 | 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, | ||
570 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
571 | 0x000136e4,0x0001b925,0x00025bb6,0x00024b77}, | ||
572 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
573 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
574 | }, | ||
575 | { /* version 3, passes 1 */ | ||
576 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
577 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
578 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
579 | 0x00009252,0x00009292,0x00009292,0x00001252}, | ||
580 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
581 | 0x00009492,0x00009493,0x0000a49b,0x00001252}, | ||
582 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
583 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
584 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
585 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
586 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
587 | 0x0000a493,0x0000a49b,0x000126dc,0x00009292}, | ||
588 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
589 | 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, | ||
590 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
591 | 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, | ||
592 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
593 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
594 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
595 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
596 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
597 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
598 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
599 | 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, | ||
600 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
601 | 0x000124db,0x000136e4,0x000126dc,0x000124db}, | ||
602 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
603 | 0x000136e4,0x000136e4,0x000126dc,0x000124db}, | ||
604 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
605 | 0x0001b724,0x0001b724,0x000136e4,0x000126dc}, | ||
606 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
607 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
608 | } | ||
609 | }, | ||
610 | { /* version 4 */ | ||
611 | { /* version 4, passes 0 */ | ||
612 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
613 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
614 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
615 | 0x00000249,0x00000249,0x0000024a,0x00000049}, | ||
616 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
617 | 0x0000124a,0x00009252,0x00001252,0x0000024a}, | ||
618 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
619 | 0x00009252,0x00009292,0x00009493,0x00001252}, | ||
620 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
621 | 0x00009292,0x00009493,0x00009493,0x00001252}, | ||
622 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
623 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
624 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
625 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
626 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
627 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
628 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
629 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
630 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
631 | 0x0001249b,0x000126dc,0x000126dc,0x000124db}, | ||
632 | {0x00000000,0x00000000,0x00009252,0x00009493, | ||
633 | 0x000124db,0x000136e4,0x000136e4,0x000126dc}, | ||
634 | {0x00000000,0x00000000,0x00009252,0x0000a49b, | ||
635 | 0x000124db,0x000136e4,0x000136e4,0x000126dc}, | ||
636 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
637 | 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, | ||
638 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
639 | 0x000126dc,0x0001b724,0x0001b725,0x0001b724}, | ||
640 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
641 | 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, | ||
642 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
643 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
644 | }, | ||
645 | { /* version 4, passes 1 */ | ||
646 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
647 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
648 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
649 | 0x00000049,0x00000049,0x00000009,0x00000009}, | ||
650 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
651 | 0x0000124a,0x00000249,0x00000049,0x00000049}, | ||
652 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
653 | 0x0000124a,0x0000124a,0x00000049,0x00000049}, | ||
654 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
655 | 0x00009252,0x0000124a,0x0000024a,0x0000024a}, | ||
656 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
657 | 0x00009252,0x0000124a,0x0000024a,0x0000024a}, | ||
658 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
659 | 0x00009492,0x00009252,0x00001252,0x00001252}, | ||
660 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
661 | 0x0000a493,0x00009292,0x00009292,0x00001252}, | ||
662 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
663 | 0x0000a493,0x00009292,0x00009292,0x00009292}, | ||
664 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
665 | 0x0000a493,0x00009493,0x00009493,0x00009292}, | ||
666 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
667 | 0x0000a493,0x0000a49b,0x00009493,0x00009493}, | ||
668 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
669 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
670 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
671 | 0x0001249b,0x000124db,0x0000a49b,0x0000a49b}, | ||
672 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
673 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
674 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
675 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
676 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
677 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
678 | } | ||
679 | }, | ||
680 | { /* version 5 */ | ||
681 | { /* version 5, passes 0 */ | ||
682 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
683 | 0x00000249,0x00000249,0x00001252,0x00001252}, | ||
684 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
685 | 0x00009252,0x00009292,0x00009292,0x00001252}, | ||
686 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
687 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
688 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
689 | 0x0000a493,0x0000a49b,0x000124db,0x00009493}, | ||
690 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
691 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
692 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
693 | 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, | ||
694 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
695 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
696 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
697 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
698 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
699 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
700 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
701 | 0x000126dc,0x0001b724,0x0001b725,0x000136e4}, | ||
702 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
703 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
704 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
705 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
706 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
707 | 0x000136e4,0x0001b925,0x0001c96e,0x0001b925}, | ||
708 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
709 | 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, | ||
710 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
711 | 0x0001c924,0x0002496d,0x00025bb6,0x00024b77}, | ||
712 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
713 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
714 | }, | ||
715 | { /* version 5, passes 1 */ | ||
716 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
717 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
718 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
719 | 0x0000124a,0x0000124a,0x0000024a,0x0000024a}, | ||
720 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
721 | 0x00009252,0x00009252,0x0000024a,0x0000024a}, | ||
722 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
723 | 0x00009492,0x0000a49b,0x00001252,0x00001252}, | ||
724 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
725 | 0x0000a493,0x0000a49b,0x00001252,0x00001252}, | ||
726 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
727 | 0x0000a493,0x0000a49b,0x00009292,0x00001252}, | ||
728 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
729 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
730 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
731 | 0x0000a493,0x0000a49b,0x00009493,0x00009292}, | ||
732 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
733 | 0x0001249b,0x000124db,0x00009493,0x00009292}, | ||
734 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
735 | 0x0001249b,0x000124db,0x00009493,0x00009493}, | ||
736 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
737 | 0x000124db,0x000124db,0x0000a49b,0x00009493}, | ||
738 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
739 | 0x000126dc,0x000126dc,0x0000a49b,0x00009493}, | ||
740 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
741 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
742 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
743 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
744 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
745 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
746 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
747 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
748 | } | ||
749 | }, | ||
750 | { /* version 6 */ | ||
751 | { /* version 6, passes 0 */ | ||
752 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
753 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
754 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
755 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
756 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
757 | 0x0000a493,0x000124db,0x000124db,0x0000a49b}, | ||
758 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
759 | 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, | ||
760 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
761 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
762 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
763 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
764 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
765 | 0x000126dc,0x0001b724,0x0001b725,0x000126dc}, | ||
766 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
767 | 0x000136e4,0x0001b724,0x0001b92d,0x000136e4}, | ||
768 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
769 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
770 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
771 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
772 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
773 | 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, | ||
774 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
775 | 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, | ||
776 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
777 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d}, | ||
778 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
779 | 0x0001b724,0x0001c92d,0x00024b76,0x0002496e}, | ||
780 | {0x00000000,0x00000000,0x00012492,0x000126db, | ||
781 | 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
782 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
783 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
784 | }, | ||
785 | { /* version 6, passes 1 */ | ||
786 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
787 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
788 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
789 | 0x00009492,0x00009252,0x00001252,0x00001252}, | ||
790 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
791 | 0x0000a493,0x00009292,0x00001252,0x00001252}, | ||
792 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
793 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
794 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
795 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
796 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
797 | 0x0001249b,0x0000a49b,0x00009493,0x00009292}, | ||
798 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
799 | 0x000124db,0x000124db,0x00009493,0x00009493}, | ||
800 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
801 | 0x000124db,0x000124db,0x0000a49b,0x00009493}, | ||
802 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
803 | 0x000126dc,0x000124db,0x0000a49b,0x00009493}, | ||
804 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
805 | 0x000126dc,0x000126dc,0x0000a49b,0x0000a49b}, | ||
806 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
807 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
808 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
809 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
810 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
811 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
812 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
813 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
814 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
815 | 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, | ||
816 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
817 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
818 | } | ||
819 | }, | ||
820 | { /* version 7 */ | ||
821 | { /* version 7, passes 0 */ | ||
822 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
823 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
824 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
825 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
826 | {0x00000000,0x00000000,0x00001249,0x0000a49b, | ||
827 | 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, | ||
828 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
829 | 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, | ||
830 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
831 | 0x000126dc,0x000136e4,0x0001b725,0x000124db}, | ||
832 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
833 | 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, | ||
834 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
835 | 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, | ||
836 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
837 | 0x000136e4,0x0001b724,0x0001c96e,0x000136e4}, | ||
838 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
839 | 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, | ||
840 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
841 | 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, | ||
842 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
843 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925}, | ||
844 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
845 | 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, | ||
846 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
847 | 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, | ||
848 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
849 | 0x0001b924,0x0001c92d,0x00024b76,0x0002496e}, | ||
850 | {0x00000000,0x00000000,0x00012492,0x000136db, | ||
851 | 0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
852 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
853 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
854 | }, | ||
855 | { /* version 7, passes 1 */ | ||
856 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
857 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
858 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
859 | 0x00009492,0x00009292,0x00001252,0x00001252}, | ||
860 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
861 | 0x0000a493,0x0000a49b,0x00001252,0x00001252}, | ||
862 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
863 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
864 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
865 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
866 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
867 | 0x000126dc,0x0000a49b,0x00009493,0x00009292}, | ||
868 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
869 | 0x000126dc,0x000124db,0x00009493,0x00009493}, | ||
870 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
871 | 0x000136e4,0x000124db,0x0000a49b,0x00009493}, | ||
872 | {0x00000000,0x00000000,0x0000924a,0x000136db, | ||
873 | 0x0001b724,0x000124db,0x0000a49b,0x00009493}, | ||
874 | {0x00000000,0x00000000,0x0000924a,0x000136db, | ||
875 | 0x0001b724,0x000126dc,0x0000a49b,0x0000a49b}, | ||
876 | {0x00000000,0x00000000,0x00009292,0x000136db, | ||
877 | 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, | ||
878 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
879 | 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, | ||
880 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
881 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
882 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
883 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
884 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
885 | 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, | ||
886 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
887 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
888 | } | ||
889 | } | ||
890 | }; | ||
891 | |||
diff --git a/drivers/usb/media/pwc/pwc-timon.c b/drivers/usb/media/pwc/pwc-timon.c index f950a4e5ed..dee967173d 100644 --- a/drivers/usb/media/pwc/pwc-timon.c +++ b/drivers/usb/media/pwc/pwc-timon.c | |||
@@ -314,1133 +314,3 @@ const struct Timon_table_entry Timon_table[PSZ_MAX][6][4] = | |||
314 | }, | 314 | }, |
315 | }; | 315 | }; |
316 | 316 | ||
317 | /* | ||
318 | * 16 versions: | ||
319 | * 2 tables (one for Y, and one for U&V) | ||
320 | * 16 levels of details per tables | ||
321 | * 8 blocs | ||
322 | */ | ||
323 | |||
324 | const unsigned int TimonRomTable [16][2][16][8] = | ||
325 | { | ||
326 | { /* version 0 */ | ||
327 | { /* version 0, passes 0 */ | ||
328 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
329 | 0x00000000,0x00000000,0x00000000,0x00000001}, | ||
330 | {0x00000000,0x00000000,0x00000001,0x00000001, | ||
331 | 0x00000001,0x00000001,0x00000001,0x00000001}, | ||
332 | {0x00000000,0x00000000,0x00000001,0x00000001, | ||
333 | 0x00000001,0x00000009,0x00000009,0x00000009}, | ||
334 | {0x00000000,0x00000000,0x00000009,0x00000001, | ||
335 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
336 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
337 | 0x00000009,0x00000009,0x00000049,0x00000009}, | ||
338 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
339 | 0x00000009,0x00000049,0x00000049,0x00000049}, | ||
340 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
341 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
342 | {0x00000000,0x00000000,0x00000009,0x00000049, | ||
343 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
344 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
345 | 0x00000049,0x00000049,0x0000024a,0x0000024a}, | ||
346 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
347 | 0x00000049,0x00000249,0x0000024a,0x0000024a}, | ||
348 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
349 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
350 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
351 | 0x00000249,0x00000249,0x00001252,0x0000024a}, | ||
352 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
353 | 0x00000249,0x0000124a,0x00001252,0x0000024a}, | ||
354 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
355 | 0x00000249,0x0000124a,0x00001252,0x0000024a}, | ||
356 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
357 | 0x0000124a,0x00009252,0x00009292,0x00001252}, | ||
358 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
359 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
360 | }, | ||
361 | { /* version 0, passes 1 */ | ||
362 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
363 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
364 | {0x00000000,0x00000000,0x00000001,0x00000001, | ||
365 | 0x00000001,0x00000001,0x00000000,0x00000000}, | ||
366 | {0x00000000,0x00000000,0x00000009,0x00000001, | ||
367 | 0x00000001,0x00000009,0x00000000,0x00000000}, | ||
368 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
369 | 0x00000009,0x00000009,0x00000000,0x00000000}, | ||
370 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
371 | 0x00000009,0x00000009,0x00000001,0x00000000}, | ||
372 | {0x00000000,0x00000000,0x00000049,0x00000009, | ||
373 | 0x00000009,0x00000049,0x00000001,0x00000001}, | ||
374 | {0x00000000,0x00000000,0x00000049,0x00000009, | ||
375 | 0x00000009,0x00000049,0x00000001,0x00000001}, | ||
376 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
377 | 0x00000049,0x00000049,0x00000009,0x00000001}, | ||
378 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
379 | 0x00000049,0x00000049,0x00000009,0x00000001}, | ||
380 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
381 | 0x00000049,0x00000049,0x00000009,0x00000001}, | ||
382 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
383 | 0x00000049,0x00000049,0x00000009,0x00000009}, | ||
384 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
385 | 0x00000049,0x00000249,0x00000049,0x00000009}, | ||
386 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
387 | 0x00000049,0x00000249,0x00000049,0x00000009}, | ||
388 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
389 | 0x00000249,0x00000249,0x00000049,0x00000009}, | ||
390 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
391 | 0x0000124a,0x0000124a,0x0000024a,0x00000049}, | ||
392 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
393 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
394 | } | ||
395 | }, | ||
396 | { /* version 1 */ | ||
397 | { /* version 1, passes 0 */ | ||
398 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
399 | 0x00000000,0x00000000,0x00000000,0x00000001}, | ||
400 | {0x00000000,0x00000000,0x00000001,0x00000001, | ||
401 | 0x00000001,0x00000009,0x00000009,0x00000009}, | ||
402 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
403 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
404 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
405 | 0x00000009,0x00000049,0x00000049,0x00000049}, | ||
406 | {0x00000000,0x00000000,0x00000009,0x00000049, | ||
407 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
408 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
409 | 0x00000049,0x00000249,0x0000024a,0x0000024a}, | ||
410 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
411 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
412 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
413 | 0x00000249,0x00000249,0x0000024a,0x00001252}, | ||
414 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
415 | 0x00000249,0x0000124a,0x00001252,0x00001252}, | ||
416 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
417 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
418 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
419 | 0x0000124a,0x0000124a,0x00009292,0x00009292}, | ||
420 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
421 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
422 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
423 | 0x00009252,0x00009252,0x00009292,0x00009292}, | ||
424 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
425 | 0x00009292,0x00009493,0x00009493,0x00009493}, | ||
426 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
427 | 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b}, | ||
428 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
429 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
430 | }, | ||
431 | { /* version 1, passes 1 */ | ||
432 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
433 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
434 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
435 | 0x00000009,0x00000001,0x00000001,0x00000000}, | ||
436 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
437 | 0x00000009,0x00000009,0x00000001,0x00000000}, | ||
438 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
439 | 0x00000049,0x00000009,0x00000001,0x00000000}, | ||
440 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
441 | 0x00000049,0x00000049,0x00000001,0x00000001}, | ||
442 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
443 | 0x00000049,0x00000049,0x00000009,0x00000001}, | ||
444 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
445 | 0x00000049,0x00000249,0x00000009,0x00000001}, | ||
446 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
447 | 0x00000249,0x00000249,0x00000009,0x00000009}, | ||
448 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
449 | 0x00000249,0x00000249,0x00000049,0x00000009}, | ||
450 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
451 | 0x00000249,0x0000124a,0x00000049,0x00000009}, | ||
452 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
453 | 0x00000249,0x0000124a,0x00000049,0x00000009}, | ||
454 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
455 | 0x00000249,0x0000124a,0x0000024a,0x00000049}, | ||
456 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
457 | 0x0000124a,0x0000124a,0x0000024a,0x00000049}, | ||
458 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
459 | 0x0000124a,0x0000124a,0x0000024a,0x00000049}, | ||
460 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
461 | 0x00009252,0x00009252,0x00001252,0x0000024a}, | ||
462 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
463 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
464 | } | ||
465 | }, | ||
466 | { /* version 2 */ | ||
467 | { /* version 2, passes 0 */ | ||
468 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
469 | 0x00000000,0x00000000,0x00000000,0x00000001}, | ||
470 | {0x00000000,0x00000000,0x00000009,0x00000009, | ||
471 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
472 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
473 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
474 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
475 | 0x00000049,0x00000249,0x0000024a,0x0000024a}, | ||
476 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
477 | 0x00000249,0x00000249,0x0000024a,0x00001252}, | ||
478 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
479 | 0x00000249,0x0000124a,0x00001252,0x00001252}, | ||
480 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
481 | 0x0000124a,0x0000124a,0x00009292,0x00009292}, | ||
482 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
483 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
484 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
485 | 0x00009252,0x00009292,0x00009292,0x00009292}, | ||
486 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
487 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
488 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
489 | 0x00009252,0x00009493,0x00009493,0x00009493}, | ||
490 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
491 | 0x00009292,0x00009493,0x00009493,0x00009493}, | ||
492 | {0x00000000,0x00000000,0x00000249,0x00009252, | ||
493 | 0x00009492,0x00009493,0x0000a49b,0x0000a49b}, | ||
494 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
495 | 0x00009492,0x000124db,0x000124db,0x000124db}, | ||
496 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
497 | 0x0000a493,0x000126dc,0x000126dc,0x000126dc}, | ||
498 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
499 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
500 | }, | ||
501 | { /* version 2, passes 1 */ | ||
502 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
503 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
504 | {0x00000000,0x00000000,0x00000049,0x00000009, | ||
505 | 0x00000049,0x00000009,0x00000001,0x00000000}, | ||
506 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
507 | 0x00000049,0x00000049,0x00000049,0x00000000}, | ||
508 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
509 | 0x00000249,0x00000049,0x0000024a,0x00000001}, | ||
510 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
511 | 0x00000249,0x00000249,0x0000024a,0x00000001}, | ||
512 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
513 | 0x00000249,0x00000249,0x0000024a,0x00000001}, | ||
514 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
515 | 0x00000249,0x00000249,0x0000024a,0x00000009}, | ||
516 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
517 | 0x0000124a,0x0000124a,0x0000024a,0x00000009}, | ||
518 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
519 | 0x0000124a,0x0000124a,0x0000024a,0x00000009}, | ||
520 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
521 | 0x0000124a,0x00009252,0x00001252,0x00000049}, | ||
522 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
523 | 0x0000124a,0x00009292,0x00001252,0x00000049}, | ||
524 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
525 | 0x0000124a,0x00009292,0x00001252,0x00000049}, | ||
526 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
527 | 0x00009252,0x00009292,0x00001252,0x0000024a}, | ||
528 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
529 | 0x00009292,0x00009292,0x00001252,0x0000024a}, | ||
530 | {0x00000000,0x00000000,0x0000924a,0x0000924a, | ||
531 | 0x00009492,0x00009493,0x00009292,0x00001252}, | ||
532 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
533 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
534 | } | ||
535 | }, | ||
536 | { /* version 3 */ | ||
537 | { /* version 3, passes 0 */ | ||
538 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
539 | 0x00000000,0x00000000,0x00000000,0x00000001}, | ||
540 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
541 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
542 | {0x00000000,0x00000000,0x00000049,0x00000249, | ||
543 | 0x00000249,0x00000249,0x00001252,0x0000024a}, | ||
544 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
545 | 0x00000249,0x0000124a,0x00001252,0x00001252}, | ||
546 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
547 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
548 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
549 | 0x0000124a,0x00009292,0x00009292,0x00009493}, | ||
550 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
551 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
552 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
553 | 0x00009292,0x00009493,0x00009493,0x00009493}, | ||
554 | {0x00000000,0x00000000,0x00000249,0x00009252, | ||
555 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
556 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
557 | 0x00009292,0x0000a49b,0x0000a49b,0x0000a49b}, | ||
558 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
559 | 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b}, | ||
560 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
561 | 0x00009492,0x0000a49b,0x000124db,0x000124db}, | ||
562 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
563 | 0x0000a493,0x0000a49b,0x000124db,0x000124db}, | ||
564 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
565 | 0x0001249b,0x000126dc,0x000136e4,0x000126dc}, | ||
566 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
567 | 0x000124db,0x000136e4,0x0001b725,0x000136e4}, | ||
568 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
569 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
570 | }, | ||
571 | { /* version 3, passes 1 */ | ||
572 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
573 | 0x00000000,0x00000000,0x00000000,0x00000000}, | ||
574 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
575 | 0x00000049,0x00000049,0x00000001,0x00000000}, | ||
576 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
577 | 0x00000249,0x00000249,0x00000049,0x00000001}, | ||
578 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
579 | 0x00000249,0x0000124a,0x00001252,0x00000001}, | ||
580 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
581 | 0x0000124a,0x0000124a,0x00001252,0x00000009}, | ||
582 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
583 | 0x0000124a,0x00009252,0x00009292,0x00000009}, | ||
584 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
585 | 0x0000124a,0x00009252,0x00009292,0x00000049}, | ||
586 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
587 | 0x00009252,0x00009252,0x00009292,0x00000049}, | ||
588 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
589 | 0x00009252,0x00009493,0x00009292,0x0000024a}, | ||
590 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
591 | 0x00009252,0x00009493,0x00009292,0x0000024a}, | ||
592 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
593 | 0x00009252,0x00009493,0x00009493,0x00001252}, | ||
594 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
595 | 0x00009292,0x00009493,0x00009493,0x00001252}, | ||
596 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
597 | 0x00009492,0x00009493,0x00009493,0x00009292}, | ||
598 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
599 | 0x00009492,0x0000a49b,0x00009493,0x00009292}, | ||
600 | {0x00000000,0x00000000,0x0000924a,0x00009292, | ||
601 | 0x0000a493,0x000124db,0x0000a49b,0x00009493}, | ||
602 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
603 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
604 | } | ||
605 | }, | ||
606 | { /* version 4 */ | ||
607 | { /* version 4, passes 0 */ | ||
608 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
609 | 0x00000049,0x00000049,0x0000024a,0x0000024a}, | ||
610 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
611 | 0x00000249,0x0000124a,0x00001252,0x00009292}, | ||
612 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
613 | 0x0000124a,0x00009252,0x00009292,0x00009292}, | ||
614 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
615 | 0x0000124a,0x00009292,0x00009493,0x00009493}, | ||
616 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
617 | 0x00009252,0x00009493,0x00009493,0x0000a49b}, | ||
618 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
619 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
620 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
621 | 0x00009292,0x00009493,0x0000a49b,0x000124db}, | ||
622 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
623 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
624 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
625 | 0x00009492,0x000124db,0x000124db,0x000126dc}, | ||
626 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
627 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
628 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
629 | 0x0000a493,0x000124db,0x000126dc,0x000136e4}, | ||
630 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
631 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
632 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
633 | 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, | ||
634 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
635 | 0x000124db,0x000136e4,0x000136e4,0x0001b724}, | ||
636 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
637 | 0x000126dc,0x0001b724,0x0001b725,0x0001b925}, | ||
638 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
639 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
640 | }, | ||
641 | { /* version 4, passes 1 */ | ||
642 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
643 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
644 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
645 | 0x00000249,0x00000249,0x0000024a,0x00000049}, | ||
646 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
647 | 0x0000124a,0x0000124a,0x00001252,0x00000049}, | ||
648 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
649 | 0x0000124a,0x0000124a,0x00009292,0x0000024a}, | ||
650 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
651 | 0x00009252,0x00009292,0x00009292,0x0000024a}, | ||
652 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
653 | 0x00009252,0x00009292,0x0000a49b,0x0000024a}, | ||
654 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
655 | 0x00009292,0x00009493,0x0000a49b,0x00001252}, | ||
656 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
657 | 0x00009292,0x00009493,0x0000a49b,0x00001252}, | ||
658 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
659 | 0x00009492,0x0000a49b,0x0000a49b,0x00001252}, | ||
660 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
661 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
662 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
663 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
664 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
665 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009292}, | ||
666 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
667 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
668 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
669 | 0x0000a493,0x000124db,0x0000a49b,0x00009493}, | ||
670 | {0x00000000,0x00000000,0x00009252,0x0000a49b, | ||
671 | 0x0001249b,0x000126dc,0x000124db,0x0000a49b}, | ||
672 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
673 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
674 | } | ||
675 | }, | ||
676 | { /* version 5 */ | ||
677 | { /* version 5, passes 0 */ | ||
678 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
679 | 0x00000249,0x0000124a,0x00001252,0x00009292}, | ||
680 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
681 | 0x0000124a,0x00009292,0x00009292,0x00009493}, | ||
682 | {0x00000000,0x00000000,0x00000249,0x0000924a, | ||
683 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
684 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
685 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
686 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
687 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
688 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
689 | 0x00009492,0x0000a49b,0x000124db,0x000124db}, | ||
690 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
691 | 0x0000a493,0x000124db,0x000124db,0x000126dc}, | ||
692 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
693 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
694 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
695 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
696 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
697 | 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, | ||
698 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
699 | 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, | ||
700 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
701 | 0x0001249b,0x000126dc,0x0001b725,0x0001b724}, | ||
702 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
703 | 0x000124db,0x000126dc,0x0001b725,0x0001b724}, | ||
704 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
705 | 0x000126dc,0x000136e4,0x0001b92d,0x0001b925}, | ||
706 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
707 | 0x000136e4,0x0001b724,0x0001c96e,0x0001c92d}, | ||
708 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
709 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
710 | }, | ||
711 | { /* version 5, passes 1 */ | ||
712 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
713 | 0x0000124a,0x00000249,0x0000024a,0x0000024a}, | ||
714 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
715 | 0x0000124a,0x0000124a,0x00001252,0x0000024a}, | ||
716 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
717 | 0x00009292,0x00009493,0x00009493,0x0000024a}, | ||
718 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
719 | 0x00009292,0x00009493,0x00009493,0x00001252}, | ||
720 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
721 | 0x00009292,0x00009493,0x0000a49b,0x00001252}, | ||
722 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
723 | 0x00009492,0x00009493,0x000124db,0x00001252}, | ||
724 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
725 | 0x00009492,0x00009493,0x000124db,0x00009292}, | ||
726 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
727 | 0x00009492,0x0000a49b,0x000124db,0x00009292}, | ||
728 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
729 | 0x0000a493,0x0000a49b,0x000124db,0x00009292}, | ||
730 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
731 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
732 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
733 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
734 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
735 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
736 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
737 | 0x0000a493,0x000124db,0x000124db,0x0000a49b}, | ||
738 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
739 | 0x000124db,0x000126dc,0x000124db,0x0000a49b}, | ||
740 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
741 | 0x000126dc,0x000136e4,0x000126dc,0x000124db}, | ||
742 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
743 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
744 | } | ||
745 | }, | ||
746 | { /* version 6 */ | ||
747 | { /* version 6, passes 0 */ | ||
748 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
749 | 0x0000124a,0x0000124a,0x00009292,0x00009292}, | ||
750 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
751 | 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, | ||
752 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
753 | 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, | ||
754 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
755 | 0x00009492,0x000124db,0x000126dc,0x000126dc}, | ||
756 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
757 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
758 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
759 | 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, | ||
760 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
761 | 0x0000a493,0x000126dc,0x000136e4,0x0001b724}, | ||
762 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
763 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
764 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
765 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
766 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
767 | 0x0001249b,0x000136e4,0x0001b725,0x0001b724}, | ||
768 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
769 | 0x000124db,0x000136e4,0x0001b725,0x0001b925}, | ||
770 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
771 | 0x000126dc,0x000136e4,0x0001b92d,0x0001b925}, | ||
772 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
773 | 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, | ||
774 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
775 | 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, | ||
776 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
777 | 0x000136e4,0x0001b925,0x00025bb6,0x00024b77}, | ||
778 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
779 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
780 | }, | ||
781 | { /* version 6, passes 1 */ | ||
782 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
783 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
784 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
785 | 0x00009252,0x00009292,0x00009292,0x00001252}, | ||
786 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
787 | 0x00009492,0x00009493,0x0000a49b,0x00001252}, | ||
788 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
789 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
790 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
791 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
792 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
793 | 0x0000a493,0x0000a49b,0x000126dc,0x00009292}, | ||
794 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
795 | 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, | ||
796 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
797 | 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, | ||
798 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
799 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
800 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
801 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
802 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
803 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
804 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
805 | 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, | ||
806 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
807 | 0x000124db,0x000136e4,0x000126dc,0x000124db}, | ||
808 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
809 | 0x000136e4,0x000136e4,0x000126dc,0x000124db}, | ||
810 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
811 | 0x0001b724,0x0001b724,0x000136e4,0x000126dc}, | ||
812 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
813 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
814 | } | ||
815 | }, | ||
816 | { /* version 7 */ | ||
817 | { /* version 7, passes 0 */ | ||
818 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
819 | 0x00009292,0x00009493,0x0000a49b,0x000124db}, | ||
820 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
821 | 0x0000a493,0x0000a49b,0x000124db,0x000126dc}, | ||
822 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
823 | 0x0000a493,0x000124db,0x000126dc,0x000136e4}, | ||
824 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
825 | 0x0000a493,0x000124db,0x000136e4,0x000136e4}, | ||
826 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
827 | 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, | ||
828 | {0x00000000,0x00000000,0x00001249,0x0000a49b, | ||
829 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
830 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
831 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
832 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
833 | 0x000124db,0x000136e4,0x0001b725,0x0001b724}, | ||
834 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
835 | 0x000126dc,0x000136e4,0x0001b725,0x0001b925}, | ||
836 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
837 | 0x000126dc,0x0001b724,0x0001b92d,0x0001b925}, | ||
838 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
839 | 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, | ||
840 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
841 | 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, | ||
842 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
843 | 0x000136e4,0x0001b724,0x0001c96e,0x0002496e}, | ||
844 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
845 | 0x000136e4,0x0001b925,0x0001c96e,0x0002496e}, | ||
846 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
847 | 0x0001b724,0x0002496d,0x00025bb6,0x00025bbf}, | ||
848 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
849 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
850 | }, | ||
851 | { /* version 7, passes 1 */ | ||
852 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
853 | 0x00009252,0x00009292,0x00009292,0x00009292}, | ||
854 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
855 | 0x00009492,0x00009493,0x00009493,0x00009292}, | ||
856 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
857 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009292}, | ||
858 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
859 | 0x0000a493,0x0000a49b,0x000124db,0x00009493}, | ||
860 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
861 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
862 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
863 | 0x0000a493,0x000124db,0x000136e4,0x00009493}, | ||
864 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
865 | 0x0000a493,0x000124db,0x000136e4,0x0000a49b}, | ||
866 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
867 | 0x0001249b,0x000124db,0x000136e4,0x0000a49b}, | ||
868 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
869 | 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, | ||
870 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
871 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
872 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
873 | 0x000126dc,0x000136e4,0x000136e4,0x000124db}, | ||
874 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
875 | 0x000126dc,0x000136e4,0x000136e4,0x000124db}, | ||
876 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
877 | 0x000136e4,0x000136e4,0x000136e4,0x000126dc}, | ||
878 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
879 | 0x000136e4,0x0001b724,0x000136e4,0x000126dc}, | ||
880 | {0x00000000,0x00000000,0x00012492,0x000126db, | ||
881 | 0x0001b724,0x0001b925,0x0001b725,0x000136e4}, | ||
882 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
883 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
884 | } | ||
885 | }, | ||
886 | { /* version 8 */ | ||
887 | { /* version 8, passes 0 */ | ||
888 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
889 | 0x00009292,0x00009493,0x0000a49b,0x000124db}, | ||
890 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
891 | 0x0000a493,0x000124db,0x000126dc,0x000126dc}, | ||
892 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
893 | 0x0000a493,0x000124db,0x000126dc,0x000136e4}, | ||
894 | {0x00000000,0x00000000,0x00001249,0x0000a49b, | ||
895 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
896 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
897 | 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, | ||
898 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
899 | 0x000124db,0x000136e4,0x0001b725,0x0001b724}, | ||
900 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
901 | 0x000126dc,0x000136e4,0x0001b725,0x0001b925}, | ||
902 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
903 | 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, | ||
904 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
905 | 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, | ||
906 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
907 | 0x000126dc,0x0001b925,0x0001c96e,0x0001c92d}, | ||
908 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
909 | 0x000136e4,0x0001b925,0x0001c96e,0x0001c92d}, | ||
910 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
911 | 0x000136e4,0x0001b925,0x00024b76,0x00024b77}, | ||
912 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
913 | 0x000136e4,0x0001b925,0x00024b76,0x00025bbf}, | ||
914 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
915 | 0x000136e4,0x0001c92d,0x00024b76,0x00025bbf}, | ||
916 | {0x00000000,0x00000000,0x00012492,0x000136db, | ||
917 | 0x0001b724,0x00024b6d,0x0002ddb6,0x0002efff}, | ||
918 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
919 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
920 | }, | ||
921 | { /* version 8, passes 1 */ | ||
922 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
923 | 0x00009252,0x00009493,0x00009493,0x00009493}, | ||
924 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
925 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
926 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
927 | 0x0000a493,0x0000a49b,0x000124db,0x00009493}, | ||
928 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
929 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
930 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
931 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
932 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
933 | 0x0000a493,0x000124db,0x000136e4,0x000124db}, | ||
934 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
935 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
936 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
937 | 0x000126dc,0x000126dc,0x000136e4,0x000126dc}, | ||
938 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
939 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
940 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
941 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
942 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
943 | 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, | ||
944 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
945 | 0x000136e4,0x0001b724,0x0001b725,0x000136e4}, | ||
946 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
947 | 0x000136e4,0x0001b925,0x0001b725,0x0001b724}, | ||
948 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
949 | 0x000136e4,0x0001b925,0x0001b725,0x0001b724}, | ||
950 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
951 | 0x0001b724,0x0002496d,0x0001b92d,0x0001b925}, | ||
952 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
953 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
954 | } | ||
955 | }, | ||
956 | { /* version 9 */ | ||
957 | { /* version 9, passes 0 */ | ||
958 | {0x00000000,0x00000000,0x00000049,0x00000049, | ||
959 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
960 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
961 | 0x00000249,0x00000249,0x0000024a,0x00000049}, | ||
962 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
963 | 0x0000124a,0x00009252,0x00001252,0x0000024a}, | ||
964 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
965 | 0x00009252,0x00009292,0x00009493,0x00001252}, | ||
966 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
967 | 0x00009292,0x00009493,0x00009493,0x00001252}, | ||
968 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
969 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
970 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
971 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
972 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
973 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
974 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
975 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
976 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
977 | 0x0001249b,0x000126dc,0x000126dc,0x000124db}, | ||
978 | {0x00000000,0x00000000,0x00009252,0x00009493, | ||
979 | 0x000124db,0x000136e4,0x000136e4,0x000126dc}, | ||
980 | {0x00000000,0x00000000,0x00009252,0x0000a49b, | ||
981 | 0x000124db,0x000136e4,0x000136e4,0x000126dc}, | ||
982 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
983 | 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, | ||
984 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
985 | 0x000126dc,0x0001b724,0x0001b725,0x0001b724}, | ||
986 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
987 | 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, | ||
988 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
989 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
990 | }, | ||
991 | { /* version 9, passes 1 */ | ||
992 | {0x00000000,0x00000000,0x00000249,0x00000049, | ||
993 | 0x00000009,0x00000009,0x00000009,0x00000009}, | ||
994 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
995 | 0x00000049,0x00000049,0x00000009,0x00000009}, | ||
996 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
997 | 0x0000124a,0x00000249,0x00000049,0x00000049}, | ||
998 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
999 | 0x0000124a,0x0000124a,0x00000049,0x00000049}, | ||
1000 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1001 | 0x00009252,0x0000124a,0x0000024a,0x0000024a}, | ||
1002 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
1003 | 0x00009252,0x0000124a,0x0000024a,0x0000024a}, | ||
1004 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1005 | 0x00009492,0x00009252,0x00001252,0x00001252}, | ||
1006 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1007 | 0x0000a493,0x00009292,0x00009292,0x00001252}, | ||
1008 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1009 | 0x0000a493,0x00009292,0x00009292,0x00009292}, | ||
1010 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1011 | 0x0000a493,0x00009493,0x00009493,0x00009292}, | ||
1012 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1013 | 0x0000a493,0x0000a49b,0x00009493,0x00009493}, | ||
1014 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1015 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
1016 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1017 | 0x0001249b,0x000124db,0x0000a49b,0x0000a49b}, | ||
1018 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1019 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1020 | {0x00000000,0x00000000,0x00009252,0x000124db, | ||
1021 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1022 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1023 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1024 | } | ||
1025 | }, | ||
1026 | { /* version 10 */ | ||
1027 | { /* version 10, passes 0 */ | ||
1028 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
1029 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
1030 | {0x00000000,0x00000000,0x00000249,0x00001249, | ||
1031 | 0x00009252,0x00009292,0x00009292,0x0000024a}, | ||
1032 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1033 | 0x00009252,0x00009292,0x00009292,0x00001252}, | ||
1034 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
1035 | 0x00009492,0x00009493,0x0000a49b,0x00009292}, | ||
1036 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1037 | 0x00009492,0x000124db,0x000124db,0x00009292}, | ||
1038 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1039 | 0x0000a493,0x000124db,0x000124db,0x00009493}, | ||
1040 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1041 | 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, | ||
1042 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1043 | 0x0000a493,0x000124db,0x000126dc,0x000124db}, | ||
1044 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1045 | 0x0001249b,0x000126dc,0x000126dc,0x000124db}, | ||
1046 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1047 | 0x000124db,0x000126dc,0x000136e4,0x000126dc}, | ||
1048 | {0x00000000,0x00000000,0x00009252,0x0000a49b, | ||
1049 | 0x000124db,0x000136e4,0x000136e4,0x000136e4}, | ||
1050 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1051 | 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, | ||
1052 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
1053 | 0x000126dc,0x0001b724,0x0001b92d,0x0001b724}, | ||
1054 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1055 | 0x000126dc,0x0001b925,0x0001b92d,0x0001b925}, | ||
1056 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1057 | 0x000136e4,0x0002496d,0x0001c96e,0x0001c92d}, | ||
1058 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1059 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1060 | }, | ||
1061 | { /* version 10, passes 1 */ | ||
1062 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
1063 | 0x00000049,0x00000049,0x00000049,0x00000049}, | ||
1064 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1065 | 0x0000124a,0x00000249,0x00000049,0x00000049}, | ||
1066 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1067 | 0x0000124a,0x00009252,0x0000024a,0x00000049}, | ||
1068 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1069 | 0x00009252,0x00009493,0x0000024a,0x0000024a}, | ||
1070 | {0x00000000,0x00000000,0x00001249,0x00009252, | ||
1071 | 0x00009492,0x00009493,0x00001252,0x0000024a}, | ||
1072 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1073 | 0x00009492,0x00009493,0x00001252,0x00001252}, | ||
1074 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1075 | 0x00009492,0x00009493,0x00009292,0x00001252}, | ||
1076 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1077 | 0x0000a493,0x00009493,0x00009292,0x00009292}, | ||
1078 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1079 | 0x0000a493,0x0000a49b,0x00009493,0x00009292}, | ||
1080 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1081 | 0x0000a493,0x0000a49b,0x00009493,0x00009292}, | ||
1082 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1083 | 0x0000a493,0x000124db,0x0000a49b,0x00009493}, | ||
1084 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1085 | 0x0000a493,0x000124db,0x0000a49b,0x00009493}, | ||
1086 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1087 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1088 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1089 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1090 | {0x00000000,0x00000000,0x00009252,0x000126db, | ||
1091 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1092 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1093 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1094 | } | ||
1095 | }, | ||
1096 | { /* version 11 */ | ||
1097 | { /* version 11, passes 0 */ | ||
1098 | {0x00000000,0x00000000,0x00000249,0x00000249, | ||
1099 | 0x00000249,0x00000249,0x00001252,0x00001252}, | ||
1100 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1101 | 0x00009252,0x00009292,0x00009292,0x00001252}, | ||
1102 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
1103 | 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, | ||
1104 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1105 | 0x0000a493,0x0000a49b,0x000124db,0x00009493}, | ||
1106 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1107 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
1108 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1109 | 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, | ||
1110 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1111 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
1112 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1113 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
1114 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1115 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
1116 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1117 | 0x000126dc,0x0001b724,0x0001b725,0x000136e4}, | ||
1118 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1119 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
1120 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
1121 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
1122 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1123 | 0x000136e4,0x0001b925,0x0001c96e,0x0001b925}, | ||
1124 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1125 | 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, | ||
1126 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1127 | 0x0001c924,0x0002496d,0x00025bb6,0x00024b77}, | ||
1128 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1129 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1130 | }, | ||
1131 | { /* version 11, passes 1 */ | ||
1132 | {0x00000000,0x00000000,0x00001249,0x00000249, | ||
1133 | 0x00000249,0x00000249,0x0000024a,0x0000024a}, | ||
1134 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1135 | 0x0000124a,0x0000124a,0x0000024a,0x0000024a}, | ||
1136 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
1137 | 0x00009252,0x00009252,0x0000024a,0x0000024a}, | ||
1138 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1139 | 0x00009492,0x0000a49b,0x00001252,0x00001252}, | ||
1140 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1141 | 0x0000a493,0x0000a49b,0x00001252,0x00001252}, | ||
1142 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1143 | 0x0000a493,0x0000a49b,0x00009292,0x00001252}, | ||
1144 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1145 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
1146 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1147 | 0x0000a493,0x0000a49b,0x00009493,0x00009292}, | ||
1148 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1149 | 0x0001249b,0x000124db,0x00009493,0x00009292}, | ||
1150 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1151 | 0x0001249b,0x000124db,0x00009493,0x00009493}, | ||
1152 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1153 | 0x000124db,0x000124db,0x0000a49b,0x00009493}, | ||
1154 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1155 | 0x000126dc,0x000126dc,0x0000a49b,0x00009493}, | ||
1156 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1157 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1158 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
1159 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1160 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
1161 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1162 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1163 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1164 | } | ||
1165 | }, | ||
1166 | { /* version 12 */ | ||
1167 | { /* version 12, passes 0 */ | ||
1168 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1169 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
1170 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1171 | 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, | ||
1172 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1173 | 0x0000a493,0x000124db,0x000124db,0x0000a49b}, | ||
1174 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1175 | 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, | ||
1176 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1177 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
1178 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1179 | 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, | ||
1180 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1181 | 0x000126dc,0x0001b724,0x0001b725,0x000126dc}, | ||
1182 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1183 | 0x000136e4,0x0001b724,0x0001b92d,0x000136e4}, | ||
1184 | {0x00000000,0x00000000,0x00009492,0x0000a49b, | ||
1185 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
1186 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1187 | 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, | ||
1188 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1189 | 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, | ||
1190 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1191 | 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, | ||
1192 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1193 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d}, | ||
1194 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1195 | 0x0001b724,0x0001c92d,0x00024b76,0x0002496e}, | ||
1196 | {0x00000000,0x00000000,0x00012492,0x000126db, | ||
1197 | 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
1198 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1199 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1200 | }, | ||
1201 | { /* version 12, passes 1 */ | ||
1202 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1203 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
1204 | {0x00000000,0x00000000,0x00001249,0x00009292, | ||
1205 | 0x00009492,0x00009252,0x00001252,0x00001252}, | ||
1206 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1207 | 0x0000a493,0x00009292,0x00001252,0x00001252}, | ||
1208 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1209 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
1210 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1211 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
1212 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1213 | 0x0001249b,0x0000a49b,0x00009493,0x00009292}, | ||
1214 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1215 | 0x000124db,0x000124db,0x00009493,0x00009493}, | ||
1216 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1217 | 0x000124db,0x000124db,0x0000a49b,0x00009493}, | ||
1218 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1219 | 0x000126dc,0x000124db,0x0000a49b,0x00009493}, | ||
1220 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1221 | 0x000126dc,0x000126dc,0x0000a49b,0x0000a49b}, | ||
1222 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1223 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1224 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
1225 | 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, | ||
1226 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
1227 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1228 | {0x00000000,0x00000000,0x00009492,0x000126db, | ||
1229 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1230 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1231 | 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, | ||
1232 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1233 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1234 | } | ||
1235 | }, | ||
1236 | { /* version 13 */ | ||
1237 | { /* version 13, passes 0 */ | ||
1238 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1239 | 0x00009252,0x00009292,0x00009493,0x00009493}, | ||
1240 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1241 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
1242 | {0x00000000,0x00000000,0x00001249,0x0000a49b, | ||
1243 | 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, | ||
1244 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1245 | 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, | ||
1246 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1247 | 0x000126dc,0x000136e4,0x0001b725,0x000124db}, | ||
1248 | {0x00000000,0x00000000,0x00009292,0x0000a49b, | ||
1249 | 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, | ||
1250 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
1251 | 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, | ||
1252 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1253 | 0x000136e4,0x0001b724,0x0001c96e,0x000136e4}, | ||
1254 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1255 | 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, | ||
1256 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1257 | 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, | ||
1258 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1259 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925}, | ||
1260 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1261 | 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1262 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1263 | 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1264 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1265 | 0x0001b924,0x0001c92d,0x00024b76,0x0002496e}, | ||
1266 | {0x00000000,0x00000000,0x00012492,0x000136db, | ||
1267 | 0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
1268 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1269 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1270 | }, | ||
1271 | { /* version 13, passes 1 */ | ||
1272 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1273 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
1274 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1275 | 0x00009492,0x00009292,0x00001252,0x00001252}, | ||
1276 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1277 | 0x0000a493,0x0000a49b,0x00001252,0x00001252}, | ||
1278 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1279 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
1280 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1281 | 0x0000a493,0x0000a49b,0x00009292,0x00009292}, | ||
1282 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1283 | 0x000126dc,0x0000a49b,0x00009493,0x00009292}, | ||
1284 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1285 | 0x000126dc,0x000124db,0x00009493,0x00009493}, | ||
1286 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1287 | 0x000136e4,0x000124db,0x0000a49b,0x00009493}, | ||
1288 | {0x00000000,0x00000000,0x0000924a,0x000136db, | ||
1289 | 0x0001b724,0x000124db,0x0000a49b,0x00009493}, | ||
1290 | {0x00000000,0x00000000,0x0000924a,0x000136db, | ||
1291 | 0x0001b724,0x000126dc,0x0000a49b,0x0000a49b}, | ||
1292 | {0x00000000,0x00000000,0x00009292,0x000136db, | ||
1293 | 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, | ||
1294 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1295 | 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, | ||
1296 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1297 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1298 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1299 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1300 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
1301 | 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, | ||
1302 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1303 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1304 | } | ||
1305 | }, | ||
1306 | { /* version 14 */ | ||
1307 | { /* version 14, passes 0 */ | ||
1308 | {0x00000000,0x00000000,0x00001249,0x0000924a, | ||
1309 | 0x00009292,0x00009493,0x00009493,0x00009493}, | ||
1310 | {0x00000000,0x00000000,0x00001249,0x0000a49b, | ||
1311 | 0x0000a493,0x000124db,0x000126dc,0x00009493}, | ||
1312 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1313 | 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, | ||
1314 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1315 | 0x000126dc,0x000136e4,0x0001b725,0x000124db}, | ||
1316 | {0x00000000,0x00000000,0x00009292,0x000124db, | ||
1317 | 0x000126dc,0x0001b724,0x0001b92d,0x000126dc}, | ||
1318 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1319 | 0x000136e4,0x0001b724,0x0001b92d,0x000126dc}, | ||
1320 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1321 | 0x000136e4,0x0001c92d,0x0001c96e,0x000136e4}, | ||
1322 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1323 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, | ||
1324 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1325 | 0x0001b724,0x0001c92d,0x00024b76,0x0001b925}, | ||
1326 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1327 | 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1328 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1329 | 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1330 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1331 | 0x0001b724,0x0001c92d,0x00024b76,0x0002496e}, | ||
1332 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1333 | 0x0001b924,0x0002496d,0x00024b76,0x00024b77}, | ||
1334 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1335 | 0x0001b924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
1336 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
1337 | 0x00024924,0x0002db6d,0x00036db6,0x0002efff}, | ||
1338 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1339 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1340 | }, | ||
1341 | { /* version 14, passes 1 */ | ||
1342 | {0x00000000,0x00000000,0x00001249,0x00001249, | ||
1343 | 0x0000124a,0x0000124a,0x00001252,0x00001252}, | ||
1344 | {0x00000000,0x00000000,0x0000924a,0x00009493, | ||
1345 | 0x0000a493,0x00009292,0x00001252,0x00001252}, | ||
1346 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1347 | 0x0000a493,0x0000a49b,0x00001252,0x00001252}, | ||
1348 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1349 | 0x0001249b,0x000136e4,0x00009292,0x00009292}, | ||
1350 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1351 | 0x0001249b,0x000136e4,0x00009292,0x00009292}, | ||
1352 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1353 | 0x000136e4,0x000136e4,0x00009493,0x00009292}, | ||
1354 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1355 | 0x0001b724,0x000136e4,0x00009493,0x00009493}, | ||
1356 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1357 | 0x0001b724,0x000136e4,0x0000a49b,0x00009493}, | ||
1358 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1359 | 0x0001b724,0x000136e4,0x0000a49b,0x00009493}, | ||
1360 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1361 | 0x0001b724,0x000136e4,0x0000a49b,0x0000a49b}, | ||
1362 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1363 | 0x0001b724,0x000136e4,0x000124db,0x0000a49b}, | ||
1364 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1365 | 0x0001b724,0x000136e4,0x000124db,0x0000a49b}, | ||
1366 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1367 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1368 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1369 | 0x0001b724,0x000136e4,0x000126dc,0x000124db}, | ||
1370 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
1371 | 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, | ||
1372 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1373 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1374 | } | ||
1375 | }, | ||
1376 | { /* version 15 */ | ||
1377 | { /* version 15, passes 0 */ | ||
1378 | {0x00000000,0x00000000,0x00001249,0x00009493, | ||
1379 | 0x0000a493,0x0000a49b,0x000124db,0x000124db}, | ||
1380 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1381 | 0x0001249b,0x000126dc,0x000136e4,0x000124db}, | ||
1382 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1383 | 0x000126dc,0x0001b724,0x0001b725,0x000126dc}, | ||
1384 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1385 | 0x000136e4,0x0001b724,0x0001b92d,0x000126dc}, | ||
1386 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1387 | 0x000136e4,0x0001b925,0x0001c96e,0x000136e4}, | ||
1388 | {0x00000000,0x00000000,0x00009492,0x000124db, | ||
1389 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, | ||
1390 | {0x00000000,0x00000000,0x0000a492,0x000124db, | ||
1391 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, | ||
1392 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1393 | 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925}, | ||
1394 | {0x00000000,0x00000000,0x0000a492,0x000126db, | ||
1395 | 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1396 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1397 | 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, | ||
1398 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1399 | 0x0001b924,0x0002496d,0x00024b76,0x0002496e}, | ||
1400 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1401 | 0x0001c924,0x0002496d,0x00025bb6,0x00024b77}, | ||
1402 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1403 | 0x0001c924,0x00024b6d,0x00025bb6,0x00024b77}, | ||
1404 | {0x00000000,0x00000000,0x00012492,0x000136db, | ||
1405 | 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf}, | ||
1406 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
1407 | 0x00024924,0x0002db6d,0x00036db6,0x0002efff}, | ||
1408 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1409 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1410 | }, | ||
1411 | { /* version 15, passes 1 */ | ||
1412 | {0x00000000,0x00000000,0x0000924a,0x0000924a, | ||
1413 | 0x00009292,0x00009292,0x00009292,0x00009292}, | ||
1414 | {0x00000000,0x00000000,0x0000924a,0x0000a49b, | ||
1415 | 0x0000a493,0x000124db,0x00009292,0x00009292}, | ||
1416 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1417 | 0x000124db,0x0001b724,0x00009493,0x00009493}, | ||
1418 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1419 | 0x000126dc,0x0001b724,0x00009493,0x00009493}, | ||
1420 | {0x00000000,0x00000000,0x0000924a,0x000124db, | ||
1421 | 0x000136e4,0x0001b724,0x0000a49b,0x0000a49b}, | ||
1422 | {0x00000000,0x00000000,0x00009292,0x000136db, | ||
1423 | 0x0001b724,0x0001b724,0x0000a49b,0x0000a49b}, | ||
1424 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1425 | 0x0001c924,0x0001b724,0x000124db,0x000124db}, | ||
1426 | {0x00000000,0x00000000,0x00009492,0x000136db, | ||
1427 | 0x0001c924,0x0001b724,0x000124db,0x000124db}, | ||
1428 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1429 | 0x0001c924,0x0001b724,0x000126dc,0x000126dc}, | ||
1430 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1431 | 0x0001c924,0x0001b925,0x000126dc,0x000126dc}, | ||
1432 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1433 | 0x0001c924,0x0001b925,0x000136e4,0x000136e4}, | ||
1434 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1435 | 0x0001c924,0x0001b925,0x000136e4,0x000136e4}, | ||
1436 | {0x00000000,0x00000000,0x0000a492,0x000136db, | ||
1437 | 0x0001c924,0x0001b925,0x0001b725,0x0001b724}, | ||
1438 | {0x00000000,0x00000000,0x00012492,0x000136db, | ||
1439 | 0x0001c924,0x0001b925,0x0001b725,0x0001b724}, | ||
1440 | {0x00000000,0x00000000,0x00012492,0x0001b6db, | ||
1441 | 0x00024924,0x0002496d,0x0001b92d,0x0001b925}, | ||
1442 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
1443 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
1444 | } | ||
1445 | } | ||
1446 | }; | ||
diff --git a/drivers/usb/media/pwc/pwc-uncompress.c b/drivers/usb/media/pwc/pwc-uncompress.c index c062e43b3a..bc3b1635ea 100644 --- a/drivers/usb/media/pwc/pwc-uncompress.c +++ b/drivers/usb/media/pwc/pwc-uncompress.c | |||
@@ -29,8 +29,6 @@ | |||
29 | 29 | ||
30 | #include "pwc.h" | 30 | #include "pwc.h" |
31 | #include "pwc-uncompress.h" | 31 | #include "pwc-uncompress.h" |
32 | #include "pwc-dec1.h" | ||
33 | #include "pwc-dec23.h" | ||
34 | 32 | ||
35 | int pwc_decompress(struct pwc_device *pdev) | 33 | int pwc_decompress(struct pwc_device *pdev) |
36 | { | 34 | { |
@@ -122,6 +120,7 @@ int pwc_decompress(struct pwc_device *pdev) | |||
122 | 120 | ||
123 | switch (pdev->type) | 121 | switch (pdev->type) |
124 | { | 122 | { |
123 | #if 0 | ||
125 | case 675: | 124 | case 675: |
126 | case 680: | 125 | case 680: |
127 | case 690: | 126 | case 690: |
@@ -137,6 +136,7 @@ int pwc_decompress(struct pwc_device *pdev) | |||
137 | case 645: | 136 | case 645: |
138 | case 646: | 137 | case 646: |
139 | /* TODO & FIXME */ | 138 | /* TODO & FIXME */ |
139 | #endif | ||
140 | return -ENXIO; /* No such device or address: missing decompressor */ | 140 | return -ENXIO; /* No such device or address: missing decompressor */ |
141 | break; | 141 | break; |
142 | } | 142 | } |
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index 549e229392..25f9a9a65c 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c | |||
@@ -228,17 +228,17 @@ MODULE_DESCRIPTION( | |||
228 | MODULE_LICENSE("Dual BSD/GPL"); | 228 | MODULE_LICENSE("Dual BSD/GPL"); |
229 | MODULE_DEVICE_TABLE(pci, intelfb_pci_table); | 229 | MODULE_DEVICE_TABLE(pci, intelfb_pci_table); |
230 | 230 | ||
231 | static int accel __initdata = 1; | 231 | static int accel = 1; |
232 | static int vram __initdata = 4; | 232 | static int vram = 4; |
233 | static int hwcursor __initdata = 1; | 233 | static int hwcursor = 1; |
234 | static int mtrr __initdata = 1; | 234 | static int mtrr = 1; |
235 | static int fixed __initdata = 0; | 235 | static int fixed = 0; |
236 | static int noinit __initdata = 0; | 236 | static int noinit = 0; |
237 | static int noregister __initdata = 0; | 237 | static int noregister = 0; |
238 | static int probeonly __initdata = 0; | 238 | static int probeonly = 0; |
239 | static int idonly __initdata = 0; | 239 | static int idonly = 0; |
240 | static int bailearly __initdata = 0; | 240 | static int bailearly = 0; |
241 | static char *mode __initdata = NULL; | 241 | static char *mode = NULL; |
242 | 242 | ||
243 | module_param(accel, bool, S_IRUGO); | 243 | module_param(accel, bool, S_IRUGO); |
244 | MODULE_PARM_DESC(accel, "Enable console acceleration"); | 244 | MODULE_PARM_DESC(accel, "Enable console acceleration"); |