PCI: read revision ID by default

Currently there are 97 occurrences where drivers need the pci
revision ID. We can do this once for all devices. Even the pci
subsystem needs the revision several times for quirks. The extra
u8 member pads out nicely in the pci_dev struct.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

4 files changed, 5 insertions, 0 deletions

diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 96d393c2da..e3009a43ac 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -367,8 +367,10 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
         sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
         dev->class = get_int_prop(node, "class-code", 0);
+        dev->revision = get_int_prop(node, "revision-id", 0);
 
         DBG("    class: 0x%x\n", dev->class);
+        DBG("    revision: 0x%x\n", dev->revision);
 
         dev->current_state = 4;         /* unknown power state */
         dev->error_state = pci_channel_io_normal;
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 81f4a5ea05..55ad1b899b 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -448,6 +448,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
                  */
                 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
                 dev->class = class >> 8;
+                dev->revision = class & 0xff;
 
                 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                         dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 9cd983acba..8802fcb4aa 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -702,6 +702,7 @@ static int pci_setup_device(struct pci_dev * dev)
                 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
 
         pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
+        dev->revision = class & 0xff;
         class >>= 8;                                /* upper 3 bytes */
         dev->class = class;
         class >>= 8;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 5be420ac63..45332440a2 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -139,6 +139,7 @@ struct pci_dev {
         unsigned short  subsystem_vendor;
         unsigned short  subsystem_device;
         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
+        u8              revision;       /* PCI revision, low byte of class word */
         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
         u8              rom_base_reg;   /* which config register controls the ROM */
         u8              pin;            /* which interrupt pin this device uses */