System-specific handling of bus errors for DECstation variations

supporting parity errors only for memory (Pmax/3min/Maxine).
Fixes for resources decoded by the KN04/KN05 MB ASIC.  Additional
clean-ups for the ECC handler.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

9 files changed, 121 insertions, 70 deletions

diff --git a/arch/mips/dec/Makefile b/arch/mips/dec/Makefile
index 688757a97c..ed181fdc3a 100644
--- a/arch/mips/dec/Makefile
+++ b/arch/mips/dec/Makefile
@@ -2,8 +2,8 @@
 # Makefile for the DECstation family specific parts of the kernel
 #
 
-obj-y           := ecc-berr.o int-handler.o ioasic-irq.o kn02-irq.o reset.o \
-                   setup.o time.o
+obj-y           := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
+                   kn02-irq.o kn02xa-berr.o reset.o setup.o time.o
 
 obj-$(CONFIG_PROM_CONSOLE)      += promcon.o
 obj-$(CONFIG_CPU_HAS_WB)        += wbflush.o
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index a36503c95b..8f3498aa43 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -6,7 +6,7 @@
  *      5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03),
  *      5900/260 (KN05) systems.
  *
- *      Copyright (c) 2003  Maciej W. Rozycki
+ *      Copyright (c) 2003, 2005  Maciej W. Rozycki
  *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
@@ -15,6 +15,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/spinlock.h>
@@ -57,7 +58,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
 
         const char *kind, *agent, *cycle, *event;
         const char *status = "", *xbit = "", *fmt = "";
-        dma_addr_t address;
+        unsigned long address;
         u16 syn = 0, sngl;
 
         int i = 0;
@@ -66,7 +67,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
         u32 chksyn = *kn0x_chksyn;
         int action = MIPS_BE_FATAL;
 
-        /* For non-ECC ack ASAP, so any subsequent errors get caught. */
+        /* For non-ECC ack ASAP, so that any subsequent errors get caught. */
         if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID)
                 dec_ecc_be_ack();
 
@@ -74,7 +75,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
 
         if (!(erraddr & KN0X_EAR_VALID)) {
                 /* No idea what happened. */
-                printk(KERN_ALERT "Unidentified bus error %s.\n", kind);
+                printk(KERN_ALERT "Unidentified bus error %s\n", kind);
                 return action;
         }
 
@@ -126,7 +127,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
                         /* Ack now, no rewrite will happen. */
                         dec_ecc_be_ack();
 
-                        fmt = KERN_ALERT "%s" "invalid.\n";
+                        fmt = KERN_ALERT "%s" "invalid\n";
                 } else {
                         sngl = syn & KN0X_ESR_SNGLO;
                         syn &= KN0X_ESR_SYNLO;
@@ -161,12 +162,12 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
                                 if (syn == 0x01) {
                                         fmt = KERN_ALERT "%s"
                                               "%#04x -- %s bit error "
-                                              "at check bit C%s.\n";
+                                              "at check bit C%s\n";
                                         xbit = "X";
                                 } else {
                                         fmt = KERN_ALERT "%s"
                                               "%#04x -- %s bit error "
-                                              "at check bit C%s%u.\n";
+                                              "at check bit C%s%u\n";
                                 }
                                 i = syn >> 2;
                         } else {
@@ -176,16 +177,16 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
                                 if (i < 32)
                                         fmt = KERN_ALERT "%s"
                                               "%#04x -- %s bit error "
-                                              "at data bit D%s%u.\n";
+                                              "at data bit D%s%u\n";
                                 else
                                         fmt = KERN_ALERT "%s"
-                                              "%#04x -- %s bit error.\n";
+                                              "%#04x -- %s bit error\n";
                         }
                 }
         }
 
         if (action != MIPS_BE_FIXUP)
-                printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx.\n",
+                printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
                         kind, agent, cycle, event, address);
 
         if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR)
@@ -207,8 +208,8 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
                 return IRQ_HANDLED;
 
         /*
-         * FIXME: Find affected processes and kill them, otherwise we
-         * must die.
+         * FIXME: Find the affected processes and kill them, otherwise
+         * we must die.
          *
          * The interrupt is asynchronously delivered thus EPC and RA
          * may be irrelevant, but are printed for a reference.
@@ -235,7 +236,7 @@ static inline void dec_kn02_be_init(void)
         spin_lock_irqsave(&kn02_lock, flags);
 
         /* Preset write-only bits of the Control Register cache. */
-        cached_kn02_csr = *csr | KN03_CSR_LEDS;
+        cached_kn02_csr = *csr | KN02_CSR_LEDS;
 
         /* Set normal ECC detection and generation. */
         cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN);
@@ -250,7 +251,7 @@ static inline void dec_kn02_be_init(void)
 static inline void dec_kn03_be_init(void)
 {
         volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR);
-        volatile u32 *mbcs = (void *)(KN03_SLOT_BASE + KN05_MB_CSR);
+        volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR);
 
         kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR);
         kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN);
@@ -265,7 +266,7 @@ static inline void dec_kn03_be_init(void)
         *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) |
                KN03_MCR_CORRECT;
         if (current_cpu_data.cputype == CPU_R4400SC)
-                *mbcs |= KN05_MB_CSR_EE;
+                *mbcs |= KN4K_MB_CSR_EE;
         fast_iob();
 }
 
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index e0bfcd1521..644085e104 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -4,7 +4,7 @@
  *      DECstation 5000/200 (KN02) Control and Status Register
  *      interrupts.
  *
- *      Copyright (c) 2002, 2003  Maciej W. Rozycki
+ *      Copyright (c) 2002, 2003, 2005  Maciej W. Rozycki
  *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
@@ -111,7 +111,7 @@ void __init init_kn02_irqs(int base)
 
         /* Mask interrupts. */
         spin_lock_irqsave(&kn02_lock, flags);
-        cached_kn02_csr &= ~KN03_CSR_IOINTEN;
+        cached_kn02_csr &= ~KN02_CSR_IOINTEN;
         *csr = cached_kn02_csr;
         iob();