[MFD] Add code UCB1200/UCB1300 device support

Add the core device support code for the Philips UCB1200 and
UCB1300 devices.  Also includes the following from Pavel:

This fixes u32 vs. pm_message_t confusion and uses cleaner
try_to_freeze() [fixing compilation as a side-effect on newer
kernels.]

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

4 files changed, 927 insertions, 0 deletions

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1588a59e37..1f8563bde4 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -13,4 +13,9 @@ config MCP_SA11X0
         depends on ARCH_SA1100
         select MCP
 
+# Chip drivers
+config MCP_UCB1200
+        tristate "Support for UCB1200 / UCB1300"
+        depends on MCP
+
 endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 98bdd6a421..90815b2840 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_MCP)               += mcp-core.o
 obj-$(CONFIG_MCP_SA11X0)        += mcp-sa11x0.o
+obj-$(CONFIG_MCP_UCB1200)       += ucb1x00-core.o
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
new file mode 100644
index 0000000000..10f6ce1bc0
--- /dev/null
+++ b/drivers/mfd/ucb1x00-core.c
@@ -0,0 +1,665 @@
+/*
+ *  linux/drivers/mfd/ucb1x00-core.c
+ *
+ *  Copyright (C) 2001 Russell King, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ *
+ *  The UCB1x00 core driver provides basic services for handling IO,
+ *  the ADC, interrupts, and accessing registers.  It is designed
+ *  such that everything goes through this layer, thereby providing
+ *  a consistent locking methodology, as well as allowing the drivers
+ *  to be used on other non-MCP-enabled hardware platforms.
+ *
+ *  Note that all locks are private to this file.  Nothing else may
+ *  touch them.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+
+#include <asm/dma.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+
+#include "ucb1x00.h"
+
+static DECLARE_MUTEX(ucb1x00_sem);
+static LIST_HEAD(ucb1x00_drivers);
+static LIST_HEAD(ucb1x00_devices);
+
+/**
+ *      ucb1x00_io_set_dir - set IO direction
+ *      @ucb: UCB1x00 structure describing chip
+ *      @in:  bitfield of IO pins to be set as inputs
+ *      @out: bitfield of IO pins to be set as outputs
+ *
+ *      Set the IO direction of the ten general purpose IO pins on
+ *      the UCB1x00 chip.  The @in bitfield has priority over the
+ *      @out bitfield, in that if you specify a pin as both input
+ *      and output, it will end up as an input.
+ *
+ *      ucb1x00_enable must have been called to enable the comms
+ *      before using this function.
+ *
+ *      This function takes a spinlock, disabling interrupts.
+ */
+void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&ucb->io_lock, flags);
+        ucb->io_dir |= out;
+        ucb->io_dir &= ~in;
+
+        ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
+        spin_unlock_irqrestore(&ucb->io_lock, flags);
+}
+
+/**
+ *      ucb1x00_io_write - set or clear IO outputs
+ *      @ucb:   UCB1x00 structure describing chip
+ *      @set:   bitfield of IO pins to set to logic '1'
+ *      @clear: bitfield of IO pins to set to logic '0'
+ *
+ *      Set the IO output state of the specified IO pins.  The value
+ *      is retained if the pins are subsequently configured as inputs.
+ *      The @clear bitfield has priority over the @set bitfield -
+ *      outputs will be cleared.
+ *
+ *      ucb1x00_enable must have been called to enable the comms
+ *      before using this function.
+ *
+ *      This function takes a spinlock, disabling interrupts.
+ */
+void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&ucb->io_lock, flags);
+        ucb->io_out |= set;
+        ucb->io_out &= ~clear;
+
+        ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
+        spin_unlock_irqrestore(&ucb->io_lock, flags);
+}
+
+/**
+ *      ucb1x00_io_read - read the current state of the IO pins
+ *      @ucb: UCB1x00 structure describing chip
+ *
+ *      Return a bitfield describing the logic state of the ten
+ *      general purpose IO pins.
+ *
+ *      ucb1x00_enable must have been called to enable the comms
+ *      before using this function.
+ *
+ *      This function does not take any semaphores or spinlocks.
+ */
+unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
+{
+        return ucb1x00_reg_read(ucb, UCB_IO_DATA);
+}
+
+/*
+ * UCB1300 data sheet says we must:
+ *  1. enable ADC       => 5us (including reference startup time)
+ *  2. select input     => 51*tsibclk  => 4.3us
+ *  3. start conversion => 102*tsibclk => 8.5us
+ * (tsibclk = 1/11981000)
+ * Period between SIB 128-bit frames = 10.7us
+ */
+
+/**
+ *      ucb1x00_adc_enable - enable the ADC converter
+ *      @ucb: UCB1x00 structure describing chip
+ *
+ *      Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
+ *      Any code wishing to use the ADC converter must call this
+ *      function prior to using it.
+ *
+ *      This function takes the ADC semaphore to prevent two or more
+ *      concurrent uses, and therefore may sleep.  As a result, it
+ *      can only be called from process context, not interrupt
+ *      context.
+ *
+ *      You should release the ADC as soon as possible using
+ *      ucb1x00_adc_disable.
+ */
+void ucb1x00_adc_enable(struct ucb1x00 *ucb)
+{
+        down(&ucb->adc_sem);
+
+        ucb->adc_cr |= UCB_ADC_ENA;
+
+        ucb1x00_enable(ucb);
+        ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
+}
+
+/**
+ *      ucb1x00_adc_read - read the specified ADC channel
+ *      @ucb: UCB1x00 structure describing chip
+ *      @adc_channel: ADC channel mask
+ *      @sync: wait for syncronisation pulse.
+ *
+ *      Start an ADC conversion and wait for the result.  Note that
+ *      synchronised ADC conversions (via the ADCSYNC pin) must wait
+ *      until the trigger is asserted and the conversion is finished.
+ *
+ *      This function currently spins waiting for the conversion to
+ *      complete (2 frames max without sync).
+ *
+ *      If called for a synchronised ADC conversion, it may sleep
+ *      with the ADC semaphore held.
+ */
+unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
+{
+        unsigned int val;
+
+        if (sync)
+                adc_channel |= UCB_ADC_SYNC_ENA;
+
+        ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
+        ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
+
+        for (;;) {
+                val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
+                if (val & UCB_ADC_DAT_VAL)
+                        break;
+                /* yield to other processes */
+                set_current_state(TASK_INTERRUPTIBLE);
+                schedule_timeout(1);
+        }
+
+        return UCB_ADC_DAT(val);
+}
+
+/**
+ *      ucb1x00_adc_disable - disable the ADC converter
+ *      @ucb: UCB1x00 structure describing chip
+ *
+ *      Disable the ADC converter and release the ADC semaphore.
+ */
+void ucb1x00_adc_disable(struct ucb1x00 *ucb)
+{
+        ucb->adc_cr &= ~UCB_ADC_ENA;
+        ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
+        ucb1x00_disable(ucb);
+