blob: d357b6c8134b7833f13113cd64107fbc8888e85f (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
|
/*
* wm9713.h -- WM9713 Soc Audio driver
*/
#ifndef _WM9713_H
#define _WM9713_H
/* clock inputs */
#define WM9713_CLKA_PIN 0
#define WM9713_CLKB_PIN 1
/* clock divider ID's */
#define WM9713_PCMCLK_DIV 0
#define WM9713_CLKA_MULT 1
#define WM9713_CLKB_MULT 2
#define WM9713_HIFI_DIV 3
#define WM9713_PCMBCLK_DIV 4
#define WM9713_PCMCLK_PLL_DIV 5
#define WM9713_HIFI_PLL_DIV 6
/* Calculate the appropriate bit mask for the external PCM clock divider */
#define WM9713_PCMDIV(x) ((x - 1) << 8)
/* Calculate the appropriate bit mask for the external HiFi clock divider */
#define WM9713_HIFIDIV(x) ((x - 1) << 12)
/* MCLK clock mulitipliers */
#define WM9713_CLKA_X1 (0 << 1)
#define WM9713_CLKA_X2 (1 << 1)
#define WM9713_CLKB_X1 (0 << 2)
#define WM9713_CLKB_X2 (1 << 2)
/* MCLK clock MUX */
#define WM9713_CLK_MUX_A (0 << 0)
#define WM9713_CLK_MUX_B (1 << 0)
/* Voice DAI BCLK divider */
#define WM9713_PCMBCLK_DIV_1 (0 << 9)
#define WM9713_PCMBCLK_DIV_2 (1 << 9)
#define WM9713_PCMBCLK_DIV_4 (2 << 9)
#define WM9713_PCMBCLK_DIV_8 (3 << 9)
#define WM9713_PCMBCLK_DIV_16 (4 << 9)
#define WM9713_DAI_AC97_HIFI 0
#define WM9713_DAI_AC97_AUX 1
#define WM9713_DAI_PCM_VOICE 2
extern struct snd_soc_codec_device soc_codec_dev_wm9713;
extern struct snd_soc_codec_dai wm9713_dai[3];
int wm9713_reset(struct snd_soc_codec *codec, int try_warm);
#endif
|
