/*
* Host communication command constants for ChromeOS EC
*
* Copyright (C) 2012 Google, Inc
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* The ChromeOS EC multi function device is used to mux all the requests
* to the EC device for its multiple features: keyboard controller,
* battery charging and regulator control, firmware update.
*
* NOTE: This file is copied verbatim from the ChromeOS EC Open Source
* project in an attempt to make future updates easy to make.
*/
#ifndef __CROS_EC_COMMANDS_H
#define __CROS_EC_COMMANDS_H
/*
* Protocol overview
*
* request: CMD [ P0 P1 P2 ... Pn S ]
* response: ERR [ P0 P1 P2 ... Pn S ]
*
* where the bytes are defined as follow :
* - CMD is the command code. (defined by EC_CMD_ constants)
* - ERR is the error code. (defined by EC_RES_ constants)
* - Px is the optional payload.
* it is not sent if the error code is not success.
* (defined by ec_params_ and ec_response_ structures)
* - S is the checksum which is the sum of all payload bytes.
*
* On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
* and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
* On I2C, all bytes are sent serially in the same message.
*/
/* Current version of this protocol */
#define EC_PROTO_VERSION 0x00000002
/* Command version mask */
#define EC_VER_MASK(version) (1UL << (version))
/* I/O addresses for ACPI commands */
#define EC_LPC_ADDR_ACPI_DATA 0x62
#define EC_LPC_ADDR_ACPI_CMD 0x66
/* I/O addresses for host command */
#define EC_LPC_ADDR_HOST_DATA 0x200
#define EC_LPC_ADDR_HOST_CMD 0x204
/* I/O addresses for host command args and params */
#define EC_LPC_ADDR_HOST_ARGS 0x800
#define EC_LPC_ADDR_HOST_PARAM 0x804
#define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */
/* I/O addresses for host command params, old interface */
#define EC_LPC_ADDR_OLD_PARAM 0x880
#define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */
/* EC command register bit functions */
#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
#define EC_LPC_ADDR_MEMMAP 0x900
#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
/* The offset address of each type of data in mapped memory. */
#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */
#define EC_MEMMAP_FAN 0x10 /* Fan speeds */
#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */
#define EC_MEMMAP_ID 0x20 /* 'E' 'C' */
#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */
#define EC_MEMMAP_SWITCHES 0x30
#define EC_MEMMAP_HOST_EVENTS 0x34
#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
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