1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
|
/* exynos_drm.h
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* Authors:
* Inki Dae <inki.dae@samsung.com>
* Joonyoung Shim <jy0922.shim@samsung.com>
* Seung-Woo Kim <sw0312.kim@samsung.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _EXYNOS_DRM_H_
#define _EXYNOS_DRM_H_
#include <uapi/drm/exynos_drm.h>
/**
* A structure for lcd panel information.
*
* @timing: default video mode for initializing
* @width_mm: physical size of lcd width.
* @height_mm: physical size of lcd height.
*/
struct exynos_drm_panel_info {
struct fb_videomode timing;
u32 width_mm;
u32 height_mm;
};
/**
* Platform Specific Structure for DRM based FIMD.
*
* @panel: default panel info for initializing
* @default_win: default window layer number to be used for UI.
* @bpp: default bit per pixel.
*/
struct exynos_drm_fimd_pdata {
struct exynos_drm_panel_info panel;
u32 vidcon0;
u32 vidcon1;
unsigned int default_win;
unsigned int bpp;
};
/**
* Platform Specific Structure for DRM based HDMI.
*
* @hdmi_dev: device point to specific hdmi driver.
* @mixer_dev: device point to specific mixer driver.
*
* this structure is used for common hdmi driver and each device object
* would be used to access specific device driver(hdmi or mixer driver)
*/
struct exynos_drm_common_hdmi_pd {
struct device *hdmi_dev;
struct device *mixer_dev;
};
/**
* Platform Specific Structure for DRM based HDMI core.
*
* @is_v13: set if hdmi version 13 is.
* @cfg_hpd: function pointer to configure hdmi hotplug detection pin
* @get_hpd: function pointer to get value of hdmi hotplug detection pin
*/
struct exynos_drm_hdmi_pdata {
bool is_v13;
void (*cfg_hpd)(bool external);
int (*get_hpd)(void);
};
/**
* Platform Specific Structure for DRM based IPP.
*
* @inv_pclk: if set 1. invert pixel clock
* @inv_vsync: if set 1. invert vsync signal for wb
* @inv_href: if set 1. invert href signal
* @inv_hsync: if set 1. invert hsync signal for wb
*/
struct exynos_drm_ipp_pol {
unsigned int inv_pclk;
unsigned int inv_vsync;
unsigned int inv_href;
unsigned int inv_hsync;
};
/**
* Platform Specific Structure for DRM based FIMC.
*
* @pol: current hardware block polarity settings.
* @clk_rate: current hardware clock rate.
*/
struct exynos_drm_fimc_pdata {
struct exynos_drm_ipp_pol pol;
int clk_rate;
};
#endif /* _EXYNOS_DRM_H_ */
|