blob: 17e129fe459c61bd30b417df5864fe88bb5972c8 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
#ifndef __ASM_SH_TRAPS_32_H
#define __ASM_SH_TRAPS_32_H
#include <linux/types.h>
#include <asm/mmu.h>
#ifdef CONFIG_CPU_HAS_SR_RB
#define lookup_exception_vector() \
({ \
unsigned long _vec; \
\
__asm__ __volatile__ ( \
"stc r2_bank, %0\n\t" \
: "=r" (_vec) \
); \
\
_vec; \
})
#else
#define lookup_exception_vector() \
({ \
unsigned long _vec; \
__asm__ __volatile__ ( \
"mov r4, %0\n\t" \
: "=r" (_vec) \
); \
\
_vec; \
})
#endif
static inline void trigger_address_error(void)
{
__asm__ __volatile__ (
"ldc %0, sr\n\t"
"mov.l @%1, %0"
:
: "r" (0x10000000), "r" (0x80000001)
);
}
asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long writeaccess,
unsigned long address);
asmlinkage void do_divide_error(unsigned long r4);
asmlinkage void do_reserved_inst(void);
asmlinkage void do_illegal_slot_inst(void);
asmlinkage void do_exception_error(void);
#define BUILD_TRAP_HANDLER(name) \
asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
unsigned long r6, unsigned long r7, \
struct pt_regs __regs)
#define TRAP_HANDLER_DECL \
struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \
unsigned int vec = regs->tra; \
(void)vec;
#endif /* __ASM_SH_TRAPS_32_H */
|