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/*
* arch/sh/drivers/pci/pci.c
*
* Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org>
* Copyright (c) 2004 - 2006 Paul Mundt <lethal@linux-sh.org>
*
* These functions are collected here to reduce duplication of common
* code amongst the many platform-specific PCI support code files.
*
* These routines require the following board-specific routines:
* void pcibios_fixup_irqs();
*
* See include/asm-sh/pci.h for more information.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/dma-debug.h>
#include <asm/io.h>
static int __init pcibios_init(void)
{
struct pci_channel *p;
struct pci_bus *bus;
int busno;
/* init channels */
busno = 0;
for (p = board_pci_channels; p->init; p++) {
if (p->init(p) == 0)
p->enabled = 1;
else
pr_err("Unable to init pci channel %d\n", busno);
busno++;
}
#ifdef CONFIG_PCI_AUTO
/* assign resources */
busno = 0;
for (p = board_pci_channels; p->init; p++)
if (p->enabled)
busno = pciauto_assign_resources(busno, p) + 1;
#endif
/* scan the buses */
busno = 0;
for (p = board_pci_channels; p->init; p++) {
if (p->enabled) {
bus = pci_scan_bus(busno, p->pci_ops, p);
busno = bus->subordinate + 1;
}
}
pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
dma_debug_add_bus(&pci_bus_type);
return 0;
}
subsys_initcall(pcibios_init);
/*
* Called after each bus is probed, but before its children
* are examined.
*/
void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
{
pci_read_bridge_bases(bus);
}
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res)
{
region->start = res->start;
region->end = res->end;
}
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
{
res->start = region->start;
res->end = region->end;
}
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
u16 cmd, old_cmd;
int idx;
struct resource *r;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
for(idx=0; idx<6; idx++) {
if (!(mask & (1 << idx)))
continue;
r = &dev->resource[idx];
if (!r->start && r->end) {
printk(KERN_ERR "PCI: Device %s not available because "
"of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
cmd |= PCI_COMMAND_IO;
if (r->flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
if (dev->resource[PCI_ROM_RESOURCE].start)
cmd |= PCI_COMMAND_MEMORY;
if (cmd != old_cmd) {
printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
pci_name(dev), old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
}
/*
* If we set up a device for bus mastering, we need to check and set
* the latency timer as it may not be properly set.
*/
static unsigned int pcibios_max_latency = 255;
void pcibios_set_master(struct pci_dev *dev)
{
u8 lat;
pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
if (lat < 16)
lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
else if (lat > pcibios_max_latency)
lat = pcibios_max_latency;
else
return;
printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
pci_name(dev), lat);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
}
void __init pcibios_update_irq(struct pci_dev *dev, int irq)
{
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}
EXPORT_SYMBOL(board_pci_channels);
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