aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kernel/process.c
blob: b9d88374f14f07abe21e51367110e6c82129ba99 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
/*
 *  Derived from "arch/i386/kernel/process.c"
 *    Copyright (C) 1995  Linus Torvalds
 *
 *  Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
 *  Paul Mackerras (paulus@cs.anu.edu.au)
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/elf.h>
#include <linux/init.h>
#include <linux/prctl.h>
#include <linux/init_task.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
#include <linux/mqueue.h>
#include <linux/hardirq.h>
#include <linux/utsname.h>

#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/syscalls.h>
#ifdef CONFIG_PPC64
#include <asm/firmware.h>
#endif

extern unsigned long _get_SP(void);

#ifndef CONFIG_SMP
struct task_struct *last_task_used_math = NULL;
struct task_struct *last_task_used_altivec = NULL;
struct task_struct *last_task_used_spe = NULL;
#endif

/*
 * Make sure the floating-point register state in the
 * the thread_struct is up to date for task tsk.
 */
void flush_fp_to_thread(struct task_struct *tsk)
{
	if (tsk->thread.regs) {
		/*
		 * We need to disable preemption here because if we didn't,
		 * another process could get scheduled after the regs->msr
		 * test but before we have finished saving the FP registers
		 * to the thread_struct.  That process could take over the
		 * FPU, and then when we get scheduled again we would store
		 * bogus values for the remaining FP registers.
		 */
		preempt_disable();
		if (tsk->thread.regs->msr & MSR_FP) {
#ifdef CONFIG_SMP
			/*
			 * This should only ever be called for current or
			 * for a stopped child process.  Since we save away
			 * the FP register state on context switch on SMP,
			 * there is something wrong if a stopped child appears
			 * to still have its FP state in the CPU registers.
			 */
			BUG_ON(tsk != current);
#endif
			giveup_fpu(tsk);
		}
		preempt_enable();
	}
}

void enable_kernel_fp(void)
{
	WARN_ON(preemptible());

#ifdef CONFIG_SMP
	if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
		giveup_fpu(current);
	else
		giveup_fpu(NULL);	/* just enables FP for kernel */
#else
	giveup_fpu(last_task_used_math);
#endif /* CONFIG_SMP */
}
EXPORT_SYMBOL(enable_kernel_fp);

int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
{
	if (!tsk->thread.regs)
		return 0;
	flush_fp_to_thread(current);

	memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));

	return 1;
}

#ifdef CONFIG_ALTIVEC
void enable_kernel_altivec(void)
{
	WARN_ON(preemptible());

#ifdef CONFIG_SMP
	if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
		giveup_altivec(current);
	else
		giveup_altivec(NULL);	/* just enable AltiVec for kernel - force */
#else
	giveup_altivec(last_task_used_altivec);
#endif /* CONFIG_SMP */
}
EXPORT_SYMBOL(enable_kernel_altivec);

/*
 * Make sure the VMX/Altivec register state in the
 * the thread_struct is up to date for task tsk.
 */
void flush_altivec_to_thread(struct task_struct *tsk)
{
	if (tsk->thread.regs) {
		preempt_disable();
		if (tsk->thread.regs->msr & MSR_VEC) {
#ifdef CONFIG_SMP
			BUG_ON(tsk != current);
#endif
			giveup_altivec(tsk);
		}
		preempt_enable();
	}
}

int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
{
	/* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
	 * separately, see below */
	const int nregs = ELF_NVRREG - 2;
	elf_vrreg_t *reg;
	u32 *dest;

	if (tsk == current)
		flush_altivec_to_thread(tsk);

	reg = (elf_vrreg_t *)vrregs;

	/* copy the 32 vr registers */
	memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
	reg += nregs;

	/* copy the vscr */
	memcpy(reg, &tsk->thread.vscr, sizeof(*reg));
	reg++;

	/* vrsave is stored in the high 32bit slot of the final 128bits */
	memset(reg, 0, sizeof(*reg));
	dest = (u32 *)reg;
	*dest = tsk->thread.vrsave;

	return 1;
}
#endif /* CONFIG_ALTIVEC */

#ifdef CONFIG_SPE

void enable_kernel_spe(void)
{
	WARN_ON(preemptible());

#ifdef CONFIG_SMP
	if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
		giveup_spe(current);
	else
		giveup_spe(NULL);	/* just enable SPE for kernel - force */
#else
	giveup_spe(last_task_used_spe);
#endif /* __SMP __ */
}
EXPORT_SYMBOL(enable_kernel_spe);

void flush_spe_to_thread(struct task_struct *tsk)
{
	if (tsk->thread.regs) {
		preempt_disable();
		if (tsk->thread.regs->msr & MSR_SPE) {
#ifdef CONFIG_SMP
			BUG_ON(tsk != current);
#endif
			giveup_spe(tsk);
		}
		preempt_enable();
	}
}

int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
{
	flush_spe_to_thread(current);
	/* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
	memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
	return 1;
}
#endif /* CONFIG_SPE */

#ifndef CONFIG_SMP
/*
 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
 * and the current task has some state, discard it.
 */
void discard_lazy_cpu_state(void)
{
	preempt_disable();
	if (last_task_used_math == current)
		last_task_used_math = NULL;
#ifdef CONFIG_ALTIVEC
	if (last_task_used_altivec == current)
		last_task_used_altivec = NULL;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
	if (last_task_used_spe == current)
		last_task_used_spe = NULL;
#endif
	preempt_enable();
}
#endif /* CONFIG_SMP */

int set_dabr(unsigned long dabr)
{
#ifdef CONFIG_PPC_MERGE		/* XXX for now */
	if (ppc_md.set_dabr)
		return ppc_md.set_dabr(dabr);
#endif

	/* XXX should we have a CPU_FTR_HAS_DABR ? */
#if defined(CONFIG_PPC64) || defined(CONFIG_6xx)
	mtspr(SPRN_DABR, dabr);
#endif
	return 0;
}

#ifdef CONFIG_PPC64
DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
#endif

static DEFINE_PER_CPU(unsigned long, current_dabr);

struct task_struct *__switch_to(struct task_struct *prev,
	struct task_struct *new)
{
	struct thread_struct *new_thread, *old_thread;
	unsigned long flags;
	struct task_struct *last;

#ifdef CONFIG_SMP
	/* avoid complexity of lazy save/restore of fpu
	 * by just saving it every time we switch out if
	 * this task used the fpu during the last quantum.
	 *
	 * If it tries to use the fpu again, it'll trap and
	 * reload its fp regs.  So we don't have to do a restore
	 * every switch, just a save.
	 *  -- Cort
	 */
	if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
		giveup_fpu(prev);
#ifdef CONFIG_ALTIVEC
	/*
	 * If the previous thread used altivec in the last quantum
	 * (thus changing altivec regs) then save them.
	 * We used to check the VRSAVE register but not all apps
	 * set it, so we don't rely on it now (and in fact we need
	 * to save & restore VSCR even if VRSAVE == 0).  -- paulus
	 *
	 * On SMP we always save/restore altivec regs just to avoid the
	 * complexity of changing processors.
	 *  -- Cort
	 */
	if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
		giveup_altivec(prev);
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
	/*
	 * If the previous thread used spe in the last quantum
	 * (thus changing spe regs) then save them.
	 *
	 * On SMP we always save/restore spe regs just to avoid the
	 * complexity of changing processors.
	 */
	if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
		giveup_spe(prev);
#endif /* CONFIG_SPE */

#else  /* CONFIG_SMP */
#ifdef CONFIG_ALTIVEC
	/* Avoid the trap.  On smp this this never happens since
	 * we don't set last_task_used_altivec -- Cort
	 */
	if (new->thread.regs && last_task_used_altivec == new)
		new->thread.regs->msr |= MSR_VEC;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
	/* Avoid the trap.  On smp this this never happens since
	 * we don't set last_task_used_spe
	 */
	if (new->thread.regs && last_task_used_spe == new)
		new->thread.regs->msr |= MSR_SPE;
#endif /* CONFIG_SPE */

#endif /* CONFIG_SMP */

	if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) {
		set_dabr(new->thread.dabr);
		__get_cpu_var(current_dabr) = new->thread.dabr;
	}

	new_thread = &new->thread;
	old_thread = &current->thread;

#ifdef CONFIG_PPC64
	/*
	 * Collect processor utilization data per process
	 */
	if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
		struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
		long unsigned start_tb, current_tb;
		start_tb = old_thread->start_tb;
		cu->current_tb = current_tb = mfspr(SPRN_PURR);
		old_thread->accum_tb += (current_tb - start_tb);
		new_thread->start_tb = current_tb;
	}
#endif

	local_irq_save(flags);

	account_system_vtime(current);
	account_process_vtime(current);
	calculate_steal_time();

	last = _switch(old_thread, new_thread);

	local_irq_restore(flags);

	return last;
}

static int instructions_to_print = 16;

static void show_instructions(struct pt_regs *regs)
{
	int i;
	unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
			sizeof(int));

	printk("Instruction dump:");

	for (i = 0; i < instructions_to_print; i++) {
		int instr;

		if (!(i % 8))
			printk("\n");

#if !defined(CONFIG_BOOKE)
		/* If executing with the IMMU off, adjust pc rather
		 * than print XXXXXXXX.
		 */
		if (!(regs->msr & MSR_IR))
			pc = (unsigned long)phys_to_virt(pc);
#endif

		/* We use __get_user here *only* to avoid an OOPS on a
		 * bad address because the pc *should* only be a
		 * kernel address.
		 */
		if (!__kernel_text_address(pc) ||
		     __get_user(instr, (unsigned int __user *)pc)) {
			printk("XXXXXXXX ");
		} else {
			if (regs->nip == pc)
				printk("<%08x> ", instr);
			else
				printk("%08x ", instr);
		}

		pc += sizeof(int);
	}

	printk("\n");
}

static struct regbit {
	unsigned long bit;
	const char *name;
} msr_bits[] = {
	{MSR_EE,	"EE"},
	{MSR_PR,	"PR"},
	{MSR_FP,	"FP"},
	{MSR_ME,	"ME"},
	{MSR_IR,	"IR"},
	{MSR_DR,	"DR"},
	{0,		NULL}
};

static void printbits(unsigned long val, struct regbit *bits)
{
	const char *sep = "";

	printk("<");
	for (; bits->bit; ++bits)
		if (val & bits->bit) {
			printk("%s%s", sep, bits->name);
			sep = ",";
		}
	printk(">");
}

#ifdef CONFIG_PPC64
#define REG		"%016lx"
#define REGS_PER_LINE	4
#define LAST_VOLATILE	13
#else
#define REG		"%08lx"
#define REGS_PER_LINE	8
#define LAST_VOLATILE	12
#endif

void show_regs(struct pt_regs * regs)
{
	int i, trap;

	printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
	       regs->nip, regs->link, regs->ctr);
	printk("REGS: %p TRAP: %04lx   %s  (%s)\n",
	       regs, regs->trap, print_tainted(), init_utsname()->release);
	printk("MSR: "REG" ", regs->msr);
	printbits(regs->msr, msr_bits);
	printk("  CR: %08lx  XER: %08lx\n", regs->ccr, regs->xer);
	trap = TRAP(regs);
	if (trap == 0x300 || trap == 0x600)
#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
		printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
#else
		printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
#endif
	printk("TASK = %p[%d] '%s' THREAD: %p",
	       current, task_pid_nr(current), current->comm, task_thread_info(current));

#ifdef CONFIG_SMP
	printk(" CPU: %d", smp_processor_id());
#endif /* CONFIG_SMP */

	for (i = 0;  i < 32;  i++) {
		if ((i % REGS_PER_LINE) == 0)
			printk("\n" KERN_INFO "GPR%02d: ", i);
		printk(REG " ", regs->gpr[i]);
		if (i == LAST_VOLATILE && !FULL_REGS(regs))
			break;
	}
	printk("\n");
#ifdef CONFIG_KALLSYMS
	/*
	 * Lookup NIP late so we have the best change of getting the
	 * above info out without failing
	 */
	printk("NIP ["REG"] ", regs->nip);
	print_symbol("%s\n", regs->nip);
	printk("LR ["REG"] ", regs->link);
	print_symbol("%s\n", regs->link);
#endif
	show_stack(current, (unsigned long *) regs->gpr[1]);
	if (!user_mode(regs))
		show_instructions(regs);
}

void exit_thread(void)
{
	discard_lazy_cpu_state();
}

void flush_thread(void)
{
#ifdef CONFIG_PPC64
	struct thread_info *t = current_thread_info();

	if (test_ti_thread_flag(t, TIF_ABI_PENDING)) {
		clear_ti_thread_flag(t, TIF_ABI_PENDING);
		if (test_ti_thread_flag(t, TIF_32BIT))
			clear_ti_thread_flag(t, TIF_32BIT);
		else
			set_ti_thread_flag(t, TIF_32BIT);
	}
#endif

	discard_lazy_cpu_state();

	if (current->thread.dabr) {
		current->thread.dabr = 0;
		set_dabr(0);
	}
}

void
release_thread(struct task_struct *t)
{
}

/*
 * This gets called before we allocate a new thread and copy
 * the current task into it.
 */
void prepare_to_copy(struct task_struct *tsk)
{
	flush_fp_to_thread(current);
	flush_altivec_to_thread(current);
	flush_spe_to_thread(current);
}

/*
 * Copy a thread..
 */
int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
		unsigned long unused, struct task_struct *p,
		struct pt_regs *regs)
{
	struct pt_regs *childregs, *kregs;
	extern void ret_from_fork(void);
	unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;

	CHECK_FULL_REGS(regs);
	/* Copy registers */
	sp -= sizeof(struct pt_regs);
	childregs = (struct pt_regs *) sp;
	*childregs = *regs;
	if ((childregs->msr & MSR_PR) == 0) {
		/* for kernel thread, set `current' and stackptr in new task */
		childregs->gpr[1] = sp + sizeof(struct pt_regs);
#ifdef CONFIG_PPC32
		childregs->gpr[2] = (unsigned long) p;
#else
		clear_tsk_thread_flag(p, TIF_32BIT);
#endif
		p->thread.regs = NULL;	/* no user register state */
	} else {
		childregs->gpr[1] = usp;
		p->thread.regs = childregs;
		if (clone_flags & CLONE_SETTLS) {
#ifdef CONFIG_PPC64
			if (!test_thread_flag(TIF_32BIT))
				childregs->gpr[13] = childregs->gpr[6];
			else
#endif
				childregs->gpr[2] = childregs->gpr[6];
		}
	}
	childregs->gpr[3] = 0;  /* Result from fork() */
	sp -= STACK_FRAME_OVERHEAD;

	/*
	 * The way this works is that at some point in the future
	 * some task will call _switch to switch to the new task.
	 * That will pop off the stack frame created below and start
	 * the new task running at ret_from_fork.  The new task will
	 * do some house keeping and then return from the fork or clone
	 * system call, using the stack frame created above.
	 */
	sp -= sizeof(struct pt_regs);
	kregs = (struct pt_regs *) sp;
	sp -= STACK_FRAME_OVERHEAD;
	p->thread.ksp = sp;

#ifdef CONFIG_PPC64
	if (cpu_has_feature(CPU_FTR_SLB)) {
		unsigned long sp_vsid;
		unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;

		if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
			sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
				<< SLB_VSID_SHIFT_1T;
		else
			sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
				<< SLB_VSID_SHIFT;
		sp_vsid |= SLB_VSID_KERNEL | llp;
		p->thread.ksp_vsid = sp_vsid;
	}

	/*
	 * The PPC64 ABI makes use of a TOC to contain function 
	 * pointers.  The function (ret_from_except) is actually a pointer
	 * to the TOC entry.  The first entry is a pointer to the actual
	 * function.
 	 */
	kregs->nip = *((unsigned long *)ret_from_fork);
#else
	kregs->nip = (unsigned long)ret_from_fork;
#endif

	return 0;
}

/*
 * Set up a thread for executing a new program
 */
void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
{
#ifdef CONFIG_PPC64
	unsigned long load_addr = regs->gpr[2];	/* saved by ELF_PLAT_INIT */
#endif

	set_fs(USER_DS);

	/*
	 * If we exec out of a kernel thread then thread.regs will not be
	 * set.  Do it now.
	 */
	if (!current->thread.regs) {
		struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
		current->thread.regs = regs - 1;
	}

	memset(regs->gpr, 0, sizeof(regs->gpr));
	regs->ctr = 0;
	regs->link = 0;
	regs->xer = 0;
	regs->ccr = 0;
	regs->gpr[1] = sp;

	/*
	 * We have just cleared all the nonvolatile GPRs, so make
	 * FULL_REGS(regs) return true.  This is necessary to allow
	 * ptrace to examine the thread immediately after exec.
	 */
	regs->trap &= ~1UL;

#ifdef CONFIG_PPC32
	regs->mq = 0;
	regs->nip = start;
	regs->msr = MSR_USER;
#else
	if (!test_thread_flag(TIF_32BIT)) {
		unsigned long entry, toc;

		/* start is a relocated pointer to the function descriptor for
		 * the elf _start routine.  The first entry in the function
		 * descriptor is the entry address of _start and the second
		 * entry is the TOC value we need to use.
		 */
		__get_user(entry, (unsigned long __user *)start);
		__get_user(toc, (unsigned long __user *)start+1);

		/* Check whether the e_entry function descriptor entries
		 * need to be relocated before we can use them.
		 */
		if (load_addr != 0) {
			entry += load_addr;
			toc   += load_addr;
		}
		regs->nip = entry;
		regs->gpr[2] = toc;
		regs->msr = MSR_USER64;
	} else {
		regs->nip = start;
		regs->gpr[2] = 0;
		regs->msr = MSR_USER32;
	}
#endif

	discard_lazy_cpu_state();
	memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
	current->thread.fpscr.val = 0;
#ifdef CONFIG_ALTIVEC
	memset(current->thread.vr, 0, sizeof(current->thread.vr));
	memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
	current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
	current->thread.vrsave = 0;
	current->thread.used_vr = 0;
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
	memset(current->thread.evr, 0, sizeof(current->thread.evr));
	current->thread.acc = 0;
	current->thread.spefscr = 0;
	current->thread.used_spe = 0;
#endif /* CONFIG_SPE */
}

#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
		| PR_FP_EXC_RES | PR_FP_EXC_INV)

int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
{
	struct pt_regs *regs = tsk->thread.regs;

	/* This is a bit hairy.  If we are an SPE enabled  processor
	 * (have embedded fp) we store the IEEE exception enable flags in
	 * fpexc_mode.  fpexc_mode is also used for setting FP exception
	 * mode (asyn, precise, disabled) for 'Classic' FP. */
	if (val & PR_FP_EXC_SW_ENABLE) {
#ifdef CONFIG_SPE
		if (cpu_has_feature(CPU_FTR_SPE)) {
			tsk->thread.fpexc_mode = val &
				(PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
			return 0;
		} else {
			return -EINVAL;
		}
#else
		return -EINVAL;
#endif
	}

	/* on a CONFIG_SPE this does not hurt us.  The bits that
	 * __pack_fe01 use do not overlap with bits used for
	 * PR_FP_EXC_SW_ENABLE.  Additionally, the MSR[FE0,FE1] bits
	 * on CONFIG_SPE implementations are reserved so writing to
	 * them does not change anything */
	if (val > PR_FP_EXC_PRECISE)
		return -EINVAL;
	tsk->thread.fpexc_mode = __pack_fe01(val);
	if (regs != NULL && (regs->msr & MSR_FP) != 0)
		regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
			| tsk->thread.fpexc_mode;
	return 0;
}

int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
{
	unsigned int val;

	if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
#ifdef CONFIG_SPE
		if (cpu_has_feature(CPU_FTR_SPE))
			val = tsk->thread.fpexc_mode;
		else
			return -EINVAL;
#else
		return -EINVAL;
#endif
	else
		val = __unpack_fe01(tsk->thread.fpexc_mode);
	return put_user(val, (unsigned int __user *) adr);
}

int set_endian(struct task_struct *tsk, unsigned int val)
{
	struct pt_regs *regs = tsk->thread.regs;

	if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
	    (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
		return -EINVAL;

	if (regs == NULL)
		return -EINVAL;

	if (val == PR_ENDIAN_BIG)
		regs->msr &= ~MSR_LE;
	else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
		regs->msr |= MSR_LE;
	else
		return -EINVAL;

	return 0;
}

int get_endian(struct task_struct *tsk, unsigned long adr)
{
	struct pt_regs *regs = tsk->thread.regs;
	unsigned int val;

	if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
	    !cpu_has_feature(CPU_FTR_REAL_LE))
		return -EINVAL;

	if (regs == NULL)
		return -EINVAL;

	if (regs->msr & MSR_LE) {
		if (cpu_has_feature(CPU_FTR_REAL_LE))
			val = PR_ENDIAN_LITTLE;
		else
			val = PR_ENDIAN_PPC_LITTLE;
	} else
		val = PR_ENDIAN_BIG;

	return put_user(val, (unsigned int __user *)adr);
}

int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
{
	tsk->thread.align_ctl = val;
	return 0;
}

int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
{
	return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
}

#define TRUNC_PTR(x)	((typeof(x))(((unsigned long)(x)) & 0xffffffff))

int sys_clone(unsigned long clone_flags, unsigned long usp,
	      int __user *parent_tidp, void __user *child_threadptr,
	      int __user *child_tidp, int p6,
	      struct pt_regs *regs)
{
	CHECK_FULL_REGS(regs);
	if (usp == 0)
		usp = regs->gpr[1];	/* stack pointer for child */
#ifdef CONFIG_PPC64
	if (test_thread_flag(TIF_32BIT)) {
		parent_tidp = TRUNC_PTR(parent_tidp);
		child_tidp = TRUNC_PTR(child_tidp);
	}
#endif
 	return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
}

int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
	     unsigned long p4, unsigned long p5, unsigned long p6,
	     struct pt_regs *regs)
{
	CHECK_FULL_REGS(regs);
	return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
}

int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
	      unsigned long p4, unsigned long p5, unsigned long p6,
	      struct pt_regs *regs)
{
	CHECK_FULL_REGS(regs);
	return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
			regs, 0, NULL, NULL);
}

int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
	       unsigned long a3, unsigned long a4, unsigned long a5,
	       struct pt_regs *regs)
{
	int error;
	char *filename;

	filename = getname((char __user *) a0);
	error = PTR_ERR(filename);
	if (IS_ERR(filename))
		goto out;
	flush_fp_to_thread(current);
	flush_altivec_to_thread(current);
	flush_spe_to_thread(current);
	error = do_execve(filename, (char __user * __user *) a1,
			  (char __user * __user *) a2, regs);
	if (error == 0) {
		task_lock(current);
		current->ptrace &= ~PT_DTRACE;
		task_unlock(current);
	}
	putname(filename);
out:
	return error;
}

#ifdef CONFIG_IRQSTACKS
static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
				  unsigned long nbytes)
{
	unsigned long stack_page;
	unsigned long cpu = task_cpu(p);

	/*
	 * Avoid crashing if the stack has overflowed and corrupted
	 * task_cpu(p), which is in the thread_info struct.
	 */
	if (cpu < NR_CPUS && cpu_possible(cpu)) {
		stack_page = (unsigned long) hardirq_ctx[cpu];
		if (sp >= stack_page + sizeof(struct thread_struct)
		    && sp <= stack_page + THREAD_SIZE - nbytes)
			return 1;

		stack_page = (unsigned long) softirq_ctx[cpu];
		if (sp >= stack_page + sizeof(struct thread_struct)
		    && sp <= stack_page + THREAD_SIZE - nbytes)
			return 1;
	}
	return 0;
}

#else
#define valid_irq_stack(sp, p, nb)	0
#endif /* CONFIG_IRQSTACKS */

int validate_sp(unsigned long sp, struct task_struct *p,
		       unsigned long nbytes)
{
	unsigned long stack_page = (unsigned long)task_stack_page(p);

	if (sp >= stack_page + sizeof(struct thread_struct)
	    && sp <= stack_page + THREAD_SIZE - nbytes)
		return 1;

	return valid_irq_stack(sp, p, nbytes);
}

#ifdef CONFIG_PPC64
#define MIN_STACK_FRAME	112	/* same as STACK_FRAME_OVERHEAD, in fact */
#define FRAME_LR_SAVE	2
#define INT_FRAME_SIZE	(sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD + 288)
#define REGS_MARKER	0x7265677368657265ul
#define FRAME_MARKER	12
#else
#define MIN_STACK_FRAME	16
#define FRAME_LR_SAVE	1
#define INT_FRAME_SIZE	(sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
#define REGS_MARKER	0x72656773ul
#define FRAME_MARKER	2
#endif

EXPORT_SYMBOL(validate_sp);

unsigned long get_wchan(struct task_struct *p)
{
	unsigned long ip, sp;
	int count = 0;

	if (!p || p == current || p->state == TASK_RUNNING)
		return 0;

	sp = p->thread.ksp;
	if (!validate_sp(sp, p, MIN_STACK_FRAME))
		return 0;

	do {
		sp = *(unsigned long *)sp;
		if (!validate_sp(sp, p, MIN_STACK_FRAME))
			return 0;
		if (count > 0) {
			ip = ((unsigned long *)sp)[FRAME_LR_SAVE];
			if (!in_sched_functions(ip))
				return ip;
		}
	} while (count++ < 16);
	return 0;
}

static int kstack_depth_to_print = 64;

void show_stack(struct task_struct *tsk, unsigned long *stack)
{
	unsigned long sp, ip, lr, newsp;
	int count = 0;
	int firstframe = 1;

	sp = (unsigned long) stack;
	if (tsk == NULL)
		tsk = current;
	if (sp == 0) {
		if (tsk == current)
			asm("mr %0,1" : "=r" (sp));
		else
			sp = tsk->thread.ksp;
	}

	lr = 0;
	printk("Call Trace:\n");
	do {
		if (!validate_sp(sp, tsk, MIN_STACK_FRAME))
			return;

		stack = (unsigned long *) sp;
		newsp = stack[0];
		ip = stack[FRAME_LR_SAVE];
		if (!firstframe || ip != lr) {
			printk("["REG"] ["REG"] ", sp, ip);
			print_symbol("%s", ip);
			if (firstframe)
				printk(" (unreliable)");
			printk("\n");
		}
		firstframe = 0;

		/*
		 * See if this is an exception frame.
		 * We look for the "regshere" marker in the current frame.
		 */
		if (validate_sp(sp, tsk, INT_FRAME_SIZE)
		    && stack[FRAME_MARKER] == REGS_MARKER) {
			struct pt_regs *regs = (struct pt_regs *)
				(sp + STACK_FRAME_OVERHEAD);
			printk("--- Exception: %lx", regs->trap);
			print_symbol(" at %s\n", regs->nip);
			lr = regs->link;
			print_symbol("    LR = %s\n", lr);
			firstframe = 1;
		}

		sp = newsp;
	} while (count++ < kstack_depth_to_print);
}

void dump_stack(void)
{
	show_stack(current, NULL);
}
EXPORT_SYMBOL(dump_stack);

#ifdef CONFIG_PPC64
void ppc64_runlatch_on(void)
{
	unsigned long ctrl;

	if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
		HMT_medium();

		ctrl = mfspr(SPRN_CTRLF);
		ctrl |= CTRL_RUNLATCH;
		mtspr(SPRN_CTRLT, ctrl);

		set_thread_flag(TIF_RUNLATCH);
	}
}

void ppc64_runlatch_off(void)
{
	unsigned long ctrl;

	if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
		HMT_medium();

		clear_thread_flag(TIF_RUNLATCH);

		ctrl = mfspr(SPRN_CTRLF);
		ctrl &= ~CTRL_RUNLATCH;
		mtspr(SPRN_CTRLT, ctrl);
	}
}
#endif
class="hl num">5 + nr))) | ((data->fan_div[nr] & 0x04) << (3 + nr)); w83781d_write_value(data, W83781D_REG_VBAT, reg); } /* Restore fan_min */ data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); mutex_unlock(&data->update_lock); return count; } static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, store_fan_div, 0); static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, store_fan_div, 1); static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, store_fan_div, 2); static ssize_t show_pwm(struct device *dev, struct device_attribute *da, char *buf) { struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct w83781d_data *data = w83781d_update_device(dev); return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); } static ssize_t show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf) { struct w83781d_data *data = w83781d_update_device(dev); return sprintf(buf, "%d\n", (int)data->pwm2_enable); } static ssize_t store_pwm(struct device *dev, struct device_attribute *da, const char *buf, size_t count) { struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct w83781d_data *data = dev_get_drvdata(dev); int nr = attr->index; u32 val; val = simple_strtoul(buf, NULL, 10); mutex_lock(&data->update_lock); data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); mutex_unlock(&data->update_lock); return count; } static ssize_t store_pwm2_enable(struct device *dev, struct device_attribute *da, const char *buf, size_t count) { struct w83781d_data *data = dev_get_drvdata(dev); u32 val, reg; val = simple_strtoul(buf, NULL, 10); mutex_lock(&data->update_lock); switch (val) { case 0: case 1: reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); w83781d_write_value(data, W83781D_REG_PWMCLK12, (reg & 0xf7) | (val << 3)); reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, (reg & 0xef) | (!val << 4)); data->pwm2_enable = val; break; default: mutex_unlock(&data->update_lock); return -EINVAL; } mutex_unlock(&data->update_lock); return count; } static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); /* only PWM2 can be enabled/disabled */ static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, show_pwm2_enable, store_pwm2_enable); static ssize_t show_sensor(struct device *dev, struct device_attribute *da, char *buf) { struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct w83781d_data *data = w83781d_update_device(dev); return sprintf(buf, "%d\n", (int)data->sens[attr->index]); } static ssize_t store_sensor(struct device *dev, struct device_attribute *da, const char *buf, size_t count) { struct sensor_device_attribute *attr = to_sensor_dev_attr(da); struct w83781d_data *data = dev_get_drvdata(dev); int nr = attr->index; u32 val, tmp; val = simple_strtoul(buf, NULL, 10); mutex_lock(&data->update_lock); switch (val) { case 1: /* PII/Celeron diode */ tmp = w83781d_read_value(data, W83781D_REG_SCFG1); w83781d_write_value(data, W83781D_REG_SCFG1, tmp | BIT_SCFG1[nr]); tmp = w83781d_read_value(data, W83781D_REG_SCFG2); w83781d_write_value(data, W83781D_REG_SCFG2, tmp | BIT_SCFG2[nr]); data->sens[nr] = val; break; case 2: /* 3904 */ tmp = w83781d_read_value(data, W83781D_REG_SCFG1); w83781d_write_value(data, W83781D_REG_SCFG1, tmp | BIT_SCFG1[nr]); tmp = w83781d_read_value(data, W83781D_REG_SCFG2); w83781d_write_value(data, W83781D_REG_SCFG2, tmp & ~BIT_SCFG2[nr]); data->sens[nr] = val; break; case W83781D_DEFAULT_BETA: dev_warn(dev, "Sensor type %d is deprecated, please use 4 " "instead\n", W83781D_DEFAULT_BETA); /* fall through */ case 4: /* thermistor */ tmp = w83781d_read_value(data, W83781D_REG_SCFG1); w83781d_write_value(data, W83781D_REG_SCFG1, tmp & ~BIT_SCFG1[nr]); data->sens[nr] = val; break; default: dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", (long) val); break; } mutex_unlock(&data->update_lock); return count; } static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_sensor, store_sensor, 0); static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_sensor, store_sensor, 1); static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_sensor, store_sensor, 2); /* Assumes that adapter is of I2C, not ISA variety. * OTHERWISE DON'T CALL THIS */ static int w83781d_detect_subclients(struct i2c_client *new_client) { int i, val1 = 0, id; int err; int address = new_client->addr; unsigned short sc_addr[2]; struct i2c_adapter *adapter = new_client->adapter; struct w83781d_data *data = i2c_get_clientdata(new_client); enum chips kind = data->type; id = i2c_adapter_id(adapter); if (force_subclients[0] == id && force_subclients[1] == address) { for (i = 2; i <= 3; i++) { if (force_subclients[i] < 0x48 || force_subclients[i] > 0x4f) { dev_err(&new_client->dev, "Invalid subclient " "address %d; must be 0x48-0x4f\n", force_subclients[i]); err = -EINVAL; goto ERROR_SC_1; } } w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, (force_subclients[2] & 0x07) | ((force_subclients[3] & 0x07) << 4)); sc_addr[0] = force_subclients[2]; } else { val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); sc_addr[0] = 0x48 + (val1 & 0x07); } if (kind != w83783s) { if (force_subclients[0] == id && force_subclients[1] == address) { sc_addr[1] = force_subclients[3]; } else { sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); } if (sc_addr[0] == sc_addr[1]) { dev_err(&new_client->dev, "Duplicate addresses 0x%x for subclients.\n", sc_addr[0]); err = -EBUSY; goto ERROR_SC_2; } } for (i = 0; i <= 1; i++) { data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]); if (!data->lm75[i]) { dev_err(&new_client->dev, "Subclient %d " "registration at address 0x%x " "failed.\n", i, sc_addr[i]); err = -ENOMEM; if (i == 1) goto ERROR_SC_3; goto ERROR_SC_2; } if (kind == w83783s) break; } return 0; /* Undo inits in case of errors */ ERROR_SC_3: i2c_unregister_device(data->lm75[0]); ERROR_SC_2: ERROR_SC_1: return err; } #define IN_UNIT_ATTRS(X) \ &sensor_dev_attr_in##X##_input.dev_attr.attr, \ &sensor_dev_attr_in##X##_min.dev_attr.attr, \ &sensor_dev_attr_in##X##_max.dev_attr.attr, \ &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ &sensor_dev_attr_in##X##_beep.dev_attr.attr #define FAN_UNIT_ATTRS(X) \ &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ &sensor_dev_attr_fan##X##_beep.dev_attr.attr #define TEMP_UNIT_ATTRS(X) \ &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ &sensor_dev_attr_temp##X##_beep.dev_attr.attr static struct attribute* w83781d_attributes[] = { IN_UNIT_ATTRS(0), IN_UNIT_ATTRS(2), IN_UNIT_ATTRS(3), IN_UNIT_ATTRS(4), IN_UNIT_ATTRS(5), IN_UNIT_ATTRS(6), FAN_UNIT_ATTRS(1), FAN_UNIT_ATTRS(2), FAN_UNIT_ATTRS(3), TEMP_UNIT_ATTRS(1), TEMP_UNIT_ATTRS(2), &dev_attr_cpu0_vid.attr, &dev_attr_vrm.attr, &dev_attr_alarms.attr, &dev_attr_beep_mask.attr, &sensor_dev_attr_beep_enable.dev_attr.attr, NULL }; static const struct attribute_group w83781d_group = { .attrs = w83781d_attributes, }; static struct attribute *w83781d_attributes_opt[] = { IN_UNIT_ATTRS(1), IN_UNIT_ATTRS(7), IN_UNIT_ATTRS(8), TEMP_UNIT_ATTRS(3), &sensor_dev_attr_pwm1.dev_attr.attr, &sensor_dev_attr_pwm2.dev_attr.attr, &sensor_dev_attr_pwm3.dev_attr.attr, &sensor_dev_attr_pwm4.dev_attr.attr, &dev_attr_pwm2_enable.attr, &sensor_dev_attr_temp1_type.dev_attr.attr, &sensor_dev_attr_temp2_type.dev_attr.attr, &sensor_dev_attr_temp3_type.dev_attr.attr, NULL }; static const struct attribute_group w83781d_group_opt = { .attrs = w83781d_attributes_opt, }; /* No clean up is done on error, it's up to the caller */ static int w83781d_create_files(struct device *dev, int kind, int is_isa) { int err; if ((err = sysfs_create_group(&dev->kobj, &w83781d_group))) return err; if (kind != w83783s) { if ((err = device_create_file(dev, &sensor_dev_attr_in1_input.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in1_min.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in1_max.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in1_alarm.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in1_beep.dev_attr))) return err; } if (kind != as99127f && kind != w83781d && kind != w83783s) { if ((err = device_create_file(dev, &sensor_dev_attr_in7_input.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in7_min.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in7_max.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in7_alarm.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in7_beep.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in8_input.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in8_min.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in8_max.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in8_alarm.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_in8_beep.dev_attr))) return err; } if (kind != w83783s) { if ((err = device_create_file(dev, &sensor_dev_attr_temp3_input.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_temp3_max.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_temp3_max_hyst.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_temp3_alarm.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_temp3_beep.dev_attr))) return err; if (kind != w83781d) { err = sysfs_chmod_file(&dev->kobj, &sensor_dev_attr_temp3_alarm.dev_attr.attr, S_IRUGO | S_IWUSR); if (err) return err; } } if (kind != w83781d && kind != as99127f) { if ((err = device_create_file(dev, &sensor_dev_attr_pwm1.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_pwm2.dev_attr)) || (err = device_create_file(dev, &dev_attr_pwm2_enable))) return err; } if (kind == w83782d && !is_isa) { if ((err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_pwm4.dev_attr))) return err; } if (kind != as99127f && kind != w83781d) { if ((err = device_create_file(dev, &sensor_dev_attr_temp1_type.dev_attr)) || (err = device_create_file(dev, &sensor_dev_attr_temp2_type.dev_attr))) return err; if (kind != w83783s) { if ((err = device_create_file(dev, &sensor_dev_attr_temp3_type.dev_attr))) return err; } } return 0; } /* Return 0 if detection is successful, -ENODEV otherwise */ static int w83781d_detect(struct i2c_client *client, int kind, struct i2c_board_info *info) { int val1 = 0, val2; struct w83781d_data *isa = w83781d_data_if_isa(); struct i2c_adapter *adapter = client->adapter; int address = client->addr; const char *client_name = ""; enum vendor { winbond, asus } vendid; if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; /* We block updates of the ISA device to minimize the risk of concurrent access to the same W83781D chip through different interfaces. */ if (isa) mutex_lock(&isa->update_lock); /* The w8378?d may be stuck in some other bank than bank 0. This may make reading other information impossible. Specify a force=... or force_*=... parameter, and the Winbond will be reset to the right bank. */ if (kind < 0) { if (i2c_smbus_read_byte_data (client, W83781D_REG_CONFIG) & 0x80) { dev_dbg(&adapter->dev, "Detection of w83781d chip " "failed at step 3\n"); goto err_nodev; } val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); /* Check for Winbond or Asus ID if in bank 0 */ if ((!(val1 & 0x07)) && (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { dev_dbg(&adapter->dev, "Detection of w83781d chip " "failed at step 4\n"); goto err_nodev; } /* If Winbond SMBus, check address at 0x48. Asus doesn't support, except for as99127f rev.2 */ if ((!(val1 & 0x80) && (val2 == 0xa3)) || ((val1 & 0x80) && (val2 == 0x5c))) { if (i2c_smbus_read_byte_data (client, W83781D_REG_I2C_ADDR) != address) { dev_dbg(&adapter->dev, "Detection of w83781d " "chip failed at step 5\n"); goto err_nodev; } } } /* We have either had a force parameter, or we have already detected the Winbond. Put it now into bank 0 and Vendor ID High Byte */ i2c_smbus_write_byte_data(client, W83781D_REG_BANK, (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) & 0x78) | 0x80); /* Determine the chip type. */ if (kind <= 0) { /* get vendor ID */ val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); if (val2 == 0x5c) vendid = winbond; else if (val2 == 0x12) vendid = asus; else { dev_dbg(&adapter->dev, "w83781d chip vendor is " "neither Winbond nor Asus\n"); goto err_nodev; } val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) kind = w83781d; else if (val1 == 0x30 && vendid == winbond) kind = w83782d; else if (val1 == 0x40 && vendid == winbond && address == 0x2d) kind = w83783s; else if (val1 == 0x31) kind = as99127f; else { if (kind == 0) dev_warn(&adapter->dev, "Ignoring 'force' " "parameter for unknown chip at " "address 0x%02x\n", address); goto err_nodev; } if ((kind == w83781d || kind == w83782d) && w83781d_alias_detect(client, val1)) { dev_dbg(&adapter->dev, "Device at 0x%02x appears to " "be the same as ISA device\n", address); goto err_nodev; } } if (isa) mutex_unlock(&isa->update_lock); if (kind == w83781d) { client_name = "w83781d"; } else if (kind == w83782d) { client_name = "w83782d"; } else if (kind == w83783s) { client_name = "w83783s"; } else if (kind == as99127f) { client_name = "as99127f"; } strlcpy(info->type, client_name, I2C_NAME_SIZE); return 0; err_nodev: if (isa) mutex_unlock(&isa->update_lock); return -ENODEV; } static int w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct device *dev = &client->dev; struct w83781d_data *data; int err; data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); if (!data) { err = -ENOMEM; goto ERROR1; } i2c_set_clientdata(client, data); mutex_init(&data->lock); mutex_init(&data->update_lock); data->type = id->driver_data; data->client = client; /* attach secondary i2c lm75-like clients */ err = w83781d_detect_subclients(client); if (err) goto ERROR3; /* Initialize the chip */ w83781d_init_device(dev); /* Register sysfs hooks */ err = w83781d_create_files(dev, data->type, 0); if (err) goto ERROR4; data->hwmon_dev = hwmon_device_register(dev); if (IS_ERR(data->hwmon_dev)) { err = PTR_ERR(data->hwmon_dev); goto ERROR4; } return 0; ERROR4: sysfs_remove_group(&dev->kobj, &w83781d_group); sysfs_remove_group(&dev->kobj, &w83781d_group_opt); if (data->lm75[0]) i2c_unregister_device(data->lm75[0]); if (data->lm75[1]) i2c_unregister_device(data->lm75[1]); ERROR3: i2c_set_clientdata(client, NULL); kfree(data); ERROR1: return err; } static int w83781d_remove(struct i2c_client *client) { struct w83781d_data *data = i2c_get_clientdata(client); struct device *dev = &client->dev; hwmon_device_unregister(data->hwmon_dev); sysfs_remove_group(&dev->kobj, &w83781d_group); sysfs_remove_group(&dev->kobj, &w83781d_group_opt); if (data->lm75[0]) i2c_unregister_device(data->lm75[0]); if (data->lm75[1]) i2c_unregister_device(data->lm75[1]); i2c_set_clientdata(client, NULL); kfree(data); return 0; } static int w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) { struct i2c_client *client = data->client; int res, bank; struct i2c_client *cl; bank = (reg >> 8) & 0x0f; if (bank > 2) /* switch banks */ i2c_smbus_write_byte_data(client, W83781D_REG_BANK, bank); if (bank == 0 || bank > 2) { res = i2c_smbus_read_byte_data(client, reg & 0xff); } else { /* switch to subclient */ cl = data->lm75[bank - 1]; /* convert from ISA to LM75 I2C addresses */ switch (reg & 0xff) { case 0x50: /* TEMP */ res = swab16(i2c_smbus_read_word_data(cl, 0)); break; case 0x52: /* CONFIG */ res = i2c_smbus_read_byte_data(cl, 1); break; case 0x53: /* HYST */ res = swab16(i2c_smbus_read_word_data(cl, 2)); break; case 0x55: /* OVER */ default: res = swab16(i2c_smbus_read_word_data(cl, 3)); break; } } if (bank > 2) i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); return res; } static int w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) { struct i2c_client *client = data->client; int bank; struct i2c_client *cl; bank = (reg >> 8) & 0x0f; if (bank > 2) /* switch banks */ i2c_smbus_write_byte_data(client, W83781D_REG_BANK, bank); if (bank == 0 || bank > 2) { i2c_smbus_write_byte_data(client, reg & 0xff, value & 0xff); } else { /* switch to subclient */ cl = data->lm75[bank - 1]; /* convert from ISA to LM75 I2C addresses */ switch (reg & 0xff) { case 0x52: /* CONFIG */ i2c_smbus_write_byte_data(cl, 1, value & 0xff); break; case 0x53: /* HYST */ i2c_smbus_write_word_data(cl, 2, swab16(value)); break; case 0x55: /* OVER */ i2c_smbus_write_word_data(cl, 3, swab16(value)); break; } } if (bank > 2) i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); return 0; } static void w83781d_init_device(struct device *dev) { struct w83781d_data *data = dev_get_drvdata(dev); int i, p; int type = data->type; u8 tmp; if (reset && type != as99127f) { /* this resets registers we don't have documentation for on the as99127f */ /* Resetting the chip has been the default for a long time, but it causes the BIOS initializations (fan clock dividers, thermal sensor types...) to be lost, so it is now optional. It might even go away if nobody reports it as being useful, as I see very little reason why this would be needed at all. */ dev_info(dev, "If reset=1 solved a problem you were " "having, please report!\n"); /* save these registers */ i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); p = w83781d_read_value(data, W83781D_REG_PWMCLK12); /* Reset all except Watchdog values and last conversion values This sets fan-divs to 2, among others */ w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); /* Restore the registers and disable power-on abnormal beep. This saves FAN 1/2/3 input/output values set by BIOS. */ w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); w83781d_write_value(data, W83781D_REG_PWMCLK12, p); /* Disable master beep-enable (reset turns it on). Individual beep_mask should be reset to off but for some reason disabling this bit helps some people not get beeped */ w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); } /* Disable power-on abnormal beep, as advised by the datasheet. Already done if reset=1. */ if (init && !reset && type != as99127f) { i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); } data->vrm = vid_which_vrm(); if ((type != w83781d) && (type != as99127f)) { tmp = w83781d_read_value(data, W83781D_REG_SCFG1); for (i = 1; i <= 3; i++) { if (!(tmp & BIT_SCFG1[i - 1])) { data->sens[i - 1] = 4; } else { if (w83781d_read_value (data, W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) data->sens[i - 1] = 1; else data->sens[i - 1] = 2; } if (type == w83783s && i == 2) break; } } if (init && type != as99127f) { /* Enable temp2 */ tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); if (tmp & 0x01) { dev_warn(dev, "Enabling temp2, readings " "might not make sense\n"); w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, tmp & 0xfe); } /* Enable temp3 */ if (type != w83783s) { tmp = w83781d_read_value(data, W83781D_REG_TEMP3_CONFIG); if (tmp & 0x01) { dev_warn(dev, "Enabling temp3, " "readings might not make sense\n"); w83781d_write_value(data, W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); } } } /* Start monitoring */ w83781d_write_value(data, W83781D_REG_CONFIG, (w83781d_read_value(data, W83781D_REG_CONFIG) & 0xf7) | 0x01); /* A few vars need to be filled upon startup */ for (i = 0; i < 3; i++) { data->fan_min[i] = w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); } mutex_init(&data->update_lock); } static struct w83781d_data *w83781d_update_device(struct device *dev) { struct w83781d_data *data = dev_get_drvdata(dev); struct i2c_client *client = data->client; int i; mutex_lock(&data->update_lock); if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) { dev_dbg(dev, "Starting device update\n"); for (i = 0; i <= 8; i++) { if (data->type == w83783s && i == 1) continue; /* 783S has no in1 */ data->in[i] = w83781d_read_value(data, W83781D_REG_IN(i)); data->in_min[i] = w83781d_read_value(data, W83781D_REG_IN_MIN(i)); data->in_max[i] = w83781d_read_value(data, W83781D_REG_IN_MAX(i)); if ((data->type != w83782d) && (i == 6)) break; } for (i = 0; i < 3; i++) { data->fan[i] = w83781d_read_value(data, W83781D_REG_FAN(i)); data->fan_min[i] = w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); } if (data->type != w83781d && data->type != as99127f) { for (i = 0; i < 4; i++) { data->pwm[i] = w83781d_read_value(data, W83781D_REG_PWM[i]); /* Only W83782D on SMBus has PWM3 and PWM4 */ if ((data->type != w83782d || !client) && i == 1) break; } /* Only PWM2 can be disabled */ data->pwm2_enable = (w83781d_read_value(data, W83781D_REG_PWMCLK12) & 0x08) >> 3; } data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); data->temp_max = w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); data->temp_max_hyst = w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); data->temp_add[0] = w83781d_read_value(data, W83781D_REG_TEMP(2)); data->temp_max_add[0] = w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); data->temp_max_hyst_add[0] = w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); if (data->type != w83783s) { data->temp_add[1] = w83781d_read_value(data, W83781D_REG_TEMP(3)); data->temp_max_add[1] = w83781d_read_value(data, W83781D_REG_TEMP_OVER(3)); data->temp_max_hyst_add[1] = w83781d_read_value(data, W83781D_REG_TEMP_HYST(3)); } i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); data->vid = i & 0x0f; data->vid |= (w83781d_read_value(data, W83781D_REG_CHIPID) & 0x01) << 4; data->fan_div[0] = (i >> 4) & 0x03; data->fan_div[1] = (i >> 6) & 0x03; data->fan_div[2] = (w83781d_read_value(data, W83781D_REG_PIN) >> 6) & 0x03; if ((data->type != w83781d) && (data->type != as99127f)) { i = w83781d_read_value(data, W83781D_REG_VBAT); data->fan_div[0] |= (i >> 3) & 0x04; data->fan_div[1] |= (i >> 4) & 0x04; data->fan_div[2] |= (i >> 5) & 0x04; } if (data->type == w83782d) { data->alarms = w83781d_read_value(data, W83782D_REG_ALARM1) | (w83781d_read_value(data, W83782D_REG_ALARM2) << 8) | (w83781d_read_value(data, W83782D_REG_ALARM3) << 16); } else if (data->type == w83783s) { data->alarms = w83781d_read_value(data, W83782D_REG_ALARM1) | (w83781d_read_value(data, W83782D_REG_ALARM2) << 8); } else { /* No real-time status registers, fall back to interrupt status registers */ data->alarms = w83781d_read_value(data, W83781D_REG_ALARM1) | (w83781d_read_value(data, W83781D_REG_ALARM2) << 8); } i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); data->beep_mask = (i << 8) + w83781d_read_value(data, W83781D_REG_BEEP_INTS1); if ((data->type != w83781d) && (data->type != as99127f)) { data->beep_mask |= w83781d_read_value(data, W83781D_REG_BEEP_INTS3) << 16; } data->last_updated = jiffies; data->valid = 1; } mutex_unlock(&data->update_lock); return data; } static const struct i2c_device_id w83781d_ids[] = { { "w83781d", w83781d, }, { "w83782d", w83782d, }, { "w83783s", w83783s, }, { "as99127f", as99127f }, { /* LIST END */ } }; MODULE_DEVICE_TABLE(i2c, w83781d_ids); static struct i2c_driver w83781d_driver = { .class = I2C_CLASS_HWMON, .driver = { .name = "w83781d", }, .probe = w83781d_probe, .remove = w83781d_remove, .id_table = w83781d_ids, .detect = w83781d_detect, .address_data = &addr_data, }; /* * ISA related code */ #ifdef CONFIG_ISA /* ISA device, if found */ static struct platform_device *pdev; static unsigned short isa_address = 0x290; /* I2C devices get this name attribute automatically, but for ISA devices we must create it by ourselves. */ static ssize_t show_name(struct device *dev, struct device_attribute *devattr, char *buf) { struct w83781d_data *data = dev_get_drvdata(dev); return sprintf(buf, "%s\n", data->name); } static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); static struct w83781d_data *w83781d_data_if_isa(void) { return pdev ? platform_get_drvdata(pdev) : NULL; } /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) { struct w83781d_data *isa; int i; if (!pdev) /* No ISA chip */ return 0; isa = platform_get_drvdata(pdev); if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) return 0; /* Address doesn't match */ if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) return 0; /* Chip type doesn't match */ /* We compare all the limit registers, the config register and the * interrupt mask registers */ for (i = 0x2b; i <= 0x3d; i++) { if (w83781d_read_value(isa, i) != i2c_smbus_read_byte_data(client, i)) return 0; } if (w83781d_read_value(isa, W83781D_REG_CONFIG) != i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) return 0; for (i = 0x43; i <= 0x46; i++) { if (w83781d_read_value(isa, i) != i2c_smbus_read_byte_data(client, i)) return 0; } return 1; } static int w83781d_read_value_isa(struct w83781d_data *data, u16 reg) { int word_sized, res; word_sized = (((reg & 0xff00) == 0x100) || ((reg & 0xff00) == 0x200)) && (((reg & 0x00ff) == 0x50) || ((reg & 0x00ff) == 0x53) || ((reg & 0x00ff) == 0x55)); if (reg & 0xff00) { outb_p(W83781D_REG_BANK, data->isa_addr + W83781D_ADDR_REG_OFFSET); outb_p(reg >> 8, data->isa_addr + W83781D_DATA_REG_OFFSET); } outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); if (word_sized) { outb_p((reg & 0xff) + 1, data->isa_addr + W83781D_ADDR_REG_OFFSET); res = (res << 8) + inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); } if (reg & 0xff00) { outb_p(W83781D_REG_BANK, data->isa_addr + W83781D_ADDR_REG_OFFSET); outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); } return res; } static void w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) { int word_sized; word_sized = (((reg & 0xff00) == 0x100) || ((reg & 0xff00) == 0x200)) && (((reg & 0x00ff) == 0x53) || ((reg & 0x00ff) == 0x55)); if (reg & 0xff00) { outb_p(W83781D_REG_BANK, data->isa_addr + W83781D_ADDR_REG_OFFSET); outb_p(reg >> 8, data->isa_addr + W83781D_DATA_REG_OFFSET); } outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); if (word_sized) { outb_p(value >> 8, data->isa_addr + W83781D_DATA_REG_OFFSET); outb_p((reg & 0xff) + 1, data->isa_addr + W83781D_ADDR_REG_OFFSET); } outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); if (reg & 0xff00) { outb_p(W83781D_REG_BANK, data->isa_addr + W83781D_ADDR_REG_OFFSET); outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); } } /* The SMBus locks itself, usually, but nothing may access the Winbond between bank switches. ISA access must always be locked explicitly! We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, would slow down the W83781D access and should not be necessary. There are some ugly typecasts here, but the good news is - they should nowhere else be necessary! */ static int w83781d_read_value(struct w83781d_data *data, u16 reg) { struct i2c_client *client = data->client; int res; mutex_lock(&data->lock); if (client) res = w83781d_read_value_i2c(data, reg); else res = w83781d_read_value_isa(data, reg); mutex_unlock(&data->lock); return res; } static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) { struct i2c_client *client = data->client; mutex_lock(&data->lock); if (client) w83781d_write_value_i2c(data, reg, value); else w83781d_write_value_isa(data, reg, value); mutex_unlock(&data->lock); return 0; } static int __devinit w83781d_isa_probe(struct platform_device *pdev) { int err, reg; struct w83781d_data *data; struct resource *res; /* Reserve the ISA region */ res = platform_get_resource(pdev, IORESOURCE_IO, 0); if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2, "w83781d")) { err = -EBUSY; goto exit; } data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); if (!data) { err = -ENOMEM; goto exit_release_region; } mutex_init(&data->lock); data->isa_addr = res->start; platform_set_drvdata(pdev, data); reg = w83781d_read_value(data, W83781D_REG_WCHIPID); switch (reg) { case 0x30: data->type = w83782d; data->name = "w83782d"; break; default: data->type = w83781d; data->name = "w83781d"; } /* Initialize the W83781D chip */ w83781d_init_device(&pdev->dev); /* Register sysfs hooks */ err = w83781d_create_files(&pdev->dev, data->type, 1); if (err) goto exit_remove_files; err = device_create_file(&pdev->dev, &dev_attr_name); if (err) goto exit_remove_files; data->hwmon_dev = hwmon_device_register(&pdev->dev); if (IS_ERR(data->hwmon_dev)) { err = PTR_ERR(data->hwmon_dev); goto exit_remove_files; } return 0; exit_remove_files: sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); device_remove_file(&pdev->dev, &dev_attr_name); kfree(data); exit_release_region: release_region(res->start + W83781D_ADDR_REG_OFFSET, 2); exit: return err; } static int __devexit w83781d_isa_remove(struct platform_device *pdev) { struct w83781d_data *data = platform_get_drvdata(pdev); hwmon_device_unregister(data->hwmon_dev); sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); device_remove_file(&pdev->dev, &dev_attr_name); release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2); kfree(data); return 0; } static struct platform_driver w83781d_isa_driver = { .driver = { .owner = THIS_MODULE, .name = "w83781d", }, .probe = w83781d_isa_probe, .remove = __devexit_p(w83781d_isa_remove), }; /* return 1 if a supported chip is found, 0 otherwise */ static int __init w83781d_isa_found(unsigned short address) { int val, save, found = 0; /* We have to request the region in two parts because some boards declare base+4 to base+7 as a PNP device */ if (!request_region(address, 4, "w83781d")) { pr_debug("w83781d: Failed to request low part of region\n"); return 0; } if (!request_region(address + 4, 4, "w83781d")) { pr_debug("w83781d: Failed to request high part of region\n"); release_region(address, 4); return 0; } #define REALLY_SLOW_IO /* We need the timeouts for at least some W83781D-like chips. But only if we read 'undefined' registers. */ val = inb_p(address + 1); if (inb_p(address + 2) != val || inb_p(address + 3) != val || inb_p(address + 7) != val) { pr_debug("w83781d: Detection failed at step 1\n"); goto release; } #undef REALLY_SLOW_IO /* We should be able to change the 7 LSB of the address port. The MSB (busy flag) should be clear initially, set after the write. */ save = inb_p(address + W83781D_ADDR_REG_OFFSET); if (save & 0x80) { pr_debug("w83781d: Detection failed at step 2\n"); goto release; } val = ~save & 0x7f; outb_p(val, address + W83781D_ADDR_REG_OFFSET); if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { outb_p(save, address + W83781D_ADDR_REG_OFFSET); pr_debug("w83781d: Detection failed at step 3\n"); goto release; } /* We found a device, now see if it could be a W83781D */ outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); val = inb_p(address + W83781D_DATA_REG_OFFSET); if (val & 0x80) { pr_debug("w83781d: Detection failed at step 4\n"); goto release; } outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); save = inb_p(address + W83781D_DATA_REG_OFFSET); outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); val = inb_p(address + W83781D_DATA_REG_OFFSET); if ((!(save & 0x80) && (val != 0xa3)) || ((save & 0x80) && (val != 0x5c))) { pr_debug("w83781d: Detection failed at step 5\n"); goto release; } outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); val = inb_p(address + W83781D_DATA_REG_OFFSET); if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ pr_debug("w83781d: Detection failed at step 6\n"); goto release; } /* The busy flag should be clear again */ if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { pr_debug("w83781d: Detection failed at step 7\n"); goto release; } /* Determine the chip type */ outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); save = inb_p(address + W83781D_DATA_REG_OFFSET); outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); val = inb_p(address + W83781D_DATA_REG_OFFSET); if ((val & 0xfe) == 0x10 /* W83781D */ || val == 0x30) /* W83782D */ found = 1; if (found) pr_info("w83781d: Found a %s chip at %#x\n", val == 0x30 ? "W83782D" : "W83781D", (int)address); release: release_region(address + 4, 4); release_region(address, 4); return found; } static int __init w83781d_isa_device_add(unsigned short address) { struct resource res = { .start = address, .end = address + W83781D_EXTENT - 1, .name = "w83781d", .flags = IORESOURCE_IO, }; int err; pdev = platform_device_alloc("w83781d", address); if (!pdev) { err = -ENOMEM; printk(KERN_ERR "w83781d: Device allocation failed\n"); goto exit; } err = platform_device_add_resources(pdev, &res, 1); if (err) { printk(KERN_ERR "w83781d: Device resource addition failed " "(%d)\n", err); goto exit_device_put; } err = platform_device_add(pdev); if (err) { printk(KERN_ERR "w83781d: Device addition failed (%d)\n", err); goto exit_device_put; } return 0; exit_device_put: platform_device_put(pdev); exit: pdev = NULL; return err; } static int __init w83781d_isa_register(void) { int res; if (w83781d_isa_found(isa_address)) { res = platform_driver_register(&w83781d_isa_driver); if (res) goto exit; /* Sets global pdev as a side effect */ res = w83781d_isa_device_add(isa_address); if (res) goto exit_unreg_isa_driver; } return 0; exit_unreg_isa_driver: platform_driver_unregister(&w83781d_isa_driver); exit: return res; } static void w83781d_isa_unregister(void) { if (pdev) { platform_device_unregister(pdev); platform_driver_unregister(&w83781d_isa_driver); } } #else /* !CONFIG_ISA */ static struct w83781d_data *w83781d_data_if_isa(void) { return NULL; } static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) { return 0; } static int w83781d_read_value(struct w83781d_data *data, u16 reg) { int res; mutex_lock(&data->lock); res = w83781d_read_value_i2c(data, reg); mutex_unlock(&data->lock); return res; } static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) { mutex_lock(&data->lock); w83781d_write_value_i2c(data, reg, value); mutex_unlock(&data->lock); return 0; } static int __init w83781d_isa_register(void) { return 0; } static void w83781d_isa_unregister(void) { } #endif /* CONFIG_ISA */ static int __init sensors_w83781d_init(void) { int res; /* We register the ISA device first, so that we can skip the * registration of an I2C interface to the same device. */ res = w83781d_isa_register(); if (res) goto exit; res = i2c_add_driver(&w83781d_driver); if (res) goto exit_unreg_isa; return 0; exit_unreg_isa: w83781d_isa_unregister(); exit: return res; } static void __exit sensors_w83781d_exit(void) { w83781d_isa_unregister(); i2c_del_driver(&w83781d_driver); } MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " "Philip Edelbrock <phil@netroedge.com>, " "and Mark Studebaker <mdsxyz123@yahoo.com>"); MODULE_DESCRIPTION("W83781D driver"); MODULE_LICENSE("GPL"); module_init(sensors_w83781d_init); module_exit(sensors_w83781d_exit);