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/*
* (Hisilicon's SoC based) flattened device tree enabled machine
*
* Copyright (c) 2012-2013 Hisilicon Ltd.
* Copyright (c) 2012-2013 Linaro Ltd.
*
* Author: Haojian Zhuang <haojian.zhuang@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#define HI3620_SYSCTRL_PHYS_BASE 0xfc802000
#define HI3620_SYSCTRL_VIRT_BASE 0xfe802000
/*
* This table is only for optimization. Since ioremap() could always share
* the same mapping if it's defined as static IO mapping.
*
* Without this table, system could also work. The cost is some virtual address
* spaces wasted since ioremap() may be called multi times for the same
* IO space.
*/
static struct map_desc hi3620_io_desc[] __initdata = {
{
/* sysctrl */
.pfn = __phys_to_pfn(HI3620_SYSCTRL_PHYS_BASE),
.virtual = HI3620_SYSCTRL_VIRT_BASE,
.length = 0x1000,
.type = MT_DEVICE,
},
};
static void __init hi3620_map_io(void)
{
debug_ll_io_init();
iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
}
static const char *hi3xxx_compat[] __initconst = {
"hisilicon,hi3620-hi4511",
NULL,
};
DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
.map_io = hi3620_map_io,
.dt_compat = hi3xxx_compat,
MACHINE_END
static const char *hix5hd2_compat[] __initconst = {
"hisilicon,hix5hd2",
NULL,
};
DT_MACHINE_START(HIX5HD2_DT, "Hisilicon HIX5HD2 (Flattened Device Tree)")
.dt_compat = hix5hd2_compat,
MACHINE_END
static const char *hip04_compat[] __initconst = {
"hisilicon,hip04-d01",
NULL,
};
DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)")
.dt_compat = hip04_compat,
MACHINE_END
static const char *hip01_compat[] __initconst = {
"hisilicon,hip01",
"hisilicon,hip01-ca9x2",
NULL,
};
DT_MACHINE_START(HIP01, "Hisilicon HIP01 (Flattened Device Tree)")
.dt_compat = hip01_compat,
MACHINE_END
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