blob: 36bf59155f4bbe42c7edf35b4818e9cfa9170943 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
|
/*
* DaVinci serial device definitions
*
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H
#include <asm/memory.h>
#include <mach/hardware.h>
#include <linux/platform_device.h>
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
#define DA8XX_UART0_BASE (IO_PHYS + 0x042000)
#define DA8XX_UART1_BASE (IO_PHYS + 0x10c000)
#define DA8XX_UART2_BASE (IO_PHYS + 0x10d000)
#define TNETV107X_UART0_BASE 0x08108100
#define TNETV107X_UART1_BASE 0x08088400
#define TNETV107X_UART2_BASE 0x08108300
#define TNETV107X_UART0_VIRT IOMEM(0xfee08100)
#define TNETV107X_UART1_VIRT IOMEM(0xfed88400)
#define TNETV107X_UART2_VIRT IOMEM(0xfee08300)
/* DaVinci UART register offsets */
#define UART_DAVINCI_PWREMU 0x0c
#define UART_DM646X_SCR 0x10
#define UART_DM646X_SCR_TX_WATERMARK 0x08
#ifndef __ASSEMBLY__
extern int davinci_serial_init(struct platform_device *);
extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate);
#endif
#endif /* __ASM_ARCH_SERIAL_H */
|