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generated by cgit v1.2.2 (git 2.25.0) at 2025-10-02 14:35:21 -0400
l com"> * This is needed to serialize access to the data port in hypertransport * irq capability. * * With multiple simultaneous hypertransport irq devices it might pay * to make this more fine grained. But start with simple, stupid, and correct. */ static DEFINE_SPINLOCK(ht_irq_lock); struct ht_irq_cfg { struct pci_dev *dev; /* Update callback used to cope with buggy hardware */ ht_irq_update_t *update; unsigned pos; unsigned idx; struct ht_irq_msg msg; }; void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) { struct ht_irq_cfg *cfg = get_irq_data(irq); unsigned long flags; spin_lock_irqsave(&ht_irq_lock, flags); if (cfg->msg.address_lo != msg->address_lo) { pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx); pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo); } if (cfg->msg.address_hi != msg->address_hi) { pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1); pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi); } if (cfg->update) cfg->update(cfg->dev, irq, msg); spin_unlock_irqrestore(&ht_irq_lock, flags); cfg->msg = *msg; } void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) { struct ht_irq_cfg *cfg = get_irq_data(irq); *msg = cfg->msg; } void mask_ht_irq(unsigned int irq) { struct ht_irq_cfg *cfg; struct ht_irq_msg msg; cfg = get_irq_data(irq); msg = cfg->msg; msg.address_lo |= 1; write_ht_irq_msg(irq, &msg); } void unmask_ht_irq(unsigned int irq) { struct ht_irq_cfg *cfg; struct ht_irq_msg msg; cfg = get_irq_data(irq); msg = cfg->msg; msg.address_lo &= ~1; write_ht_irq_msg(irq, &msg); } /** * __ht_create_irq - create an irq and attach it to a device. * @dev: The hypertransport device to find the irq capability on. * @idx: Which of the possible irqs to attach to. * @update: Function to be called when changing the htirq message * * The irq number of the new irq or a negative error value is returned. */ int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update) { struct ht_irq_cfg *cfg; unsigned long flags; u32 data; int max_irq; int pos; int irq; pos = pci_find_ht_capability(dev, HT_CAPTYPE_IRQ); if (!pos) return -EINVAL; /* Verify the idx I want to use is in range */ spin_lock_irqsave(&ht_irq_lock, flags); pci_write_config_byte(dev, pos + 2, 1); pci_read_config_dword(dev, pos + 4, &data); spin_unlock_irqrestore(&ht_irq_lock, flags); max_irq = (data >> 16) & 0xff; if ( idx > max_irq) return -EINVAL; cfg = kmalloc(sizeof(*cfg), GFP_KERNEL); if (!cfg) return -ENOMEM; cfg->dev = dev; cfg->update = update; cfg->pos = pos;