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* [ARM] 4241/1: Define mb() as compiler barrier on a uniprocessor systemCatalin Marinas2007-03-02
| | | | | | | | | | Currently, the mb() is defined as a DMB operation on ARMv6, even for UP systems. This patch defines mb() as a compiler barrier only. For the SMP case, the smp_* variants should be used anyway and the patch defines them as DMB. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-02-26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] CLPS7500 doesn't have IO ports [ARM] Fix more apm-emulation.h [ARM] 4234/1: Introduce get_irqnr_preamble and arch_ret_to_user for ns9xxx. [ARM] 4233/1: nand/s3c2410.c: warning fix [ARM] 4226/1: initial .data and .bss mappings of XIP kernel should be TEXT_OFFSET [ARM] 4224/2: allow XIP kernel to boot again [ARM] 4232/1: AT91: Generic GPIO bug [ARM] 4231/1: AT91: Merge and typo fixes. [ARM] 4229/1: S3C2410: Add MACH_QT2410 to s3c2410_defconfig [ARM] 4228/2: S3C24XX: update s3c2410_defconfig for 2.6.21-rc1
| * [ARM] 4234/1: Introduce get_irqnr_preamble and arch_ret_to_user for ns9xxx.Uwe Kleine-König2007-02-25
| | | | | | | | | | | | | | | | This is a follow up for f80dff9da07d81da16e3b842118d47b9febf9c01 which didn't include adaption for the new ns9xxx machine support. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 4231/1: AT91: Merge and typo fixes.Andrew Victor2007-02-22
| | | | | | | | | | | | | | | | | | | | | | The duplicate file "include/asm-arm/arch-at91rm9200/entry-macro.S" can be removed - it was already moved to include/asm-arm/arch-at91/. Fix 3 small typo's - two in comments, and the incorrect clock was specified for the LCD device. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] GPIO API: SA1100 wrapper cleanupPhilipp Zabel2007-02-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the discussion last december (http://lkml.org/lkml/2006/12/20/241), this patch - adds gpio_direction_input/output functions to generic.c instead of making them inline, - fixes comment and includes and uses inline functions instead of macros in gpio.h Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | [PATCH] GPIO API: S3C2410 wrapper cleanupPhilipp Zabel2007-02-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this one adds an #include <asm/arch/regs-gpio.h>. Tested by Roman Moravcik on s3c2440. Based on the discussion last december (http://lkml.org/lkml/2006/12/20/243), this patch - fixes comment and includes in gpio.h - adds the gpio_to_irq definition for S3C2400 - includes asm/arch/regs-gpio.h for pin direction definitions Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | [PATCH] GPIO API: PXA wrapper cleanupPhilipp Zabel2007-02-20
|/ | | | | | | | | | | | | | | | | | Based on the discussion last december (http://lkml.org/lkml/2006/12/20/242), this patch: - moves the PXA_LAST_GPIO check into pxa_gpio_mode - fixes comment and includes in gpio.h - replaces the gpio_set/get_value macros with inline functions and adds a non-inline version to avoid code explosion when gpio is not a constant. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Nicolas Pitre <nico@cam.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge ARM fixesRussell King2007-02-20
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| * [ARM] Fix s3c2410 ALSA audio for typedef eliminationRussell King2007-02-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 4223/1: ixdp2351 : Fix for a define errorOzzy2007-02-20
| | | | | | | | | | | | | | Fix syntax error for a define in ixdp2351.h Signed-off-by: ozzy <linux-ozzy@gmx.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivialLinus Torvalds2007-02-19
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (25 commits) Documentation/kernel-docs.txt update. arch/cris: typo in KERN_INFO Storage class should be before const qualifier kernel/printk.c: comment fix update I/O sched Kconfig help texts - CFQ is now default, not AS. Remove duplicate listing of Cris arch from README kbuild: more doc. cleanups doc: make doc. for maxcpus= more visible drivers/net/eexpress.c: remove duplicate comment add a help text for BLK_DEV_GENERIC correct a dead URL in the IP_MULTICAST help text fix the BAYCOM_SER_HDX help text fix SCSI_SCAN_ASYNC help text trivial documentation patch for platform.txt Fix typos concerning hierarchy Fix comment typo "spin_lock_irqrestore". Fix misspellings of "agressive". drivers/scsi/a100u2w.c: trivial typo patch Correct trivial typo in log2.h. Remove useless FIND_FIRST_BIT() macro from cardbus.c. ...
| | * Storage class should be before const qualifierTobias Klauser2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
| * | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-02-19
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits) [ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports [ARM] 4140/1: AACI stability add ac97 timeout and retries [ARM] 4139/1: AACI record support [ARM] 4138/1: AACI: multiple channel support for IRQ handling [ARM] 4211/1: Provide a defconfig for ns9xxx [ARM] 4210/1: base for new machine type "NetSilicon NS9360" [ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM [ARM] 4221/1: S3C2443: DMA support [ARM] 4220/1: S3C24XX: DMA system initialised from sysdev [ARM] 4219/1: S3C2443: DMA source definitions [ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443 [ARM] 4217/1: S3C24XX: remove the dma channel show at startup [ARM] 4090/2: avoid clash between PXA and SA1111 defines [ARM] 4216/1: add .gitignore entries for ARM specific files [ARM] 4214/2: S3C2410: Add Armzone QT2410 [ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST [ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos [ARM] 4137/1: Add kexec support [ARM] 4201/1: SMP barriers pair needed for the secondary boot process ... Fix up conflict due to typedef removal in sound/arm/aaci.h
| * | [PATCH] S3C2410 GPIO wrappersPhilipp Zabel2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | Arch-neutral GPIO calls for S3C24xx. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] SA1100 GPIO wrappersPhilipp Zabel2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | Arch-neutral GPIO calls for SA-1100. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] PXA GPIO wrappersPhilipp Zabel2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | Arch-neutral GPIO calls for PXA. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] AT91 GPIO wrappersDavid Brownell2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a first cut at making the AT91 code use the generic GPIO calls. Note that the original AT91 GPIO calls merged the "mux pin as GPIO" and "set GPIO direction" functionality into one API call, contrary to what's specified as a cross-platform portable model. So this involved a few non-inlinable functions. [akpm@osdl.org: cleanups] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] OMAP GPIO wrappersDavid Brownell2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This teaches OMAP how to implement the cross-platform GPIO interfaces. [akpm@osdl.org: cleanups] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] GPIO coreDavid Brownell2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This defines a simple and minimalist programming interface for GPIO APIs: - Documentation/gpio.txt ... describes things (read it) - include/asm-arm/gpio.h ... defines the ARM hook, which just punts to <asm/arch/gpio.h> for any implementation - include/asm-generic/gpio.h ... implement "can sleep" variants as calling the normal ones, for systems that don't handle i2c expanders. The immediate need for such a cross-architecture API convention is to support drivers that work the same on AT91 ARM and AVR32 AP7000 chips, which embed many of the same controllers but have different CPUs. However, several other users have been reported, including a driver for a hardware watchdog chip and some handhelds.org multi-CPU button drivers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [PATCH] SPI: Freescale iMX SPI controller driver (BIS+)Andrea Paterniani2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the SPI controller driver for Freescale i.MX(S/L/1). Main features summary: > Per chip setup via board specific code and/or protocol driver. > Per transfer setup. > PIO transfers. > DMA transfers. > Managing of NULL tx / rx buffer for rd only / wr only transfers. This patch replace patch-2.6.20-rc4-spi_imx with the following changes: > Few cosmetic changes. > Function map_dma_buffers now return 0 for success and -1 for failure. > Solved a bug inside spi_imx_probe function (wrong error path). > Solved a bug inside setup function (bad undo setup for max_speed_hz). > For read-only transfers, always write zero bytes. This is almost the same as the 'BIS' version sent by Andrea, except for updating the 'DUMMY' byte so that read-only transfers shift out zeroes. That part of the API changed recently, since some half duplex peripheral chips require that semantic. Signed-off-by: Andrea Paterniani <a.paterniani@swapp-eng.it> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | Merge branch 'for-linus' of ↵Linus Torvalds2007-02-11
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: remove scan_keyb driver Input: i8042 - fix AUX IRQ delivery check Input: wistron - add support for Fujitsu-Siemens Amilo D88x0 Input: inport - use correct config option for ATIXL Input: HIL - handle erros from input_register_device() Input: tsdev - schedule removal Input: add Atlas button driver Input: ads7846 - be more compatible with the hwmon framework Input: ads7846 - detect pen up from GPIO state Input: ads7846 - select correct SPI mode Input: ads7846 - switch to using hrtimer Input: ads7846 - optionally leave Vref on during differential measurements Input: ads7846 - pluggable filtering logic Input: gpio-keys - keyboard driver for GPIO buttons Input: hid-ff - add support for Logitech Momo racing wheel Input: i8042 - really suppress ACK/NAK during panic blink Input: pc110pad - return proper error
| | * \ Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6Dmitry Torokhov2007-02-10
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| | * | | Input: gpio-keys - keyboard driver for GPIO buttonsPhil Blundell2007-01-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an interrupt-driven keyboard driver for simple buttons connected directly to CPU GPIO lines of embedded ARM systems. It supports pxa architectures and is used by a number of PDAs and PocketPC phones in the handhelds.org kernel. Support for other architectures, such as sa11xx and sc2410, will be added once generic GPIO API is available. Signed-off-by: Paul Sokolovsky <pmiscml@gmail.com> Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
| * | | | [PATCH] Remove the last reference to rwlock_is_locked() macro.Robert P. J. Day2007-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the lone, remaining reference to the long-deceased rwlock_is_locked() macro. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | | [PATCH] fix sparse warnings from {asm,net}/checksum.hTilman Schmidt2007-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the variable "sum" in the __range_ok macros to avoid name collisions causing lots of "symbol shadows an earlier one" warnings by sparse. Signed-off-by: Tilman Schmidt <tilman@imap.cc> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Andi Kleen <ak@suse.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: Ian Molton <spyro@f2s.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | | [PATCH] consolidate line discipline number definitionsTilman Schmidt2007-02-11
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The line discipline numbers N_* are currently defined for each architecture individually, but (except for a seeming mistake) identically, in asm/termios.h. There is no obvious reason why these numbers should be architecture specific, nor any apparent relationship with the termios structure. The total number of these, NR_LDISCS, is defined in linux/tty.h anyway. So I propose the following patch which moves the definitions of the individual line disciplines to linux/tty.h too. Three of these numbers (N_MASC, N_PROFIBUS_FDL, and N_SMSBLOCK) are unused in the current kernel, but the patch still keeps the complete set in case there are plans to use them yet. Signed-off-by: Tilman Schmidt <tilman@imap.cc> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-apmLinus Torvalds2007-02-09
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-apm: [APM] SH: Convert to use shared APM emulation. [APM] MIPS: Convert to use shared APM emulation. [APM] ARM: Convert to use shared APM emulation. [APM] Add shared version of APM emulation
| | * | | [APM] ARM: Convert to use shared APM emulation.Ralf Baechle2007-02-09
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | [PATCH] kill eth_io_copy_and_sum()Al Viro2007-02-09
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all targets that sucker boils down to memcpy_fromio(sbk->data, from, len). The function name is highly misguiding (it _never_ does any checksums), the last argument is just a noise and simply expanding the call to memcpy_fromio() gives shorter and more readable source. For a lot of reasons it has almost no remaining users, so it's better to just outright kill it. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | [ARM] Merge remaining IOP codeRussell King2007-02-20
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | Conflicts: include/asm-arm/arch-at91rm9200/entry-macro.S Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and iop13xxDan Williams2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * architecture specific details are handled in asm/arch/time.h * ARCH_IOP13XX now selects PLAT_IOP * as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on XSC3 Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 4186/1: iop: remove cp6_enable/disable routinesDan Williams2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This functionality is replaced by cp6_trap Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_userDan Williams2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge the easy part of the IOP branchRussell King2007-02-18
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| * | | [ARM] 4184/1: iop: cp6 access handler (undef_hook)Dan Williams2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable svc access to cp6 via an undefined instruction hook. Do not enable access for usr code. This patch also makes iop13xx select PLAT_IOP, this requires a small change to drivers/i2c/busses/i2c-iop3xx.c. Per Lennert Buytenhek's note, the cp6 trap routine is moved to arch/arm/plat-iop Per Nicolas Pitre's note, the cp_wait is skipped since the latency to return to the faulting function is longer than cp_wait. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 4182/1: iop3xx: fix the ioremap implementation to not remap static rangesDan Williams2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a custom ioremap implementation for iop3xx. This saves establishing new mappings. It also cleans up the PCI IO resource to be a physical address rather than a virtual address as Russell pointed out on the original iop13xx port. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge NetSilicon NS93xx treeRussell King2007-02-18
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed conflicts: arch/arm/Makefile arch/arm/mm/Kconfig Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] 4210/1: base for new machine type "NetSilicon NS9360"Uwe Kleine-König2007-02-17
| |/ / / | | | | | | | | | | | | | | | | Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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*---------. | | | Merge AT91, EP93xx, General devel, PXA, S3C, V6+ and Xscale treesRussell King2007-02-17
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| | | | | * | | | [ARM] 4130/1: Add L220 support to RealView/EBCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the L220 on the RealView/EB MPCore platform. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | Merge Realview GIC codeRussell King2007-02-15
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| | | | | | * | | | [ARM] 4109/2: Add support for the RealView/EB MPCore revC platformCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel originally supported revB only. This patch enables revC by default and adds a config option for building the kernel for the revB platform. Since the SCU base address was hard-coded in the proc-v6.S file (and only valid for RealView/EB revB), this patch also adds a more generic support for defining the SCU information. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | | [ARM] 4190/2: Add the secondary GIC support for the RealView/EBCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPCore platform This patch adds the registration of the secondary GIC on the baseboard, together with the IRQ chaining setup. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | | | [ARM] 4108/2: Allow multiple GIC interrupt controllers in a systemCatalin Marinas2007-02-15
| | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation only assumes one GIC to be present in the system. However, there are platforms with more than one cascaded interrupt controllers (RealView/EB MPCore for example). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] 4135/1: Add support for the L210/L220 cache controllersCatalin Marinas2007-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for the L210/L220 (outer) cache controller. The cache range operations are done by index/way since L2 cache controller only accepts physical addresses. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] Convert DMA cache handling to take const void * argsRussell King2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA cache handling functions take virtual addresses, but in the form of unsigned long arguments. This leads to a little confusion about what exactly they take. So, convert them to take const void * instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] 4134/1: Add generic support for outer cachesCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The outer cache can be L2 as on RealView/EB MPCore platform or even L3 or further on ARMv7 cores. This patch adds the generic support for flushing the outer cache in the DMA operations. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] 4133/1: Add ISB after changes to CP15 registersCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to ARM ARM, changes to the CP15 registers are only guaranteed to be visible after an Instruction Synchronization Barrier (ISB). This patch adds the ISB at the end of set_cr and set_copro_access functions and also moves them further down in the file, below the isb macro definition. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] 4129/1: Add barriers after the TLB operationsCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The architecture specification states that TLB operations are guaranteed to be complete only after the execution of a DSB (Data Synchronisation Barrier, former Data Write Barrier or Drain Write Buffer). The branch target cache invalidation is also needed. The ISB (Instruction Synchronisation Barrier, formerly Prefetch Flush) is needed unless there will be a return from exception before the corresponding mapping is used (i.e. user mappings). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | | | [ARM] 4127/1: Flush the prefetch buffer after changing the DACRCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Architecture Reference Manual specifies that a prefetch flush is needed after changing the DACR register (chapter B2.7.6). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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