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| * | | | | gpio: janz-ttl: remove unnecessary OOM messagesJingoo Han2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: em: remove unnecessary OOM messagesJingoo Han2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: davinci: remove unnecessary OOM messagesJingoo Han2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: adp5588: remove unnecessary OOM messagesJingoo Han2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: adp5520: remove unnecessary OOM messagesJingoo Han2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: always enable GPIO_OMAP on ARCH_OMAPArnd Bergmann2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 4df42de9d3e "gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAP" made it possible to build OMAP kernels without the GPIO driver, which at least on OMAP2 and OMAP3 causes build errors because of functions used by the platform power management code: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_prepare_for_idle' arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_resume_after_idle' We presumably always want the GPIO driver on OMAP, so this adds a slightly broader dependency and only allows disabling the driver only when no OMAP2PLUS platform is selected. However, it seems entirely reasonable to include the driver in build tests on other platforms, so we should also allow building it for COMPILE_TEST builds and select the required GENERIC_IRQ_CHIP that may not already be enabled on other platforms. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: pl061: use BIT() macro instead of shifting bitsJavier Martinez Canillas2014-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: use BIT() macro instead of shifting bitsJavier Martinez Canillas2014-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: kempld: use BIT() macro instead of shifting bitsJavier Martinez Canillas2014-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: em: use BIT() macro instead of shifting bitsJavier Martinez Canillas2014-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: Fix gpio_get -> gpiod_get typo in kernel-docThierry Reding2014-05-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function is called gpiod_get(), not gpio_get(). Fix the kernel-doc comment to match the name. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: of: Allow -gpio suffix for property namesThierry Reding2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many bindings use the -gpio suffix in property names. Support this in addition to the -gpios suffix when requesting GPIOs using the new descriptor-based API. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: implement get_directionYegor Yefremov2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements gpio_chip's get_direction() routine, that lets other drivers get particular GPIOs direction using struct gpio_desc. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: of: Remove unneeded dummy functionThierry Reding2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_find_gpio() is always called under an IS_ENABLED(CONFIG_OF), so the dummy implementation provided for !OF configurations is not needed. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: do not set up hardware for IRQ_TYPE_NONELinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some GPIO irqchip drivers exploit the irqdomain mapping function to set up the IRQ default type in the hardware, make sure that if we pass IRQ_TYPE_NONE, no hardware setup whatsoever takes place (this should be the norm) until later when the IRQ gets utilized. Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: linux-omap <linux-omap@vger.kernel.org> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: rdc321x: Convert to use devm_kzallocAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This saves a few unwind code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: rcar: Add minimal runtime PM supportGeert Uytterhoeven2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just enough to automatically enable the functional clock, if present. Clock management during suspend/resume is still to be added. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-gpio@vger.kernel.org Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: kempld: Fix autoloading of moduleAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the module alias match the platform device name, so gpio-kempld module should now autoload correctly. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: sch311x: Slightly refactor sch311x_detect for better readabilityAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: pl061/sx150x: Remove unneeded include of linux/workqueue.hAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: max730x: Remove kfree(ts) in __max730x_remove()Axel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory for ts is allocated by devm_kzalloc now, so the kfree is not required. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Juergen Beisert <jbe@pengutronix.de> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: ge: Convert to platform driverAlexander Shiyan2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts GE I/O FPGA GPIO driver to platform driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpiolib: of: remove gpio_to_desc() usageLinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As demonstrated by commit 390d82e312c56b75407a3606cbcde8c4bc7f10ae "gpiolib: ACPI: remove gpio_to_desc() usage" gpio_to_desc() must die. Replace one of its usage by the newly-introduced gpiochip_get_desc() function. Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: zevio: Get correct gpio output valueAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read gpio output value from ZEVIO_GPIO_OUTPUT. The spin_lock is required to ensure the direction is not changed before reading input/ouput value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: put GPIO IRQs into their own lock classLinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Another feature that is duplicated in a number of GPIO irqchips is that these cascades IRQs are assigned their own lock class so as to avoid warnings about lockdep recursions. Do this also in the generic GPIO irqchip helpers for smooth transition to this core infrastructure. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio-sch: set output level after configuration of directionDaniel Krueger2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the datasheet, writing to the level register has no effect when GPIO is programmed as input. Actually the the level register is read-only when configured as input. Thus presetting the output level before switching to output is _NOT_ possible. Any writes are lost! Hence we set the level after configuring the GPIO as output. But we cannot prevent a short low pulse if direction is set to high and an external pull-up is connected. Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: zevio: Remove of_match_ptr around zevio_gpio_of_matchAxel Lin2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a DT-only driver and it will be built only when CONFIG_OF is set. So it's pointless to use of_match_ptr. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: dwapb: drop irq_setup_generic_chip()Sebastian Andrzej Siewior2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver calls irq_alloc_domain_generic_chips() which creates a gc and adds it to gc_list. The driver later then calls irq_setup_generic_chip() which also initializes the gc and adds it to the gc_list() and this corrupts the list. Enable LIST_DEBUG and you see the kernel complain. This isn't required, irq_alloc_domain_generic_chips() did the init. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Tested-by: Alan Tull <delicious.quinoa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: convert driver to use gpiolib irqchipJavier Martinez Canillas2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Converts the GPIO OMAP driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAPJavier Martinez Canillas2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARCH_OMAP config option was used to built the GPIO OMAP driver but this is not consistent with the rest of the GPIO drivers that have their own Kconfig option. Also, this make it harder to add dependencies or reverse dependencies (i.e: select) since that would mean touching the sub-arch config option. So is better to add a boolean Kconfig option for this driver that defaults to true if ARCH_OMAP is enabled. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: check gpiochip_add() return valueJavier Martinez Canillas2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpiochip_add() function can fail if the chip cannot be registered so the return value has to be checked and the error propagated in case it happens. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: omap: convert to use irq_domain_add_simple()Javier Martinez Canillas2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO OMAP driver supports different OMAP SoC families and not all of them have the needed support to use the linear IRQ domain mapping like OMAP1 that use the legacy domain mapping. But this special check is not necessary since the simple IRQ domain mapping is able to handle both cases. Having a zero IRQ offset will be interpreted as a linear domain case while a non-zero value will be interpreted as a legacy domain case. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: timberdale: simplify dependenciesJean Delvare2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO_TIMBERDALE doesn't need an explicit dependency on HAS_IOMEM, because it depends on MFD_TIMBERDALE which itself depends on HAS_IOMEM already. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: tc3589x: use gpiolib irqchip helpersLinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the gpiolib irqchip helpers can support nested, threaded IRQ handlers, switch the TC3589x driver over to using this new infrastructure. Tested on the Ux500. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: tc3589x: get rid of static IRQ baseLinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The static IRQ base is not used on any platforms with this chip (only Ux500). Get rid of it forever, and rely on dynamic IRQ descriptor allocation. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: tc3589x: use managed resourcesLinus Walleij2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Grab state container and irq using the devm_* functions and save some lines of hairy clean-up code. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | gpio: support threaded interrupts in irqchip helpersLinus Walleij2014-04-28
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some off-chip GPIO expanders need to be communicated by I2C or SPI traffic, but may still support IRQs. By the sleeping nature of such buses, such IRQ handlers need to be threaded. Support such handlers in the gpiochip irqchip helpers by flagging IRQs as threaded if the .can_sleep property of the gpiochip is true. Helpfully deny registration of chained IRQ handlers if the .can_sleep property is set, as such chips will invariably need a nested handler rather than a chained handler. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | | gpio: mcp23s08: Bug fix of SPI device tree registration.Michael Welling2014-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The chips variable needs to be incremented for each chip that is found in the spi_present_mask when registering via device tree. Without this and the checking a negative index is passed to the data->chip array in a subsequent loop. Cc: stable@vger.kernel.org Signed-off-by: Michael Welling <mwelling@ieee.org> Acked-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | | gpio: ich: set regs and reglen for i3100 and ich6 chipsetVincent Donnefort2014-05-09
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes kernel NULL pointer BUG introduced by the following commit: b667cf488aa9476b0ab64acd91f2a96f188cfd21 gpio: ich: Add support for multiple register addresses. Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Tested-by: Eric Paris <eparis@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | Merge tag 'gpio-v3.15-2' of ↵Linus Torvalds2014-04-22
|\ \ \ \ | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull gpio fixes from Linus Walleij: "A small batch of GPIO fixes for the v3.15 series. I expect more to come in but I'm a bit behind on mail, might as well get these to you right now: - Change a crucial semantic ordering in the GPIO irqchip helpers - Fix two nasty regressions in the ACPI gpiolib extensions" * tag 'gpio-v3.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio / ACPI: Prevent potential wrap of GPIO value on OpRegion read gpio / ACPI: Don't crash on NULL chip->dev gpio: set data first, then chip and handler
| * | | gpio / ACPI: Prevent potential wrap of GPIO value on OpRegion readMika Westerberg2014-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dan Carpenter's static code checker reports: The patch 473ed7be0da0: "gpio / ACPI: Add support for ACPI GPIO operation regions" from Mar 14, 2014, leads to the following static checker warning: drivers/gpio/gpiolib-acpi.c:454 acpi_gpio_adr_space_handler() warn: should 'gpiod_get_raw_value(desc) << i' be a 64 bit type? This is due the fact that *value is of type u64 and gpiod_get_raw_value() returns int. Since i can be larger than 31, it is possible that the value returned gets wrapped. Fix this by casting the return of gpiod_get_raw_value() to u64 first before shift. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio / ACPI: Don't crash on NULL chip->devMika Westerberg2014-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit aa92b6f689ac (gpio / ACPI: Allocate ACPI specific data directly in acpi_gpiochip_add()) moved ACPI handle checking to acpi_gpiochip_add() but forgot to check whether chip->dev is NULL before dereferencing it. Since chip->dev pointer is optional we can end up with crash like following: BUG: unable to handle kernel NULL pointer dereference at 00000138 IP: [<c126c2b3>] acpi_gpiochip_add+0x13/0x190 *pde = 00000000 Oops: 0000 [#1] PREEMPT SMP Modules linked in: ssb(+) ... CPU: 0 PID: 512 Comm: modprobe Tainted: G W 3.14.0-rc7-next-20140324-t1 #24 Hardware name: Dell Inc. Latitude D830 /0UY141, BIOS A02 06/07/2007 task: f5799900 ti: f543e000 task.ti: f543e000 EIP: 0060:[<c126c2b3>] EFLAGS: 00010282 CPU: 0 EIP is at acpi_gpiochip_add+0x13/0x190 EAX: 00000000 EBX: f57824c4 ECX: 00000000 EDX: 00000000 ESI: f57824c4 EDI: 00000010 EBP: f543fc54 ESP: f543fc40 DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068 CR0: 8005003b CR2: 00000138 CR3: 355f8000 CR4: 000007d0 Stack: f543fc5c fd1f7790 f57824c4 000000be 00000010 f543fc84 c1269f4e f543fc74 fd1f78bd 00008002 f57822b0 f5782090 fd1f8400 00000286 fd1f9994 00000000 f5782000 f543fc8c fd1f7e39 f543fcc8 fd1f0bd8 000000c0 00000000 00000000 Call Trace: [<fd1f7790>] ? ssb_pcie_mdio_write+0xa0/0xd0 [ssb] [<c1269f4e>] gpiochip_add+0xee/0x300 [<fd1f78bd>] ? ssb_pcicore_serdes_workaround+0xfd/0x140 [ssb] [<fd1f7e39>] ssb_gpio_init+0x89/0xa0 [ssb] [<fd1f0bd8>] ssb_attach_queued_buses+0xc8/0x2d0 [ssb] [<fd1f0f65>] ssb_bus_register+0x185/0x1f0 [ssb] [<fd1f3120>] ? ssb_pci_xtal+0x220/0x220 [ssb] [<fd1f106c>] ssb_bus_pcibus_register+0x2c/0x80 [ssb] [<fd1f40dc>] ssb_pcihost_probe+0x9c/0x110 [ssb] [<c1276c8f>] pci_device_probe+0x6f/0xc0 [<c11bdb55>] ? sysfs_create_link+0x25/0x40 [<c131d8b9>] driver_probe_device+0x79/0x360 [<c1276512>] ? pci_match_device+0xb2/0xc0 [<c131dc51>] __driver_attach+0x71/0x80 [<c131dbe0>] ? __device_attach+0x40/0x40 [<c131bd87>] bus_for_each_dev+0x47/0x80 [<c131d3ae>] driver_attach+0x1e/0x20 [<c131dbe0>] ? __device_attach+0x40/0x40 [<c131d007>] bus_add_driver+0x157/0x230 [<c131e219>] driver_register+0x59/0xe0 ... Fix this by checking chip->dev pointer against NULL first. Also we can now remove redundant check in acpi_gpiochip_request/free_interrupts(). Reported-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Sabrina Dubroca <sd@queasysnail.net> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Josh Boyer <jwboyer@fedoraproject.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: set data first, then chip and handlerLinus Walleij2014-04-14
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | During irq mapping, in irq_set_chip_and_handler() the process of setting this up may incur calls to lock the irqchip, which in turn may need to dereference and use the chip data. So set the data first, then set the chip and handler. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* / / Shiraz has movedViresh Kumar2014-04-18
|/ / | | | | | | | | | | | | | | | | | | | | | | shiraz.hashim@st.com email-id doesn't exist anymore as he has left the company. Replace ST's id with shiraz.linux.kernel@gmail.com. It also updates .mailmap file to fix address for 'git shortlog'. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge tag 'mfd-for-linus-3.15' of ↵Linus Torvalds2014-04-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "Changes to existing drivers: - Use of managed resources - omap, twl4030, ti_am335x_tscadc - Advanced error handling - omap - Rework clk management - omap - Device Tree (re-)work - tc3589x, pm8921, da9055, sec - IRC management overhaul and !BROKEN - pm8921 - Convert to regmap - ssbi, pm8921 - Use simple power-management ops - ucb1x00 - Include file clean-up - adp5520, cs5535, janz, lpc_ich, - lpc_sch, max14577, mcp-sa11x0, pcf50633-adc, rc5t583, rdc321x-southbridge, retu, smsc-ece1099, ti-ssp, ti_am335x_tscadc, tps65912, vexpress-config, wm8350, ywm8350 - Various bug fixes across the subsystem - NULL/invalid pointer dereference prevention - Resource leak mitigation, - Variable used initialised - Staticise various containers - Enforce return value checks New drivers/supported devices: - Add support for s2mps14 and s2mpa01 to sec - Add support for da9063 (v5) to da9063 - Add support for atom-c2000 to gpio-ich - Add support for come-{mbt10,cbt6,chl6} to kempld - Add support for da9053 to da9052 - Add support for itco-wdt (v3) and baytrail to lpc_ich - Add new drivers for tps65218, rtsx_usb, bcm590xx (Re-)moved drivers: - twl4030 ==> drivers/iio - ti-ssp ==> /dev/null" * tag 'mfd-for-linus-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (103 commits) mfd: wm5110: Correct default for HEADPHONE_DETECT_1 mfd: arizona: Correct small errors in the DT binding documentation mfd: arizona: Mark DSP clocking register as volatile mfd: devicetree: bindings: Add pm8xxx RTC description mfd: kempld-core: Fix potential hang-up during boot mfd: sec-core: Fix uninitialized 'regmap_rtc' on S2MPA01 mfd: tps65910: Fix regmap_irq_chip_data leak on mfd_add_devices fail mfd: tps65910: Fix possible invalid pointer dereference on regmap_add_irq_chip fail mfd: sec-core: Fix I2C dummy device resource leak on probe failure mfd: sec-core: Add of_compatible strings for clock MFD cells mfd: Remove obsolete ti-ssp driver Documentation: mfd: s2mps11: Describe S5M8767 and S2MPS14 clocks mfd: bcm590xx: Fix type argument for module device table mfd: lpc_ich: Add support for Intel Bay Trail SoC mfd: lpc_ich: Add support for NM10 GPIO mfd: lpc_ich: Change Avoton to iTCO v3 watchdog: iTCO_wdt: Add support for v3 silicon mfd: lpc_ich: Add support for iTCO v3 mfd: lpc_ich: Remove lpc_ich_cfg struct use mfd: lpc_ich: Only configure watchdog or GPIO when present ...
| * | gpio: ich: Add support for Intel AvotonVincent Donnefort2014-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Atom C2000 series (Avoton and Rangeley). And has the following options: - New addresses register. - Caching output levels (see Intel external design spec, table 48-29) - No hardware blink. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | gpio: ich: Add output levels cache supportVincent Donnefort2014-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to support chipsets on which GPIO_LVL value can't be read for output pins. Caching output levels implies the first output values reading as 0. The driver so can't be aware of set values GPIOs by bootloader or BIOS. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | gpio: ich: Add support for multiple register addressesVincent Donnefort2014-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces regs and reglen pointers which allow a chipset to have register addresses differing from ICH ones. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | gpio: ich: Add blink capability optionVincent Donnefort2014-03-19
| |/ | | | | | | | | | | | | | | This patch allows gpio_ich driver to be aware of non blink capable chipsets. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | Merge tag 'drivers-3.15' of ↵Linus Torvalds2014-04-05
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ...
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