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* CLK: Pistachio: Register external clock gatesAndrew Bresticker2015-03-31
* CLK: Pistachio: Register system interface gate clocksAndrew Bresticker2015-03-31
* CLK: Pistachio: Register peripheral clocksAndrew Bresticker2015-03-31
* CLK: Pistachio: Register core clocksAndrew Bresticker2015-03-31
* CLK: Pistachio: Add PLL driverAndrew Bresticker2015-03-31
* CLK: Add basic infrastructure for Pistachio clocksAndrew Bresticker2015-03-31