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* msm: clock: Remove unused code and definitionsStephen Boyd2011-01-28
| | | | | | | | This code is dead or otherwise useless so just remove it. Reviewed-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* msm: Warning fix in trout gpio board fileDavid Brown2011-01-28
| | | | | | | arch/arm/mach-msm/board-trout-gpio.c: In function 'trout_gpio_to_irq': arch/arm/mach-msm/board-trout-gpio.c:77: error: unused variable 'msm_gpio' Signed-off-by: David Brown <davidb@codeaurora.org>
* msm: Remove broken register definition from troutDavid Brown2011-01-28
| | | | | | Missed a register change with the clock cleanup on the MSM7x01 targets. Signed-off-by: David Brown <davidb@codeaurora.org>
* Merge branch 'msm-8960' into msm-coreDavid Brown2011-01-26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-8960: msm: Support for the MSM8960 RUMI3 target msm: Support for the MSM8960 Simulator target msm: Makefile cleanup msm: timer: Timer support for MSM8960 msm: Add MSM 8960 cpu_is check msm: irqs-8960: Interrupt map for MSM8960 msm: Physical offset for MSM8960 msm: io: I/O register definitions for MSM8960 msm: Generalize QGIC registers msm: Generalize timer register mappings msm: Add CPU queries
| * msm: Support for the MSM8960 RUMI3 targetStepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Add the machine record, init code, and build support for the MSM8960 RUMI3. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Support for the MSM8960 Simulator targetStepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Add the board file, Kconfig options, and Makefile options needed to build for the MSM8960 Simulator target. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Makefile cleanupStepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Clean up some of the conditionals in the Makefile in preparation for adding build support for MSM8960. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: timer: Timer support for MSM8960Stepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Modify the macros in the MSM timer driver to support the MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Add MSM 8960 cpu_is checkDavid Brown2011-01-21
| | | | | | | | Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: irqs-8960: Interrupt map for MSM8960Stepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | | | Add the interrupt map for the Qualcomm MSM8960 chip. This chip has an interrupt map that is different from previous targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Physical offset for MSM8960Stepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Add the physical memory offset value for the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: io: I/O register definitions for MSM8960Stepan Moskovchenko2011-01-21
| | | | | | | | | | | | | | | | Add the register address definitions for the basic hardware blocks on the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Generalize QGIC registersDavid Brown2011-01-21
| | | | | | | | | | | | | | | | The QGIC registers are mapped to the same virtual addresses across targets, only the physical address changes. Move the BASE address out of target-specific files, and add a SOC name to the base addresses. Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Generalize timer register mappingsDavid Brown2011-01-21
| | | | | | | | | | | | | | | | | | Allow the timer register to be determined dynamically instead of at compile time. Use common virtual addresses for the registers across all MSM chips, and select the register mappings based on the detected CPU. Signed-off-by: David Brown <davidb@codeaurora.org>
| * msm: Add CPU queriesDavid Brown2011-01-21
| | | | | | | | | | | | | | | | | | | | | | Create runtime queries to distinguish the various MSM targets. Although these would probably be better named soc_is..., use cpu_is... to match convention in the rest of the kernel. Hard code the tests based on config options for now. When runtime device detection is implemented, these can be made dynamic. Signed-off-by: David Brown <davidb@codeaurora.org>
* | ARM: msm: 7x30: don't force a gpiomux table for the whole archDima Zavin2011-01-24
| | | | | | | | | | | | | | | | This is completely board specific and therefore must be provided on a per-board basis. Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: David Brown <davidb@codeaurora.org>
* | Merge branch 'fixes-2.6.38' of ↵Linus Torvalds2011-01-21
|\ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu * 'fixes-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu: x86,percpu: Move out of place 64 bit ops into X86_64 section
| * | x86,percpu: Move out of place 64 bit ops into X86_64 sectionChristoph Lameter2011-01-11
| | | | | | | | | | | | | | | | | | | | | | | | Some operations that operate on 64 bit operands are defined for 32 bit. Move them into the correct section. Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | | Merge branch 'irq-cleanup-for-linus' of ↵Linus Torvalds2011-01-21
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (37 commits) um: Use generic irq Kconfig tile: Use generic irq Kconfig sparc: Use generic irq Kconfig score: Use generic irq Kconfig powerpc: Use generic irq Kconfig parisc: Use generic irq Kconfig mn10300: Use generic irq Kconfig microblaze: Use generic irq Kconfig m68knommu: Use generic irq Kconfig ia64: Use generic irq Kconfig frv: Use generic irq Kconfig blackfin: Use generic irq Kconfig alpha: Use generic irq Kconfig genirq: Remove __do_IRQ m32r: Convert to generic irq Kconfig m32r: Convert usrv platform irq handling m32r: Convert opsput_lcdpld irq chip m32r: Convert opsput lanpld irq chip m32r: Convert opsput pld irq chip m32r: Convert opsput irq chip ...
| * | | um: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jeff Dike <jdike@addtoit.com>
| * | | tile: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
| * | | sparc: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: "David S. Miller" <davem@davemloft.net>
| * | | score: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Chen Liqin <liqin.chen@sunplusct.com>
| * | | powerpc: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | parisc: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Kyle McMartin <kyle@mcmartin.ca> Acked-by: James Bottomley <James.Bottomley@HansenPartnership.com>
| * | | mn10300: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Howells <dhowells@redhat.com>
| * | | microblaze: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michal Simek <monstr@monstr.eu>
| * | | m68knommu: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Greg Ungerer <gerg@uclinux.org>
| * | | ia64: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Tony Luck <tony.luck@intel.com>
| * | | frv: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Howells <dhowells@redhat.com>
| * | | blackfin: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org>
| * | | alpha: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Richard Henderson <rth@twiddle.net>
| * | | genirq: Remove __do_IRQThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All architectures are finally converted. Remove the cruft. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Mike Frysinger <vapier@gentoo.org> Cc: David Howells <dhowells@redhat.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Michal Simek <monstr@monstr.eu> Acked-by: David Howells <dhowells@redhat.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Jeff Dike <jdike@addtoit.com>
| * | | m32r: Convert to generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic irq Kconfig. Select GENERIC_HARDIRQS_NO_DEPRECATED as we have converted all irq_chip functions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert usrv platform irq handlingThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert opsput_lcdpld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert opsput lanpld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert opsput pld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert opsput irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert oaks32r irq chipsThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert mappi3 irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert mappi2 irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert mappi irq chipsThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert m32700ut lcdpld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chip to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert m32700ut lanpld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert m32700ut pld irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert m32104ut irq chipThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Convert m32104ut irq handlingThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | m32r: Cleanup direct irq_desc accessThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq descriptors are already initialized by the generic code. Remove the redundant init code and set the irq chip with the proper accessor function. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
| * | | cris: Use generic irq KconfigThomas Gleixner2011-01-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic irq Kconfig. Select GENERIC_HARDIRQS_NO_DEPRECATED as we have converted all irq_chip functions. Fix the fallout in show_interrupts(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mikael Starvik <starvik@axis.com>
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