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* HWPOISON: x86: Add VM_FAULT_HWPOISON handling to x86 page fault handler v2Andi Kleen2009-09-16
| | | | | | | | | | | | Add VM_FAULT_HWPOISON handling to the x86 page fault handler. This is very similar to VM_FAULT_OOM, the only difference is that a different si_code is passed to user space and the new addr_lsb field is initialized. v2: Make the printk more verbose/unique Cc: x86@kernel.org Signed-off-by: Andi Kleen <ak@linux.intel.com>
* Merge branch 'next' of ↵Linus Torvalds2009-09-15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (134 commits) powerpc/nvram: Enable use Generic NVRAM driver for different size chips powerpc/iseries: Fix oops reading from /proc/iSeries/mf/*/cmdline powerpc/ps3: Workaround for flash memory I/O error powerpc/booke: Don't set DABR on 64-bit BookE, use DAC1 instead powerpc/perf_counters: Reduce stack usage of power_check_constraints powerpc: Fix bug where perf_counters breaks oprofile powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops powerpc/irq: Improve nanodoc powerpc: Fix some late PowerMac G5 with PCIe ATI graphics powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT powerpc/book3e: Add missing page sizes powerpc/pseries: Fix to handle slb resize across migration powerpc/powermac: Thermal control turns system off too eagerly powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan() powerpc/405ex: support cuImage via included dtb powerpc/405ex: provide necessary fixup function to support cuImage powerpc/40x: Add support for the ESTeem 195E (PPC405EP) SBC powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support. powerpc/44x: Update Arches defconfig powerpc/44x: Update Arches dts ... Fix up conflicts in drivers/char/agp/uninorth-agp.c
| * powerpc/nvram: Enable use Generic NVRAM driver for different size chipsMartyn Welch2009-09-11
| | | | | | | | | | | | | | | | | | | | Remove the reliance on a staticly defined NVRAM size, allowing platforms to support NVRAMs with sizes differing from the standard. A fall back value is provided for platforms not supporting this extension. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/iseries: Fix oops reading from /proc/iSeries/mf/*/cmdlineBenjamin Herrenschmidt2009-09-11
| | | | | | | | | | | | | | | | | | | | | | | | That code uses dma_mapping_error() with a NULL device, which is a bad idea :-) The proper fix might be to start using some kind of pseudo device for all these low level mappings with the hypervisor but that will be for another day. Since it directly calls into the low level iommu code, I see no problem in having it directly test against DMA_ERROR_CODE instead of using the accessors with a NULL argument for now. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/booke: Don't set DABR on 64-bit BookE, use DAC1 insteadBenjamin Herrenschmidt2009-09-10
| | | | | | | | | | | | | | Also remove a duplicate setting of it in the context switch path on BookE. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/perf_counters: Reduce stack usage of power_check_constraintsPaul Mackerras2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Michael Ellerman reported stack-frame size warnings being produced for power_check_constraints(), which uses an 8*8 array of u64 and two 8*8 arrays of unsigned long, which are currently allocated on the stack, along with some other smaller variables. These arrays come to 1.5kB on 64-bit or 1kB on 32-bit, which is a bit too much for the stack. This fixes the problem by putting these arrays in the existing per-cpu cpu_hw_counters struct. This is OK because two of the call sites have interrupts disabled already; for the third call site we use get_cpu_var, which disables preemption, so we know we won't get a context switch while we're in power_check_constraints(). Note that power_check_constraints() can be called during context switch but is not called from interrupts. Reported-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: <stable@kernel.org) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Fix bug where perf_counters breaks oprofilePaul Mackerras2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there is a bug where if you use oprofile on a pSeries machine, then use perf_counters, then use oprofile again, oprofile will not work correctly; it will lose the PMU configuration the next time the hypervisor does a partition context switch, and thereafter won't count anything. Maynard Johnson identified the sequence causing the problem: - oprofile setup calls ppc_enable_pmcs(), which calls pseries_lpar_enable_pmcs, which tells the hypervisor that we want to use the PMU, and sets the "PMU in use" flag in the lppaca. This flag tells the hypervisor whether it needs to save and restore the PMU config. - The perf_counter code sets and clears the "PMU in use" flag directly as it context-switches the PMU between tasks, and leaves it clear when it finishes. - oprofile setup, called for a new oprofile run, calls ppc_enable_pmcs, which does nothing because it has already been called. In particular it doesn't set the "PMU in use" flag. This fixes the problem by arranging for ppc_enable_pmcs to always set the "PMU in use" flag. It makes the perf_counter code call ppc_enable_pmcs also rather than calling the lower-level function directly, and removes the setting of the "PMU in use" flag from pseries_lpar_enable_pmcs, since that is now done in its caller. This also removes the declaration of pasemi_enable_pmcs because it isn't defined anywhere. Reported-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: <stable@kernel.org) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/85xx: Fix SMP compile error and allow NULL for smp_opsKumar Gala2009-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit introduced a compile error since it removed the implementation of smp_85xx_basic_setup: commit 77c0a700c1c292edafa11c1e52821ce4636f81b0 Author: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: Fri Aug 28 14:25:04 2009 +1000 powerpc: Properly start decrementer on BookE secondary CPUs Make it so that smp_ops probe() and setup_cpu() can be set to NULL. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/irq: Improve nanodocWolfram Sang2009-09-10
| | | | | | | | | | | | | | | | The OF helpers look like nanodoc but are missing the header. Fix this and a typo (s/nad/and/) while we are here. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Fix some late PowerMac G5 with PCIe ATI graphicsBenjamin Herrenschmidt2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | A misconfiguration by the firmware of the U4 PCIe bridge on PowerMac G5 with the U4 bridge (latest generations, may also affect the iMac G5 "iSight") is causing us to re-assign the PCI BARs of the video card, which can get it out of sync with the firmware, thus breaking offb. This works around it by fixing up the bridge configuration properly at boot time. It also fixes a bug where the firmware provides us with an incorrect set of accessible regions in the device-tree. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BITKumar Gala2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to using the Power ISA defined PTE format when we have a 64-bit PTE. This makes the code handling between fsl-booke and book3e-64 similiar for TLB faults. Additionally this lets use take advantage of the page size encodings and full permissions that the HW PTE defines. Also defined _PMD_PRESENT, _PMD_PRESENT_MASK, and _PMD_BAD since the 32-bit ppc arch code expects them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e: Add missing page sizesKumar Gala2009-09-02
| | | | | | | | | | | | | | | | Add defines for the other page sizes. Even if HW doesn't support them we made them use them for hugetlbfs support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/pseries: Fix to handle slb resize across migrationBrian King2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SLB can change sizes across a live migration, which was not being handled, resulting in possible machine crashes during migration if migrating to a machine which has a smaller max SLB size than the source machine. Fix this by first reducing the SLB size to the minimum possible value, which is 32, prior to migration. Then during the device tree update which occurs after migration, we make the call to ensure the SLB gets updated. Also add the slb_size to the lparcfg output so that the migration tools can check to make sure the kernel has this capability before allowing migration in scenarios where the SLB size will change. BenH: Fixed #include <asm/mmu-hash64.h> -> <asm/mmu.h> to avoid breaking ppc32 build Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan()Grant Likely2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | The two versions are doing almost exactly the same thing. No need to maintain them as separate files. This patch also has the side effect of making the PCI device tree scanning code available to 32 bit powerpc machines, but no board ports actually make use of this feature at this point. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/405ex: support cuImage via included dtbTiejun Chen2009-08-31
| | | | | | | | | | | | | | | | To support cuImage, we need to initialize the required sections and ensure that it is built. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc/405ex: provide necessary fixup function to support cuImageTiejun Chen2009-08-31
| | | | | | | | | | | | | | | | | | | | For cuImage format it's necessary to provide clock fixups since u-boot will not pass necessary clock frequency into the dtb included into cuImage so we implement the clock fixups as defined in the technical documentation for the board and update header file with the basic register definitions. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc/40x: Add support for the ESTeem 195E (PPC405EP) SBCSolomon Peachy2009-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the ESTeem 195E Hotfoot SBC. There are several variants of the SBC deployed, single/dual ethernet+serial, and also 4MB/8MB flash variations. In the interest of having a single kernel image boot on all boards, the cuboot shim detects the differences and mangles the DTS tree appropriately. With the exception of the CF interface that was never populated on production boards, this code/DTS supports all boardpop options. Signed-off-by: Solomon Peachy <solomon@linux-wlan.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support.fkan@amcc.com2009-08-31
| | | | | | | | | | | | | | | | | | | | This patch adds support for the AMCC (AppliedMicro) PPC460SX Eiger evaluation board. Signed-off-by: Tai Tri Nguyen <ttnguyen@amcc.com> Acked-by: Feng Kan <fkan@amcc.com> Acked-by: Tirumala Marri <tmarri@amcc.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc/44x: Update Arches defconfigStefan Roese2009-08-31
| | | | | | | | | | | | | | | | This patch adds NOR MTD support and I2C HWMON support for the AD7414 to the AMCC Arches defconfig. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc/44x: Update Arches dtsStefan Roese2009-08-31
| | | | | | | | | | | | | | | | | | | | | | This patch adds some nodes to the AMCC Arches dts: - L2 cache support - NOR FLASH mapping with default partitioning - I2C HWMON device (AD7414) Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * powerpc: Properly start decrementer on BookE secondary CPUsBenjamin Herrenschmidt2009-08-28
| | | | | | | | | | | | | | | | | | | | This moves the code to start the decrementer on 40x and BookE into a separate function which is now called from time_init() and secondary_time_init(), before the respective clock sources are registered. We also remove the 85xx specific code for doing it from the platform code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: derive COMMAND_LINE_SIZE from asm-genericPaul Gortmaker2009-08-28
| | | | | | | | | | | | | | | | | | The default COMMAND_LINE_SIZE in asm-generic is 512, so the net effect of this change is nil, aside from the cleanup factor. See also commit 2b74b8569. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/pci: Pull ppc32 PCI features into commonKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the PCI features we have in ppc32 we will need on ppc64 platforms in the future. These include support for: * ppc_md.pci_exclude_device * indirect config cycles * early config cycles We also simplified the logic in fake_pci_bus() to assume it will always get a valid pci_controller. Since all current callers seem to pass it one. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/pci: move pci_64.c device tree scanning code into pci-common.cGrant Likely2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI device tree scanning code in pci_64.c is some useful functionality. It allows PCI devices to be described in the device tree instead of being probed for, which in turn allows pci devices to use all of the device tree facilities to describe complex PCI bus architectures like GPIO and IRQ routing (perhaps not a common situation for desktop or server systems, but useful for embedded systems with on-board PCI devices). This patch moves the device tree scanning into pci-common.c so it is available for 32-bit powerpc machines too. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/pci: Remove dead checks for CONFIG_PPC_OFGrant Likely2009-08-28
| | | | | | | | | | | | | | | | | | | | PPC_OF is always selected for arch/powerpc. This patch removes the stale #defines Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e-64: Add support to initial_tlb_book3e for non-HES TLBKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | We now search through TLBnCFG looking for the first array that has IPROT support (we assume that there is only one). If that TLB has hardware entry select (HES) support we use the existing code and with the proper TLB select (the HES code still needs to clean up bolted entries from firmware). The non-HES code is pretty similiar to the 32-bit FSL Book-E code but does make some new assumtions (like that we have tlbilx) and simplifies things down a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e-64: Add helper function to setup IVORsKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | | | Not all 64-bit Book-3E parts will have fixed IVORs so add a function that cpusetup code can call to setup the base IVORs (0..15) to match the fixed offsets. We need to 'or' part of interrupt_base_book3e into the IVORs since on parts that have them the IVPR doesn't extend as far down. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e-64: Wait til generic_calibrate_decr to enable decrementerKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | | | | | Match what we do on 32-bit Book-E processors and enable the decrementer in generic_calibrate_decr. We need to make sure we disable the decrementer early in boot since we currently use lazy (soft) interrupt on 64-bit Book-E and possible get a decrementer exception before we are ready for it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/book3e-64: Move the default cpu table entryKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | Move the default cpu entry table for CONFIG_PPC_BOOK3E_64 to the very end since we will probably want to support both 32-bit and 64-bit kernels for some processors that are higher up in the list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc/mm: Add MMU features for TLB reservation & Paired MAS registersKumar Gala2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | Support for TLB reservation (or TLB Write Conditional) and Paired MAS registers are optional for a processor implementation so we handle them via MMU feature sections. We currently only used paired MAS registers to access the full RPN + perm bits that are kept in MAS7||MAS3. We assume that if an implementation has hardware page table at this time it also implements in TLB reservations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Adjust base and index registers in Altivec macrosMichael Wolf2009-08-28
| | | | | | | | | | | | | | | | | | | | On POWER6 systems RA needs to be the base and RB the index. If they are reversed you take a misdirect hit. Signed-off-by: Mike Wolf <mjwolf@us.ibm.com> ---- Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Name xpn & x fields in HW Hash PTE formatBecky Bruce2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | Previously, the 36-bit code was using these bits, but they had never been named in the pte format definition. This patch just gives those fields their proper names and adds a comment that they are only present on some processors. There is no functional code change. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Add CONFIG_DMA_API_DEBUG supportFUJITA Tomonori2009-08-28
| | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Handle SWIOTLB mapping error properlyFUJITA Tomonori2009-08-28
| | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Use asm-generic/dma-mapping-common.hFUJITA Tomonori2009-08-28
| | | | | | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: use dma_map_ops structFUJITA Tomonori2009-08-28
| | | | | | | | | | | | | | | | | | This converts uses dma_map_ops struct (in include/linux/dma-mapping.h) instead of POWERPC homegrown dma_mapping_ops. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Remove swiotlb_pci_dma_opsFUJITA Tomonori2009-08-28
| | | | | | | | | | | | | | | | | | Now swiotlb_pci_dma_ops is identical to swiotlb_dma_ops; we can use swiotlb_dma_ops with any devices. This removes swiotlb_pci_dma_ops. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Remove addr_needs_map in struct dma_mapping_opsFUJITA Tomonori2009-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds max_direct_dma_addr to struct dev_archdata to remove addr_needs_map in struct dma_mapping_ops. It also converts dma_capable() to use max_direct_dma_addr. max_direct_dma_addr is initialized in pci_dma_dev_setup_swiotlb(), called via ppc_md.pci_dma_dev_setup hook. For further information: http://marc.info/?t=124719060200001&r=1&w=2 Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * Merge commit 'tip/iommu-for-powerpc' into nextBenjamin Herrenschmidt2009-08-28
| |\
| * \ Merge commit 'kumar/next' into nextBenjamin Herrenschmidt2009-08-26
| |\ \
| | * | powerpc/qe_lib: Set gpio data before changing the direction to outputMichael Barkowski2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids having a short glitch if the desired initial value is not the same as what was previously in the data register. Signed-off-by: Michael Barkowski <michaelbarkowski@ruggedcom.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: Add QE USB support for MPC8569E-MDS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add gpio-controller node for BCSR17, it is used to control USB speed and VBUS; - Add timer node for QE GTM, needed for USB host; - Add usb node itself; - Add some probing code for BCSR GPIOs. NOTE: QE USB doesn't work on prototype boards, but should work on pilot boards if specs and schematics are correct, though we don't have the pilot boards to actually test it. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/82xx: Add CPM USB Gadget support for MPC8272ADS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add usb node; - Configure pins and clocks; - Enable USB function in BCSR. The support was successfully tested using serial and ethernet gadget drivers. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/82xx: Fix BCSR bits for MPC8272ADS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpc8272_ads.c is using BCSR bits definitions from pq2ads.h, but according to User's Guide the bits are wrong for MPC8272ADS boards (I guess definitions from pq2ads should only be used for PQ2FADS boards). So, let's introduce our own definitions for MPC8272ADS, and don't include pq2ads.h. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: Add eSDHC support for MPC8536DS boardsAnton Vorontsov2009-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simply adds sdhci node to the device tree. We specify clock-frequency manually, so that eSDHC will work without upgrading U-Boot. Though, that'll only work for default setup (1500 MHz) on new board revisions. For non-default setups, it's recommended to upgrade U-Boot, since it will fixup clock-frequency automatically. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities blockPaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0 in the GUTS. The generic reboot code uses this tag to determine if it should be using the RSTCR for reboot, so remove it from the board definition. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: issue fsl_soc reboot warning only when applicablePaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPU, like the MPC8560 don't have a RSTCR in the Global Utilities Block. These boards will implement their own reboot call, and not use this code, so we should only warn about the absence of the GUTS RSTCR when the default reboot code is used. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: sbc8560 - Fix warm reboot with board specific reset functionLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing fsl_rstcr_restart function is not applicable to the mpc8560. The Global Utilities Block on this earlier CPU doesn't have the control/reset register at 0xe00b0. This implements a board specific reset function that uses the RCR(Reset Control Register) of the sbc8560's EPLD to do a reset. Signed-off-by: Liang Li <Liang.Li@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/83xx: sbc8349 - update defconfig, enable MTD, USB storagePaul Gortmaker2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With flash partition entries in the DTS file, MTD might as well be enabled in the defconfig. In a similar vein, enable USB and enough related options (SCSI/ext2/ext3) so that a user can read and write to a generic USB flash drive as well. Also, this board only has the two default SOC UARTs, so adjust the UART config accordingly. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTSLiang Li2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows interrupts to occur on the sbc834x. Currently PCI devices get assigned an incorrect IRQ and so the interrupt count never increases. This was tested with the 82546GB based dual port E1000 PCI-X NIC which uses two distinct IRQ lines on the one card. root@localhost:/root> cat /proc/interrupts | grep eth 17: 78 IPIC Level eth1 48: 27121 IPIC Level eth0 Signed-off-by: Liang Li <liang.li@windriver.com> Signed-off-by: Yang Shi <yang.shi@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-12 14:31:36 -0500