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path: root/arch/x86/pci/intel_mid_pci.c
Commit message (Expand)AuthorAge
* x86, irq: Keep balance of IOAPIC pin reference countJiang Liu2014-12-16
* x86, irq, PCI: Keep IRQ assignment for runtime power managementJiang Liu2014-08-29
* x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernationJiang Liu2014-08-08
* x86, irq, SFI: Release IOAPIC pin when PCI device is disabledJiang Liu2014-06-21
* x86, irq, SFI: Use common irqdomain map interface to program IOAPIC pinsJiang Liu2014-06-21
* x86, SFI, irq: Provide basic irqdomain supportJiang Liu2014-06-21
* x86, intel-mid: Add Merrifield platform supportDavid Cohen2014-01-15
* intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan2013-10-17
* pci: intel_mid: Return true/false in function returning boolFengguang Wu2013-10-17
* intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan2013-10-17