| Commit message (Expand) | Author | Age |
* | x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config space | Andreas Herrmann | 2009-12-16 |
* | x86: Limit the number of processor bootup messages | Mike Travis | 2009-12-11 |
* | x86, cpu: mv display_cacheinfo -> cpu_detect_cache_sizes | Borislav Petkov | 2009-11-23 |
* | trivial: fix missing printk space in amd_k7_smp_check | Michael Tokarev | 2009-09-21 |
* | x86, EDAC: Provide function to return NodeId of a CPU | Andreas Herrmann | 2009-09-16 |
* | Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel... | Linus Torvalds | 2009-09-14 |
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| * | x86: Use hard_smp_processor_id() to get apic id for AMD K8 cpus | Yinghai Lu | 2009-09-04 |
| * | x86: Fix CPU llc_shared_map information for AMD Magny-Cours | Andreas Herrmann | 2009-09-03 |
| * | x86, AMD: Disable wrongly set X86_FEATURE_LAHF_LM CPUID bit | Borislav Petkov | 2009-08-31 |
* | | Merge commit 'v2.6.31-rc7' into x86/cleanups | Ingo Molnar | 2009-08-24 |
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| * | x86: Clear incorrectly forced X86_FEATURE_LAHF_LM flag | Kevin Winchester | 2009-08-11 |
| * | x86, amd: Don't probe for extended APIC ID if APICs are disabled | Jeremy Fitzhardinge | 2009-07-22 |
* | | x86/cpu: Clean up various files a bit | Alan Cox | 2009-07-11 |
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* | x86: Set cpu_llc_id on AMD CPUs | Andreas Herrmann | 2009-06-21 |
* | Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds | 2009-06-10 |
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| * | x86: Detect use of extended APIC ID for AMD CPUs | Andreas Herrmann | 2009-06-09 |
* | | x86: don't call read_apic_id if !cpu_has_apic | Yinghai Lu | 2009-05-18 |
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* | x86: move various CPU initialization objects into .cpuinit.rodata | Jan Beulich | 2009-03-12 |
* | x86: remove smp_apply_quirks()/smp_checks() | Yinghai Lu | 2009-03-08 |
* | x86, apic: remove duplicate asm/apic.h inclusions | Ingo Molnar | 2009-02-17 |
* | x86, apic: remove genapic.h | Ingo Molnar | 2009-02-17 |
* | x86: remove mach_apic.h | Ingo Molnar | 2009-01-29 |
* | x86: support always running TSC on Intel CPUs | Venki Pallipadi | 2008-12-16 |
* | x86: print out apic id in hex format | Yinghai Lu | 2008-10-16 |
* | x86: make amd.c have 64bit support code | Yinghai Lu | 2008-09-08 |
* | x86: merge header in amd_64.c | Yinghai Lu | 2008-09-08 |
* | x86: cpu make amd.c more like amd_64.c v2 | Yinghai Lu | 2008-09-08 |
* | x86, cpu init: call early_init_xxx in init_xxx | Yinghai Lu | 2008-09-06 |
* | x86: remove duplicated get_model_name() calling | Yinghai Lu | 2008-09-06 |
* | x86: remove cpu_vendor_dev | Yinghai Lu | 2008-09-04 |
* | x86: move mtrr cpu cap setting early in early_init_xxxx | Yinghai Lu | 2008-09-04 |
* | x86: reduce force_mwait visibility | Jan Beulich | 2008-07-18 |
* | x86: Move PCI IO ECS code to x86/pci | Robert Richter | 2008-07-08 |
* | x86, clockevents: add C1E aware idle function | Thomas Gleixner | 2008-07-08 |
* | x86: use cpuinfo to check for interrupt pending message msr | Thomas Gleixner | 2008-06-10 |
* | x86: cleanup C1E enabled detection | Thomas Gleixner | 2008-06-10 |
* | fix build bug in "x86: add PCI extended config space access for AMD Barcelona" | Robert Richter | 2008-06-10 |
* | fix build bug in "x86: add PCI extended config space access for AMD Barcelona" | Ingo Molnar | 2008-06-02 |
* | x86: add PCI extended config space access for AMD Barcelona | Robert Richter | 2008-06-02 |
* | x86: remove unused function amd_init_cpu() | Dmitri Vorobiev | 2008-04-26 |
* | x86: move apic declarations to mach_apic.h | Glauber Costa | 2008-04-17 |
* | x86: clean up cpu capabilities accesses, amd.c | Ingo Molnar | 2008-04-17 |
* | x86: coding style fixes to arch/x86/kernel/cpu/amd.c | Paolo Ciarrocchi | 2008-04-17 |
* | x86: use ELF section to list CPU vendor specific code | Thomas Petazzoni | 2008-04-17 |
* | x86: fix bootup crash in native_read_tsc() | Ingo Molnar | 2008-02-01 |
* | x86: use the correct cpuid method to detect MWAIT support for C states | Andi Kleen | 2008-01-30 |
* | x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detection | Andi Kleen | 2008-01-30 |
* | x86: implement support to synchronize RDTSC through MFENCE on AMD CPUs | Andi Kleen | 2008-01-30 |
* | spelling fixes: arch/i386/ | Simon Arlott | 2007-10-19 |
* | x86: print info about late C1E detection on 32bit as well | Thomas Gleixner | 2007-10-17 |