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path: root/arch/sh/kernel/cpu/init.c
Commit message (Expand)AuthorAge
* sh: Expose physical addressing mode through cpuinfo.Paul Mundt2010-10-26
* sh: __cpuinit annotate the CPU init path.Paul Mundt2010-04-20
* sh: Tidy CPU probing and fixup section annotations.Paul Mundt2010-04-20
* sh: Setup boot CPU VBR early to enable early page faults.Paul Mundt2010-02-16
* sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt2010-01-25
* sh: Kill off the special uncached section and fixmap.Paul Mundt2010-01-21
*-. Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates'Paul Mundt2010-01-12
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| | * sh: Kill off dead UBC headers.Paul Mundt2010-01-05
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| * sh: Move over to dynamically allocated FPU context.Paul Mundt2010-01-12
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* sh: Make associative cache writes fatal on all SH-4A parts.Paul Mundt2009-12-04
* sh: Minor optimisations to FPU handlingStuart Menefy2009-11-24
* sh: Kill off legacy UBC wakeup cruft.Paul Mundt2009-10-16
* Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-18
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| * sh: delay slot future proofing via EXPMASK on SH-4A parts.Paul Mundt2009-08-14
* | sh: rework nommu for generic cache.c use.Paul Mundt2009-08-14
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* sh: add weak l2_cache_init function.Kuninori Morimoto2009-06-01
* sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c.Paul Mundt2008-12-22
* sh: Fix up section mismatches.Paul Mundt2008-03-05
* sh: Encode L1/L2 cache shape in auxvt.Paul Mundt2008-01-27
* sh: Preparation for uncached jumps through PMB.Stuart Menefy2008-01-27
* sh: Disable initial cache flush on SH-5.Paul Mundt2008-01-27
* sh: Don't reference UBC code in CPU init on sh64.Paul Mundt2008-01-27
* sh: Bring SMP support back from the dead.Paul Mundt2007-09-21
* sh: Support explicit L1 cache disabling.Paul Mundt2007-09-20
* sh: Tidy up dependencies for SH-2 build.Paul Mundt2007-06-11
* sh: speculative execution support for SH7780.Paul Mundt2007-05-06
* sh: Fix SH-3 cache entry_mask and way_size calculation.Paul Mundt2007-03-12
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-12
* sh: Use a per-cpu ASID cache.Paul Mundt2007-02-12
* sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato2006-12-05
* sh: Calculate shm alignment at runtime.Paul Mundt2006-09-27
* sh: Optimized cache handling for SH-4/SH-4A caches.Richard Curnow2006-09-27
* [PATCH] Don't pass boot parameters to argv_init[]OGAWA Hirofumi2006-03-31
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
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