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* MIPS: Calculate proper ebase value for 64-bit kernelsDavid Daney2010-04-12
| | | | | | | | | | | | | | | The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they are the same thing, for a 64-bit kernel they are not. It happens to kind of work on a 64-bit kernel as they both reference the same physical memory. However since the CPU uses the CKSEG0 base, determining if a J instruction will reach always gives the wrong result unless we use the same number the CPU uses. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1093/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: DB1200: Remove custom wait implementationManuel Lauss2010-04-12
| | | | | | | | | | | | | | While playing with the out-of-tree MAE driver module, the system would panic after a while in the db1200 custom wait code after wakeup due to a clobbered k0 register being used as target address of a store op. Remove the custom wait implementation and revert back to the Alchemy- recommended implementation already set as default. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Big Sur: Make defconfig more useful.Ralf Baechle2010-04-12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modulesAnton Altaparmakov2010-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp. 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules that use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on MIPS. All those functions are EXPORT_SYMBOL() so are meant to be allowed to be used by non-GPL kernel modules. These calls all take page protection as an argument which is normally a constant like PAGE_KERNEL. This commit causes all protection constants like PAGE_KERNEL to not be constants and instead to contain the GPL-only symbol _page_cachable_default. This means that all calls to __vmalloc(), vmap(), etc, cause non-GPL modules to fail to link with the complaint that they are trying to use the GPL-only symbol _page_cachable_default... Change EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for non-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc. Signed-off-by: Anton Altaparmakov <aia21@cantab.net> Cc: Chris Dearman <chris@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/1084/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Fix M3 TLB exception handler workaround.Ralf Baechle2010-04-12
| | | | | | The M3 workaround needs to cmpare the region and VPN2 fields only. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix build failure in board_bcm963xx.cFlorian Fainelli2010-04-12
| | | | | | | | | | | | Since 2083e8327aeeaf818b0e4522a9d2539835c60423, the SPROM is now registered in the board_prom_init callback, but it references variables and functions which are declared below. Move the variables and functions above board_prom_init. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1077/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add OR instruction.Ralf Baechle2010-04-12
| | | | | | This is needed for the fix of the M3 workaround. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.Ralf Baechle2010-04-12
| | | | | | | | | | Previously it was unconditionally used on all Sibyte family SOCs. The M3 bug has to be handled in the TLB exception handler which is extremly performance sensitive, so this modification is expected to deliver around 2-3% performance improvment. This is important as required changes to the M3 workaround will make it more costly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Initialize gpio_out_low & out_high to current value at boot.Maxime Bizon2010-04-12
| | | | | | | | | | To avoid a glitch during GPIO initialisation read GPIO output register values left by the firmware. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/903/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Register SSB SPROM fallback in board's first stage callbackFlorian Fainelli2010-04-12
| | | | | | | | Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1017/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix typo in cpu-feature-overrides file.Maxime Bizon2010-04-12
| | | | | | | | | | | Fix typo: CONFIG_BCMCPU_IS_63xx does not exist; CONFIG_BCM63XX_CPU_63xx is the valid config option. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/901/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add support for second uart.Maxime Bizon2010-04-12
| | | | | | | | | | | | | The BCm63xx SOC has two uarts. Some boards use the second one for bluetooth. This patch changes platform device registration code to handle this. Changes to the UART driver were already merged in 6a2c7eabfd09ca7986bf96b8958a87ca041a19d8. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/900/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix double gpio registration.Maxime Bizon2010-04-12
| | | | | | | | | | | bcm63xx_gpio_init is already called from prom_init to allow board to use them early, so we can remove the unneeded arch_initcall. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add DWVS0 boardFlorian Fainelli2010-04-12
| | | | | | | | | The DWVS0 board is a BCM6358-based board with an on-board OHCI controler. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1015/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add the RTA1025W-16 BCM6348-based board to suppported boards.Florian Fainelli2010-04-12
| | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1014/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix BCM6338 and BCM6345 gpio countFlorian Fainelli2010-04-12
| | | | | | | | | | The number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs available. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1016/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: libgcc.h: Checkpatch cleanupAndrea Gelmini2010-04-12
| | | | | | | | | | | | arch/mips/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> To: linux-kernel@vger.kernel.org Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-mips@linux-mips.org Cc: linux-sh@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/1007/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson-2F: Flush the branch target history in BTB and RASWu Zhangjin2010-04-12
| | | | | | | | | | | | | | | | | | As per chapter 15 "Errata: Issue of Out-of-order in loongson"[1] to work around the Loongson 2F erratum we need to do: "When switching from user mode to kernel mode, you should flush the branch target history such as BTB and RAS." [1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211 [2] English version of chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Patchwork: http://patchwork.linux-mips.org/patch/1066/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move signal trampolines off of the stack.David Daney2010-04-12
| | | | | | | | | | | | | | | | | | | | | | This is a follow on to the vdso patch. Since all processes now have signal trampolines permanently mapped, we can use those instead of putting the trampoline on the stack and invalidating the corresponding icache across all CPUs. We also get rid of a bunch of ICACHE_REFILLS_WORKAROUND_WAR code. [Ralf: GDB 7.1 which has the necessary modifications to allow backtracing over signal frames will supposedly be released tomorrow. The old signal frame format obsoleted by this patch exists in two variations, for sane processors and for those requiring ICACHE_REFILLS_WORKAROUND_WAR. So there was never a GDB which did support backtracing over signal frames on all MIPS systems. This convinved me this series should be applied and pushed upstream as soon as possible.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/974/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Preliminary VDSODavid Daney2010-04-12
| | | | | | | | | | | | | | | | This is a preliminary patch to add a vdso to all user processes. Still missing are ELF headers and .eh_frame information. But it is enough to allow us to move signal trampolines off of the stack. Note that emulation of branch delay slots in the FPU emulator still requires the stack. We allocate a single page (the vdso) and write all possible signal trampolines into it. The stack is moved down by one page and the vdso is mapped into this space. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/975/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add SYSCALL to uasm.David Daney2010-04-12
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSETFlorian Fainelli2010-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AR7, we already redefine PHYS_OFFSET to match the system specifities, it is however not sufficient when unsing dma_{map,unmap}_single, specifically in the ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA to work correctly. This patch fixes the following issue, seen in cpmac_open: ops[#1]: Cpu 0 $ 0 : 00000000 10008400 a0f5b120 00000000 $ 4 : 94c59000 94270f64 00000020 00000010 $ 8 : 00000010 94103ce0 0000000a 94c03400 $12 : ffffffff 94c03408 94c03410 00000001 $16 : a0f5ba20 00000041 94c592c0 94c59200 $20 : 94c59000 000005ee 00002000 9438c8f0 $24 : 00000010 00000000 $28 : 94fac000 94fadd58 94390000 942724a8 Hi : 00000000 Lo : 00000001 epc : 94272518 cpmac_open+0x208/0x3f8 Not tainted ra : 942724a8 cpmac_open+0x198/0x3f8 Status: 10008403 KERNEL EXL IE Cause : 3080000c BadVA : 00000000 PrId : 00018448 (MIPS 4KEc) Modules linked in: Process ifconfig (pid: 278, threadinfo=94fac000, task=94e79590, tls=00000000) Stack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0 94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4 00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043 00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8 7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913 ... Call Trace: [<94272518>] cpmac_open+0x208/0x3f8 [<9428e5a4>] dev_open+0x164/0x264 [<9428d810>] dev_change_flags+0xd0/0x1bc [<942f7f2c>] devinet_ioctl+0x2d8/0x908 [<942771f8>] sock_ioctl+0x29c/0x2fc [<941a0fb4>] vfs_ioctl+0x2c/0x7c [<941a16ec>] do_vfs_ioctl+0x5dc/0x630 [<941a1790>] sys_ioctl+0x50/0x88 [<94101e10>] stack_done+0x20/0x3c Signed-off-by: peter fuerst <post@pfrst.de> Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Fix phat finger of cpmac fixed_phy_addAlexander Clouter2010-04-12
| | | | | | | | | | | | Seems I trimmed one too many lines in 29ca2d81bd2a62fa86bc9a72ddadcf03d7daf795 (lmo) rsp 7084338eb8eb0cc021ba86c340157bad397f3f0b (kernel.org) which led to no functioning Ethernet on my WAG54Gv2. This patch restores the AWOL line. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1065/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Fix phat finger of reset bit in vlynq_high_dataAlexander Clouter2010-04-12
| | | | | | | | | | | Seems in my whitespace cleanup 0f2536082d01448daeced8d9e82c3ba1751fefa3 (lmo) rsp. 8c2961da46abd85a71d20f2b169bf80618e (kernel.org) caused AR7 to no longer get as far as init. Fixed my phat fingering. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1064/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add module info to the loongson2_clock driverWu Zhangjin2010-04-12
| | | | | | | | | | | | | | This patch fixes a kernel warning when loading the the loongson2_clock driver: "Feb 25 23:42:27 localhost kernel: [ 4.965000] loongson2_clock: module license 'unspecified' taints kernel." Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Reported-by: Liu Shiwei <liushiwei@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1045/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Ensure atomic execution of _rdmsr and _wrmsrWu Zhangjin2010-04-12
| | | | | | | | | | | | | On Lemote 2F CS5536 MSRs are accessed through a index / data register pair. The access sequence must be protected by a spinlock to be atomic. Without this rebooting in fs2f_reboot() may fail. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Initialize an atomic_t properly with ATOMIC_INIT(0).Robert P. J. Day2010-04-12
| | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix elfcore.c build warningRalf Baechle2010-04-12
| | | | | | | | | | kernel/elfcore.c includes <linux/elf.h> which includes the <asm/elf.h>. In <asm/elf.h>, struct pt_regs is declared inside the parameter list of the elf_dump_regs function which causes a kernel build warning. Fixed by adding a forward declaration of struct pt_regs. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memoryYang Shi2010-04-12
| | | | | | | | | | | | octeon_reserve32_memory is defined In Octeon's setup.c, so remove the redundant extern declaration of this variable. Signed-off-by: Yang Shi <yang.shi@windriver.com> To: f.fainelli@gmail.com Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1022/ Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Trace: Don't trace irqsoff for the idle processWu Zhangjin2010-04-12
| | | | | | | | | | | | | | | | | Like x86 did in arch/x86/kernel/{process_32.c,process_64.c}, also don't trace irqsoff for idle. If there's no useful work to be done, we don't care about the irqsoff duration. If we trace the idle process, the max duration of irqsoff will be the idle time and make the irqsoff tracer useless. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Patchwork: http://patchwork.linux-mips.org/patch/1044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: delay: Fix use of current_cpu_data in preemptable code.Ralf Baechle2010-04-12
| | | | | | | | | | | | | | | | | | | | This may lead to warnings like: BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989 caller is __udelay+0x14/0x70 Call Trace: [<ffffffff8110ad28>] dump_stack+0x8/0x34 [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110 [<ffffffff812d90bc>] __udelay+0x14/0x70 [<ffffffff81378274>] md_notify_reboot+0x12c/0x148 [<ffffffff81161054>] notifier_call_chain+0x64/0xc8 [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0 [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38 [<ffffffff811556cc>] kernel_restart+0x14/0x50 [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0 [<ffffffff81103684>] handle_sysn32+0x44/0x84 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Remove #if 0 code.David Daney2010-04-12
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLBDavid Daney2010-04-12
| | | | | | | | | | The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported. Remove the dead code controlled by it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cavium: Remove unused watchdog code.Ralf Baechle2010-04-12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix build breakage if CONFIG_DEBUG_FS is enabled.Ralf Baechle2010-04-12
| | | | | | | | | Caused by 38b7827fcdd660f591d645bd3ae6644456a4773c - no, cpu_local_* was not unused. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Christoph Lameter <cl@linux-foundation.org> Acked-by: David Daney <ddaney@caviumnetworks.com>
* include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* init dynamic bin_attribute structuresWolfram Sang2010-03-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6992f5334995af474c2b58d010d08bc597f0f2fe ("sysfs: Use one lockdep class per sysfs attribute.") introduced this requirement. First, at25 was fixed manually. Then, other occurences were found with coccinelle and the following semantic patch. Results were reviewed and fixed up: @ init @ identifier struct_name, bin; @@ struct struct_name { ... struct bin_attribute bin; ... }; @ main extends init @ expression E; statement S; identifier name, err; @@ ( struct struct_name *name; | - struct struct_name *name = NULL; + struct struct_name *name; ) ... ( sysfs_bin_attr_init(&name->bin); | + sysfs_bin_attr_init(&name->bin); if (sysfs_create_bin_file(E, &name->bin)) S | + sysfs_bin_attr_init(&name->bin); err = sysfs_create_bin_file(E, &name->bin); ) Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* pci-dma: add linux/pci-dma.h to linux/pci.hFUJITA Tomonori2010-03-12
| | | | | | | | | | | | All the architectures properly set NEED_DMA_MAP_STATE now so we can safely add linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h inclusion in arch's asm/pci.h Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* pci-dma: mips: use include/linux/pci-dma.hFUJITA Tomonori2010-03-12
| | | | | | | | Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mips: use generic ptrace_resume codeChristoph Hellwig2010-03-12
| | | | | | | | | | | | | | | | Use the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT and PTRACE_KILL. Also the TIF_SYSCALL_TRACE thread flag is now cleared on PTRACE_KILL which it previously wasn't which is consistent with all architectures using the modern ptrace code. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Roland McGrath <roland@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Add generic sys_olduname()Christoph Hellwig2010-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic implementations of the old and really old uname system calls. Note that sh only implements sys_olduname but not sys_oldolduname, but I'm not going to bother with another ifdef for that special case. m32r implemented an old uname but never wired it up, so kill it, too. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: James Morris <jmorris@namei.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* improve sys_newuname() for compat architecturesChristoph Hellwig2010-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | On an architecture that supports 32-bit compat we need to override the reported machine in uname with the 32-bit value. Instead of doing this separately in every architecture introduce a COMPAT_UTS_MACHINE define in <asm/compat.h> and apply it directly in sys_newuname(). Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: James Morris <jmorris@namei.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Add generic sys_ipc wrapperChristoph Hellwig2010-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a generic implementation of the ipc demultiplexer syscall. Except for s390 and sparc64 all implementations of the sys_ipc are nearly identical. There are slight differences in the types of the parameters, where mips and powerpc as the only 64-bit architectures with sys_ipc use unsigned long for the "third" argument as it gets casted to a pointer later, while it traditionally is an "int" like most other paramters. frv goes even further and uses unsigned long for all parameters execept for "ptr" which is a pointer type everywhere. The change from int to unsigned long for "third" and back to "int" for the others on frv should be fine due to the in-register calling conventions for syscalls (we already had a similar issue with the generic sys_ptrace), but I'd prefer to have the arch maintainers looks over this in details. Except for that h8300, m68k and m68knommu lack an impplementation of the semtimedop sub call which this patch adds, and various architectures have gets used - at least on i386 it seems superflous as the compat code on x86-64 and ia64 doesn't even bother to implement it. [akpm@linux-foundation.org: add sys_ipc to sys_ni.c] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Reviewed-by: H. Peter Anvin <hpa@zytor.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: James Morris <jmorris@namei.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: David Howells <dhowells@redhat.com> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sysdev: Pass attribute in sysdev_class attributes show/storeAndi Kleen2010-03-07
| | | | | | | | | | | | | | | | | | | | | | | Passing the attribute to the low level IO functions allows all kinds of cleanups, by sharing low level IO code without requiring an own function for every piece of data. Also drivers can extend the attributes with own data fields and use that in the low level function. Similar to sysdev_attributes and normal attributes. This is a tree-wide sweep, converting everything in one go. No functional changes in this patch other than passing the new argument everywhere. Tested on x86, the non x86 parts are uncompiled. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'for-linus' of ↵Linus Torvalds2010-03-03
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu: percpu: add __percpu sparse annotations to what's left percpu: add __percpu sparse annotations to fs percpu: add __percpu sparse annotations to core kernel subsystems local_t: Remove leftover local.h this_cpu: Remove pageset_notifier this_cpu: Page allocator conversion percpu, x86: Generic inc / dec percpu instructions local_t: Move local.h include to ringbuffer.c and ring_buffer_benchmark.c module: Use this_cpu_xx to dynamically allocate counters local_t: Remove cpu_local_xx macros percpu: refactor the code in pcpu_[de]populate_chunk() percpu: remove compile warnings caused by __verify_pcpu_ptr() percpu: make accessors check for percpu pointer in sparse percpu: add __percpu for sparse. percpu: make access macros universal percpu: remove per_cpu__ prefix.
| * Merge branch 'master' into percpuTejun Heo2010-02-02
| |\
| * | local_t: Remove cpu_local_xx macrosChristoph Lameter2010-01-05
| | | | | | | | | | | | | | | | | | | | | These macros have not been used for awhile now. Signed-off-by: Christoph Lameter <cl@linux-foundation.org> Signed-off-by: Tejun Heo <tj@kernel.org>
* | | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-03-01
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits) ARM: Eliminate decompressor -Dstatic= PIC hack ARM: 5958/1: ARM: U300: fix inverted clk round rate ARM: 5956/1: misplaced parentheses ARM: 5955/1: ep93xx: move timer defines into core.c and document ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c ARM: 5953/1: ep93xx: fix broken build of clock.c ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig ARM: 5949/1: NUC900 add gpio virtual memory map ARM: 5948/1: Enable timer0 to time4 clock support for nuc910 ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk ARM: make_coherent(): fix problems with highpte, part 2 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself ARM: 5945/1: ep93xx: include correct irq.h in core.c ARM: 5933/1: amba-pl011: support hardware flow control ARM: 5930/1: Add PKMAP area description to memory.txt. ARM: 5929/1: Add checks to detect overlap of memory regions. ARM: 5928/1: Change type of VMALLOC_END to unsigned long. ARM: 5927/1: Make delimiters of DMA area globally visibly. ARM: 5926/1: Add "Virtual kernel memory..." printout. ARM: 5920/1: OMAP4: Enable L2 Cache ... Fix up trivial conflict in arch/arm/mach-mx25/clock.c
| * | | MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itselfRussell King2010-02-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'x86-mm-for-linus' of ↵Linus Torvalds2010-02-28
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, mm: Unify kernel_physical_mapping_init() API x86, mm: Allow highmem user page tables to be disabled at boot time x86: Do not reserve brk for DMI if it's not going to be used x86: Convert tlbstate_lock to raw_spinlock x86: Use the generic page_is_ram() x86: Remove BIOS data range from e820 Move page_is_ram() declaration to mm.h Generic page_is_ram: use __weak resources: introduce generic page_is_ram()
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