Merge branch 'master' into percpu

38 files changed, 527 insertions, 664 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9541171f1220..8b5d174685f0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_LZO
 
 config SYS_SUPPORTS_ZBOOT_UART16550
         bool
diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c
index 19c1c82849ff..5c68569344c1 100644
--- a/arch/mips/alchemy/common/dbdma.c
+++ b/arch/mips/alchemy/common/dbdma.c
@@ -613,7 +613,7 @@ u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
         dma_cache_wback_inv((unsigned long)buf, nbytes);
         dp->dscr_cmd0 |= DSCR_CMD0_V;   /* Let it rip */
         au_sync();
-        dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
+        dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
         ctp->chan_ptr->ddma_dbell = 0;
 
         /* Get next descriptor pointer. */
@@ -676,7 +676,7 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
         dma_cache_inv((unsigned long)buf, nbytes);
         dp->dscr_cmd0 |= DSCR_CMD0_V;   /* Let it rip */
         au_sync();
-        dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
+        dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
         ctp->chan_ptr->ddma_dbell = 0;
 
         /* Get next descriptor pointer. */
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c
index 5ad6f1db6567..c1fdd3682812 100644
--- a/arch/mips/ar7/prom.c
+++ b/arch/mips/ar7/prom.c
@@ -219,14 +219,6 @@ static void __init console_config(void)
         if (strstr(prom_getcmdline(), "console="))
                 return;
 
-#ifdef CONFIG_KGDB
-        if (!strstr(prom_getcmdline(), "nokgdb")) {
-                strcat(prom_getcmdline(), " console=kgdb");
-                kgdb_enabled = 1;
-                return;
-        }
-#endif
-
         s = prom_getenv("modetty0");
         if (s) {
                 baud = simple_strtoul(s, &p, 10);
@@ -280,13 +272,6 @@ static inline void serial_out(int offset, int value)
         writel(value, (void *)PORT(offset));
 }
 
-char prom_getchar(void)
-{
-        while (!(serial_in(UART_LSR) & UART_LSR_DR))
-                ;
-        return serial_in(UART_RX);
-}
-
 int prom_putchar(char c)
 {
         while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 05a35cf5963d..1fe412c43171 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -346,27 +346,26 @@ static struct board_info __initdata board_96348gw = {
 };
 
 static struct board_info __initdata board_FAST2404 = {
-        .name                           = "F@ST2404",
-        .expected_cpu_id                = 0x6348,
-
-        .has_enet0                      = 1,
-        .has_enet1                      = 1,
-        .has_pci                        = 1,
+        .name                           = "F@ST2404",
+        .expected_cpu_id                = 0x6348,
 
-        .enet0 = {
-                .has_phy                = 1,
-                .use_internal_phy       = 1,
-        },
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
 
-        .enet1 = {
-                .force_speed_100        = 1,
-                .force_duplex_full      = 1,
-        },
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
 
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
 
-        .has_ohci0 = 1,
-        .has_pccard = 1,
-        .has_ehci0 = 1,
+        .has_ohci0                      = 1,
+        .has_pccard                     = 1,
+        .has_ehci0                      = 1,
 };
 
 static struct board_info __initdata board_DV201AMR = {
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index fb284fbc5853..be252efa0757 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -40,9 +40,6 @@ void __init prom_init(void)
         reg &= ~mask;
         bcm_perf_writel(reg, PERF_CKCTL_REG);
 
-        /* assign command line from kernel config */
-        strcpy(arcs_cmdline, CONFIG_CMDLINE);
-
         /* register gpiochip */
         bcm63xx_gpio_init();
 
diff --git a/arch/mips/boot/.gitignore b/arch/mips/boot/.gitignore
index ba63401c6e10..4667a5f9280b 100644
--- a/arch/mips/boot/.gitignore
+++ b/arch/mips/boot/.gitignore
@@ -1,4 +1,5 @@
 mkboot
 elf2ecoff
+vmlinux.*
 zImage
 zImage.tmp
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile
index 094bc84765a3..e39a08edcaaa 100644
--- a/arch/mips/boot/Makefile
+++ b/arch/mips/boot/Makefile
@@ -28,7 +28,7 @@ VMLINUX = vmlinux
 all: vmlinux.ecoff vmlinux.srec
 
 vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
-        $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
+        $(obj)/elf2ecoff $(VMLINUX) $(obj)/vmlinux.ecoff $(E2EFLAGS)
 
 $(obj)/elf2ecoff: $(obj)/elf2ecoff.c
         $(HOSTCC) -o $@ $^
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index e27f40bbd4e5..9df903d714d7 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -14,8 +14,11 @@
 
 # compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE
 VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1)
-VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
-VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" ] && printf %x $$(($(VMLINUX_LOAD_ADDRESS) + $(VMLINUX_SIZE))))
+VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo -n $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
+# VMLINUZ_LOAD_ADDRESS = concat "high32 of VMLINUX_LOAD_ADDRESS" and "(low32 of VMLINUX_LOAD_ADDRESS) + VMLINUX_SIZE"
+HIGH32 := $(shell A=$(VMLINUX_LOAD_ADDRESS); [ $${\#A} -gt 10 ] && expr substr "$(VMLINUX_LOAD_ADDRESS)" 3 $$(($${\#A} - 10)))
+LOW32 := $(shell [ -n "$(HIGH32)" ] && A=11 || A=3; expr substr "$(VMLINUX_LOAD_ADDRESS)" $${A} 8)
+VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" -a -n "$(LOW32)" ] && printf "$(HIGH32)%08x" $$(($(VMLINUX_SIZE) + 0x$(LOW32))))
 
 # set the default size of the mallocing area for decompressing
 BOOT_HEAP_SIZE := 0x400000
@@ -41,9 +44,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE)
 suffix_$(CONFIG_KERNEL_GZIP)  = gz
 suffix_$(CONFIG_KERNEL_BZIP2) = bz2
 suffix_$(CONFIG_KERNEL_LZMA)  = lzma
+suffix_$(CONFIG_KERNEL_LZO)   = lzo
 tool_$(CONFIG_KERNEL_GZIP)    = gzip
 tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
 tool_$(CONFIG_KERNEL_LZMA)    = lzma
+tool_$(CONFIG_KERNEL_LZO)     = lzo
 $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
         $(call if_changed,$(tool_y))
 
@@ -56,7 +61,7 @@ $(obj)/piggy.o: $(obj)/vmlinux.$(suffix_y) $(obj)/dummy.o
 LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T
 vmlinuz: $(src)/ld.script $(obj-y) $(obj)/piggy.o
         $(call if_changed,ld)
-        $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap $@
+        $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) $@
 
 #
 # Some DECstations need all possible sections of an ECOFF executable
@@ -84,14 +89,11 @@ vmlinuz.ecoff: $(obj)/../elf2ecoff $(VMLINUZ)
 $(obj)/../elf2ecoff: $(src)/../elf2ecoff.c
         $(Q)$(HOSTCC) -o $@ $^
 
-drop-sections   = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
-strip-flags     = $(addprefix --remove-section=,$(drop-sections))
-
-OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary $(strip-flags)
+OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary
 vmlinuz.bin: vmlinuz
         $(call if_changed,objcopy)
 
-OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec $(strip-flags)
+OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec
 vmlinuz.srec: vmlinuz
         $(call if_changed,objcopy)
 
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
index 67330c2f7318..55d02b3a6712 100644
--- a/arch/mips/boot/compressed/decompress.c
+++ b/arch/mips/boot/compressed/decompress.c
@@ -28,8 +28,6 @@ char *zimage_start;
 
 /* The linker tells us where the image is. */
 extern unsigned char __image_begin, __image_end;
-extern unsigned char __ramdisk_begin, __ramdisk_end;
-unsigned long initrd_size;
 
 /* debug interfaces  */
 extern void puts(const char *s);
@@ -79,6 +77,10 @@ void *memset(void *s, int c, size_t n)
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_LZO
+#include "../../../../lib/decompress_unlzo.c"
+#endif
+
 void decompress_kernel(unsigned long boot_heap_start)
 {
         int zimage_size;
@@ -102,14 +104,6 @@ void decompress_kernel(unsigned long boot_heap_start)
         puthex((unsigned long)(zimage_size + zimage_start));
         puts("\n");
 
-        if (initrd_size) {
-                puts("initrd at:     ");
-                puthex((unsigned long)(&__ramdisk_begin));
-                puts(" ");
-                puthex((unsigned long)(&__ramdisk_end));
-                puts("\n");
-        }
-
         /* this area are prepared for mallocing when decompressing */
         free_mem_ptr = boot_heap_start;
         free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE;
diff --git a/arch/mips/boot/compressed/ld.script b/arch/mips/boot/compressed/ld.script
index 29e9f4c0d5d8..613a35b02f50 100644
--- a/arch/mips/boot/compressed/ld.script
+++ b/arch/mips/boot/compressed/ld.script
@@ -1,150 +1,67 @@
+/*
+ * ld.script for compressed kernel support of MIPS
+ *
+ * Copyright (C) 2009 Lemote Inc.
+ * Author: Wu Zhangjin <wuzj@lemote.com>
+ */
+
 OUTPUT_ARCH(mips)
 ENTRY(start)
 SECTIONS
 {
-  /* Read-only sections, merged into text segment: */
-  .init          : { *(.init)           } =0
-  .text      :
-  {
-    _ftext = . ;
-    *(.text)
-    *(.rodata)
-    *(.rodata1)
-    /* .gnu.warning sections are handled specially by elf32.em.  */
-    *(.gnu.warning)
-  } =0
-  .kstrtab : { *(.kstrtab) }
-
-  . = ALIGN(16);                /* Exception table */
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  __start___dbe_table = .;      /* Exception table for data bus errors */
-  __dbe_table : { *(__dbe_table) }
-  __stop___dbe_table = .;
-
-  __start___ksymtab = .;        /* Kernel symbol table */
-  __ksymtab : { *(__ksymtab) }
-  __stop___ksymtab = .;
-
-  _etext = .;
-
-  . = ALIGN(8192);
-  .data.init_task : { *(.data.init_task) }
-
-  /* Startup code */
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(16);
-  __setup_start = .;
-  .setup.init : { *(.setup.init) }
-  __setup_end = .;
-  __initcall_start = .;
-  .initcall.init : { *(.initcall.init) }
-  __initcall_end = .;
-  . = ALIGN(4096);      /* Align double page for init_task_union */
-  __init_end = .;
-
-  . = ALIGN(4096);
-  .data.page_aligned : { *(.data.idt) }
-
-  . = ALIGN(32);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+        /* . = VMLINUZ_LOAD_ADDRESS */
+        /* read-only */
+        _text = .;      /* Text and read-only data */
+        .text   : {
+                _ftext = . ;
+                *(.text)
+                *(.rodata)
+        } = 0
+        _etext = .;     /* End of text section */
 
-  .fini      : { *(.fini)    } =0
-  .reginfo : { *(.reginfo) }
-  /* Adjust the address for the data segment.  We want to adjust up to
-     the same address within the page on the next page up.  It would
-     be more correct to do this:
-       . = .;
-     The current expression does not correctly handle the case of a
-     text segment ending precisely at the end of a page; it causes the
-     data segment to skip a page.  The above expression does not have
-     this problem, but it will currently (2/95) cause BFD to allocate
-     a single segment, combining both text and data, for this case.
-     This will prevent the text segment from being shared among
-     multiple executions of the program; I think that is more
-     important than losing a page of the virtual address space (note
-     that no actual memory is lost; the page which is skipped can not
-     be referenced).  */
-  . = .;
-  .data    :
-  {
-    _fdata = . ;
-    *(.data)
+        /* writable */
+        .data   : {     /* Data */
+                _fdata = . ;
+                *(.data)
+                /* Put the compressed image here, so bss is on the end. */
+                __image_begin = .;
+                *(.image)
+                __image_end = .;
+                CONSTRUCTORS
+        }
+        .sdata  : { *(.sdata) }
+        . = ALIGN(4);
+        _edata  =  .;   /* End of data section */
 
-   /* Put the compressed image here, so bss is on the end. */
-   __image_begin = .;
-   *(.image)
-   __image_end = .;
-   /* Align the initial ramdisk image (INITRD) on page boundaries. */
-   . = ALIGN(4096);
-   __ramdisk_begin = .;
-   *(.initrd)
-   __ramdisk_end = .;
-   . = ALIGN(4096);
+        /* BSS */
+        __bss_start = .;
+        _fbss = .;
+        .sbss   : { *(.sbss) *(.scommon) }
+        .bss    : {
+                *(.dynbss)
+                *(.bss)
+                *(COMMON)
+        }
+        .  = ALIGN(4);
+        _end = . ;
 
-    CONSTRUCTORS
-  }
-  .data1   : { *(.data1) }
-  _gp = . + 0x8000;
-  .lit8 : { *(.lit8) }
-  .lit4 : { *(.lit4) }
-  .ctors         : { *(.ctors)   }
-  .dtors         : { *(.dtors)   }
-  .got           : { *(.got.plt) *(.got) }
-  .dynamic       : { *(.dynamic) }
-  /* We want the small data sections together, so single-instruction offsets
-     can access them all, and initialized data all before uninitialized, so
-     we can shorten the on-disk segment size.  */
-  .sdata     : { *(.sdata) }
-  . = ALIGN(4);
-  _edata  =  .;
-  PROVIDE (edata = .);
+        /* These are needed for ELF backends which have not yet been converted
+         * to the new style linker.  */
 
-  __bss_start = .;
-  _fbss = .;
-  .sbss      : { *(.sbss) *(.scommon) }
-  .bss       :
-  {
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   .  = ALIGN(4);
-  _end = . ;
-  PROVIDE (end = .);
-  }
+        .stab 0 : { *(.stab) }
+        .stabstr 0 : { *(.stabstr) }
 
-  /* Sections to be discarded */
-  /DISCARD/ :
-  {
-        *(.text.exit)
-        *(.data.exit)
-        *(.exitcall.exit)
-  }
+        /* These must appear regardless of  .  */
+        .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
+        .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
 
-  /* This is the MIPS specific mdebug section.  */
-  .mdebug : { *(.mdebug) }
-  /* These are needed for ELF backends which have not yet been
-     converted to the new style linker.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  /* DWARF debug sections.
-     Symbols in the .debug DWARF section are relative to the beginning of the
-     section so we begin .debug at 0.  It's not clear yet what needs to happen
-     for the others.   */
-  .debug          0 : { *(.debug) }
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  .line           0 : { *(.line) }
-  /* These must appear regardless of  .  */
-  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
-  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
-  .comment : { *(.comment) }
-  .note : { *(.note) }
+        /* Sections to be discarded */
+        /DISCARD/       : {
+                *(.MIPS.options)
+                *(.options)
+                *(.pdr)
+                *(.reginfo)
+                *(.comment)
+                *(.note)
+        }
 }
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index 96110f217dcd..0bf4bbe04ae2 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -50,6 +50,38 @@ static struct clocksource clocksource_mips = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+unsigned long long notrace sched_clock(void)
+{
+        /* 64-bit arithmatic can overflow, so use 128-bit.  */
+#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
+        u64 t1, t2, t3;
+        unsigned long long rv;
+        u64 mult = clocksource_mips.mult;
+        u64 shift = clocksource_mips.shift;
+        u64 cnt = read_c0_cvmcount();
+
+        asm (
+                "dmultu\t%[cnt],%[mult]\n\t"
+                "nor\t%[t1],$0,%[shift]\n\t"
+                "mfhi\t%[t2]\n\t"
+                "mflo\t%[t3]\n\t"
+                "dsll\t%[t2],%[t2],1\n\t"
+                "dsrlv\t%[rv],%[t3],%[shift]\n\t"
+                "dsllv\t%[t1],%[t2],%[t1]\n\t"
+                "or\t%[rv],%[t1],%[rv]\n\t"
+                : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3)
+                : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
+                : "hi", "lo");
+        return rv;
+#else
+        /* GCC > 4.3 do it the easy way.  */
+        unsigned int __attribute__((mode(TI))) t;
+        t = read_c0_cvmcount();
+        t = t * clocksource_mips.mult;
+        return (unsigned long long)(t >> clocksource_mips.shift);
+#endif
+}
+
 void __init plat_time_init(void)
 {
         clocksource_mips.rating = 300;
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index b51644227241..ec3b2c417f7c 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -97,26 +97,18 @@ void __init plat_mem_setup(void)
 
 void __init prom_init(void)
 {
-        int narg, indx, posn, nchr;
         unsigned long memsz;
+        int argc, i;
         char **argv;
 
         memsz = fw_arg0 & 0x7fff0000;
-        narg = fw_arg0 & 0x0000ffff;
-
-        if (narg) {
-                arcs_cmdline[0] = '\0';
-                argv = (char **) fw_arg1;
-                posn = 0;
-                for (indx = 1; indx < narg; ++indx) {
-                        nchr = strlen(argv[indx]);
-                        if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
-                                break;
-                        if (posn)
-                                arcs_cmdline[posn++] = ' ';
-                        strcpy(arcs_cmdline + posn, argv[indx]);
-                        posn += nchr;
-                }
+        argc = fw_arg0 & 0x0000ffff;
+        argv = (char **)fw_arg1;
+
+        for (i = 1; i < argc; i++) {
+                strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
+                if (i < (argc - 1))
+                        strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
         }
 
         add_memory_region(0x0, memsz, BOOT_MEM_RAM);
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 06960364c96b..dea4aed6478f 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -135,6 +135,7 @@ extern void free_irqno(unsigned int irq);
 #define CP0_LEGACY_COMPARE_IRQ 7
 
 extern int cp0_compare_irq;
+extern int cp0_compare_irq_shift;
 extern int cp0_perfcount_irq;
 
 #endif /* _ASM_IRQ_H */
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 09a59bcc1b07..1b1a7d1632b9 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -24,7 +24,9 @@ extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
 
 #define cpu_to_node(cpu)        (sn_cpu_info[(cpu)].p_nodeid)
 #define parent_node(node)       (node)
-#define cpumask_of_node(node)   (&hub_data(node)->h_cpus)
+#define cpumask_of_node(node)   ((node) == -1 ?                         \
+                                 cpu_all_mask :                         \
+                                 &hub_data(node)->h_cpus)
 struct pci_bus;
 extern int pcibus_to_node(struct pci_bus *);
 
diff --git a/arch/mips/include/asm/mach-powertv/asic_reg_map.h b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
new file mode 100644
index 000000000000..6f26cb09828e
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
@@ -0,0 +1,90 @@
+/*
+ *                              asic_reg_map.h
+ *
+ * A macro-enclosed list of the elements for the register_map structure for
+ * use in defining and manipulating the structure.
+ *
+ * Copyright (C) 2009  Cisco Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+REGISTER_MAP_ELEMENT(eic_slow0_strt_add)
+REGISTER_MAP_ELEMENT(eic_cfg_bits)
+REGISTER_MAP_ELEMENT(eic_ready_status)
+REGISTER_MAP_ELEMENT(chipver3)
+REGISTER_MAP_ELEMENT(chipver2)
+REGISTER_MAP_ELEMENT(chipver1)
+REGISTER_MAP_ELEMENT(chipver0)
+REGISTER_MAP_ELEMENT(uart1_intstat)
+REGISTER_MAP_ELEMENT(uart1_inten)
+REGISTER_MAP_ELEMENT(uart1_config1)
+REGISTER_MAP_ELEMENT(uart1_config2)
+REGISTER_MAP_ELEMENT(uart1_divisorhi)
+REGISTER_MAP_ELEMENT(uart1_divisorlo)
+REGISTER_MAP_ELEMENT(uart1_data)
+REGISTER_MAP_ELEMENT(uart1_status)
+REGISTER_MAP_ELEMENT(int_stat_3)
+REGISTER_MAP_ELEMENT(int_stat_2)
+REGISTER_MAP_ELEMENT(int_stat_1)
+REGISTER_MAP_ELEMENT(int_stat_0)
+REGISTER_MAP_ELEMENT(int_config)
+REGISTER_MAP_ELEMENT(int_int_scan)
+REGISTER_MAP_ELEMENT(ien_int_3)
+REGISTER_MAP_ELEMENT(ien_int_2)
+REGISTER_MAP_ELEMENT(ien_int_1)
+REGISTER_MAP_ELEMENT(ien_int_0)
+REGISTER_MAP_ELEMENT(int_level_3_3)
+REGISTER_MAP_ELEMENT(int_level_3_2)
+REGISTER_MAP_ELEMENT(int_level_3_1)
+REGISTER_MAP_ELEMENT(int_level_3_0)
+REGISTER_MAP_ELEMENT(int_level_2_3)
+REGISTER_MAP_ELEMENT(int_level_2_2)
+REGISTER_MAP_ELEMENT(int_level_2_1)
+REGISTER_MAP_ELEMENT(int_level_2_0)
+REGISTER_MAP_ELEMENT(int_level_1_3)
+REGISTER_MAP_ELEMENT(int_level_1_2)
+REGISTER_MAP_ELEMENT(int_level_1_1)
+REGISTER_MAP_ELEMENT(int_level_1_0)
+REGISTER_MAP_ELEMENT(int_level_0_3)
+REGISTER_MAP_ELEMENT(int_level_0_2)
+REGISTER_MAP_ELEMENT(int_level_0_1)
+REGISTER_MAP_ELEMENT(int_level_0_0)
+REGISTER_MAP_ELEMENT(int_docsis_en)
+REGISTER_MAP_ELEMENT(mips_pll_setup)
+REGISTER_MAP_ELEMENT(usb_fs)
+REGISTER_MAP_ELEMENT(test_bus)
+REGISTER_MAP_ELEMENT(crt_spare)
+REGISTER_MAP_ELEMENT(usb2_ohci_int_mask)
+REGISTER_MAP_ELEMENT(usb2_strap)
+REGISTER_MAP_ELEMENT(ehci_hcapbase)
+REGISTER_MAP_ELEMENT(ohci_hc_revision)
+REGISTER_MAP_ELEMENT(bcm1_bs_lmi_steer)
+REGISTER_MAP_ELEMENT(usb2_control)
+REGISTER_MAP_ELEMENT(usb2_stbus_obc)
+REGISTER_MAP_ELEMENT(usb2_stbus_mess_size)
+REGISTER_MAP_ELEMENT(usb2_stbus_chunk_size)
+REGISTER_MAP_ELEMENT(pcie_regs)
+REGISTER_MAP_ELEMENT(tim_ch)
+REGISTER_MAP_ELEMENT(tim_cl)
+REGISTER_MAP_ELEMENT(gpio_dout)
+REGISTER_MAP_ELEMENT(gpio_din)
+REGISTER_MAP_ELEMENT(gpio_dir)
+REGISTER_MAP_ELEMENT(watchdog)
+REGISTER_MAP_ELEMENT(front_panel)
+REGISTER_MAP_ELEMENT(misc_clk_ctl1)
+REGISTER_MAP_ELEMENT(misc_clk_ctl2)
+REGISTER_MAP_ELEMENT(crt_ext_ctl)
+REGISTER_MAP_ELEMENT(register_maps)
diff --git a/arch/mips/include/asm/mach-powertv/asic_regs.h b/arch/mips/include/asm/mach-powertv/asic_regs.h
index 9a65c93782f9..1e11236c6dbc 100644
--- a/arch/mips/include/asm/mach-powertv/asic_regs.h
+++ b/arch/mips/include/asm/mach-powertv/asic_regs.h
@@ -35,11 +35,12 @@ enum asic_type {
 #define CRONUS_11       0x0B4C1C21
 #define CRONUSLITE_10   0x0B4C1C40
 
-#define NAND_FLASH_BASE 0x03000000
-#define ZEUS_IO_BASE    0x09000000
+#define NAND_FLASH_BASE         0x03000000
 #define CALLIOPE_IO_BASE        0x08000000
-#define CRONUS_IO_BASE  0x09000000
-#define ASIC_IO_SIZE    0x01000000
+#define CRONUS_IO_BASE          0x09000000
+#define ZEUS_IO_BASE            0x09000000
+
+#define ASIC_IO_SIZE            0x01000000
 
 /* Definitions for backward compatibility */
 #define UART1_INTSTAT   uart1_intstat
@@ -52,96 +53,62 @@ enum asic_type {
 #define UART1_STATUS    uart1_status
 
 /* ASIC register enumeration */
+union register_map_entry {
+        unsigned long phys;
+        u32 *virt;
+};
+
+#define REGISTER_MAP_ELEMENT(x) union register_map_entry x;
 struct register_map {
-        u32 eic_slow0_strt_add;
-        u32 eic_cfg_bits;
-        u32 eic_ready_status;
-
-        u32 chipver3;
-        u32 chipver2;
-        u32 chipver1;
-        u32 chipver0;
-
-        u32 uart1_intstat;
-        u32 uart1_inten;
-        u32 uart1_config1;
-        u32 uart1_config2;
-        u32 uart1_divisorhi;
-        u32 uart1_divisorlo;
-        u32 uart1_data;
-        u32 uart1_status;
-
-        u32 int_stat_3;
-        u32 int_stat_2;
-        u32 int_stat_1;
-        u32 int_stat_0;
-        u32 int_config;
-        u32 int_int_scan;
-        u32 ien_int_3;
-        u32 ien_int_2;
-        u32 ien_int_1;
-        u32 ien_int_0;
-        u32 int_level_3_3;
-        u32 int_level_3_2;
-        u32 int_level_3_1;
-        u32 int_level_3_0;
-        u32 int_level_2_3;
-        u32 int_level_2_2;
-        u32 int_level_2_1;
-        u32 int_level_2_0;
-        u32 int_level_1_3;
-        u32 int_level_1_2;
-        u32 int_level_1_1;
-        u32 int_level_1_0;
-        u32 int_level_0_3;
-        u32 int_level_0_2;
-        u32 int_level_0_1;
-        u32 int_level_0_0;
-        u32 int_docsis_en;
-
-        u32 mips_pll_setup;
-        u32 usb_fs;
-        u32 test_bus;
-        u32 crt_spare;
-        u32 usb2_ohci_int_mask;
-        u32 usb2_strap;
-        u32 ehci_hcapbase;
-        u32 ohci_hc_revision;
-        u32 bcm1_bs_lmi_steer;
-        u32 usb2_control;
-        u32 usb2_stbus_obc;
-        u32 usb2_stbus_mess_size;
-        u32 usb2_stbus_chunk_size;
-
-        u32 pcie_regs;
-        u32 tim_ch;
-        u32 tim_cl;
-        u32 gpio_dout;
-        u32 gpio_din;
-        u32 gpio_dir;
-        u32 watchdog;
-        u32 front_panel;
-
-        u32 register_maps;
+#include <asm/mach-powertv/asic_reg_map.h>
 };
+#undef REGISTER_MAP_ELEMENT
+
+/**
+ * register_map_offset_phys - add an offset to the physical address
+ * @map:        Pointer to the &struct register_map
+ * @offset:     Value to add
+ *
+ * Only adds the base to non-zero physical addresses
+ */
+static inline void register_map_offset_phys(struct register_map *map,
+        unsigned long offset)
+{
+#define REGISTER_MAP_ELEMENT(x)         do {                            \
+                if (map->x.phys != 0)                                   \
+                        map->x.phys += offset;                          \
+        } while (false);
+
+#include <asm/mach-powertv/asic_reg_map.h>
+#undef REGISTER_MAP_ELEMENT
+}
+
+/**
+ * register_map_virtualize - Convert &register_map to virtual addresses
+ * @map:        Pointer to &register_map to virtualize
+ */
+static inline void register_map_virtualize(struct register_map *map)
+{
+#define REGISTER_MAP_ELEMENT(x)         do {                            \
+                map->x.virt = (!map->x.phys) ? NULL :                   \
+                        UNCAC_ADDR(phys_to_virt(map->x.phys));          \
+        } while (false);
+
+#include <asm/mach-powertv/asic_reg_map.h>
+#undef REGISTER_MAP_ELEMENT
+}
 
-extern enum asic_type asic;
-extern const struct register_map *register_map;
-extern unsigned long asic_phy_base;     /* Physical address of ASIC */
-extern unsigned long asic_base;         /* Virtual address of ASIC */
+extern struct register_map _asic_register_map;
 
 /*
  * Macros to interface to registers through their ioremapped address
- * asic_reg_offset      Returns the offset of a given register from the start
- *                      of the ASIC address space
  * asic_reg_phys_addr   Returns the physical address of the given register
  * asic_reg_addr        Returns the iomapped virtual address of the given
  *                      register.
  */
-#define asic_reg_offset(x)      (register_map->x)
-#define asic_reg_phys_addr(x)   (asic_phy_base + asic_reg_offset(x))
-#define asic_reg_addr(x) \
-        ((unsigned int *) (asic_base + asic_reg_offset(x)))
+#define asic_reg_addr(x)        (_asic_register_map.x.virt)
+#define asic_reg_phys_addr(x)   (virt_to_phys((void *) CAC_ADDR(        \
+                                        (unsigned long) asic_reg_addr(x))))
 
 /*
  * The asic_reg macro is gone. It should be replaced by either asic_read or
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a581d60cbcc2..f4ab3139d737 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -406,6 +406,16 @@
 #define ST0_XX                  0x80000000      /* MIPS IV naming */
 
 /*
+ * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
+ *
+ * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
+ */
+#define INTCTLB_IPPCI           26
+#define INTCTLF_IPPCI           (_ULCAST_(7) << INTCTLB_IPPCI)
+#define INTCTLB_IPTI            29
+#define INTCTLF_IPTI            (_ULCAST_(7) << INTCTLB_IPTI)
+
+/*
  * Bitfields and bit numbers in the coprocessor 0 cause register.
  *
  * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
@@ -434,6 +444,8 @@
 #define  CAUSEF_IV              (_ULCAST_(1)   << 23)
 #define  CAUSEB_CE              28
 #define  CAUSEF_CE              (_ULCAST_(3)   << 28)
+#define  CAUSEB_TI              30
+#define  CAUSEF_TI              (_ULCAST_(1)   << 30)
 #define  CAUSEB_BD              31
 #define  CAUSEF_BD              (_ULCAST_(1)   << 31)
 
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index b469ad05d520..0b2450ceb13f 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -97,7 +97,7 @@ void mips_event_handler(struct clock_event_device *dev)
  */
 static int c0_compare_int_pending(void)
 {
-        return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+        return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
 }
 
 /*
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 308e43460864..338dfe8ed002 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1403,6 +1403,7 @@ extern void flush_tlb_handlers(void);
  * Timer interrupt
  */
 int cp0_compare_irq;
+int cp0_compare_irq_shift;
 
 /*
  * Performance counter IRQ or -1 if shared with timer
@@ -1493,8 +1494,9 @@ void __cpuinit per_cpu_trap_init(void)
          *  o read IntCtl.IPPCI to determine the performance counter interrupt
          */
         if (cpu_has_mips_r2) {
-                cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
-                cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+                cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+                cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
+                cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
                 if (cp0_perfcount_irq == cp0_compare_irq)
                         cp0_perfcount_irq = -1;
         } else {
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 0824f6af4777..55f22a3afe61 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -49,9 +49,6 @@ void __init plat_mem_setup(void)
         set_io_port_base(0xbfd00000);
 
         serial_init();
-
-        pr_info("Linux started...\n");
-
 }
 
 extern struct plat_smp_ops ssmtc_smp_ops;
@@ -60,7 +57,6 @@ void __init prom_init(void)
 {
         set_io_port_base(0xbfd00000);
 
-        pr_info("\nLINUX started...\n");
         prom_meminit();
 
 #ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 9e8d00389eef..1651942f7feb 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -424,7 +424,7 @@ void __init mem_init(void)
                reservedpages << (PAGE_SHIFT-10),
                datasize >> 10,
                initsize >> 10,
-               (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+               totalhigh_pages << (PAGE_SHIFT-10));
 }
 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
 
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 3d0baa4a842d..badcf5e8d695 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -73,9 +73,6 @@ static int __cpuinit m4kc_tlbp_war(void)
 enum label_id {
         label_second_part = 1,
         label_leave,
-#ifdef MODULE_START
-        label_module_alloc,
-#endif
         label_vmalloc,
         label_vmalloc_done,
         label_tlbw_hazard,
@@ -92,9 +89,6 @@ enum label_id {
 
 UASM_L_LA(_second_part)
 UASM_L_LA(_leave)
-#ifdef MODULE_START
-UASM_L_LA(_module_alloc)
-#endif
 UASM_L_LA(_vmalloc)
 UASM_L_LA(_vmalloc_done)
 UASM_L_LA(_tlbw_hazard)
@@ -818,8 +812,6 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         } else {
 #if defined(CONFIG_HUGETLB_PAGE)
                 const enum label_id ls = label_tlb_huge_update;
-#elif defined(MODULE_START)
-                const enum label_id ls = label_module_alloc;
 #else
                 const enum label_id ls = label_vmalloc;
 #endif
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index f1b14c8a4a1c..414f0c99b196 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -355,7 +355,6 @@ void __init prom_init(void)
         board_nmi_handler_setup = mips_nmi_setup;
         board_ejtag_handler_setup = mips_ejtag_setup;
 
-        pr_info("\nLINUX started...\n");
         prom_init_cmdline();
         prom_meminit();
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
index 2c516718affe..0a0d73c0564f 100644
--- a/arch/mips/powertv/Makefile
+++ b/arch/mips/powertv/Makefile
@@ -23,6 +23,6 @@
 # under Linux.
 #
 
-obj-y += cmdline.o init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
+obj-y += init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
 
 EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
index 03d3884c6270..1ae6623444b2 100644
--- a/arch/mips/powertv/asic/asic-calliope.c
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -23,76 +23,79 @@
  * Description:  Defines the platform resources for the SA settop.
  */
 
+#include <linux/init.h>
 #include <asm/mach-powertv/asic.h>
 
-const struct register_map calliope_register_map = {
-        .eic_slow0_strt_add = 0x800000,
-        .eic_cfg_bits = 0x800038,
-        .eic_ready_status = 0x80004c,
+#define CALLIOPE_ADDR(x)        (CALLIOPE_IO_BASE + (x))
 
-        .chipver3 = 0xA00800,
-        .chipver2 = 0xA00804,
-        .chipver1 = 0xA00808,
-        .chipver0 = 0xA0080c,
+const struct register_map calliope_register_map __initdata = {
+        .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
+        .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
+        .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},
+
+        .chipver3 = {.phys = CALLIOPE_ADDR(0xA00800)},
+        .chipver2 = {.phys = CALLIOPE_ADDR(0xA00804)},
+        .chipver1 = {.phys = CALLIOPE_ADDR(0xA00808)},
+        .chipver0 = {.phys = CALLIOPE_ADDR(0xA0080c)},
 
         /* The registers of IRBlaster */
-        .uart1_intstat = 0xA01800,
-        .uart1_inten = 0xA01804,
-        .uart1_config1 = 0xA01808,
-        .uart1_config2 = 0xA0180C,
-        .uart1_divisorhi = 0xA01810,
-        .uart1_divisorlo = 0xA01814,
-        .uart1_data = 0xA01818,
-        .uart1_status = 0xA0181C,
+        .uart1_intstat = {.phys = CALLIOPE_ADDR(0xA01800)},
+        .uart1_inten = {.phys = CALLIOPE_ADDR(0xA01804)},
+        .uart1_config1 = {.phys = CALLIOPE_ADDR(0xA01808)},
+        .uart1_config2 = {.phys = CALLIOPE_ADDR(0xA0180C)},
+        .uart1_divisorhi = {.phys = CALLIOPE_ADDR(0xA01810)},
+        .uart1_divisorlo = {.phys = CALLIOPE_ADDR(0xA01814)},
+        .uart1_data = {.phys = CALLIOPE_ADDR(0xA01818)},
+        .uart1_status = {.phys = CALLIOPE_ADDR(0xA0181C)},
 
-        .int_stat_3 = 0xA02800,
-        .int_stat_2 = 0xA02804,
-        .int_stat_1 = 0xA02808,
-        .int_stat_0 = 0xA0280c,
-        .int_config = 0xA02810,
-        .int_int_scan = 0xA02818,
-        .ien_int_3 = 0xA02830,
-        .ien_int_2 = 0xA02834,
-        .ien_int_1 = 0xA02838,
-        .ien_int_0 = 0xA0283c,
-        .int_level_3_3 = 0xA02880,
-        .int_level_3_2 = 0xA02884,
-        .int_level_3_1 = 0xA02888,
-        .int_level_3_0 = 0xA0288c,
-        .int_level_2_3 = 0xA02890,
-        .int_level_2_2 = 0xA02894,
-        .int_level_2_1 = 0xA02898,
-        .int_level_2_0 = 0xA0289c,
-        .int_level_1_3 = 0xA028a0,
-        .int_level_1_2 = 0xA028a4,
-        .int_level_1_1 = 0xA028a8,
-        .int_level_1_0 = 0xA028ac,
-        .int_level_0_3 = 0xA028b0,
-        .int_level_0_2 = 0xA028b4,
-        .int_level_0_1 = 0xA028b8,
-        .int_level_0_0 = 0xA028bc,
-        .int_docsis_en = 0xA028F4,
+        .int_stat_3 = {.phys = CALLIOPE_ADDR(0xA02800)},
+        .int_stat_2 = {.phys = CALLIOPE_ADDR(0xA02804)},
+        .int_stat_1 = {.phys = CALLIOPE_ADDR(0xA02808)},
+        .int_stat_0 = {.phys = CALLIOPE_ADDR(0xA0280c)},
+        .int_config = {.phys = CALLIOPE_ADDR(0xA02810)},
+        .int_int_scan = {.phys = CALLIOPE_ADDR(0xA02818)},
+        .ien_int_3 = {.phys = CALLIOPE_ADDR(0xA02830)},
+        .ien_int_2 = {.phys = CALLIOPE_ADDR(0xA02834)},
+        .ien_int_1 = {.phys = CALLIOPE_ADDR(0xA02838)},
+        .ien_int_0 = {.phys = CALLIOPE_ADDR(0xA0283c)},
+        .int_level_3_3 = {.phys = CALLIOPE_ADDR(0xA02880)},
+        .int_level_3_2 = {.phys = CALLIOPE_ADDR(0xA02884)},
+        .int_level_3_1 = {.phys = CALLIOPE_ADDR(0xA02888)},
+        .int_level_3_0 = {.phys = CALLIOPE_ADDR(0xA0288c)},
+        .int_level_2_3 = {.phys = CALLIOPE_ADDR(0xA02890)},
+        .int_level_2_2 = {.phys = CALLIOPE_ADDR(0xA02894)},
+        .int_level_2_1 = {.phys = CALLIOPE_ADDR(0xA02898)},
+        .int_level_2_0 = {.phys = CALLIOPE_ADDR(0xA0289c)},
+        .int_level_1_3 = {.phys = CALLIOPE_ADDR(0xA028a0)},
+        .int_level_1_2 = {.phys = CALLIOPE_ADDR(0xA028a4)},
+        .int_level_1_1 = {.phys = CALLIOPE_ADDR(0xA028a8)},
+        .int_level_1_0 = {.phys = CALLIOPE_ADDR(0xA028ac)},
+        .int_level_0_3 = {.phys = CALLIOPE_ADDR(0xA028b0)},
+        .int_level_0_2 = {.phys = CALLIOPE_ADDR(0xA028b4)},
+        .int_level_0_1 = {.phys = CALLIOPE_ADDR(0xA028b8)},
+        .int_level_0_0 = {.phys = CALLIOPE_ADDR(0xA028bc)},
+        .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
 
-        .mips_pll_setup = 0x980000,
-        .usb_fs = 0x980030,             /* -default 72800028- */
-        .test_bus = 0x9800CC,
-        .crt_spare = 0x9800d4,
-        .usb2_ohci_int_mask = 0x9A000c,
-        .usb2_strap = 0x9A0014,
-        .ehci_hcapbase = 0x9BFE00,
-        .ohci_hc_revision = 0x9BFC00,
-        .bcm1_bs_lmi_steer = 0x9E0004,
-        .usb2_control = 0x9E0054,
-        .usb2_stbus_obc = 0x9BFF00,
-        .usb2_stbus_mess_size = 0x9BFF04,
-        .usb2_stbus_chunk_size = 0x9BFF08,
+        .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
+        .usb_fs = {.phys = CALLIOPE_ADDR(0x980030)},
+        .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
+        .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
+        .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
+        .usb2_strap = {.phys = CALLIOPE_ADDR(0x9A0014)},
+        .ehci_hcapbase = {.phys = CALLIOPE_ADDR(0x9BFE00)},
+        .ohci_hc_revision = {.phys = CALLIOPE_ADDR(0x9BFC00)},
+        .bcm1_bs_lmi_steer = {.phys = CALLIOPE_ADDR(0x9E0004)},
+        .usb2_control = {.phys = CALLIOPE_ADDR(0x9E0054)},
+        .usb2_stbus_obc = {.phys = CALLIOPE_ADDR(0x9BFF00)},
+        .usb2_stbus_mess_size = {.phys = CALLIOPE_ADDR(0x9BFF04)},
+        .usb2_stbus_chunk_size = {.phys = CALLIOPE_ADDR(0x9BFF08)},
 
-        .pcie_regs = 0x000000,          /* -doesn't exist- */
-        .tim_ch = 0xA02C10,
-        .tim_cl = 0xA02C14,
-        .gpio_dout = 0xA02c20,
-        .gpio_din = 0xA02c24,
-        .gpio_dir = 0xA02c2C,
-        .watchdog = 0xA02c30,
-        .front_panel = 0x000000,        /* -not used- */
+        .pcie_regs = {.phys = 0x000000},        /* -doesn't exist- */
+        .tim_ch = {.phys = CALLIOPE_ADDR(0xA02C10)},
+        .tim_cl = {.phys = CALLIOPE_ADDR(0xA02C14)},
+        .gpio_dout = {.phys = CALLIOPE_ADDR(0xA02c20)},
+        .gpio_din = {.phys = CALLIOPE_ADDR(0xA02c24)},
+        .gpio_dir = {.phys = CALLIOPE_ADDR(0xA02c2C)},
+        .watchdog = {.phys = CALLIOPE_ADDR(0xA02c30)},
+        .front_panel = {.phys = 0x000000},      /* -not used- */
 };
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
index 5f4589c9f83d..5bb64bfb508b 100644
--- a/arch/mips/powertv/asic/asic-cronus.c
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -23,76 +23,79 @@
  * Description:  Defines the platform resources for the SA settop.
  */
 
+#include <linux/init.h>
 #include <asm/mach-powertv/asic.h>
 
-const struct register_map cronus_register_map = {
-        .eic_slow0_strt_add = 0x000000,
-        .eic_cfg_bits = 0x000038,
-        .eic_ready_status = 0x00004C,
+#define CRONUS_ADDR(x)  (CRONUS_IO_BASE + (x))
 
-        .chipver3 = 0x2A0800,
-        .chipver2 = 0x2A0804,
-        .chipver1 = 0x2A0808,
-        .chipver0 = 0x2A080C,
+const struct register_map cronus_register_map __initdata = {
+        .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)},
+        .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)},
+        .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)},
+
+        .chipver3 = {.phys = CRONUS_ADDR(0x2A0800)},
+        .chipver2 = {.phys = CRONUS_ADDR(0x2A0804)},
+        .chipver1 = {.phys = CRONUS_ADDR(0x2A0808)},
+        .chipver0 = {.phys = CRONUS_ADDR(0x2A080C)},
 
         /* The registers of IRBlaster */
-        .uart1_intstat = 0x2A1800,
-        .uart1_inten = 0x2A1804,
-        .uart1_config1 = 0x2A1808,
-        .uart1_config2 = 0x2A180C,
-        .uart1_divisorhi = 0x2A1810,
-        .uart1_divisorlo = 0x2A1814,
-        .uart1_data = 0x2A1818,
-        .uart1_status = 0x2A181C,
+        .uart1_intstat = {.phys = CRONUS_ADDR(0x2A1800)},
+        .uart1_inten = {.phys = CRONUS_ADDR(0x2A1804)},
+        .uart1_config1 = {.phys = CRONUS_ADDR(0x2A1808)},
+        .uart1_config2 = {.phys = CRONUS_ADDR(0x2A180C)},
+        .uart1_divisorhi = {.phys = CRONUS_ADDR(0x2A1810)},
+        .uart1_divisorlo = {.phys = CRONUS_ADDR(0x2A1814)},
+        .uart1_data = {.phys = CRONUS_ADDR(0x2A1818)},
+        .uart1_status = {.phys = CRONUS_ADDR(0x2A181C)},
 
-        .int_stat_3 = 0x2A2800,
-        .int_stat_2 = 0x2A2804,
-        .int_stat_1 = 0x2A2808,
-        .int_stat_0 = 0x2A280C,
-        .int_config = 0x2A2810,
-        .int_int_scan = 0x2A2818,
-        .ien_int_3 = 0x2A2830,
-        .ien_int_2 = 0x2A2834,
-        .ien_int_1 = 0x2A2838,
-        .ien_int_0 = 0x2A283C,
-        .int_level_3_3 = 0x2A2880,
-        .int_level_3_2 = 0x2A2884,
-        .int_level_3_1 = 0x2A2888,
-        .int_level_3_0 = 0x2A288C,
-        .int_level_2_3 = 0x2A2890,
-        .int_level_2_2 = 0x2A2894,
-        .int_level_2_1 = 0x2A2898,
-        .int_level_2_0 = 0x2A289C,
-        .int_level_1_3 = 0x2A28A0,
-        .int_level_1_2 = 0x2A28A4,
-        .int_level_1_1 = 0x2A28A8,
-        .int_level_1_0 = 0x2A28AC,
-        .int_level_0_3 = 0x2A28B0,
-        .int_level_0_2 = 0x2A28B4,
-        .int_level_0_1 = 0x2A28B8,
-        .int_level_0_0 = 0x2A28BC,
-        .int_docsis_en = 0x2A28F4,
+        .int_stat_3 = {.phys = CRONUS_ADDR(0x2A2800)},
+        .int_stat_2 = {.phys = CRONUS_ADDR(0x2A2804)},
+        .int_stat_1 = {.phys = CRONUS_ADDR(0x2A2808)},
+        .int_stat_0 = {.phys = CRONUS_ADDR(0x2A280C)},
+        .int_config = {.phys = CRONUS_ADDR(0x2A2810)},
+        .int_int_scan = {.phys = CRONUS_ADDR(0x2A2818)},
+        .ien_int_3 = {.phys = CRONUS_ADDR(0x2A2830)},
+        .ien_int_2 = {.phys = CRONUS_ADDR(0x2A2834)},
+        .ien_int_1 = {.phys = CRONUS_ADDR(0x2A2838)},
+        .ien_int_0 = {.phys = CRONUS_ADDR(0x2A283C)},
+        .int_level_3_3 = {.phys = CRONUS_ADDR(0x2A2880)},
+        .int_level_3_2 = {.phys = CRONUS_ADDR(0x2A2884)},
+        .int_level_3_1 = {.phys = CRONUS_ADDR(0x2A2888)},
+        .int_level_3_0 = {.phys = CRONUS_ADDR(0x2A288C)},
+        .int_level_2_3 = {.phys = CRONUS_ADDR(0x2A2890)},
+        .int_level_2_2 = {.phys = CRONUS_ADDR(0x2A2894)},
+        .int_level_2_1 = {.phys = CRONUS_ADDR(0x2A2898)},
+        .int_level_2_0 = {.phys = CRONUS_ADDR(0x2A289C)},
+        .int_level_1_3 = {.phys = CRONUS_ADDR(0x2A28A0)},
+        .int_level_1_2 = {.phys = CRONUS_ADDR(0x2A28A4)},
+        .int_level_1_1 = {.phys = CRONUS_ADDR(0x2A28A8)},
+        .int_level_1_0 = {.phys = CRONUS_ADDR(0x2A28AC)},
+        .int_level_0_3 = {.phys = CRONUS_ADDR(0x2A28B0)},
+        .int_level_0_2 = {.phys = CRONUS_ADDR(0x2A28B4)},
+        .int_level_0_1 = {.phys = CRONUS_ADDR(0x2A28B8)},
+        .int_level_0_0 = {.phys = CRONUS_ADDR(0x2A28BC)},
+        .int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},
 
-        .mips_pll_setup = 0x1C0000,
-        .usb_fs = 0x1C0018,
-        .test_bus = 0x1C00CC,
-        .crt_spare = 0x1c00d4,
-        .usb2_ohci_int_mask = 0x20000C,
-        .usb2_strap = 0x200014,
-        .ehci_hcapbase = 0x21FE00,
-        .ohci_hc_revision = 0x1E0000,
-        .bcm1_bs_lmi_steer = 0x2E0008,
-        .usb2_control = 0x2E004C,
-        .usb2_stbus_obc = 0x21FF00,
-        .usb2_stbus_mess_size = 0x21FF04,
-        .usb2_stbus_chunk_size = 0x21FF08,
+        .mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},
+        .usb_fs = {.phys = CRONUS_ADDR(0x1C0018)},
+        .test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},
+        .crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},
+        .usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},
+        .usb2_strap = {.phys = CRONUS_ADDR(0x200014)},
+        .ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},
+        .ohci_hc_revision = {.phys = CRONUS_ADDR(0x1E0000)},
+        .bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},
+        .usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},
+        .usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},
+        .usb2_stbus_mess_size = {.phys = CRONUS_ADDR(0x21FF04)},
+        .usb2_stbus_chunk_size = {.phys = CRONUS_ADDR(0x21FF08)},
 
-        .pcie_regs = 0x220000,
-        .tim_ch = 0x2A2C10,
-        .tim_cl = 0x2A2C14,
-        .gpio_dout = 0x2A2C20,
-        .gpio_din = 0x2A2C24,
-        .gpio_dir = 0x2A2C2C,
-        .watchdog = 0x2A2C30,
-        .front_panel = 0x2A3800,
+        .pcie_regs = {.phys = CRONUS_ADDR(0x220000)},
+        .tim_ch = {.phys = CRONUS_ADDR(0x2A2C10)},
+        .tim_cl = {.phys = CRONUS_ADDR(0x2A2C14)},
+        .gpio_dout = {.phys = CRONUS_ADDR(0x2A2C20)},
+        .gpio_din = {.phys = CRONUS_ADDR(0x2A2C24)},
+        .gpio_dir = {.phys = CRONUS_ADDR(0x2A2C2C)},
+        .watchdog = {.phys = CRONUS_ADDR(0x2A2C30)},
+        .front_panel = {.phys = CRONUS_ADDR(0x2A3800)},
 };
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
index 1469daab920e..095cbe10ebb9 100644
--- a/arch/mips/powertv/asic/asic-zeus.c
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -23,76 +23,79 @@
  * Description:  Defines the platform resources for the SA settop.
  */
 
+#include <linux/init.h>
 #include <asm/mach-powertv/asic.h>
 
-const struct register_map zeus_register_map = {
-        .eic_slow0_strt_add = 0x000000,
-        .eic_cfg_bits = 0x000038,
-        .eic_ready_status = 0x00004c,
+#define ZEUS_ADDR(x)    (ZEUS_IO_BASE + (x))
 
-        .chipver3 = 0x280800,
-        .chipver2 = 0x280804,
-        .chipver1 = 0x280808,
-        .chipver0 = 0x28080c,
+const struct register_map zeus_register_map __initdata = {
+        .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
+        .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
+        .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
+
+        .chipver3 = {.phys = ZEUS_ADDR(0x280800)},
+        .chipver2 = {.phys = ZEUS_ADDR(0x280804)},
+        .chipver1 = {.phys = ZEUS_ADDR(0x280808)},
+        .chipver0 = {.phys = ZEUS_ADDR(0x28080c)},
 
         /* The registers of IRBlaster */
-        .uart1_intstat = 0x281800,
-        .uart1_inten = 0x281804,
-        .uart1_config1 = 0x281808,
-        .uart1_config2 = 0x28180C,
-        .uart1_divisorhi = 0x281810,
-        .uart1_divisorlo = 0x281814,
-        .uart1_data = 0x281818,
-        .uart1_status = 0x28181C,
+        .uart1_intstat = {.phys = ZEUS_ADDR(0x281800)},
+        .uart1_inten = {.phys = ZEUS_ADDR(0x281804)},
+        .uart1_config1 = {.phys = ZEUS_ADDR(0x281808)},
+        .uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)},
+        .uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)},
+        .uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)},
+        .uart1_data = {.phys = ZEUS_ADDR(0x281818)},
+        .uart1_status = {.phys = ZEUS_ADDR(0x28181C)},
 
-        .int_stat_3 = 0x282800,
-        .int_stat_2 = 0x282804,
-        .int_stat_1 = 0x282808,
-        .int_stat_0 = 0x28280c,
-        .int_config = 0x282810,
-        .int_int_scan = 0x282818,
-        .ien_int_3 = 0x282830,
-        .ien_int_2 = 0x282834,
-        .ien_int_1 = 0x282838,
-        .ien_int_0 = 0x28283c,
-        .int_level_3_3 = 0x282880,
-        .int_level_3_2 = 0x282884,
-        .int_level_3_1 = 0x282888,
-        .int_level_3_0 = 0x28288c,
-        .int_level_2_3 = 0x282890,
-        .int_level_2_2 = 0x282894,
-        .int_level_2_1 = 0x282898,
-        .int_level_2_0 = 0x28289c,
-        .int_level_1_3 = 0x2828a0,
-        .int_level_1_2 = 0x2828a4,
-        .int_level_1_1 = 0x2828a8,
-        .int_level_1_0 = 0x2828ac,
-        .int_level_0_3 = 0x2828b0,
-        .int_level_0_2 = 0x2828b4,
-        .int_level_0_1 = 0x2828b8,
-        .int_level_0_0 = 0x2828bc,
-        .int_docsis_en = 0x2828F4,
+        .int_stat_3 = {.phys = ZEUS_ADDR(0x282800)},
+        .int_stat_2 = {.phys = ZEUS_ADDR(0x282804)},
+        .int_stat_1 = {.phys = ZEUS_ADDR(0x282808)},
+        .int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)},
+        .int_config = {.phys = ZEUS_ADDR(0x282810)},
+        .int_int_scan = {.phys = ZEUS_ADDR(0x282818)},
+        .ien_int_3 = {.phys = ZEUS_ADDR(0x282830)},
+        .ien_int_2 = {.phys = ZEUS_ADDR(0x282834)},
+        .ien_int_1 = {.phys = ZEUS_ADDR(0x282838)},
+        .ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)},
+        .int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)},
+        .int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)},
+        .int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)},
+        .int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)},
+        .int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)},
+        .int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)},
+        .int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)},
+        .int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)},
+        .int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)},
+        .int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)},
+        .int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)},
+        .int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)},
+        .int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)},
+        .int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)},
+        .int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)},
+        .int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)},
+        .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
 
-        .mips_pll_setup = 0x1a0000,
-        .usb_fs = 0x1a0018,
-        .test_bus = 0x1a0238,
-        .crt_spare = 0x1a0090,
-        .usb2_ohci_int_mask = 0x1e000c,
-        .usb2_strap = 0x1e0014,
-        .ehci_hcapbase = 0x1FFE00,
-        .ohci_hc_revision = 0x1FFC00,
-        .bcm1_bs_lmi_steer = 0x2C0008,
-        .usb2_control = 0x2c01a0,
-        .usb2_stbus_obc = 0x1FFF00,
-        .usb2_stbus_mess_size = 0x1FFF04,
-        .usb2_stbus_chunk_size = 0x1FFF08,
+        .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
+        .usb_fs = {.phys = ZEUS_ADDR(0x1a0018)},
+        .test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
+        .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
+        .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
+        .usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)},
+        .ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)},
+        .ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)},
+        .bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)},
+        .usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)},
+        .usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)},
+        .usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)},
+        .usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)},
 
-        .pcie_regs = 0x200000,
-        .tim_ch = 0x282C10,
-        .tim_cl = 0x282C14,
-        .gpio_dout = 0x282c20,
-        .gpio_din = 0x282c24,
-        .gpio_dir = 0x282c2C,
-        .watchdog = 0x282c30,
-        .front_panel = 0x283800,
+        .pcie_regs = {.phys = ZEUS_ADDR(0x200000)},
+        .tim_ch = {.phys = ZEUS_ADDR(0x282C10)},
+        .tim_cl = {.phys = ZEUS_ADDR(0x282C14)},
+        .gpio_dout = {.phys = ZEUS_ADDR(0x282c20)},
+        .gpio_din = {.phys = ZEUS_ADDR(0x282c24)},
+        .gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)},
+        .watchdog = {.phys = ZEUS_ADDR(0x282c30)},
+        .front_panel = {.phys = ZEUS_ADDR(0x283800)},
 };
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index bae82880b6b5..6a882194e063 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -67,8 +67,8 @@ enum asic_type asic;
 
 unsigned int platform_features;
 unsigned int platform_family;
-const struct register_map  *register_map;
-EXPORT_SYMBOL(register_map);                    /* Exported for testing */
+struct register_map _asic_register_map;
+EXPORT_SYMBOL(_asic_register_map);              /* Exported for testing */
 unsigned long asic_phy_base;
 unsigned long asic_base;
 EXPORT_SYMBOL(asic_base);                       /* Exported for testing */
@@ -418,6 +418,15 @@ void platform_unconfigure_usb_ohci()
 {
 }
 
+static void __init set_register_map(unsigned long phys_base,
+        const struct register_map *map)
+{
+        asic_phy_base = phys_base;
+        _asic_register_map = *map;
+        register_map_virtualize(&_asic_register_map);
+        asic_base = (unsigned long)ioremap_nocache(phys_base, ASIC_IO_SIZE);
+}
+
 /**
  * configure_platform - configuration based on platform type.
  */
@@ -431,10 +440,7 @@ void __init configure_platform(void)
         case FAMILY_1500VZF:
                 platform_features = FFS_CAPABLE;
                 asic = ASIC_CALLIOPE;
-                asic_phy_base = CALLIOPE_IO_BASE;
-                register_map = &calliope_register_map;
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
+                set_register_map(CALLIOPE_IO_BASE, &calliope_register_map);
 
                 if (platform_family == FAMILY_1500VZE) {
                         gp_resources = non_dvr_vze_calliope_resources;
@@ -455,10 +461,7 @@ void __init configure_platform(void)
                 platform_features = FFS_CAPABLE | PCIE_CAPABLE |
                         DISPLAY_CAPABLE;
                 asic = ASIC_ZEUS;
-                asic_phy_base = ZEUS_IO_BASE;
-                register_map = &zeus_register_map;
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
+                set_register_map(ZEUS_IO_BASE, &zeus_register_map);
                 gp_resources = non_dvr_zeus_resources;
 
                 pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n");
@@ -471,11 +474,6 @@ void __init configure_platform(void)
                 /* The settop has PCIE but it isn't used, so don't advertise
                  * it*/
                 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
-                asic_phy_base = CRONUS_IO_BASE;   /* same as Cronus */
-                register_map = &cronus_register_map;   /* same as Cronus */
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
-                gp_resources = non_dvr_cronuslite_resources;
 
                 /* ASIC version will determine if this is a real CronusLite or
                  * Castrati(Cronus) */
@@ -489,6 +487,9 @@ void __init configure_platform(void)
                 else
                         asic = ASIC_CRONUSLITE;
 
+                /* Cronus and Cronus Lite have the same register map */
+                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
+                gp_resources = non_dvr_cronuslite_resources;
                 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
                         "chipversion=0x%08X\n",
                         (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE",
@@ -498,10 +499,7 @@ void __init configure_platform(void)
         case FAMILY_4600VZA:
                 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
                 asic = ASIC_CRONUS;
-                asic_phy_base = CRONUS_IO_BASE;
-                register_map = &cronus_register_map;
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
+                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
                 gp_resources = non_dvr_cronus_resources;
 
                 pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n");
@@ -512,10 +510,7 @@ void __init configure_platform(void)
                 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
                         DISPLAY_CAPABLE;
                 asic = ASIC_ZEUS;
-                asic_phy_base = ZEUS_IO_BASE;
-                register_map = &zeus_register_map;
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
+                set_register_map(ZEUS_IO_BASE, &zeus_register_map);
                 gp_resources = dvr_zeus_resources;
 
                 pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n");
@@ -526,10 +521,7 @@ void __init configure_platform(void)
                 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
                         DISPLAY_CAPABLE;
                 asic = ASIC_CRONUS;
-                asic_phy_base = CRONUS_IO_BASE;
-                register_map = &cronus_register_map;
-                asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
-                        ASIC_IO_SIZE);
+                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
                 gp_resources = dvr_cronus_resources;
 
                 pr_info("Platform: 8600/Vz Class B - CRONUS, "
diff --git a/arch/mips/powertv/cmdline.c b/arch/mips/powertv/cmdline.c
deleted file mode 100644
index 98d73cb0d452..000000000000
--- a/arch/mips/powertv/cmdline.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
- * Portions copyright (C) 2009 Cisco Systems, Inc.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Kernel command line creation using the prom monitor (YAMON) argc/argv.
- */
-#include <linux/init.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-
-#include "init.h"
-
-/*
- * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
- * This macro take care of sign extension.
- */
-#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
-
-char * __init prom_getcmdline(void)
-{
-        return &(arcs_cmdline[0]);
-}
-
-void  __init prom_init_cmdline(void)
-{
-        int len;
-
-        if (prom_argc != 1)
-                return;
-
-        len = strlen(arcs_cmdline);
-
-        arcs_cmdline[len] = ' ';
-
-        strlcpy(arcs_cmdline + len + 1, (char *)_prom_argv,
-                COMMAND_LINE_SIZE - len - 1);
-}
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
index 5f4e4c304e48..0afe227f1d0a 100644
--- a/arch/mips/powertv/init.c
+++ b/arch/mips/powertv/init.c
@@ -34,10 +34,7 @@
 #include <asm/mips-boards/generic.h>
 #include <asm/mach-powertv/asic.h>
 
-#include "init.h"
-
-int prom_argc;
-int *_prom_argv, *_prom_envp;
+static int *_prom_envp;
 unsigned long _prom_memsize;
 
 /*
@@ -109,16 +106,20 @@ static void __init mips_ejtag_setup(void)
 
 void __init prom_init(void)
 {
+        int prom_argc;
+        char *prom_argv;
+
         prom_argc = fw_arg0;
-        _prom_argv = (int *) fw_arg1;
+        prom_argv = (char *) fw_arg1;
         _prom_envp = (int *) fw_arg2;
         _prom_memsize = (unsigned long) fw_arg3;
 
         board_nmi_handler_setup = mips_nmi_setup;
         board_ejtag_handler_setup = mips_ejtag_setup;
 
-        pr_info("\nLINUX started...\n");
-        prom_init_cmdline();
+        if (prom_argc == 1)
+                strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE);
+
         configure_platform();
         prom_meminit();
 
diff --git a/arch/mips/powertv/init.h b/arch/mips/powertv/init.h
index 7af6bf25008c..b194c34ca966 100644
--- a/arch/mips/powertv/init.h
+++ b/arch/mips/powertv/init.h
@@ -22,7 +22,5 @@
 
 #ifndef _POWERTV_INIT_H
 #define _POWERTV_INIT_H
-extern int prom_argc;
-extern int *_prom_argv;
 extern unsigned long _prom_memsize;
 #endif
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
index 28d06605fff6..f49eb3d0358b 100644
--- a/arch/mips/powertv/memory.c
+++ b/arch/mips/powertv/memory.c
@@ -42,8 +42,6 @@
 #define BOOT_MEM_SIZE           KIBIBYTE(256)   /* Memory reserved for bldr */
 #define PHYS_MEM_START          0x10000000      /* Start of physical memory */
 
-unsigned long ptv_memsize;
-
 char __initdata cmdline[COMMAND_LINE_SIZE];
 
 void __init prom_meminit(void)
@@ -87,9 +85,6 @@ void __init prom_meminit(void)
                 }
         }
 
-        /* Store memsize for diagnostic purposes */
-        ptv_memsize = memsize;
-
         physend = PFN_ALIGN(&_end) - 0x80000000;
         if (memsize > LOW_MEM_MAX) {
                 low_mem = LOW_MEM_MAX;
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
index bd8ebf128f29..698b1eafbe98 100644
--- a/arch/mips/powertv/powertv_setup.c
+++ b/arch/mips/powertv/powertv_setup.c
@@ -64,9 +64,6 @@
 #define REG_SIZE        "4"             /* In bytes */
 #endif
 
-static struct pt_regs die_regs;
-static bool have_die_regs;
-
 static void register_panic_notifier(void);
 static int panic_handler(struct notifier_block *notifier_block,
         unsigned long event, void *cause_string);
@@ -218,24 +215,6 @@ static int panic_handler(struct notifier_block *notifier_block,
         return NOTIFY_DONE;
 }
 
-/**
- * Platform-specific handling of oops
- * @str:        Pointer to the oops string
- * @regs:       Pointer to the oops registers
- * All we do here is to save the registers for subsequent printing through
- * the panic notifier.
- */
-void platform_die(const char *str, const struct pt_regs *regs)
-{
-        /* If we already have saved registers, don't overwrite them as they
-         * they apply to the initial fault */
-
-        if (!have_die_regs) {
-                have_die_regs = true;
-                die_regs = *regs;
-        }
-}
-
 /* Information about the RF MAC address, if one was supplied on the
  * command line. */
 static bool have_rfmac;
diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c
index 494c652c984b..0007652cb774 100644
--- a/arch/mips/powertv/reset.c
+++ b/arch/mips/powertv/reset.c
@@ -28,9 +28,6 @@
 #include <asm/mach-powertv/asic_regs.h>
 #include "reset.h"
 
-static void mips_machine_restart(char *command);
-static void mips_machine_halt(void);
-
 static void mips_machine_restart(char *command)
 {
 #ifdef CONFIG_BOOTLOADER_DRIVER
@@ -44,22 +41,7 @@ static void mips_machine_restart(char *command)
 #endif
 }
 
-static void mips_machine_halt(void)
-{
-#ifdef CONFIG_BOOTLOADER_DRIVER
-        /*
-         * Call the bootloader's reset function to ensure
-         * that persistent data is flushed before hard reset
-         */
-        kbldr_SetCauseAndReset();
-#else
-        writel(0x1, asic_reg_addr(watchdog));
-#endif
-}
-
 void mips_reboot_setup(void)
 {
         _machine_restart = mips_machine_restart;
-        _machine_halt = mips_machine_halt;
-        pm_power_off = mips_machine_halt;
 }
diff --git a/arch/mips/powertv/time.c b/arch/mips/powertv/time.c
index 1e0a5ef4c8c7..9fd7b67f2af7 100644
--- a/arch/mips/powertv/time.c
+++ b/arch/mips/powertv/time.c
@@ -33,5 +33,4 @@ unsigned int __cpuinit get_c0_compare_int(void)
 void __init plat_time_init(void)
 {
         powertv_clocksource_init();
-        r4k_clockevent_init();
 }
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index f61c164d1e67..bc1297109cc5 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -505,5 +505,5 @@ void __init mem_init(void)
                (num_physpages - tmp) << (PAGE_SHIFT-10),
                datasize >> 10,
                initsize >> 10,
-               (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+               totalhigh_pages << (PAGE_SHIFT-10));
 }
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 06e801c7e258..e27809b6d04f 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -160,7 +160,6 @@ static void __init prom_init_cmdline(void)
         int argc;
         int *argv32;
         int i;                  /* Always ignore the "-c" at argv[0] */
-        static char builtin[COMMAND_LINE_SIZE] __initdata;
 
         if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
                 /*
@@ -174,20 +173,6 @@ static void __init prom_init_cmdline(void)
                 argv32 = (int *)fw_arg1;
         }
 
-        /* ignore all built-in args if any f/w args given */
-        /*
-         * But if built-in strings was started with '+', append them
-         * to command line args.  If built-in was started with '-',
-         * ignore all f/w args.
-         */
-        builtin[0] = '\0';
-        if (arcs_cmdline[0] == '+')
-                strcpy(builtin, arcs_cmdline + 1);
-        else if (arcs_cmdline[0] == '-') {
-                strcpy(builtin, arcs_cmdline + 1);
-                argc = 0;
-        } else if (argc <= 1)
-                strcpy(builtin, arcs_cmdline);
         arcs_cmdline[0] = '\0';
 
         for (i = 1; i < argc; i++) {
@@ -201,12 +186,6 @@ static void __init prom_init_cmdline(void)
                 } else
                         strcat(arcs_cmdline, str);
         }
-        /* append saved builtin args */
-        if (builtin[0]) {
-                if (arcs_cmdline[0])
-                        strcat(arcs_cmdline, " ");
-                strcat(arcs_cmdline, builtin);
-        }
 }
 
 static int txx9_ic_disable __initdata;
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 1386e6f081c8..23916321cc1b 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -1,7 +1,7 @@
 /*
  *  init.c, Common initialization routines for NEC VR4100 series.
  *
- *  Copyright (C) 2003-2008  Yoichi Yuasa <yuasa@linux-mips.org>
+ *  Copyright (C) 2003-2009  Yoichi Yuasa <yuasa@linux-mips.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -66,9 +66,9 @@ void __init prom_init(void)
         argv = (char **)fw_arg1;
 
         for (i = 1; i < argc; i++) {
-                strcat(arcs_cmdline, argv[i]);
+                strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
                 if (i < (argc - 1))
-                        strcat(arcs_cmdline, " ");
+                        strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
         }
 }