aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/mm/c-tx39.c
Commit message (Expand)AuthorAge
* [MIPS] TX39xx: Add missing local_flush_icache_range initializationAtsushi Nemoto2008-09-05
* [MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer2008-09-05
* [MIPS] Handle aliases in vmalloc correctly.Ralf Baechle2008-04-07
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-12
* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-11
* [MIPS] TX39: Remove redundant tx39_blast_icache() callsAtsushi Nemoto2007-03-06
* [MIPS] Remove __flush_icache_pageAtsushi Nemoto2006-10-01
* [MIPS] Retire flush_icache_page from mm use.Ralf Baechle2006-09-27
* [MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle2006-04-18
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-18
* [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.Atsushi Nemoto2006-02-14
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-29
* Sync c-tx39.c with c-r4k.c.Atsushi Nemoto2005-10-29
* Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle2005-10-29
* Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle2005-10-29
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 07:33:53 -0400