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| | * | | MIPS: ralink: add cpu-feature-overrides.hGabor Juhos2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpu-feature-overrides.h for RT288x, RT305x and RT3883. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5175/
| | * | | MIPS: ralink: adds support for MT7620 SoC familyJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for mt7620 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5177/
| | * | | MIPS: ralink: adds support for RT3883 SoC familyJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt3883 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5185/
| | * | | MIPS: ralink: adds support for RT2880 SoC familyJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt2880 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5176/
| | * | | MIPS: ralink: add RT5350 sdram register definesJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing defines that are needed to make memory detection work on the RT5350. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5169/
| | * | | MIPS: ralink: add RT3352 register definesJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a few missing defines that are needed to make USB and clock detection work on the RT3352. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5166/
| | * | | MIPS: move mips_{set,get}_machine_name() to a more generic placeJohn Crispin2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously this functionality was only available to users of the mips_machine api. Moving the code to prom.c allows us to also add a OF wrapper. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5164/
| | * | | MIPS: Init new mmu_context for each possible CPU to avoid memory corruptionHuacai Chen2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, init_new_context() only for each online CPU, this may cause memory corruption when CPU hotplug and fork() happens at the same time. To avoid this, we make init_new_context() cover each possible CPU. Scenario: 1, CPU#1 is being offline; 2, On CPU#0, do_fork() call dup_mm() and copy a mm_struct to the child; 3, On CPU#0, dup_mm() call init_new_context(), since CPU#1 is offline and init_new_context() only covers the online CPUs, child has the same asid as its parent on CPU#1 (however, child's asid should be 0); 4, CPU#1 is being online; 5, Now, if both parent and child run on CPU#1, memory corruption (e.g. segfault, bus error, etc.) will occur. Signed-off-by: Huacai Chen <chenhc@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4995/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This and the next patch resolve memory corruption problems while CPU hotplug. Without these patches, memory corruption can triggered easily as below: On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http:// code.google.com/p/byte-unixbench/) and a CPU hotplug script like this (hotplug.sh): while true; do echo 0 >/sys/devices/system/cpu/cpu1/online echo 0 >/sys/devices/system/cpu/cpu2/online echo 0 >/sys/devices/system/cpu/cpu3/online sleep 1 echo 1 >/sys/devices/system/cpu/cpu1/online echo 1 >/sys/devices/system/cpu/cpu2/online echo 1 >/sys/devices/system/cpu/cpu3/online sleep 1 done Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault after a few minutes. This patch: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongbing Hu <huhb@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4994/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Merge platform usb.h to usb-init.cJayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions are not used anywhere else, and merging it will make adding the new USB definitions for XLPII series easier. While there, cleanup some whitespace in usb-init.c. There is no change to logic due to this commit. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5027/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Remove unused codeJayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused functions and redundant comments from arch/mips/include/asm/netlogic/haldefs.h Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5029/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Add 32-bit support for XLPJayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update asm/netlogic/haldefs.h to extend register access functions nlm_{read,write}_reg64() for 32-bit compilation. When compiled for 32-bit the functions will read 64 IO registers with interrupts disabled. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5026/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Avoid using fixed PIC IRT indexJayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The index for a device interrupt in the PIC interrupt routing table changes for different chips in the XLP family. Avoid using the fixed entries and derive the index value from the SoC device header. Add workarounds for some devices which do not report the IRT index correctly. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5025/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Remove unused EIMR/EIRR functionsJayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions are now unused after the PIC and IRQ code has been updated to use optimized EIMR/EIRR functions which work on both 32-bit and 64-bit. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5021/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Netlogic: Optimize and fix write_c0_eimr()Jayachandran C2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the irq save/restore from write_c0_eimr(), as it is always called with interrupts off. This allows us to remove workaround in write_c0_eimr() to fix up the flags used by local_irq_save. This fixup worked on XLR, but will break when 32-bit support is added to r2 cpus like XLP. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5022/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: merge bcm63xx_clk.h into bcm63xx/clk.cJonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the header file does is provide the internal structure of clk, which shouldn't be used by anyone except clk.c itself anyway. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Patchwork: http://patchwork.linux-mips.org/patch/5055/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: add flash detection for BCM6362Jonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM6362 support booting from SPI flash and NAND. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5012/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: enable pcie for BCM6362Jonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCIe controller is almost the same as the BCM6328 one, with only the SERDES register being at a different location. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5011/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: enable SPI controller for BCM6362Jonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI controller shares the same register layout as the 6358 one. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5010/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: add basic BCM6362 supportJonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for detecting and booting the BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5009/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: fix revision ID widthJonas Gorski2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The REVID is only 8 bit wide. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5007/ Acked-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: BCM63XX: remove duplicate spi register definitionsJonas Gorski2013-05-07
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM6338 and BCM6348, and BCM6358 and everything after that share the same register layout. To not have to redefine them for each new chip and keep the code size small, only use the definitions for the first chip with the certain layout. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5006/ Acked-by: John Crispin <blogic@openwrt.org>
| * | | MIPS: Remove redundant instructions from arch_spin_{,try}lock.David Daney2013-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were doing: SRL $r,$?,16 ANDI $r,$r,0xffff The logical right shift by 16 leaves the upper 16 bits clear, so the subsequent masking out of those bits is redundant, and can safely be removed. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Remove further use of .subsectionRalf Baechle2013-04-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 7837314d141c661c70bc13c5050694413ecfe14a [MIPS: Get rid of branches to .subsections] removed most uses of .subsection] removed most uses of .subsection in inline assembler code. It left the instances in spinlock.h alone because we knew their use was in fairly small files where .subsection use was fine but of course this was a fragile assumption. LTO breaks this assumption resulting in build errors due to exceeded branch range, so remove further instances of .subsection. The two functions that still use .macro don't currently cause issues however this use is still fragile. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Get rid of the use of .macro in C code.Ralf Baechle2013-04-11
| | | | | | | | | | | | | | | | | | | | | | | | It fails with LTO and probably has always been a fragile. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Make declarations and definitions of tlbmiss_handler_setup_pgd match.Ralf Baechle2013-04-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tlbmiss_handler_setup_pgd is run-time generated code and it was convenient to pretend the symbol was an array in the generator but a function for the users. LTO gcc won't tolerate this kind of lie anymore so solve the problem through a cast and function pointer instead. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Use inline function to access current thread pointer.Ralf Baechle2013-04-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With LTE this fixes this issue: LDFINAL vmlinux.o arch/mips/built-in.o (symbol from plugin): In function `sgimc_init': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here kernel/built-in.o (symbol from plugin): In function `get_task_mm': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here mm/built-in.o (symbol from plugin): In function `iov_iter_single_seg_count': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here fs/built-in.o (symbol from plugin): In function `finish_no_open': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here ipc/built-in.o (symbol from plugin): In function `ipc_init_ids': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here security/built-in.o (symbol from plugin): In function `key_schedule_gc': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here crypto/built-in.o (symbol from plugin): In function `crypto_find_alg': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here block/built-in.o (symbol from plugin): In function `elv_rb_find': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here argv_split.o (symbol from plugin): In function `argv_free': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here dec_and_lock.o (symbol from plugin): In function `_atomic_dec_and_lock': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here extable.o (symbol from plugin): In function `sort_extable': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here flex_proportions.o (symbol from plugin): In function `fprop_global_init': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here idr.o (symbol from plugin): In function `idr_for_each': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here is_single_threaded.o (symbol from plugin): In function `current_is_single_threaded': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here kobject.o (symbol from plugin): In function `kobject_get': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here kobject_uevent.o (symbol from plugin): In function `add_uevent_var': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here plist.o (symbol from plugin): In function `plist_add': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here radix-tree.o (symbol from plugin): In function `radix_tree_lookup_slot': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here ratelimit.o (symbol from plugin): In function `___ratelimit': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here rwsem-spinlock.o (symbol from plugin): In function `__init_rwsem': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here show_mem.o (symbol from plugin): In function `show_mem': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here timerqueue.o (symbol from plugin): In function `timerqueue_iterate_next': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here vsprintf.o (symbol from plugin): In function `simple_strtoull': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here delay.o (symbol from plugin): In function `__delay': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here mips-atomic.o (symbol from plugin): In function `arch_local_irq_disable': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here uncached.o (symbol from plugin): In function `run_uncached': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here lib/built-in.o (symbol from plugin): In function `_bcd2bin': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here arch/mips/lib/built-in.o (symbol from plugin): In function `ioread8': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here drivers/built-in.o (symbol from plugin): In function `fb_notifier_call_chain': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here net/built-in.o (symbol from plugin): In function `sock_from_file': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here klist.o (symbol from plugin): In function `klist_init': (.text+0x0): multiple definition of `$28' init/built-in.o (symbol from plugin):(.text+0x0): first defined here It also makes the code a little more readable, so let's merge it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Add linux/mm_types.h to pgtable.hCorey Minyard2013-04-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the addition of transparent huge pages, pgtable.h uses struct page. However, it is possible to include pgtable.h without anything defining struct page. So add the include to get it. Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2013-05-01
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal Pull compat cleanup from Al Viro: "Mostly about syscall wrappers this time; there will be another pile with patches in the same general area from various people, but I'd rather push those after both that and vfs.git pile are in." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: syscalls.h: slightly reduce the jungles of macros get rid of union semop in sys_semctl(2) arguments make do_mremap() static sparc: no need to sign-extend in sync_file_range() wrapper ppc compat wrappers for add_key(2) and request_key(2) are pointless x86: trim sys_ia32.h x86: sys32_kill and sys32_mprotect are pointless get rid of compat_sys_semctl() and friends in case of ARCH_WANT_OLD_COMPAT_IPC merge compat sys_ipc instances consolidate compat lookup_dcookie() convert vmsplice to COMPAT_SYSCALL_DEFINE switch getrusage() to COMPAT_SYSCALL_DEFINE switch epoll_pwait to COMPAT_SYSCALL_DEFINE convert sendfile{,64} to COMPAT_SYSCALL_DEFINE switch signalfd{,4}() to COMPAT_SYSCALL_DEFINE make SYSCALL_DEFINE<n>-generated wrappers do asmlinkage_protect make HAVE_SYSCALL_WRAPPERS unconditional consolidate cond_syscall and SYSCALL_ALIAS declarations teach SYSCALL_DEFINE<n> how to deal with long long/unsigned long long get rid of duplicate logics in __SC_....[1-6] definitions
| * | | | consolidate cond_syscall and SYSCALL_ALIAS declarationsAl Viro2013-03-03
| | |_|/ | |/| | | | | | | | | | | | | | | | | | take them to asm/linkage.h, with default in linux/linkage.h Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | | | Merge branch 'akpm' (incoming from Andrew)Linus Torvalds2013-04-29
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge first batch of fixes from Andrew Morton: - A couple of kthread changes - A few minor audit patches - A number of fbdev patches. Florian remains AWOL so I'm picking up some of these. - A few kbuild things - ocfs2 updates - Almost all of the MM queue (And in the meantime, I already have the second big batch from Andrew pending in my mailbox ;^) * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (149 commits) memcg: take reference before releasing rcu_read_lock mem hotunplug: fix kfree() of bootmem memory mmKconfig: add an option to disable bounce mm, nobootmem: do memset() after memblock_reserve() mm, nobootmem: clean-up of free_low_memory_core_early() fs/buffer.c: remove unnecessary init operation after allocating buffer_head. numa, cpu hotplug: change links of CPU and node when changing node number by onlining CPU mm: fix memory_hotplug.c printk format warning mm: swap: mark swap pages writeback before queueing for direct IO swap: redirty page if page write fails on swap file mm, memcg: give exiting processes access to memory reserves thp: fix huge zero page logic for page with pfn == 0 memcg: avoid accessing memcg after releasing reference fs: fix fsync() error reporting memblock: fix missing comment of memblock_insert_region() mm: Remove unused parameter of pages_correctly_reserved() firmware, memmap: fix firmware_map_entry leak mm/vmstat: add note on safety of drain_zonestat mm: thp: add split tail pages to shrink page list in page reclaim mm: allow for outstanding swap writeback accounting ...
| * | | | mm/hugetlb: add more arch-defined huge_pte functionsGerald Schaefer2013-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit abf09bed3cce ("s390/mm: implement software dirty bits") introduced another difference in the pte layout vs. the pmd layout on s390, thoroughly breaking the s390 support for hugetlbfs. This requires replacing some more pte_xxx functions in mm/hugetlbfs.c with a huge_pte_xxx version. This patch introduces those huge_pte_xxx functions and their generic implementation in asm-generic/hugetlb.h, which will now be included on all architectures supporting hugetlbfs apart from s390. This change will be a no-op for those architectures. [akpm@linux-foundation.org: fix warning] Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Hugh Dickins <hughd@google.com> Cc: Hillf Danton <dhillf@gmail.com> Acked-by: Michal Hocko <mhocko@suse.cz> [for !s390 parts] Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | | Merge tag 'spi-v3.10' of ↵Linus Torvalds2013-04-29
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A fairly quiet release for SPI, mainly driver work. A few highlights: - Supports bits per word compatibility checking in the core. - Allow use of the IP used in Freescale SPI controllers outside Freescale SoCs. - DMA support for the Atmel SPI driver. - New drivers for the BCM2835 and Tegra114" * tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits) spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init() ARM: dts: add pinctrl property for spi node for atmel SoC ARM: dts: add spi nodes for the atmel boards ARM: dts: add spi nodes for atmel SoC ARM: at91: add clocks for spi dt entries spi/spi-atmel: add dmaengine support spi/spi-atmel: add flag to controller data for lock operations spi/spi-atmel: add physical base address spi/sirf: fix MODULE_DEVICE_TABLE MAINTAINERS: Add git repository and update my address spi/s3c64xx: Check for errors in dmaengine prepare_transfer() spi/s3c64xx: Fix non-dmaengine usage spi: omap2-mcspi: fix error return code in omap2_mcspi_probe() spi/s3c64xx: let device core setup the default pin configuration MAINTAINERS: Update Grant's email address and maintainership spi: omap2-mcspi: Fix transfers if DMADEVICES is not set spi: s3c64xx: move to generic dmaengine API spi-gpio: init CS before spi_bitbang_setup() spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop ...
| * | | | spi/bcm63xx: remove unused speed_hz variableJonas Gorski2013-04-08
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | speed_hz is a write only member, so we can safely remove it and its generation. Also fixes the missing clk_put after getting the periph clock. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | | / Revert "MIPS: page.h: Provide more readable definition for PAGE_MASK."Ralf Baechle2013-04-22
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c17a6554782ad531f4713b33fd6339ba67ef6391. Manuel Lauss writes: lmo commit c17a6554 (MIPS: page.h: Provide more readable definition for PAGE_MASK) apparently breaks ioremap of 36-bit addresses on my Alchemy systems (PCI and PCMCIA) The reason is that in arch/mips/mm/ioremap.c line 157 (phys_addr &= PAGE_MASK) bits 32-35 are cut off. Seems the new PAGE_MASK is explicitly 32bit, or one could make it signed instead of unsigned long.
* | | Fix breakage in MIPS siginfo handlingDavid Howells2013-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS's siginfo handling has been broken since this commit: commit 574c4866e33d648520a8bd5bf6f573ea6e554e88 Author: Al Viro <viro@zeniv.linux.org.uk> Date: Sun Nov 25 22:24:19 2012 -0500 consolidate kernel-side struct sigaction declarations for 64-bit BE MIPS CPUs. The UAPI variant looks like this: struct sigaction { unsigned int sa_flags; __sighandler_t sa_handler; sigset_t sa_mask; }; but the core kernel's variant looks like this: struct sigaction { #ifndef __ARCH_HAS_ODD_SIGACTION __sighandler_t sa_handler; unsigned long sa_flags; #else unsigned long sa_flags; __sighandler_t sa_handler; #endif #ifdef __ARCH_HAS_SA_RESTORER __sigrestore_t sa_restorer; #endif sigset_t sa_mask; }; The problem is that sa_flags has been changed from an unsigned int to an unsigned long. Fix this by making sa_flags unsigned int if __ARCH_HAS_ODD_SIGACTION is defined. Whilst we're at it, rename __ARCH_HAS_ODD_SIGACTION to __ARCH_HAS_IRIX_SIGACTION. Signed-off-by: David Howells <dhowells@redhat.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org Acked-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: BCM63XX: Make nvram checksum failure non fatalJonas Gorski2013-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some vendors modify the nvram layout moving the checksum to a different place or dropping entirely, so reduce the checksum failure to a warning. Reported-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-19
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 32a7ede (MIPS: dsp: Add assembler support for DSP ASEs) has enabled the use of DSP ASE specific instructions such as rddsp and wrdsp under the idea that all code path that will make use of these two instructions are properly checking for cpu_has_dsp to ensure that the particular CPU we are running on *actually* supports DSP ASE. This commit actually causes the following oops on QEMU Malta emulating a MIPS 24Kc without the DSP ASE implemented: [ 7.960000] Reserved instruction in kernel [ 7.960000] Cpu 0 [ 7.960000] $ 0 : 00000000 00000000 00000014 00000005 [ 7.960000] $ 4 : 8fc2de48 00000001 00000000 8f59ddb0 [ 7.960000] $ 8 : 8f5ceec4 00000018 00000c00 00800000 [ 7.960000] $12 : 00000100 00000200 00000000 00457b84 [ 7.960000] $16 : 00000000 8fc2ba78 8f4ec980 00000001 [ 7.960000] $20 : 80418f90 00000000 00000000 000002dd [ 7.960000] $24 : 0000009c 7730d7b8 [ 7.960000] $28 : 8f59c000 8f59dd38 00000001 80104248 [ 7.960000] Hi : 0000001d [ 7.960000] Lo : 0000000b [ 7.960000] epc : 801041ec thread_saved_pc+0x2c/0x38 [ 7.960000] Not tainted [ 7.960000] ra : 80104248 get_wchan+0x48/0xac [ 7.960000] Status: 1000b703 KERNEL EXL IE [ 7.960000] Cause : 10800028 [ 7.960000] PrId : 00019300 (MIPS 24Kc) [ 7.960000] Modules linked in: [ 7.960000] Process killall (pid: 1574, threadinfo=8f59c000, task=8fd14558, tls=773aa440) [ 7.960000] Stack : 8fc2ba78 8012b008 0000000c 0000001d 00000000 00000000 8f58a380 8f58a380 8fc2ba78 80202668 8f59de78 8f468600 8f59de28 801b2a3c 8f59df00 8f98ba20 74696e69 8f468600 8f59de28 801b7308 0081c007 00000000 00000000 00000000 00000000 00000000 00000000 00000000 8fc2bbb4 00000001 0000001d 0000000b 77f038cc 7fe80648 ffffffff ffffffff 00000000 00000001 0016e000 00000000 ... [ 7.960000] Call Trace: [ 7.960000] [<801041ec>] thread_saved_pc+0x2c/0x38 [ 7.960000] [<80104248>] get_wchan+0x48/0xac The disassembly of thread_saved_pc points to the following: 000006d0 <thread_saved_pc>: 6d0: 8c820208 lw v0,520(a0) 6d4: 3c030000 lui v1,0x0 6d8: 24630000 addiu v1,v1,0 6dc: 10430008 beq v0,v1,700 <thread_saved_pc+0x30> 6e0: 00000000 nop 6e4: 3c020000 lui v0,0x0 6e8: 8c43000c lw v1,12(v0) 6ec: 04620004 bltzl v1,700 <thread_saved_pc+0x30> 6f0: 00001021 move v0,zero 6f4: 8c840200 lw a0,512(a0) 6f8: 00031080 sll v0,v1,0x2 6fc: 7c44100a lwx v0,a0(v0) <------------ 700: 03e00008 jr ra 704: 00000000 nop If we specifically disable -mdsp/-mdspr2 for arch/mips/kernel/process.o, we get the following (non-crashing) assembly: 00000708 <thread_saved_pc>: 708: 8c820208 lw v0,520(a0) 70c: 3c030000 lui v1,0x0 710: 24630000 addiu v1,v1,0 714: 10430009 beq v0,v1,73c <thread_saved_pc+0x34> 718: 00000000 nop 71c: 3c020000 lui v0,0x0 720: 8c42000c lw v0,12(v0) 724: 04420005 bltzl v0,73c <thread_saved_pc+0x34> 728: 00001021 move v0,zero 72c: 8c830200 lw v1,512(a0) 730: 00021080 sll v0,v0,0x2 734: 00431021 addu v0,v0,v1 738: 8c420000 lw v0,0(v0) 73c: 03e00008 jr ra 740: 00000000 nop The specific line that leads a different assembly being produced is: unsigned long thread_saved_pc(struct task_struct *tsk) ... return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; <--- The problem here is that the compiler was given the right to use DSP instructions with the -mdsp / -mdspr2 command-line switches and performed some optimization for us and used DSP ASE instructions where we are not checking that the running CPU actually supports DSP ASE. This patch fixes the issue by partially reverting commit 32a7ede for arch/mips/kernel/Makefile in order to remove the -mdsp / -mdspr2 compiler command-line switches such that we are now guaranteed that the compiler will not optimize using DSP ASE reserved instructions. We also need to fixup the rddsp/wrdsp and m{t,h}{hi,lo}{0,1,2,3} macros in arch/mips/include/asm/mipsregs.h to tell the assembler that we are going to explicitely use DSP ASE reserved instructions. The comment in arch/mips/kernel/Makefile is also updated to reflect that. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: SEAD3: Enable LL/SC.Ralf Baechle2013-03-12
| | | | | | | | | | | | | | All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are MIPS32 or MIPS64 CPUs that have ll/sc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Get rid of CONFIG_CPU_HAS_LLSC againPaul Bolle2013-03-12
|/ | | | | | | | | | | | | Commit f7ade3c168e4f437c11f57be012992bbb0e3075c ("MIPS: Get rid of CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that macro and its Kconfig symbol popped up again. Get rid of those again. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4978/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-03-02
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
| * Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-21
| |\ | | | | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| | * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The presence of the MIPS Virtualization Application-Specific Extension is indicated by CP0_Config3[23]. Probe for this and report it in /proc/cpuinfo. Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4904/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add USB controller registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add PCI controller registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add WMAC registration code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}Gabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add GPIO setup code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: ath79: add clock setup code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin <blogic@openwrt.org>
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